sound/pci/oxygen/xonar_cs43xx.c

   1 /*
   2  * card driver for models with CS4398/CS4362A DACs (Xonar D1/DX)
   3  *
   4  * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
   5  *
   6  *
   7  *  This driver is free software; you can redistribute it and/or modify
   8  *  it under the terms of the GNU General Public License, version 2.
   9  *
  10  *  This driver is distributed in the hope that it will be useful,
  11  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  *  GNU General Public License for more details.
  14  *
  15  *  You should have received a copy of the GNU General Public License
  16  *  along with this driver; if not, see <http://www.gnu.org/licenses/>.
  17  */
  18
  19 /*
  20  * Xonar D1/DX
  21  * -----------
  22  *
  23  * CMI8788:
  24  *
  25  * I²C <-> CS4398 (front)
  26  *     <-> CS4362A (surround, center/LFE, back)
  27  *
  28  * GPI 0 <- external power present (DX only)
  29  *
  30  * GPIO 0 -> enable output to speakers
  31  * GPIO 1 -> route output to front panel
  32  * GPIO 2 -> M0 of CS5361
  33  * GPIO 3 -> M1 of CS5361
  34  * GPIO 8 -> route input jack to line-in (0) or mic-in (1)
  35  *
  36  * CS4398:
  37  *
  38  * AD0 <- 1
  39  * AD1 <- 1
  40  *
  41  * CS4362A:
  42  *
  43  * AD0 <- 0
  44  *
  45  * CM9780:
  46  *
  47  * GPO 0 -> route line-in (0) or AC97 output (1) to CS5361 input
  48  */
  49
  50 #include <linux/pci.h>
  51 #include <linux/delay.h>
  52 #include <sound/ac97_codec.h>
  53 #include <sound/control.h>
  54 #include <sound/core.h>
  55 #include <sound/pcm.h>
  56 #include <sound/pcm_params.h>
  57 #include <sound/tlv.h>
  58 #include "xonar.h"
  59 #include "cm9780.h"
  60 #include "cs4398.h"
  61 #include "cs4362a.h"
  62
  63 #define GPI_EXT_POWER           0x01
  64 #define GPIO_D1_OUTPUT_ENABLE   0x0001
  65 #define GPIO_D1_FRONT_PANEL     0x0002
  66 #define GPIO_D1_MAGIC           0x00c0
  67 #define GPIO_D1_INPUT_ROUTE     0x0100
  68
  69 #define I2C_DEVICE_CS4398       0x9e    /* 10011, AD1=1, AD0=1, /W=0 */
  70 #define I2C_DEVICE_CS4362A      0x30    /* 001100, AD0=0, /W=0 */
  71
  72 struct xonar_cs43xx {
  73         struct xonar_generic generic;
  74         u8 cs4398_regs[8];
  75         u8 cs4362a_regs[15];
  76 };
  77
  78 static void cs4398_write(struct oxygen *chip, u8 reg, u8 value)
  79 {
  80         struct xonar_cs43xx *data = chip->model_data;
  81
  82         oxygen_write_i2c(chip, I2C_DEVICE_CS4398, reg, value);
  83         if (reg < ARRAY_SIZE(data->cs4398_regs))
  84                 data->cs4398_regs[reg] = value;
  85 }
  86
  87 static void cs4398_write_cached(struct oxygen *chip, u8 reg, u8 value)
  88 {
  89         struct xonar_cs43xx *data = chip->model_data;
  90
  91         if (value != data->cs4398_regs[reg])
  92                 cs4398_write(chip, reg, value);
  93 }
  94
  95 static void cs4362a_write(struct oxygen *chip, u8 reg, u8 value)
  96 {
  97         struct xonar_cs43xx *data = chip->model_data;
  98
  99         oxygen_write_i2c(chip, I2C_DEVICE_CS4362A, reg, value);
 100         if (reg < ARRAY_SIZE(data->cs4362a_regs))
 101                 data->cs4362a_regs[reg] = value;
 102 }
 103
 104 static void cs4362a_write_cached(struct oxygen *chip, u8 reg, u8 value)
 105 {
 106         struct xonar_cs43xx *data = chip->model_data;
 107
 108         if (value != data->cs4362a_regs[reg])
 109                 cs4362a_write(chip, reg, value);
 110 }
 111
 112 static void cs43xx_registers_init(struct oxygen *chip)
 113 {
 114         struct xonar_cs43xx *data = chip->model_data;
 115         unsigned int i;
 116
 117         /* set CPEN (control port mode) and power down */
 118         cs4398_write(chip, 8, CS4398_CPEN | CS4398_PDN);
 119         cs4362a_write(chip, 0x01, CS4362A_PDN | CS4362A_CPEN);
 120         /* configure */
 121         cs4398_write(chip, 2, data->cs4398_regs[2]);
 122         cs4398_write(chip, 3, CS4398_ATAPI_B_R | CS4398_ATAPI_A_L);
 123         cs4398_write(chip, 4, data->cs4398_regs[4]);
 124         cs4398_write(chip, 5, data->cs4398_regs[5]);
 125         cs4398_write(chip, 6, data->cs4398_regs[6]);
 126         cs4398_write(chip, 7, data->cs4398_regs[7]);
 127         cs4362a_write(chip, 0x02, CS4362A_DIF_LJUST);
 128         cs4362a_write(chip, 0x03, CS4362A_MUTEC_6 | CS4362A_AMUTE |
 129                       CS4362A_RMP_UP | CS4362A_ZERO_CROSS | CS4362A_SOFT_RAMP);
 130         cs4362a_write(chip, 0x04, data->cs4362a_regs[0x04]);
 131         cs4362a_write(chip, 0x05, 0);
 132         for (i = 6; i <= 14; ++i)
 133                 cs4362a_write(chip, i, data->cs4362a_regs[i]);
 134         /* clear power down */
 135         cs4398_write(chip, 8, CS4398_CPEN);
 136         cs4362a_write(chip, 0x01, CS4362A_CPEN);
 137 }
 138
 139 static void xonar_d1_init(struct oxygen *chip)
 140 {
 141         struct xonar_cs43xx *data = chip->model_data;
 142
 143         data->generic.anti_pop_delay = 800;
 144         data->generic.output_enable_bit = GPIO_D1_OUTPUT_ENABLE;
 145         data->cs4398_regs[2] =
 146                 CS4398_FM_SINGLE | CS4398_DEM_NONE | CS4398_DIF_LJUST;
 147         data->cs4398_regs[4] = CS4398_MUTEP_LOW |
 148                 CS4398_MUTE_B | CS4398_MUTE_A | CS4398_PAMUTE;
 149         data->cs4398_regs[5] = 60 * 2;
 150         data->cs4398_regs[6] = 60 * 2;
 151         data->cs4398_regs[7] = CS4398_RMP_DN | CS4398_RMP_UP |
 152                 CS4398_ZERO_CROSS | CS4398_SOFT_RAMP;
 153         data->cs4362a_regs[4] = CS4362A_RMP_DN | CS4362A_DEM_NONE;
 154         data->cs4362a_regs[6] = CS4362A_FM_SINGLE |
 155                 CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L;
 156         data->cs4362a_regs[7] = 60 | CS4362A_MUTE;
 157         data->cs4362a_regs[8] = 60 | CS4362A_MUTE;
 158         data->cs4362a_regs[9] = data->cs4362a_regs[6];
 159         data->cs4362a_regs[10] = 60 | CS4362A_MUTE;
 160         data->cs4362a_regs[11] = 60 | CS4362A_MUTE;
 161         data->cs4362a_regs[12] = data->cs4362a_regs[6];
 162         data->cs4362a_regs[13] = 60 | CS4362A_MUTE;
 163         data->cs4362a_regs[14] = 60 | CS4362A_MUTE;
 164
 165         oxygen_write16(chip, OXYGEN_2WIRE_BUS_STATUS,
 166                        OXYGEN_2WIRE_LENGTH_8 |
 167                        OXYGEN_2WIRE_INTERRUPT_MASK |
 168                        OXYGEN_2WIRE_SPEED_FAST);
 169
 170         cs43xx_registers_init(chip);
 171
 172         oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL,
 173                           GPIO_D1_FRONT_PANEL |
 174                           GPIO_D1_MAGIC |
 175                           GPIO_D1_INPUT_ROUTE);
 176         oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA,
 177                             GPIO_D1_FRONT_PANEL | GPIO_D1_INPUT_ROUTE);
 178
 179         xonar_init_cs53x1(chip);
 180         xonar_enable_output(chip);
 181
 182         snd_component_add(chip->card, "CS4398");
 183         snd_component_add(chip->card, "CS4362A");
 184         snd_component_add(chip->card, "CS5361");
 185 }
 186
 187 static void xonar_dx_init(struct oxygen *chip)
 188 {
 189         struct xonar_cs43xx *data = chip->model_data;
 190
 191         data->generic.ext_power_reg = OXYGEN_GPI_DATA;
 192         data->generic.ext_power_int_reg = OXYGEN_GPI_INTERRUPT_MASK;
 193         data->generic.ext_power_bit = GPI_EXT_POWER;
 194         xonar_init_ext_power(chip);
 195         xonar_d1_init(chip);
 196 }
 197
 198 static void xonar_d1_cleanup(struct oxygen *chip)
 199 {
 200         xonar_disable_output(chip);
 201         cs4362a_write(chip, 0x01, CS4362A_PDN | CS4362A_CPEN);
 202         oxygen_clear_bits8(chip, OXYGEN_FUNCTION, OXYGEN_FUNCTION_RESET_CODEC);
 203 }
 204
 205 static void xonar_d1_suspend(struct oxygen *chip)
 206 {
 207         xonar_d1_cleanup(chip);
 208 }
 209
 210 static void xonar_d1_resume(struct oxygen *chip)
 211 {
 212         oxygen_set_bits8(chip, OXYGEN_FUNCTION, OXYGEN_FUNCTION_RESET_CODEC);
 213         msleep(1);
 214         cs43xx_registers_init(chip);
 215         xonar_enable_output(chip);
 216 }
 217
 218 static void set_cs43xx_params(struct oxygen *chip,
 219                               struct snd_pcm_hw_params *params)
 220 {
 221         struct xonar_cs43xx *data = chip->model_data;
 222         u8 cs4398_fm, cs4362a_fm;
 223
 224         if (params_rate(params) <= 50000) {
 225                 cs4398_fm = CS4398_FM_SINGLE;
 226                 cs4362a_fm = CS4362A_FM_SINGLE;
 227         } else if (params_rate(params) <= 100000) {
 228                 cs4398_fm = CS4398_FM_DOUBLE;
 229                 cs4362a_fm = CS4362A_FM_DOUBLE;
 230         } else {
 231                 cs4398_fm = CS4398_FM_QUAD;
 232                 cs4362a_fm = CS4362A_FM_QUAD;
 233         }
 234         cs4398_fm |= CS4398_DEM_NONE | CS4398_DIF_LJUST;
 235         cs4398_write_cached(chip, 2, cs4398_fm);
 236         cs4362a_fm |= data->cs4362a_regs[6] & ~CS4362A_FM_MASK;
 237         cs4362a_write_cached(chip, 6, cs4362a_fm);
 238         cs4362a_write_cached(chip, 12, cs4362a_fm);
 239         cs4362a_fm &= CS4362A_FM_MASK;
 240         cs4362a_fm |= data->cs4362a_regs[9] & ~CS4362A_FM_MASK;
 241         cs4362a_write_cached(chip, 9, cs4362a_fm);
 242 }
 243
 244 static void update_cs4362a_volumes(struct oxygen *chip)
 245 {
 246         unsigned int i;
 247         u8 mute;
 248
 249         mute = chip->dac_mute ? CS4362A_MUTE : 0;
 250         for (i = 0; i < 6; ++i)
 251                 cs4362a_write_cached(chip, 7 + i + i / 2,
 252                                      (127 - chip->dac_volume[2 + i]) | mute);
 253 }
 254
 255 static void update_cs43xx_volume(struct oxygen *chip)
 256 {
 257         cs4398_write_cached(chip, 5, (127 - chip->dac_volume[0]) * 2);
 258         cs4398_write_cached(chip, 6, (127 - chip->dac_volume[1]) * 2);
 259         update_cs4362a_volumes(chip);
 260 }
 261
 262 static void update_cs43xx_mute(struct oxygen *chip)
 263 {
 264         u8 reg;
 265
 266         reg = CS4398_MUTEP_LOW | CS4398_PAMUTE;
 267         if (chip->dac_mute)
 268                 reg |= CS4398_MUTE_B | CS4398_MUTE_A;
 269         cs4398_write_cached(chip, 4, reg);
 270         update_cs4362a_volumes(chip);
 271 }
 272
 273 static void update_cs43xx_center_lfe_mix(struct oxygen *chip, bool mixed)
 274 {
 275         struct xonar_cs43xx *data = chip->model_data;
 276         u8 reg;
 277
 278         reg = data->cs4362a_regs[9] & ~CS4362A_ATAPI_MASK;
 279         if (mixed)
 280                 reg |= CS4362A_ATAPI_B_LR | CS4362A_ATAPI_A_LR;
 281         else
 282                 reg |= CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L;
 283         cs4362a_write_cached(chip, 9, reg);
 284 }
 285
 286 static const struct snd_kcontrol_new front_panel_switch = {
 287         .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
 288         .name = "Front Panel Playback Switch",
 289         .info = snd_ctl_boolean_mono_info,
 290         .get = xonar_gpio_bit_switch_get,
 291         .put = xonar_gpio_bit_switch_put,
 292         .private_value = GPIO_D1_FRONT_PANEL,
 293 };
 294
 295 static int rolloff_info(struct snd_kcontrol *ctl,
 296                         struct snd_ctl_elem_info *info)
 297 {
 298         static const char *const names[2] = {
 299                 "Fast Roll-off", "Slow Roll-off"
 300         };
 301
 302         info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
 303         info->count = 1;
 304         info->value.enumerated.items = 2;
 305         if (info->value.enumerated.item >= 2)
 306                 info->value.enumerated.item = 1;
 307         strcpy(info->value.enumerated.name, names[info->value.enumerated.item]);
 308         return 0;
 309 }
 310
 311 static int rolloff_get(struct snd_kcontrol *ctl,
 312                        struct snd_ctl_elem_value *value)
 313 {
 314         struct oxygen *chip = ctl->private_data;
 315         struct xonar_cs43xx *data = chip->model_data;
 316
 317         value->value.enumerated.item[0] =
 318                 (data->cs4398_regs[7] & CS4398_FILT_SEL) != 0;
 319         return 0;
 320 }
 321
 322 static int rolloff_put(struct snd_kcontrol *ctl,
 323                        struct snd_ctl_elem_value *value)
 324 {
 325         struct oxygen *chip = ctl->private_data;
 326         struct xonar_cs43xx *data = chip->model_data;
 327         int changed;
 328         u8 reg;
 329
 330         mutex_lock(&chip->mutex);
 331         reg = data->cs4398_regs[7];
 332         if (value->value.enumerated.item[0])
 333                 reg |= CS4398_FILT_SEL;
 334         else
 335                 reg &= ~CS4398_FILT_SEL;
 336         changed = reg != data->cs4398_regs[7];
 337         if (changed) {
 338                 cs4398_write(chip, 7, reg);
 339                 if (reg & CS4398_FILT_SEL)
 340                         reg = data->cs4362a_regs[0x04] | CS4362A_FILT_SEL;
 341                 else
 342                         reg = data->cs4362a_regs[0x04] & ~CS4362A_FILT_SEL;
 343                 cs4362a_write(chip, 0x04, reg);
 344         }
 345         mutex_unlock(&chip->mutex);
 346         return changed;
 347 }
 348
 349 static const struct snd_kcontrol_new rolloff_control = {
 350         .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
 351         .name = "DAC Filter Playback Enum",
 352         .info = rolloff_info,
 353         .get = rolloff_get,
 354         .put = rolloff_put,
 355 };
 356
 357 static void xonar_d1_line_mic_ac97_switch(struct oxygen *chip,
 358                                           unsigned int reg, unsigned int mute)
 359 {
 360         if (reg == AC97_LINE) {
 361                 spin_lock_irq(&chip->reg_lock);
 362                 oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
 363                                       mute ? GPIO_D1_INPUT_ROUTE : 0,
 364                                       GPIO_D1_INPUT_ROUTE);
 365                 spin_unlock_irq(&chip->reg_lock);
 366         }
 367 }
 368
 369 static const DECLARE_TLV_DB_SCALE(cs4362a_db_scale, -6000, 100, 0);
 370
 371 static int xonar_d1_mixer_init(struct oxygen *chip)
 372 {
 373         int err;
 374
 375         err = snd_ctl_add(chip->card, snd_ctl_new1(&front_panel_switch, chip));
 376         if (err < 0)
 377                 return err;
 378         err = snd_ctl_add(chip->card, snd_ctl_new1(&rolloff_control, chip));
 379         if (err < 0)
 380                 return err;
 381         return 0;
 382 }
 383
 384 static const struct oxygen_model model_xonar_d1 = {
 385         .longname = "Asus Virtuoso 100",
 386         .chip = "AV200",
 387         .init = xonar_d1_init,
 388         .mixer_init = xonar_d1_mixer_init,
 389         .cleanup = xonar_d1_cleanup,
 390         .suspend = xonar_d1_suspend,
 391         .resume = xonar_d1_resume,
 392         .get_i2s_mclk = oxygen_default_i2s_mclk,
 393         .set_dac_params = set_cs43xx_params,
 394         .set_adc_params = xonar_set_cs53x1_params,
 395         .update_dac_volume = update_cs43xx_volume,
 396         .update_dac_mute = update_cs43xx_mute,
 397         .update_center_lfe_mix = update_cs43xx_center_lfe_mix,
 398         .ac97_switch = xonar_d1_line_mic_ac97_switch,
 399         .dac_tlv = cs4362a_db_scale,
 400         .model_data_size = sizeof(struct xonar_cs43xx),
 401         .device_config = PLAYBACK_0_TO_I2S |
 402                          PLAYBACK_1_TO_SPDIF |
 403                          CAPTURE_0_FROM_I2S_2 |
 404                          AC97_FMIC_SWITCH,
 405         .dac_channels = 8,
 406         .dac_volume_min = 127 - 60,
 407         .dac_volume_max = 127,
 408         .function_flags = OXYGEN_FUNCTION_2WIRE,
 409         .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
 410         .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
 411 };
 412
 413 int __devinit get_xonar_cs43xx_model(struct oxygen *chip,
 414                                      const struct pci_device_id *id)
 415 {
 416         switch (id->subdevice) {
 417         case 0x834f:
 418                 chip->model = model_xonar_d1;
 419                 chip->model.shortname = "Xonar D1";
 420                 break;
 421         case 0x8275:
 422         case 0x8327:
 423                 chip->model = model_xonar_d1;
 424                 chip->model.shortname = "Xonar DX";
 425                 chip->model.init = xonar_dx_init;
 426                 break;
 427         default:
 428                 return -EINVAL;
 429         }
 430         return 0;
 431 }