2 * ALSA driver for RME Hammerfall DSP audio interface(s)
4 * Copyright (c) 2002 Paul Davis
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 #include <linux/init.h>
25 #include <linux/delay.h>
26 #include <linux/interrupt.h>
27 #include <linux/pci.h>
28 #include <linux/firmware.h>
29 #include <linux/module.h>
30 #include <linux/math64.h>
31 #include <linux/vmalloc.h>
33 #include <sound/core.h>
34 #include <sound/control.h>
35 #include <sound/pcm.h>
36 #include <sound/info.h>
37 #include <sound/asoundef.h>
38 #include <sound/rawmidi.h>
39 #include <sound/hwdep.h>
40 #include <sound/initval.h>
41 #include <sound/hdsp.h>
43 #include <asm/byteorder.h>
44 #include <asm/current.h>
47 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
48 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
49 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
51 module_param_array(index, int, NULL, 0444);
52 MODULE_PARM_DESC(index, "Index value for RME Hammerfall DSP interface.");
53 module_param_array(id, charp, NULL, 0444);
54 MODULE_PARM_DESC(id, "ID string for RME Hammerfall DSP interface.");
55 module_param_array(enable, bool, NULL, 0444);
56 MODULE_PARM_DESC(enable, "Enable/disable specific Hammerfall DSP soundcards.");
57 MODULE_AUTHOR("Paul Davis <paul@linuxaudiosystems.com>, Marcus Andersson, Thomas Charbonnel <thomas@undata.org>");
58 MODULE_DESCRIPTION("RME Hammerfall DSP");
59 MODULE_LICENSE("GPL");
60 MODULE_SUPPORTED_DEVICE("{{RME Hammerfall-DSP},"
63 MODULE_FIRMWARE("rpm_firmware.bin");
64 MODULE_FIRMWARE("multiface_firmware.bin");
65 MODULE_FIRMWARE("multiface_firmware_rev11.bin");
66 MODULE_FIRMWARE("digiface_firmware.bin");
67 MODULE_FIRMWARE("digiface_firmware_rev11.bin");
69 #define HDSP_MAX_CHANNELS 26
70 #define HDSP_MAX_DS_CHANNELS 14
71 #define HDSP_MAX_QS_CHANNELS 8
72 #define DIGIFACE_SS_CHANNELS 26
73 #define DIGIFACE_DS_CHANNELS 14
74 #define MULTIFACE_SS_CHANNELS 18
75 #define MULTIFACE_DS_CHANNELS 14
76 #define H9652_SS_CHANNELS 26
77 #define H9652_DS_CHANNELS 14
78 /* This does not include possible Analog Extension Boards
79 AEBs are detected at card initialization
81 #define H9632_SS_CHANNELS 12
82 #define H9632_DS_CHANNELS 8
83 #define H9632_QS_CHANNELS 4
84 #define RPM_CHANNELS 6
86 /* Write registers. These are defined as byte-offsets from the iobase value.
88 #define HDSP_resetPointer 0
89 #define HDSP_freqReg 0
90 #define HDSP_outputBufferAddress 32
91 #define HDSP_inputBufferAddress 36
92 #define HDSP_controlRegister 64
93 #define HDSP_interruptConfirmation 96
94 #define HDSP_outputEnable 128
95 #define HDSP_control2Reg 256
96 #define HDSP_midiDataOut0 352
97 #define HDSP_midiDataOut1 356
98 #define HDSP_fifoData 368
99 #define HDSP_inputEnable 384
101 /* Read registers. These are defined as byte-offsets from the iobase value
104 #define HDSP_statusRegister 0
105 #define HDSP_timecode 128
106 #define HDSP_status2Register 192
107 #define HDSP_midiDataIn0 360
108 #define HDSP_midiDataIn1 364
109 #define HDSP_midiStatusOut0 384
110 #define HDSP_midiStatusOut1 388
111 #define HDSP_midiStatusIn0 392
112 #define HDSP_midiStatusIn1 396
113 #define HDSP_fifoStatus 400
115 /* the meters are regular i/o-mapped registers, but offset
116 considerably from the rest. the peak registers are reset
117 when read; the least-significant 4 bits are full-scale counters;
118 the actual peak value is in the most-significant 24 bits.
121 #define HDSP_playbackPeakLevel 4096 /* 26 * 32 bit values */
122 #define HDSP_inputPeakLevel 4224 /* 26 * 32 bit values */
123 #define HDSP_outputPeakLevel 4352 /* (26+2) * 32 bit values */
124 #define HDSP_playbackRmsLevel 4612 /* 26 * 64 bit values */
125 #define HDSP_inputRmsLevel 4868 /* 26 * 64 bit values */
128 /* This is for H9652 cards
129 Peak values are read downward from the base
130 Rms values are read upward
131 There are rms values for the outputs too
132 26*3 values are read in ss mode
133 14*3 in ds mode, with no gap between values
135 #define HDSP_9652_peakBase 7164
136 #define HDSP_9652_rmsBase 4096
138 /* c.f. the hdsp_9632_meters_t struct */
139 #define HDSP_9632_metersBase 4096
141 #define HDSP_IO_EXTENT 7168
143 /* control2 register bits */
145 #define HDSP_TMS 0x01
146 #define HDSP_TCK 0x02
147 #define HDSP_TDI 0x04
148 #define HDSP_JTAG 0x08
149 #define HDSP_PWDN 0x10
150 #define HDSP_PROGRAM 0x020
151 #define HDSP_CONFIG_MODE_0 0x040
152 #define HDSP_CONFIG_MODE_1 0x080
153 #define HDSP_VERSION_BIT (0x100 | HDSP_S_LOAD)
154 #define HDSP_BIGENDIAN_MODE 0x200
155 #define HDSP_RD_MULTIPLE 0x400
156 #define HDSP_9652_ENABLE_MIXER 0x800
157 #define HDSP_TDO 0x10000000
159 #define HDSP_S_PROGRAM (HDSP_PROGRAM|HDSP_CONFIG_MODE_0)
160 #define HDSP_S_LOAD (HDSP_PROGRAM|HDSP_CONFIG_MODE_1)
162 /* Control Register bits */
164 #define HDSP_Start (1<<0) /* start engine */
165 #define HDSP_Latency0 (1<<1) /* buffer size = 2^n where n is defined by Latency{2,1,0} */
166 #define HDSP_Latency1 (1<<2) /* [ see above ] */
167 #define HDSP_Latency2 (1<<3) /* [ see above ] */
168 #define HDSP_ClockModeMaster (1<<4) /* 1=Master, 0=Slave/Autosync */
169 #define HDSP_AudioInterruptEnable (1<<5) /* what do you think ? */
170 #define HDSP_Frequency0 (1<<6) /* 0=44.1kHz/88.2kHz/176.4kHz 1=48kHz/96kHz/192kHz */
171 #define HDSP_Frequency1 (1<<7) /* 0=32kHz/64kHz/128kHz */
172 #define HDSP_DoubleSpeed (1<<8) /* 0=normal speed, 1=double speed */
173 #define HDSP_SPDIFProfessional (1<<9) /* 0=consumer, 1=professional */
174 #define HDSP_SPDIFEmphasis (1<<10) /* 0=none, 1=on */
175 #define HDSP_SPDIFNonAudio (1<<11) /* 0=off, 1=on */
176 #define HDSP_SPDIFOpticalOut (1<<12) /* 1=use 1st ADAT connector for SPDIF, 0=do not */
177 #define HDSP_SyncRef2 (1<<13)
178 #define HDSP_SPDIFInputSelect0 (1<<14)
179 #define HDSP_SPDIFInputSelect1 (1<<15)
180 #define HDSP_SyncRef0 (1<<16)
181 #define HDSP_SyncRef1 (1<<17)
182 #define HDSP_AnalogExtensionBoard (1<<18) /* For H9632 cards */
183 #define HDSP_XLRBreakoutCable (1<<20) /* For H9632 cards */
184 #define HDSP_Midi0InterruptEnable (1<<22)
185 #define HDSP_Midi1InterruptEnable (1<<23)
186 #define HDSP_LineOut (1<<24)
187 #define HDSP_ADGain0 (1<<25) /* From here : H9632 specific */
188 #define HDSP_ADGain1 (1<<26)
189 #define HDSP_DAGain0 (1<<27)
190 #define HDSP_DAGain1 (1<<28)
191 #define HDSP_PhoneGain0 (1<<29)
192 #define HDSP_PhoneGain1 (1<<30)
193 #define HDSP_QuadSpeed (1<<31)
195 /* RPM uses some of the registers for special purposes */
196 #define HDSP_RPM_Inp12 0x04A00
197 #define HDSP_RPM_Inp12_Phon_6dB 0x00800 /* Dolby */
198 #define HDSP_RPM_Inp12_Phon_0dB 0x00000 /* .. */
199 #define HDSP_RPM_Inp12_Phon_n6dB 0x04000 /* inp_0 */
200 #define HDSP_RPM_Inp12_Line_0dB 0x04200 /* Dolby+PRO */
201 #define HDSP_RPM_Inp12_Line_n6dB 0x00200 /* PRO */
203 #define HDSP_RPM_Inp34 0x32000
204 #define HDSP_RPM_Inp34_Phon_6dB 0x20000 /* SyncRef1 */
205 #define HDSP_RPM_Inp34_Phon_0dB 0x00000 /* .. */
206 #define HDSP_RPM_Inp34_Phon_n6dB 0x02000 /* SyncRef2 */
207 #define HDSP_RPM_Inp34_Line_0dB 0x30000 /* SyncRef1+SyncRef0 */
208 #define HDSP_RPM_Inp34_Line_n6dB 0x10000 /* SyncRef0 */
210 #define HDSP_RPM_Bypass 0x01000
212 #define HDSP_RPM_Disconnect 0x00001
214 #define HDSP_ADGainMask (HDSP_ADGain0|HDSP_ADGain1)
215 #define HDSP_ADGainMinus10dBV HDSP_ADGainMask
216 #define HDSP_ADGainPlus4dBu (HDSP_ADGain0)
217 #define HDSP_ADGainLowGain 0
219 #define HDSP_DAGainMask (HDSP_DAGain0|HDSP_DAGain1)
220 #define HDSP_DAGainHighGain HDSP_DAGainMask
221 #define HDSP_DAGainPlus4dBu (HDSP_DAGain0)
222 #define HDSP_DAGainMinus10dBV 0
224 #define HDSP_PhoneGainMask (HDSP_PhoneGain0|HDSP_PhoneGain1)
225 #define HDSP_PhoneGain0dB HDSP_PhoneGainMask
226 #define HDSP_PhoneGainMinus6dB (HDSP_PhoneGain0)
227 #define HDSP_PhoneGainMinus12dB 0
229 #define HDSP_LatencyMask (HDSP_Latency0|HDSP_Latency1|HDSP_Latency2)
230 #define HDSP_FrequencyMask (HDSP_Frequency0|HDSP_Frequency1|HDSP_DoubleSpeed|HDSP_QuadSpeed)
232 #define HDSP_SPDIFInputMask (HDSP_SPDIFInputSelect0|HDSP_SPDIFInputSelect1)
233 #define HDSP_SPDIFInputADAT1 0
234 #define HDSP_SPDIFInputCoaxial (HDSP_SPDIFInputSelect0)
235 #define HDSP_SPDIFInputCdrom (HDSP_SPDIFInputSelect1)
236 #define HDSP_SPDIFInputAES (HDSP_SPDIFInputSelect0|HDSP_SPDIFInputSelect1)
238 #define HDSP_SyncRefMask (HDSP_SyncRef0|HDSP_SyncRef1|HDSP_SyncRef2)
239 #define HDSP_SyncRef_ADAT1 0
240 #define HDSP_SyncRef_ADAT2 (HDSP_SyncRef0)
241 #define HDSP_SyncRef_ADAT3 (HDSP_SyncRef1)
242 #define HDSP_SyncRef_SPDIF (HDSP_SyncRef0|HDSP_SyncRef1)
243 #define HDSP_SyncRef_WORD (HDSP_SyncRef2)
244 #define HDSP_SyncRef_ADAT_SYNC (HDSP_SyncRef0|HDSP_SyncRef2)
246 /* Sample Clock Sources */
248 #define HDSP_CLOCK_SOURCE_AUTOSYNC 0
249 #define HDSP_CLOCK_SOURCE_INTERNAL_32KHZ 1
250 #define HDSP_CLOCK_SOURCE_INTERNAL_44_1KHZ 2
251 #define HDSP_CLOCK_SOURCE_INTERNAL_48KHZ 3
252 #define HDSP_CLOCK_SOURCE_INTERNAL_64KHZ 4
253 #define HDSP_CLOCK_SOURCE_INTERNAL_88_2KHZ 5
254 #define HDSP_CLOCK_SOURCE_INTERNAL_96KHZ 6
255 #define HDSP_CLOCK_SOURCE_INTERNAL_128KHZ 7
256 #define HDSP_CLOCK_SOURCE_INTERNAL_176_4KHZ 8
257 #define HDSP_CLOCK_SOURCE_INTERNAL_192KHZ 9
259 /* Preferred sync reference choices - used by "pref_sync_ref" control switch */
261 #define HDSP_SYNC_FROM_WORD 0
262 #define HDSP_SYNC_FROM_SPDIF 1
263 #define HDSP_SYNC_FROM_ADAT1 2
264 #define HDSP_SYNC_FROM_ADAT_SYNC 3
265 #define HDSP_SYNC_FROM_ADAT2 4
266 #define HDSP_SYNC_FROM_ADAT3 5
268 /* SyncCheck status */
270 #define HDSP_SYNC_CHECK_NO_LOCK 0
271 #define HDSP_SYNC_CHECK_LOCK 1
272 #define HDSP_SYNC_CHECK_SYNC 2
274 /* AutoSync references - used by "autosync_ref" control switch */
276 #define HDSP_AUTOSYNC_FROM_WORD 0
277 #define HDSP_AUTOSYNC_FROM_ADAT_SYNC 1
278 #define HDSP_AUTOSYNC_FROM_SPDIF 2
279 #define HDSP_AUTOSYNC_FROM_NONE 3
280 #define HDSP_AUTOSYNC_FROM_ADAT1 4
281 #define HDSP_AUTOSYNC_FROM_ADAT2 5
282 #define HDSP_AUTOSYNC_FROM_ADAT3 6
284 /* Possible sources of S/PDIF input */
286 #define HDSP_SPDIFIN_OPTICAL 0 /* optical (ADAT1) */
287 #define HDSP_SPDIFIN_COAXIAL 1 /* coaxial (RCA) */
288 #define HDSP_SPDIFIN_INTERNAL 2 /* internal (CDROM) */
289 #define HDSP_SPDIFIN_AES 3 /* xlr for H9632 (AES)*/
291 #define HDSP_Frequency32KHz HDSP_Frequency0
292 #define HDSP_Frequency44_1KHz HDSP_Frequency1
293 #define HDSP_Frequency48KHz (HDSP_Frequency1|HDSP_Frequency0)
294 #define HDSP_Frequency64KHz (HDSP_DoubleSpeed|HDSP_Frequency0)
295 #define HDSP_Frequency88_2KHz (HDSP_DoubleSpeed|HDSP_Frequency1)
296 #define HDSP_Frequency96KHz (HDSP_DoubleSpeed|HDSP_Frequency1|HDSP_Frequency0)
297 /* For H9632 cards */
298 #define HDSP_Frequency128KHz (HDSP_QuadSpeed|HDSP_DoubleSpeed|HDSP_Frequency0)
299 #define HDSP_Frequency176_4KHz (HDSP_QuadSpeed|HDSP_DoubleSpeed|HDSP_Frequency1)
300 #define HDSP_Frequency192KHz (HDSP_QuadSpeed|HDSP_DoubleSpeed|HDSP_Frequency1|HDSP_Frequency0)
301 /* RME says n = 104857600000000, but in the windows MADI driver, I see:
302 return 104857600000000 / rate; // 100 MHz
303 return 110100480000000 / rate; // 105 MHz
305 #define DDS_NUMERATOR 104857600000000ULL; /* = 2^20 * 10^8 */
307 #define hdsp_encode_latency(x) (((x)<<1) & HDSP_LatencyMask)
308 #define hdsp_decode_latency(x) (((x) & HDSP_LatencyMask)>>1)
310 #define hdsp_encode_spdif_in(x) (((x)&0x3)<<14)
311 #define hdsp_decode_spdif_in(x) (((x)>>14)&0x3)
313 /* Status Register bits */
315 #define HDSP_audioIRQPending (1<<0)
316 #define HDSP_Lock2 (1<<1) /* this is for Digiface and H9652 */
317 #define HDSP_spdifFrequency3 HDSP_Lock2 /* this is for H9632 only */
318 #define HDSP_Lock1 (1<<2)
319 #define HDSP_Lock0 (1<<3)
320 #define HDSP_SPDIFSync (1<<4)
321 #define HDSP_TimecodeLock (1<<5)
322 #define HDSP_BufferPositionMask 0x000FFC0 /* Bit 6..15 : h/w buffer pointer */
323 #define HDSP_Sync2 (1<<16)
324 #define HDSP_Sync1 (1<<17)
325 #define HDSP_Sync0 (1<<18)
326 #define HDSP_DoubleSpeedStatus (1<<19)
327 #define HDSP_ConfigError (1<<20)
328 #define HDSP_DllError (1<<21)
329 #define HDSP_spdifFrequency0 (1<<22)
330 #define HDSP_spdifFrequency1 (1<<23)
331 #define HDSP_spdifFrequency2 (1<<24)
332 #define HDSP_SPDIFErrorFlag (1<<25)
333 #define HDSP_BufferID (1<<26)
334 #define HDSP_TimecodeSync (1<<27)
335 #define HDSP_AEBO (1<<28) /* H9632 specific Analog Extension Boards */
336 #define HDSP_AEBI (1<<29) /* 0 = present, 1 = absent */
337 #define HDSP_midi0IRQPending (1<<30)
338 #define HDSP_midi1IRQPending (1<<31)
340 #define HDSP_spdifFrequencyMask (HDSP_spdifFrequency0|HDSP_spdifFrequency1|HDSP_spdifFrequency2)
341 #define HDSP_spdifFrequencyMask_9632 (HDSP_spdifFrequency0|\
342 HDSP_spdifFrequency1|\
343 HDSP_spdifFrequency2|\
344 HDSP_spdifFrequency3)
346 #define HDSP_spdifFrequency32KHz (HDSP_spdifFrequency0)
347 #define HDSP_spdifFrequency44_1KHz (HDSP_spdifFrequency1)
348 #define HDSP_spdifFrequency48KHz (HDSP_spdifFrequency0|HDSP_spdifFrequency1)
350 #define HDSP_spdifFrequency64KHz (HDSP_spdifFrequency2)
351 #define HDSP_spdifFrequency88_2KHz (HDSP_spdifFrequency0|HDSP_spdifFrequency2)
352 #define HDSP_spdifFrequency96KHz (HDSP_spdifFrequency2|HDSP_spdifFrequency1)
354 /* This is for H9632 cards */
355 #define HDSP_spdifFrequency128KHz (HDSP_spdifFrequency0|\
356 HDSP_spdifFrequency1|\
357 HDSP_spdifFrequency2)
358 #define HDSP_spdifFrequency176_4KHz HDSP_spdifFrequency3
359 #define HDSP_spdifFrequency192KHz (HDSP_spdifFrequency3|HDSP_spdifFrequency0)
361 /* Status2 Register bits */
363 #define HDSP_version0 (1<<0)
364 #define HDSP_version1 (1<<1)
365 #define HDSP_version2 (1<<2)
366 #define HDSP_wc_lock (1<<3)
367 #define HDSP_wc_sync (1<<4)
368 #define HDSP_inp_freq0 (1<<5)
369 #define HDSP_inp_freq1 (1<<6)
370 #define HDSP_inp_freq2 (1<<7)
371 #define HDSP_SelSyncRef0 (1<<8)
372 #define HDSP_SelSyncRef1 (1<<9)
373 #define HDSP_SelSyncRef2 (1<<10)
375 #define HDSP_wc_valid (HDSP_wc_lock|HDSP_wc_sync)
377 #define HDSP_systemFrequencyMask (HDSP_inp_freq0|HDSP_inp_freq1|HDSP_inp_freq2)
378 #define HDSP_systemFrequency32 (HDSP_inp_freq0)
379 #define HDSP_systemFrequency44_1 (HDSP_inp_freq1)
380 #define HDSP_systemFrequency48 (HDSP_inp_freq0|HDSP_inp_freq1)
381 #define HDSP_systemFrequency64 (HDSP_inp_freq2)
382 #define HDSP_systemFrequency88_2 (HDSP_inp_freq0|HDSP_inp_freq2)
383 #define HDSP_systemFrequency96 (HDSP_inp_freq1|HDSP_inp_freq2)
384 /* FIXME : more values for 9632 cards ? */
386 #define HDSP_SelSyncRefMask (HDSP_SelSyncRef0|HDSP_SelSyncRef1|HDSP_SelSyncRef2)
387 #define HDSP_SelSyncRef_ADAT1 0
388 #define HDSP_SelSyncRef_ADAT2 (HDSP_SelSyncRef0)
389 #define HDSP_SelSyncRef_ADAT3 (HDSP_SelSyncRef1)
390 #define HDSP_SelSyncRef_SPDIF (HDSP_SelSyncRef0|HDSP_SelSyncRef1)
391 #define HDSP_SelSyncRef_WORD (HDSP_SelSyncRef2)
392 #define HDSP_SelSyncRef_ADAT_SYNC (HDSP_SelSyncRef0|HDSP_SelSyncRef2)
394 /* Card state flags */
396 #define HDSP_InitializationComplete (1<<0)
397 #define HDSP_FirmwareLoaded (1<<1)
398 #define HDSP_FirmwareCached (1<<2)
400 /* FIFO wait times, defined in terms of 1/10ths of msecs */
402 #define HDSP_LONG_WAIT 5000
403 #define HDSP_SHORT_WAIT 30
405 #define UNITY_GAIN 32768
406 #define MINUS_INFINITY_GAIN 0
408 /* the size of a substream (1 mono data stream) */
410 #define HDSP_CHANNEL_BUFFER_SAMPLES (16*1024)
411 #define HDSP_CHANNEL_BUFFER_BYTES (4*HDSP_CHANNEL_BUFFER_SAMPLES)
413 /* the size of the area we need to allocate for DMA transfers. the
414 size is the same regardless of the number of channels - the
415 Multiface still uses the same memory area.
417 Note that we allocate 1 more channel than is apparently needed
418 because the h/w seems to write 1 byte beyond the end of the last
422 #define HDSP_DMA_AREA_BYTES ((HDSP_MAX_CHANNELS+1) * HDSP_CHANNEL_BUFFER_BYTES)
423 #define HDSP_DMA_AREA_KILOBYTES (HDSP_DMA_AREA_BYTES/1024)
425 #define HDSP_FIRMWARE_SIZE (24413 * 4)
427 struct hdsp_9632_meters {
429 u32 playback_peak[16];
433 u32 input_rms_low[16];
434 u32 playback_rms_low[16];
435 u32 output_rms_low[16];
437 u32 input_rms_high[16];
438 u32 playback_rms_high[16];
439 u32 output_rms_high[16];
440 u32 xxx_rms_high[16];
446 struct snd_rawmidi *rmidi;
447 struct snd_rawmidi_substream *input;
448 struct snd_rawmidi_substream *output;
449 char istimer; /* timer in use */
450 struct timer_list timer;
457 struct snd_pcm_substream *capture_substream;
458 struct snd_pcm_substream *playback_substream;
459 struct hdsp_midi midi[2];
460 struct tasklet_struct midi_tasklet;
461 int use_midi_tasklet;
463 u32 control_register; /* cached value */
464 u32 control2_register; /* cached value */
466 u32 creg_spdif_stream;
467 int clock_source_locked;
468 char *card_name; /* digiface/multiface/rpm */
469 enum HDSP_IO_Type io_type; /* ditto, but for code use */
470 unsigned short firmware_rev;
471 unsigned short state; /* stores state bits */
472 const struct firmware *firmware;
474 size_t period_bytes; /* guess what this is */
475 unsigned char max_channels;
476 unsigned char qs_in_channels; /* quad speed mode for H9632 */
477 unsigned char ds_in_channels;
478 unsigned char ss_in_channels; /* different for multiface/digiface */
479 unsigned char qs_out_channels;
480 unsigned char ds_out_channels;
481 unsigned char ss_out_channels;
483 struct snd_dma_buffer capture_dma_buf;
484 struct snd_dma_buffer playback_dma_buf;
485 unsigned char *capture_buffer; /* suitably aligned address */
486 unsigned char *playback_buffer; /* suitably aligned address */
491 int system_sample_rate;
496 void __iomem *iobase;
497 struct snd_card *card;
499 struct snd_hwdep *hwdep;
501 struct snd_kcontrol *spdif_ctl;
502 unsigned short mixer_matrix[HDSP_MATRIX_MIXER_SIZE];
503 unsigned int dds_value; /* last value written to freq register */
506 /* These tables map the ALSA channels 1..N to the channels that we
507 need to use in order to find the relevant channel buffer. RME
508 refer to this kind of mapping as between "the ADAT channel and
509 the DMA channel." We index it using the logical audio channel,
510 and the value is the DMA channel (i.e. channel buffer number)
511 where the data for that channel can be read/written from/to.
514 static char channel_map_df_ss[HDSP_MAX_CHANNELS] = {
515 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
516 18, 19, 20, 21, 22, 23, 24, 25
519 static char channel_map_mf_ss[HDSP_MAX_CHANNELS] = { /* Multiface */
521 0, 1, 2, 3, 4, 5, 6, 7,
523 16, 17, 18, 19, 20, 21, 22, 23,
526 -1, -1, -1, -1, -1, -1, -1, -1
529 static char channel_map_ds[HDSP_MAX_CHANNELS] = {
530 /* ADAT channels are remapped */
531 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23,
532 /* channels 12 and 13 are S/PDIF */
534 /* others don't exist */
535 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
538 static char channel_map_H9632_ss[HDSP_MAX_CHANNELS] = {
540 0, 1, 2, 3, 4, 5, 6, 7,
545 /* AO4S-192 and AI4S-192 extension boards */
547 /* others don't exist */
548 -1, -1, -1, -1, -1, -1, -1, -1,
552 static char channel_map_H9632_ds[HDSP_MAX_CHANNELS] = {
559 /* AO4S-192 and AI4S-192 extension boards */
561 /* others don't exist */
562 -1, -1, -1, -1, -1, -1, -1, -1,
563 -1, -1, -1, -1, -1, -1
566 static char channel_map_H9632_qs[HDSP_MAX_CHANNELS] = {
567 /* ADAT is disabled in this mode */
572 /* AO4S-192 and AI4S-192 extension boards */
574 /* others don't exist */
575 -1, -1, -1, -1, -1, -1, -1, -1,
576 -1, -1, -1, -1, -1, -1, -1, -1,
580 static int snd_hammerfall_get_buffer(struct pci_dev *pci, struct snd_dma_buffer *dmab, size_t size)
582 dmab->dev.type = SNDRV_DMA_TYPE_DEV;
583 dmab->dev.dev = snd_dma_pci_data(pci);
584 if (snd_dma_get_reserved_buf(dmab, snd_dma_pci_buf_id(pci))) {
585 if (dmab->bytes >= size)
588 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
594 static void snd_hammerfall_free_buffer(struct snd_dma_buffer *dmab, struct pci_dev *pci)
597 dmab->dev.dev = NULL; /* make it anonymous */
598 snd_dma_reserve_buf(dmab, snd_dma_pci_buf_id(pci));
603 static DEFINE_PCI_DEVICE_TABLE(snd_hdsp_ids) = {
605 .vendor = PCI_VENDOR_ID_XILINX,
606 .device = PCI_DEVICE_ID_XILINX_HAMMERFALL_DSP,
607 .subvendor = PCI_ANY_ID,
608 .subdevice = PCI_ANY_ID,
609 }, /* RME Hammerfall-DSP */
613 MODULE_DEVICE_TABLE(pci, snd_hdsp_ids);
616 static int snd_hdsp_create_alsa_devices(struct snd_card *card, struct hdsp *hdsp);
617 static int snd_hdsp_create_pcm(struct snd_card *card, struct hdsp *hdsp);
618 static int snd_hdsp_enable_io (struct hdsp *hdsp);
619 static void snd_hdsp_initialize_midi_flush (struct hdsp *hdsp);
620 static void snd_hdsp_initialize_channels (struct hdsp *hdsp);
621 static int hdsp_fifo_wait(struct hdsp *hdsp, int count, int timeout);
622 static int hdsp_autosync_ref(struct hdsp *hdsp);
623 static int snd_hdsp_set_defaults(struct hdsp *hdsp);
624 static void snd_hdsp_9652_enable_mixer (struct hdsp *hdsp);
626 static int hdsp_playback_to_output_key (struct hdsp *hdsp, int in, int out)
628 switch (hdsp->io_type) {
633 if (hdsp->firmware_rev == 0xa)
634 return (64 * out) + (32 + (in));
636 return (52 * out) + (26 + (in));
638 return (32 * out) + (16 + (in));
640 return (52 * out) + (26 + (in));
644 static int hdsp_input_to_output_key (struct hdsp *hdsp, int in, int out)
646 switch (hdsp->io_type) {
651 if (hdsp->firmware_rev == 0xa)
652 return (64 * out) + in;
654 return (52 * out) + in;
656 return (32 * out) + in;
658 return (52 * out) + in;
662 static void hdsp_write(struct hdsp *hdsp, int reg, int val)
664 writel(val, hdsp->iobase + reg);
667 static unsigned int hdsp_read(struct hdsp *hdsp, int reg)
669 return readl (hdsp->iobase + reg);
672 static int hdsp_check_for_iobox (struct hdsp *hdsp)
674 if (hdsp->io_type == H9652 || hdsp->io_type == H9632) return 0;
675 if (hdsp_read (hdsp, HDSP_statusRegister) & HDSP_ConfigError) {
676 snd_printk("Hammerfall-DSP: no IO box connected!\n");
677 hdsp->state &= ~HDSP_FirmwareLoaded;
683 static int hdsp_wait_for_iobox(struct hdsp *hdsp, unsigned int loops,
688 if (hdsp->io_type == H9652 || hdsp->io_type == H9632)
691 for (i = 0; i != loops; ++i) {
692 if (hdsp_read(hdsp, HDSP_statusRegister) & HDSP_ConfigError)
695 snd_printd("Hammerfall-DSP: iobox found after %ums!\n",
701 snd_printk("Hammerfall-DSP: no IO box connected!\n");
702 hdsp->state &= ~HDSP_FirmwareLoaded;
706 static int snd_hdsp_load_firmware_from_cache(struct hdsp *hdsp) {
712 if (hdsp->fw_uploaded)
713 cache = hdsp->fw_uploaded;
717 cache = (u32 *)hdsp->firmware->data;
722 if ((hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DllError) != 0) {
724 snd_printk ("Hammerfall-DSP: loading firmware\n");
726 hdsp_write (hdsp, HDSP_control2Reg, HDSP_S_PROGRAM);
727 hdsp_write (hdsp, HDSP_fifoData, 0);
729 if (hdsp_fifo_wait (hdsp, 0, HDSP_LONG_WAIT)) {
730 snd_printk ("Hammerfall-DSP: timeout waiting for download preparation\n");
734 hdsp_write (hdsp, HDSP_control2Reg, HDSP_S_LOAD);
736 for (i = 0; i < HDSP_FIRMWARE_SIZE / 4; ++i) {
737 hdsp_write(hdsp, HDSP_fifoData, cache[i]);
738 if (hdsp_fifo_wait (hdsp, 127, HDSP_LONG_WAIT)) {
739 snd_printk ("Hammerfall-DSP: timeout during firmware loading\n");
746 if (hdsp_fifo_wait (hdsp, 0, HDSP_LONG_WAIT)) {
747 snd_printk ("Hammerfall-DSP: timeout at end of firmware loading\n");
751 #ifdef SNDRV_BIG_ENDIAN
752 hdsp->control2_register = HDSP_BIGENDIAN_MODE;
754 hdsp->control2_register = 0;
756 hdsp_write (hdsp, HDSP_control2Reg, hdsp->control2_register);
757 snd_printk ("Hammerfall-DSP: finished firmware loading\n");
760 if (hdsp->state & HDSP_InitializationComplete) {
761 snd_printk(KERN_INFO "Hammerfall-DSP: firmware loaded from cache, restoring defaults\n");
762 spin_lock_irqsave(&hdsp->lock, flags);
763 snd_hdsp_set_defaults(hdsp);
764 spin_unlock_irqrestore(&hdsp->lock, flags);
767 hdsp->state |= HDSP_FirmwareLoaded;
772 static int hdsp_get_iobox_version (struct hdsp *hdsp)
774 if ((hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DllError) != 0) {
776 hdsp_write (hdsp, HDSP_control2Reg, HDSP_PROGRAM);
777 hdsp_write (hdsp, HDSP_fifoData, 0);
778 if (hdsp_fifo_wait (hdsp, 0, HDSP_SHORT_WAIT) < 0)
781 hdsp_write (hdsp, HDSP_control2Reg, HDSP_S_LOAD);
782 hdsp_write (hdsp, HDSP_fifoData, 0);
784 if (hdsp_fifo_wait(hdsp, 0, HDSP_SHORT_WAIT)) {
785 hdsp_write(hdsp, HDSP_control2Reg, HDSP_VERSION_BIT);
786 hdsp_write(hdsp, HDSP_control2Reg, HDSP_S_LOAD);
787 if (hdsp_fifo_wait(hdsp, 0, HDSP_SHORT_WAIT))
790 hdsp->io_type = Multiface;
792 hdsp->io_type = Digiface;
795 /* firmware was already loaded, get iobox type */
796 if (hdsp_read(hdsp, HDSP_status2Register) & HDSP_version2)
798 else if (hdsp_read(hdsp, HDSP_status2Register) & HDSP_version1)
799 hdsp->io_type = Multiface;
801 hdsp->io_type = Digiface;
807 static int hdsp_request_fw_loader(struct hdsp *hdsp);
809 static int hdsp_check_for_firmware (struct hdsp *hdsp, int load_on_demand)
811 if (hdsp->io_type == H9652 || hdsp->io_type == H9632)
813 if ((hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DllError) != 0) {
814 hdsp->state &= ~HDSP_FirmwareLoaded;
815 if (! load_on_demand)
817 snd_printk(KERN_ERR "Hammerfall-DSP: firmware not present.\n");
818 /* try to load firmware */
819 if (! (hdsp->state & HDSP_FirmwareCached)) {
820 if (! hdsp_request_fw_loader(hdsp))
823 "Hammerfall-DSP: No firmware loaded nor "
824 "cached, please upload firmware.\n");
827 if (snd_hdsp_load_firmware_from_cache(hdsp) != 0) {
829 "Hammerfall-DSP: Firmware loading from "
830 "cache failed, please upload manually.\n");
838 static int hdsp_fifo_wait(struct hdsp *hdsp, int count, int timeout)
842 /* the fifoStatus registers reports on how many words
843 are available in the command FIFO.
846 for (i = 0; i < timeout; i++) {
848 if ((int)(hdsp_read (hdsp, HDSP_fifoStatus) & 0xff) <= count)
851 /* not very friendly, but we only do this during a firmware
852 load and changing the mixer, so we just put up with it.
858 snd_printk ("Hammerfall-DSP: wait for FIFO status <= %d failed after %d iterations\n",
863 static int hdsp_read_gain (struct hdsp *hdsp, unsigned int addr)
865 if (addr >= HDSP_MATRIX_MIXER_SIZE)
868 return hdsp->mixer_matrix[addr];
871 static int hdsp_write_gain(struct hdsp *hdsp, unsigned int addr, unsigned short data)
875 if (addr >= HDSP_MATRIX_MIXER_SIZE)
878 if (hdsp->io_type == H9652 || hdsp->io_type == H9632) {
880 /* from martin bjornsen:
882 "You can only write dwords to the
883 mixer memory which contain two
884 mixer values in the low and high
885 word. So if you want to change
886 value 0 you have to read value 1
887 from the cache and write both to
888 the first dword in the mixer
892 if (hdsp->io_type == H9632 && addr >= 512)
895 if (hdsp->io_type == H9652 && addr >= 1352)
898 hdsp->mixer_matrix[addr] = data;
901 /* `addr' addresses a 16-bit wide address, but
902 the address space accessed via hdsp_write
903 uses byte offsets. put another way, addr
904 varies from 0 to 1351, but to access the
905 corresponding memory location, we need
906 to access 0 to 2703 ...
910 hdsp_write (hdsp, 4096 + (ad*4),
911 (hdsp->mixer_matrix[(addr&0x7fe)+1] << 16) +
912 hdsp->mixer_matrix[addr&0x7fe]);
918 ad = (addr << 16) + data;
920 if (hdsp_fifo_wait(hdsp, 127, HDSP_LONG_WAIT))
923 hdsp_write (hdsp, HDSP_fifoData, ad);
924 hdsp->mixer_matrix[addr] = data;
931 static int snd_hdsp_use_is_exclusive(struct hdsp *hdsp)
936 spin_lock_irqsave(&hdsp->lock, flags);
937 if ((hdsp->playback_pid != hdsp->capture_pid) &&
938 (hdsp->playback_pid >= 0) && (hdsp->capture_pid >= 0))
940 spin_unlock_irqrestore(&hdsp->lock, flags);
944 static int hdsp_spdif_sample_rate(struct hdsp *hdsp)
946 unsigned int status = hdsp_read(hdsp, HDSP_statusRegister);
947 unsigned int rate_bits = (status & HDSP_spdifFrequencyMask);
949 /* For the 9632, the mask is different */
950 if (hdsp->io_type == H9632)
951 rate_bits = (status & HDSP_spdifFrequencyMask_9632);
953 if (status & HDSP_SPDIFErrorFlag)
957 case HDSP_spdifFrequency32KHz: return 32000;
958 case HDSP_spdifFrequency44_1KHz: return 44100;
959 case HDSP_spdifFrequency48KHz: return 48000;
960 case HDSP_spdifFrequency64KHz: return 64000;
961 case HDSP_spdifFrequency88_2KHz: return 88200;
962 case HDSP_spdifFrequency96KHz: return 96000;
963 case HDSP_spdifFrequency128KHz:
964 if (hdsp->io_type == H9632) return 128000;
966 case HDSP_spdifFrequency176_4KHz:
967 if (hdsp->io_type == H9632) return 176400;
969 case HDSP_spdifFrequency192KHz:
970 if (hdsp->io_type == H9632) return 192000;
975 snd_printk ("Hammerfall-DSP: unknown spdif frequency status; bits = 0x%x, status = 0x%x\n", rate_bits, status);
979 static int hdsp_external_sample_rate(struct hdsp *hdsp)
981 unsigned int status2 = hdsp_read(hdsp, HDSP_status2Register);
982 unsigned int rate_bits = status2 & HDSP_systemFrequencyMask;
984 /* For the 9632 card, there seems to be no bit for indicating external
985 * sample rate greater than 96kHz. The card reports the corresponding
986 * single speed. So the best means seems to get spdif rate when
987 * autosync reference is spdif */
988 if (hdsp->io_type == H9632 &&
989 hdsp_autosync_ref(hdsp) == HDSP_AUTOSYNC_FROM_SPDIF)
990 return hdsp_spdif_sample_rate(hdsp);
993 case HDSP_systemFrequency32: return 32000;
994 case HDSP_systemFrequency44_1: return 44100;
995 case HDSP_systemFrequency48: return 48000;
996 case HDSP_systemFrequency64: return 64000;
997 case HDSP_systemFrequency88_2: return 88200;
998 case HDSP_systemFrequency96: return 96000;
1004 static void hdsp_compute_period_size(struct hdsp *hdsp)
1006 hdsp->period_bytes = 1 << ((hdsp_decode_latency(hdsp->control_register) + 8));
1009 static snd_pcm_uframes_t hdsp_hw_pointer(struct hdsp *hdsp)
1013 position = hdsp_read(hdsp, HDSP_statusRegister);
1015 if (!hdsp->precise_ptr)
1016 return (position & HDSP_BufferID) ? (hdsp->period_bytes / 4) : 0;
1018 position &= HDSP_BufferPositionMask;
1020 position &= (hdsp->period_bytes/2) - 1;
1024 static void hdsp_reset_hw_pointer(struct hdsp *hdsp)
1026 hdsp_write (hdsp, HDSP_resetPointer, 0);
1027 if (hdsp->io_type == H9632 && hdsp->firmware_rev >= 152)
1028 /* HDSP_resetPointer = HDSP_freqReg, which is strange and
1029 * requires (?) to write again DDS value after a reset pointer
1030 * (at least, it works like this) */
1031 hdsp_write (hdsp, HDSP_freqReg, hdsp->dds_value);
1034 static void hdsp_start_audio(struct hdsp *s)
1036 s->control_register |= (HDSP_AudioInterruptEnable | HDSP_Start);
1037 hdsp_write(s, HDSP_controlRegister, s->control_register);
1040 static void hdsp_stop_audio(struct hdsp *s)
1042 s->control_register &= ~(HDSP_Start | HDSP_AudioInterruptEnable);
1043 hdsp_write(s, HDSP_controlRegister, s->control_register);
1046 static void hdsp_silence_playback(struct hdsp *hdsp)
1048 memset(hdsp->playback_buffer, 0, HDSP_DMA_AREA_BYTES);
1051 static int hdsp_set_interrupt_interval(struct hdsp *s, unsigned int frames)
1055 spin_lock_irq(&s->lock);
1064 s->control_register &= ~HDSP_LatencyMask;
1065 s->control_register |= hdsp_encode_latency(n);
1067 hdsp_write(s, HDSP_controlRegister, s->control_register);
1069 hdsp_compute_period_size(s);
1071 spin_unlock_irq(&s->lock);
1076 static void hdsp_set_dds_value(struct hdsp *hdsp, int rate)
1082 else if (rate >= 56000)
1086 n = div_u64(n, rate);
1087 /* n should be less than 2^32 for being written to FREQ register */
1088 snd_BUG_ON(n >> 32);
1089 /* HDSP_freqReg and HDSP_resetPointer are the same, so keep the DDS
1090 value to write it after a reset */
1091 hdsp->dds_value = n;
1092 hdsp_write(hdsp, HDSP_freqReg, hdsp->dds_value);
1095 static int hdsp_set_rate(struct hdsp *hdsp, int rate, int called_internally)
1097 int reject_if_open = 0;
1101 /* ASSUMPTION: hdsp->lock is either held, or
1102 there is no need for it (e.g. during module
1106 if (!(hdsp->control_register & HDSP_ClockModeMaster)) {
1107 if (called_internally) {
1108 /* request from ctl or card initialization */
1109 snd_printk(KERN_ERR "Hammerfall-DSP: device is not running as a clock master: cannot set sample rate.\n");
1112 /* hw_param request while in AutoSync mode */
1113 int external_freq = hdsp_external_sample_rate(hdsp);
1114 int spdif_freq = hdsp_spdif_sample_rate(hdsp);
1116 if ((spdif_freq == external_freq*2) && (hdsp_autosync_ref(hdsp) >= HDSP_AUTOSYNC_FROM_ADAT1))
1117 snd_printk(KERN_INFO "Hammerfall-DSP: Detected ADAT in double speed mode\n");
1118 else if (hdsp->io_type == H9632 && (spdif_freq == external_freq*4) && (hdsp_autosync_ref(hdsp) >= HDSP_AUTOSYNC_FROM_ADAT1))
1119 snd_printk(KERN_INFO "Hammerfall-DSP: Detected ADAT in quad speed mode\n");
1120 else if (rate != external_freq) {
1121 snd_printk(KERN_INFO "Hammerfall-DSP: No AutoSync source for requested rate\n");
1127 current_rate = hdsp->system_sample_rate;
1129 /* Changing from a "single speed" to a "double speed" rate is
1130 not allowed if any substreams are open. This is because
1131 such a change causes a shift in the location of
1132 the DMA buffers and a reduction in the number of available
1135 Note that a similar but essentially insoluble problem
1136 exists for externally-driven rate changes. All we can do
1137 is to flag rate changes in the read/write routines. */
1139 if (rate > 96000 && hdsp->io_type != H9632)
1144 if (current_rate > 48000)
1146 rate_bits = HDSP_Frequency32KHz;
1149 if (current_rate > 48000)
1151 rate_bits = HDSP_Frequency44_1KHz;
1154 if (current_rate > 48000)
1156 rate_bits = HDSP_Frequency48KHz;
1159 if (current_rate <= 48000 || current_rate > 96000)
1161 rate_bits = HDSP_Frequency64KHz;
1164 if (current_rate <= 48000 || current_rate > 96000)
1166 rate_bits = HDSP_Frequency88_2KHz;
1169 if (current_rate <= 48000 || current_rate > 96000)
1171 rate_bits = HDSP_Frequency96KHz;
1174 if (current_rate < 128000)
1176 rate_bits = HDSP_Frequency128KHz;
1179 if (current_rate < 128000)
1181 rate_bits = HDSP_Frequency176_4KHz;
1184 if (current_rate < 128000)
1186 rate_bits = HDSP_Frequency192KHz;
1192 if (reject_if_open && (hdsp->capture_pid >= 0 || hdsp->playback_pid >= 0)) {
1193 snd_printk ("Hammerfall-DSP: cannot change speed mode (capture PID = %d, playback PID = %d)\n",
1195 hdsp->playback_pid);
1199 hdsp->control_register &= ~HDSP_FrequencyMask;
1200 hdsp->control_register |= rate_bits;
1201 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1203 /* For HDSP9632 rev 152, need to set DDS value in FREQ register */
1204 if (hdsp->io_type == H9632 && hdsp->firmware_rev >= 152)
1205 hdsp_set_dds_value(hdsp, rate);
1207 if (rate >= 128000) {
1208 hdsp->channel_map = channel_map_H9632_qs;
1209 } else if (rate > 48000) {
1210 if (hdsp->io_type == H9632)
1211 hdsp->channel_map = channel_map_H9632_ds;
1213 hdsp->channel_map = channel_map_ds;
1215 switch (hdsp->io_type) {
1218 hdsp->channel_map = channel_map_mf_ss;
1222 hdsp->channel_map = channel_map_df_ss;
1225 hdsp->channel_map = channel_map_H9632_ss;
1228 /* should never happen */
1233 hdsp->system_sample_rate = rate;
1238 /*----------------------------------------------------------------------------
1240 ----------------------------------------------------------------------------*/
1242 static unsigned char snd_hdsp_midi_read_byte (struct hdsp *hdsp, int id)
1244 /* the hardware already does the relevant bit-mask with 0xff */
1246 return hdsp_read(hdsp, HDSP_midiDataIn1);
1248 return hdsp_read(hdsp, HDSP_midiDataIn0);
1251 static void snd_hdsp_midi_write_byte (struct hdsp *hdsp, int id, int val)
1253 /* the hardware already does the relevant bit-mask with 0xff */
1255 hdsp_write(hdsp, HDSP_midiDataOut1, val);
1257 hdsp_write(hdsp, HDSP_midiDataOut0, val);
1260 static int snd_hdsp_midi_input_available (struct hdsp *hdsp, int id)
1263 return (hdsp_read(hdsp, HDSP_midiStatusIn1) & 0xff);
1265 return (hdsp_read(hdsp, HDSP_midiStatusIn0) & 0xff);
1268 static int snd_hdsp_midi_output_possible (struct hdsp *hdsp, int id)
1270 int fifo_bytes_used;
1273 fifo_bytes_used = hdsp_read(hdsp, HDSP_midiStatusOut1) & 0xff;
1275 fifo_bytes_used = hdsp_read(hdsp, HDSP_midiStatusOut0) & 0xff;
1277 if (fifo_bytes_used < 128)
1278 return 128 - fifo_bytes_used;
1283 static void snd_hdsp_flush_midi_input (struct hdsp *hdsp, int id)
1285 while (snd_hdsp_midi_input_available (hdsp, id))
1286 snd_hdsp_midi_read_byte (hdsp, id);
1289 static int snd_hdsp_midi_output_write (struct hdsp_midi *hmidi)
1291 unsigned long flags;
1295 unsigned char buf[128];
1297 /* Output is not interrupt driven */
1299 spin_lock_irqsave (&hmidi->lock, flags);
1300 if (hmidi->output) {
1301 if (!snd_rawmidi_transmit_empty (hmidi->output)) {
1302 if ((n_pending = snd_hdsp_midi_output_possible (hmidi->hdsp, hmidi->id)) > 0) {
1303 if (n_pending > (int)sizeof (buf))
1304 n_pending = sizeof (buf);
1306 if ((to_write = snd_rawmidi_transmit (hmidi->output, buf, n_pending)) > 0) {
1307 for (i = 0; i < to_write; ++i)
1308 snd_hdsp_midi_write_byte (hmidi->hdsp, hmidi->id, buf[i]);
1313 spin_unlock_irqrestore (&hmidi->lock, flags);
1317 static int snd_hdsp_midi_input_read (struct hdsp_midi *hmidi)
1319 unsigned char buf[128]; /* this buffer is designed to match the MIDI input FIFO size */
1320 unsigned long flags;
1324 spin_lock_irqsave (&hmidi->lock, flags);
1325 if ((n_pending = snd_hdsp_midi_input_available (hmidi->hdsp, hmidi->id)) > 0) {
1327 if (n_pending > (int)sizeof (buf))
1328 n_pending = sizeof (buf);
1329 for (i = 0; i < n_pending; ++i)
1330 buf[i] = snd_hdsp_midi_read_byte (hmidi->hdsp, hmidi->id);
1332 snd_rawmidi_receive (hmidi->input, buf, n_pending);
1334 /* flush the MIDI input FIFO */
1336 snd_hdsp_midi_read_byte (hmidi->hdsp, hmidi->id);
1341 hmidi->hdsp->control_register |= HDSP_Midi1InterruptEnable;
1343 hmidi->hdsp->control_register |= HDSP_Midi0InterruptEnable;
1344 hdsp_write(hmidi->hdsp, HDSP_controlRegister, hmidi->hdsp->control_register);
1345 spin_unlock_irqrestore (&hmidi->lock, flags);
1346 return snd_hdsp_midi_output_write (hmidi);
1349 static void snd_hdsp_midi_input_trigger(struct snd_rawmidi_substream *substream, int up)
1352 struct hdsp_midi *hmidi;
1353 unsigned long flags;
1356 hmidi = (struct hdsp_midi *) substream->rmidi->private_data;
1358 ie = hmidi->id ? HDSP_Midi1InterruptEnable : HDSP_Midi0InterruptEnable;
1359 spin_lock_irqsave (&hdsp->lock, flags);
1361 if (!(hdsp->control_register & ie)) {
1362 snd_hdsp_flush_midi_input (hdsp, hmidi->id);
1363 hdsp->control_register |= ie;
1366 hdsp->control_register &= ~ie;
1367 tasklet_kill(&hdsp->midi_tasklet);
1370 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1371 spin_unlock_irqrestore (&hdsp->lock, flags);
1374 static void snd_hdsp_midi_output_timer(unsigned long data)
1376 struct hdsp_midi *hmidi = (struct hdsp_midi *) data;
1377 unsigned long flags;
1379 snd_hdsp_midi_output_write(hmidi);
1380 spin_lock_irqsave (&hmidi->lock, flags);
1382 /* this does not bump hmidi->istimer, because the
1383 kernel automatically removed the timer when it
1384 expired, and we are now adding it back, thus
1385 leaving istimer wherever it was set before.
1388 if (hmidi->istimer) {
1389 hmidi->timer.expires = 1 + jiffies;
1390 add_timer(&hmidi->timer);
1393 spin_unlock_irqrestore (&hmidi->lock, flags);
1396 static void snd_hdsp_midi_output_trigger(struct snd_rawmidi_substream *substream, int up)
1398 struct hdsp_midi *hmidi;
1399 unsigned long flags;
1401 hmidi = (struct hdsp_midi *) substream->rmidi->private_data;
1402 spin_lock_irqsave (&hmidi->lock, flags);
1404 if (!hmidi->istimer) {
1405 init_timer(&hmidi->timer);
1406 hmidi->timer.function = snd_hdsp_midi_output_timer;
1407 hmidi->timer.data = (unsigned long) hmidi;
1408 hmidi->timer.expires = 1 + jiffies;
1409 add_timer(&hmidi->timer);
1413 if (hmidi->istimer && --hmidi->istimer <= 0)
1414 del_timer (&hmidi->timer);
1416 spin_unlock_irqrestore (&hmidi->lock, flags);
1418 snd_hdsp_midi_output_write(hmidi);
1421 static int snd_hdsp_midi_input_open(struct snd_rawmidi_substream *substream)
1423 struct hdsp_midi *hmidi;
1425 hmidi = (struct hdsp_midi *) substream->rmidi->private_data;
1426 spin_lock_irq (&hmidi->lock);
1427 snd_hdsp_flush_midi_input (hmidi->hdsp, hmidi->id);
1428 hmidi->input = substream;
1429 spin_unlock_irq (&hmidi->lock);
1434 static int snd_hdsp_midi_output_open(struct snd_rawmidi_substream *substream)
1436 struct hdsp_midi *hmidi;
1438 hmidi = (struct hdsp_midi *) substream->rmidi->private_data;
1439 spin_lock_irq (&hmidi->lock);
1440 hmidi->output = substream;
1441 spin_unlock_irq (&hmidi->lock);
1446 static int snd_hdsp_midi_input_close(struct snd_rawmidi_substream *substream)
1448 struct hdsp_midi *hmidi;
1450 snd_hdsp_midi_input_trigger (substream, 0);
1452 hmidi = (struct hdsp_midi *) substream->rmidi->private_data;
1453 spin_lock_irq (&hmidi->lock);
1454 hmidi->input = NULL;
1455 spin_unlock_irq (&hmidi->lock);
1460 static int snd_hdsp_midi_output_close(struct snd_rawmidi_substream *substream)
1462 struct hdsp_midi *hmidi;
1464 snd_hdsp_midi_output_trigger (substream, 0);
1466 hmidi = (struct hdsp_midi *) substream->rmidi->private_data;
1467 spin_lock_irq (&hmidi->lock);
1468 hmidi->output = NULL;
1469 spin_unlock_irq (&hmidi->lock);
1474 static struct snd_rawmidi_ops snd_hdsp_midi_output =
1476 .open = snd_hdsp_midi_output_open,
1477 .close = snd_hdsp_midi_output_close,
1478 .trigger = snd_hdsp_midi_output_trigger,
1481 static struct snd_rawmidi_ops snd_hdsp_midi_input =
1483 .open = snd_hdsp_midi_input_open,
1484 .close = snd_hdsp_midi_input_close,
1485 .trigger = snd_hdsp_midi_input_trigger,
1488 static int snd_hdsp_create_midi (struct snd_card *card, struct hdsp *hdsp, int id)
1492 hdsp->midi[id].id = id;
1493 hdsp->midi[id].rmidi = NULL;
1494 hdsp->midi[id].input = NULL;
1495 hdsp->midi[id].output = NULL;
1496 hdsp->midi[id].hdsp = hdsp;
1497 hdsp->midi[id].istimer = 0;
1498 hdsp->midi[id].pending = 0;
1499 spin_lock_init (&hdsp->midi[id].lock);
1501 sprintf (buf, "%s MIDI %d", card->shortname, id+1);
1502 if (snd_rawmidi_new (card, buf, id, 1, 1, &hdsp->midi[id].rmidi) < 0)
1505 sprintf(hdsp->midi[id].rmidi->name, "HDSP MIDI %d", id+1);
1506 hdsp->midi[id].rmidi->private_data = &hdsp->midi[id];
1508 snd_rawmidi_set_ops (hdsp->midi[id].rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT, &snd_hdsp_midi_output);
1509 snd_rawmidi_set_ops (hdsp->midi[id].rmidi, SNDRV_RAWMIDI_STREAM_INPUT, &snd_hdsp_midi_input);
1511 hdsp->midi[id].rmidi->info_flags |= SNDRV_RAWMIDI_INFO_OUTPUT |
1512 SNDRV_RAWMIDI_INFO_INPUT |
1513 SNDRV_RAWMIDI_INFO_DUPLEX;
1518 /*-----------------------------------------------------------------------------
1520 ----------------------------------------------------------------------------*/
1522 static u32 snd_hdsp_convert_from_aes(struct snd_aes_iec958 *aes)
1525 val |= (aes->status[0] & IEC958_AES0_PROFESSIONAL) ? HDSP_SPDIFProfessional : 0;
1526 val |= (aes->status[0] & IEC958_AES0_NONAUDIO) ? HDSP_SPDIFNonAudio : 0;
1527 if (val & HDSP_SPDIFProfessional)
1528 val |= (aes->status[0] & IEC958_AES0_PRO_EMPHASIS_5015) ? HDSP_SPDIFEmphasis : 0;
1530 val |= (aes->status[0] & IEC958_AES0_CON_EMPHASIS_5015) ? HDSP_SPDIFEmphasis : 0;
1534 static void snd_hdsp_convert_to_aes(struct snd_aes_iec958 *aes, u32 val)
1536 aes->status[0] = ((val & HDSP_SPDIFProfessional) ? IEC958_AES0_PROFESSIONAL : 0) |
1537 ((val & HDSP_SPDIFNonAudio) ? IEC958_AES0_NONAUDIO : 0);
1538 if (val & HDSP_SPDIFProfessional)
1539 aes->status[0] |= (val & HDSP_SPDIFEmphasis) ? IEC958_AES0_PRO_EMPHASIS_5015 : 0;
1541 aes->status[0] |= (val & HDSP_SPDIFEmphasis) ? IEC958_AES0_CON_EMPHASIS_5015 : 0;
1544 static int snd_hdsp_control_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1546 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1551 static int snd_hdsp_control_spdif_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1553 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1555 snd_hdsp_convert_to_aes(&ucontrol->value.iec958, hdsp->creg_spdif);
1559 static int snd_hdsp_control_spdif_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1561 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1565 val = snd_hdsp_convert_from_aes(&ucontrol->value.iec958);
1566 spin_lock_irq(&hdsp->lock);
1567 change = val != hdsp->creg_spdif;
1568 hdsp->creg_spdif = val;
1569 spin_unlock_irq(&hdsp->lock);
1573 static int snd_hdsp_control_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1575 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1580 static int snd_hdsp_control_spdif_stream_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1582 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1584 snd_hdsp_convert_to_aes(&ucontrol->value.iec958, hdsp->creg_spdif_stream);
1588 static int snd_hdsp_control_spdif_stream_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1590 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1594 val = snd_hdsp_convert_from_aes(&ucontrol->value.iec958);
1595 spin_lock_irq(&hdsp->lock);
1596 change = val != hdsp->creg_spdif_stream;
1597 hdsp->creg_spdif_stream = val;
1598 hdsp->control_register &= ~(HDSP_SPDIFProfessional | HDSP_SPDIFNonAudio | HDSP_SPDIFEmphasis);
1599 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register |= val);
1600 spin_unlock_irq(&hdsp->lock);
1604 static int snd_hdsp_control_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1606 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1611 static int snd_hdsp_control_spdif_mask_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1613 ucontrol->value.iec958.status[0] = kcontrol->private_value;
1617 #define HDSP_SPDIF_IN(xname, xindex) \
1618 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1621 .info = snd_hdsp_info_spdif_in, \
1622 .get = snd_hdsp_get_spdif_in, \
1623 .put = snd_hdsp_put_spdif_in }
1625 static unsigned int hdsp_spdif_in(struct hdsp *hdsp)
1627 return hdsp_decode_spdif_in(hdsp->control_register & HDSP_SPDIFInputMask);
1630 static int hdsp_set_spdif_input(struct hdsp *hdsp, int in)
1632 hdsp->control_register &= ~HDSP_SPDIFInputMask;
1633 hdsp->control_register |= hdsp_encode_spdif_in(in);
1634 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1638 static int snd_hdsp_info_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1640 static char *texts[4] = {"Optical", "Coaxial", "Internal", "AES"};
1641 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1643 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1645 uinfo->value.enumerated.items = ((hdsp->io_type == H9632) ? 4 : 3);
1646 if (uinfo->value.enumerated.item > ((hdsp->io_type == H9632) ? 3 : 2))
1647 uinfo->value.enumerated.item = ((hdsp->io_type == H9632) ? 3 : 2);
1648 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1652 static int snd_hdsp_get_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1654 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1656 ucontrol->value.enumerated.item[0] = hdsp_spdif_in(hdsp);
1660 static int snd_hdsp_put_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1662 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1666 if (!snd_hdsp_use_is_exclusive(hdsp))
1668 val = ucontrol->value.enumerated.item[0] % ((hdsp->io_type == H9632) ? 4 : 3);
1669 spin_lock_irq(&hdsp->lock);
1670 change = val != hdsp_spdif_in(hdsp);
1672 hdsp_set_spdif_input(hdsp, val);
1673 spin_unlock_irq(&hdsp->lock);
1677 #define HDSP_SPDIF_OUT(xname, xindex) \
1678 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1679 .info = snd_hdsp_info_spdif_bits, \
1680 .get = snd_hdsp_get_spdif_out, .put = snd_hdsp_put_spdif_out }
1682 static int hdsp_spdif_out(struct hdsp *hdsp)
1684 return (hdsp->control_register & HDSP_SPDIFOpticalOut) ? 1 : 0;
1687 static int hdsp_set_spdif_output(struct hdsp *hdsp, int out)
1690 hdsp->control_register |= HDSP_SPDIFOpticalOut;
1692 hdsp->control_register &= ~HDSP_SPDIFOpticalOut;
1693 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1697 #define snd_hdsp_info_spdif_bits snd_ctl_boolean_mono_info
1699 static int snd_hdsp_get_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1701 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1703 ucontrol->value.integer.value[0] = hdsp_spdif_out(hdsp);
1707 static int snd_hdsp_put_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1709 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1713 if (!snd_hdsp_use_is_exclusive(hdsp))
1715 val = ucontrol->value.integer.value[0] & 1;
1716 spin_lock_irq(&hdsp->lock);
1717 change = (int)val != hdsp_spdif_out(hdsp);
1718 hdsp_set_spdif_output(hdsp, val);
1719 spin_unlock_irq(&hdsp->lock);
1723 #define HDSP_SPDIF_PROFESSIONAL(xname, xindex) \
1724 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1725 .info = snd_hdsp_info_spdif_bits, \
1726 .get = snd_hdsp_get_spdif_professional, .put = snd_hdsp_put_spdif_professional }
1728 static int hdsp_spdif_professional(struct hdsp *hdsp)
1730 return (hdsp->control_register & HDSP_SPDIFProfessional) ? 1 : 0;
1733 static int hdsp_set_spdif_professional(struct hdsp *hdsp, int val)
1736 hdsp->control_register |= HDSP_SPDIFProfessional;
1738 hdsp->control_register &= ~HDSP_SPDIFProfessional;
1739 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1743 static int snd_hdsp_get_spdif_professional(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1745 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1747 ucontrol->value.integer.value[0] = hdsp_spdif_professional(hdsp);
1751 static int snd_hdsp_put_spdif_professional(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1753 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1757 if (!snd_hdsp_use_is_exclusive(hdsp))
1759 val = ucontrol->value.integer.value[0] & 1;
1760 spin_lock_irq(&hdsp->lock);
1761 change = (int)val != hdsp_spdif_professional(hdsp);
1762 hdsp_set_spdif_professional(hdsp, val);
1763 spin_unlock_irq(&hdsp->lock);
1767 #define HDSP_SPDIF_EMPHASIS(xname, xindex) \
1768 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1769 .info = snd_hdsp_info_spdif_bits, \
1770 .get = snd_hdsp_get_spdif_emphasis, .put = snd_hdsp_put_spdif_emphasis }
1772 static int hdsp_spdif_emphasis(struct hdsp *hdsp)
1774 return (hdsp->control_register & HDSP_SPDIFEmphasis) ? 1 : 0;
1777 static int hdsp_set_spdif_emphasis(struct hdsp *hdsp, int val)
1780 hdsp->control_register |= HDSP_SPDIFEmphasis;
1782 hdsp->control_register &= ~HDSP_SPDIFEmphasis;
1783 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1787 static int snd_hdsp_get_spdif_emphasis(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1789 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1791 ucontrol->value.integer.value[0] = hdsp_spdif_emphasis(hdsp);
1795 static int snd_hdsp_put_spdif_emphasis(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1797 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1801 if (!snd_hdsp_use_is_exclusive(hdsp))
1803 val = ucontrol->value.integer.value[0] & 1;
1804 spin_lock_irq(&hdsp->lock);
1805 change = (int)val != hdsp_spdif_emphasis(hdsp);
1806 hdsp_set_spdif_emphasis(hdsp, val);
1807 spin_unlock_irq(&hdsp->lock);
1811 #define HDSP_SPDIF_NON_AUDIO(xname, xindex) \
1812 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1813 .info = snd_hdsp_info_spdif_bits, \
1814 .get = snd_hdsp_get_spdif_nonaudio, .put = snd_hdsp_put_spdif_nonaudio }
1816 static int hdsp_spdif_nonaudio(struct hdsp *hdsp)
1818 return (hdsp->control_register & HDSP_SPDIFNonAudio) ? 1 : 0;
1821 static int hdsp_set_spdif_nonaudio(struct hdsp *hdsp, int val)
1824 hdsp->control_register |= HDSP_SPDIFNonAudio;
1826 hdsp->control_register &= ~HDSP_SPDIFNonAudio;
1827 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1831 static int snd_hdsp_get_spdif_nonaudio(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1833 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1835 ucontrol->value.integer.value[0] = hdsp_spdif_nonaudio(hdsp);
1839 static int snd_hdsp_put_spdif_nonaudio(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1841 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1845 if (!snd_hdsp_use_is_exclusive(hdsp))
1847 val = ucontrol->value.integer.value[0] & 1;
1848 spin_lock_irq(&hdsp->lock);
1849 change = (int)val != hdsp_spdif_nonaudio(hdsp);
1850 hdsp_set_spdif_nonaudio(hdsp, val);
1851 spin_unlock_irq(&hdsp->lock);
1855 #define HDSP_SPDIF_SAMPLE_RATE(xname, xindex) \
1856 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1859 .access = SNDRV_CTL_ELEM_ACCESS_READ, \
1860 .info = snd_hdsp_info_spdif_sample_rate, \
1861 .get = snd_hdsp_get_spdif_sample_rate \
1864 static int snd_hdsp_info_spdif_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1866 static char *texts[] = {"32000", "44100", "48000", "64000", "88200", "96000", "None", "128000", "176400", "192000"};
1867 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1869 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1871 uinfo->value.enumerated.items = (hdsp->io_type == H9632) ? 10 : 7;
1872 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1873 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1874 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1878 static int snd_hdsp_get_spdif_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1880 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1882 switch (hdsp_spdif_sample_rate(hdsp)) {
1884 ucontrol->value.enumerated.item[0] = 0;
1887 ucontrol->value.enumerated.item[0] = 1;
1890 ucontrol->value.enumerated.item[0] = 2;
1893 ucontrol->value.enumerated.item[0] = 3;
1896 ucontrol->value.enumerated.item[0] = 4;
1899 ucontrol->value.enumerated.item[0] = 5;
1902 ucontrol->value.enumerated.item[0] = 7;
1905 ucontrol->value.enumerated.item[0] = 8;
1908 ucontrol->value.enumerated.item[0] = 9;
1911 ucontrol->value.enumerated.item[0] = 6;
1916 #define HDSP_SYSTEM_SAMPLE_RATE(xname, xindex) \
1917 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1920 .access = SNDRV_CTL_ELEM_ACCESS_READ, \
1921 .info = snd_hdsp_info_system_sample_rate, \
1922 .get = snd_hdsp_get_system_sample_rate \
1925 static int snd_hdsp_info_system_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1927 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1932 static int snd_hdsp_get_system_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1934 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1936 ucontrol->value.enumerated.item[0] = hdsp->system_sample_rate;
1940 #define HDSP_AUTOSYNC_SAMPLE_RATE(xname, xindex) \
1941 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1944 .access = SNDRV_CTL_ELEM_ACCESS_READ, \
1945 .info = snd_hdsp_info_autosync_sample_rate, \
1946 .get = snd_hdsp_get_autosync_sample_rate \
1949 static int snd_hdsp_info_autosync_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1951 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1952 static char *texts[] = {"32000", "44100", "48000", "64000", "88200", "96000", "None", "128000", "176400", "192000"};
1953 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1955 uinfo->value.enumerated.items = (hdsp->io_type == H9632) ? 10 : 7 ;
1956 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1957 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1958 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1962 static int snd_hdsp_get_autosync_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1964 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1966 switch (hdsp_external_sample_rate(hdsp)) {
1968 ucontrol->value.enumerated.item[0] = 0;
1971 ucontrol->value.enumerated.item[0] = 1;
1974 ucontrol->value.enumerated.item[0] = 2;
1977 ucontrol->value.enumerated.item[0] = 3;
1980 ucontrol->value.enumerated.item[0] = 4;
1983 ucontrol->value.enumerated.item[0] = 5;
1986 ucontrol->value.enumerated.item[0] = 7;
1989 ucontrol->value.enumerated.item[0] = 8;
1992 ucontrol->value.enumerated.item[0] = 9;
1995 ucontrol->value.enumerated.item[0] = 6;
2000 #define HDSP_SYSTEM_CLOCK_MODE(xname, xindex) \
2001 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2004 .access = SNDRV_CTL_ELEM_ACCESS_READ, \
2005 .info = snd_hdsp_info_system_clock_mode, \
2006 .get = snd_hdsp_get_system_clock_mode \
2009 static int hdsp_system_clock_mode(struct hdsp *hdsp)
2011 if (hdsp->control_register & HDSP_ClockModeMaster)
2013 else if (hdsp_external_sample_rate(hdsp) != hdsp->system_sample_rate)
2018 static int snd_hdsp_info_system_clock_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2020 static char *texts[] = {"Master", "Slave" };
2022 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2024 uinfo->value.enumerated.items = 2;
2025 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2026 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2027 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2031 static int snd_hdsp_get_system_clock_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2033 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2035 ucontrol->value.enumerated.item[0] = hdsp_system_clock_mode(hdsp);
2039 #define HDSP_CLOCK_SOURCE(xname, xindex) \
2040 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2043 .info = snd_hdsp_info_clock_source, \
2044 .get = snd_hdsp_get_clock_source, \
2045 .put = snd_hdsp_put_clock_source \
2048 static int hdsp_clock_source(struct hdsp *hdsp)
2050 if (hdsp->control_register & HDSP_ClockModeMaster) {
2051 switch (hdsp->system_sample_rate) {
2078 static int hdsp_set_clock_source(struct hdsp *hdsp, int mode)
2082 case HDSP_CLOCK_SOURCE_AUTOSYNC:
2083 if (hdsp_external_sample_rate(hdsp) != 0) {
2084 if (!hdsp_set_rate(hdsp, hdsp_external_sample_rate(hdsp), 1)) {
2085 hdsp->control_register &= ~HDSP_ClockModeMaster;
2086 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2091 case HDSP_CLOCK_SOURCE_INTERNAL_32KHZ:
2094 case HDSP_CLOCK_SOURCE_INTERNAL_44_1KHZ:
2097 case HDSP_CLOCK_SOURCE_INTERNAL_48KHZ:
2100 case HDSP_CLOCK_SOURCE_INTERNAL_64KHZ:
2103 case HDSP_CLOCK_SOURCE_INTERNAL_88_2KHZ:
2106 case HDSP_CLOCK_SOURCE_INTERNAL_96KHZ:
2109 case HDSP_CLOCK_SOURCE_INTERNAL_128KHZ:
2112 case HDSP_CLOCK_SOURCE_INTERNAL_176_4KHZ:
2115 case HDSP_CLOCK_SOURCE_INTERNAL_192KHZ:
2121 hdsp->control_register |= HDSP_ClockModeMaster;
2122 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2123 hdsp_set_rate(hdsp, rate, 1);
2127 static int snd_hdsp_info_clock_source(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2129 static char *texts[] = {"AutoSync", "Internal 32.0 kHz", "Internal 44.1 kHz", "Internal 48.0 kHz", "Internal 64.0 kHz", "Internal 88.2 kHz", "Internal 96.0 kHz", "Internal 128 kHz", "Internal 176.4 kHz", "Internal 192.0 KHz" };
2130 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2132 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2134 if (hdsp->io_type == H9632)
2135 uinfo->value.enumerated.items = 10;
2137 uinfo->value.enumerated.items = 7;
2138 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2139 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2140 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2144 static int snd_hdsp_get_clock_source(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2146 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2148 ucontrol->value.enumerated.item[0] = hdsp_clock_source(hdsp);
2152 static int snd_hdsp_put_clock_source(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2154 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2158 if (!snd_hdsp_use_is_exclusive(hdsp))
2160 val = ucontrol->value.enumerated.item[0];
2161 if (val < 0) val = 0;
2162 if (hdsp->io_type == H9632) {
2169 spin_lock_irq(&hdsp->lock);
2170 if (val != hdsp_clock_source(hdsp))
2171 change = (hdsp_set_clock_source(hdsp, val) == 0) ? 1 : 0;
2174 spin_unlock_irq(&hdsp->lock);
2178 #define snd_hdsp_info_clock_source_lock snd_ctl_boolean_mono_info
2180 static int snd_hdsp_get_clock_source_lock(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2182 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2184 ucontrol->value.integer.value[0] = hdsp->clock_source_locked;
2188 static int snd_hdsp_put_clock_source_lock(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2190 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2193 change = (int)ucontrol->value.integer.value[0] != hdsp->clock_source_locked;
2195 hdsp->clock_source_locked = !!ucontrol->value.integer.value[0];
2199 #define HDSP_DA_GAIN(xname, xindex) \
2200 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2203 .info = snd_hdsp_info_da_gain, \
2204 .get = snd_hdsp_get_da_gain, \
2205 .put = snd_hdsp_put_da_gain \
2208 static int hdsp_da_gain(struct hdsp *hdsp)
2210 switch (hdsp->control_register & HDSP_DAGainMask) {
2211 case HDSP_DAGainHighGain:
2213 case HDSP_DAGainPlus4dBu:
2215 case HDSP_DAGainMinus10dBV:
2222 static int hdsp_set_da_gain(struct hdsp *hdsp, int mode)
2224 hdsp->control_register &= ~HDSP_DAGainMask;
2227 hdsp->control_register |= HDSP_DAGainHighGain;
2230 hdsp->control_register |= HDSP_DAGainPlus4dBu;
2233 hdsp->control_register |= HDSP_DAGainMinus10dBV;
2239 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2243 static int snd_hdsp_info_da_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2245 static char *texts[] = {"Hi Gain", "+4 dBu", "-10 dbV"};
2247 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2249 uinfo->value.enumerated.items = 3;
2250 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2251 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2252 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2256 static int snd_hdsp_get_da_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2258 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2260 ucontrol->value.enumerated.item[0] = hdsp_da_gain(hdsp);
2264 static int snd_hdsp_put_da_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2266 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2270 if (!snd_hdsp_use_is_exclusive(hdsp))
2272 val = ucontrol->value.enumerated.item[0];
2273 if (val < 0) val = 0;
2274 if (val > 2) val = 2;
2275 spin_lock_irq(&hdsp->lock);
2276 if (val != hdsp_da_gain(hdsp))
2277 change = (hdsp_set_da_gain(hdsp, val) == 0) ? 1 : 0;
2280 spin_unlock_irq(&hdsp->lock);
2284 #define HDSP_AD_GAIN(xname, xindex) \
2285 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2288 .info = snd_hdsp_info_ad_gain, \
2289 .get = snd_hdsp_get_ad_gain, \
2290 .put = snd_hdsp_put_ad_gain \
2293 static int hdsp_ad_gain(struct hdsp *hdsp)
2295 switch (hdsp->control_register & HDSP_ADGainMask) {
2296 case HDSP_ADGainMinus10dBV:
2298 case HDSP_ADGainPlus4dBu:
2300 case HDSP_ADGainLowGain:
2307 static int hdsp_set_ad_gain(struct hdsp *hdsp, int mode)
2309 hdsp->control_register &= ~HDSP_ADGainMask;
2312 hdsp->control_register |= HDSP_ADGainMinus10dBV;
2315 hdsp->control_register |= HDSP_ADGainPlus4dBu;
2318 hdsp->control_register |= HDSP_ADGainLowGain;
2324 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2328 static int snd_hdsp_info_ad_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2330 static char *texts[] = {"-10 dBV", "+4 dBu", "Lo Gain"};
2332 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2334 uinfo->value.enumerated.items = 3;
2335 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2336 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2337 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2341 static int snd_hdsp_get_ad_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2343 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2345 ucontrol->value.enumerated.item[0] = hdsp_ad_gain(hdsp);
2349 static int snd_hdsp_put_ad_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2351 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2355 if (!snd_hdsp_use_is_exclusive(hdsp))
2357 val = ucontrol->value.enumerated.item[0];
2358 if (val < 0) val = 0;
2359 if (val > 2) val = 2;
2360 spin_lock_irq(&hdsp->lock);
2361 if (val != hdsp_ad_gain(hdsp))
2362 change = (hdsp_set_ad_gain(hdsp, val) == 0) ? 1 : 0;
2365 spin_unlock_irq(&hdsp->lock);
2369 #define HDSP_PHONE_GAIN(xname, xindex) \
2370 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2373 .info = snd_hdsp_info_phone_gain, \
2374 .get = snd_hdsp_get_phone_gain, \
2375 .put = snd_hdsp_put_phone_gain \
2378 static int hdsp_phone_gain(struct hdsp *hdsp)
2380 switch (hdsp->control_register & HDSP_PhoneGainMask) {
2381 case HDSP_PhoneGain0dB:
2383 case HDSP_PhoneGainMinus6dB:
2385 case HDSP_PhoneGainMinus12dB:
2392 static int hdsp_set_phone_gain(struct hdsp *hdsp, int mode)
2394 hdsp->control_register &= ~HDSP_PhoneGainMask;
2397 hdsp->control_register |= HDSP_PhoneGain0dB;
2400 hdsp->control_register |= HDSP_PhoneGainMinus6dB;
2403 hdsp->control_register |= HDSP_PhoneGainMinus12dB;
2409 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2413 static int snd_hdsp_info_phone_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2415 static char *texts[] = {"0 dB", "-6 dB", "-12 dB"};
2417 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2419 uinfo->value.enumerated.items = 3;
2420 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2421 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2422 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2426 static int snd_hdsp_get_phone_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2428 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2430 ucontrol->value.enumerated.item[0] = hdsp_phone_gain(hdsp);
2434 static int snd_hdsp_put_phone_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2436 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2440 if (!snd_hdsp_use_is_exclusive(hdsp))
2442 val = ucontrol->value.enumerated.item[0];
2443 if (val < 0) val = 0;
2444 if (val > 2) val = 2;
2445 spin_lock_irq(&hdsp->lock);
2446 if (val != hdsp_phone_gain(hdsp))
2447 change = (hdsp_set_phone_gain(hdsp, val) == 0) ? 1 : 0;
2450 spin_unlock_irq(&hdsp->lock);
2454 #define HDSP_XLR_BREAKOUT_CABLE(xname, xindex) \
2455 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2458 .info = snd_hdsp_info_xlr_breakout_cable, \
2459 .get = snd_hdsp_get_xlr_breakout_cable, \
2460 .put = snd_hdsp_put_xlr_breakout_cable \
2463 static int hdsp_xlr_breakout_cable(struct hdsp *hdsp)
2465 if (hdsp->control_register & HDSP_XLRBreakoutCable)
2470 static int hdsp_set_xlr_breakout_cable(struct hdsp *hdsp, int mode)
2473 hdsp->control_register |= HDSP_XLRBreakoutCable;
2475 hdsp->control_register &= ~HDSP_XLRBreakoutCable;
2476 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2480 #define snd_hdsp_info_xlr_breakout_cable snd_ctl_boolean_mono_info
2482 static int snd_hdsp_get_xlr_breakout_cable(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2484 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2486 ucontrol->value.enumerated.item[0] = hdsp_xlr_breakout_cable(hdsp);
2490 static int snd_hdsp_put_xlr_breakout_cable(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2492 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2496 if (!snd_hdsp_use_is_exclusive(hdsp))
2498 val = ucontrol->value.integer.value[0] & 1;
2499 spin_lock_irq(&hdsp->lock);
2500 change = (int)val != hdsp_xlr_breakout_cable(hdsp);
2501 hdsp_set_xlr_breakout_cable(hdsp, val);
2502 spin_unlock_irq(&hdsp->lock);
2506 /* (De)activates old RME Analog Extension Board
2507 These are connected to the internal ADAT connector
2508 Switching this on desactivates external ADAT
2510 #define HDSP_AEB(xname, xindex) \
2511 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2514 .info = snd_hdsp_info_aeb, \
2515 .get = snd_hdsp_get_aeb, \
2516 .put = snd_hdsp_put_aeb \
2519 static int hdsp_aeb(struct hdsp *hdsp)
2521 if (hdsp->control_register & HDSP_AnalogExtensionBoard)
2526 static int hdsp_set_aeb(struct hdsp *hdsp, int mode)
2529 hdsp->control_register |= HDSP_AnalogExtensionBoard;
2531 hdsp->control_register &= ~HDSP_AnalogExtensionBoard;
2532 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2536 #define snd_hdsp_info_aeb snd_ctl_boolean_mono_info
2538 static int snd_hdsp_get_aeb(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2540 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2542 ucontrol->value.enumerated.item[0] = hdsp_aeb(hdsp);
2546 static int snd_hdsp_put_aeb(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2548 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2552 if (!snd_hdsp_use_is_exclusive(hdsp))
2554 val = ucontrol->value.integer.value[0] & 1;
2555 spin_lock_irq(&hdsp->lock);
2556 change = (int)val != hdsp_aeb(hdsp);
2557 hdsp_set_aeb(hdsp, val);
2558 spin_unlock_irq(&hdsp->lock);
2562 #define HDSP_PREF_SYNC_REF(xname, xindex) \
2563 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2566 .info = snd_hdsp_info_pref_sync_ref, \
2567 .get = snd_hdsp_get_pref_sync_ref, \
2568 .put = snd_hdsp_put_pref_sync_ref \
2571 static int hdsp_pref_sync_ref(struct hdsp *hdsp)
2573 /* Notice that this looks at the requested sync source,
2574 not the one actually in use.
2577 switch (hdsp->control_register & HDSP_SyncRefMask) {
2578 case HDSP_SyncRef_ADAT1:
2579 return HDSP_SYNC_FROM_ADAT1;
2580 case HDSP_SyncRef_ADAT2:
2581 return HDSP_SYNC_FROM_ADAT2;
2582 case HDSP_SyncRef_ADAT3:
2583 return HDSP_SYNC_FROM_ADAT3;
2584 case HDSP_SyncRef_SPDIF:
2585 return HDSP_SYNC_FROM_SPDIF;
2586 case HDSP_SyncRef_WORD:
2587 return HDSP_SYNC_FROM_WORD;
2588 case HDSP_SyncRef_ADAT_SYNC:
2589 return HDSP_SYNC_FROM_ADAT_SYNC;
2591 return HDSP_SYNC_FROM_WORD;
2596 static int hdsp_set_pref_sync_ref(struct hdsp *hdsp, int pref)
2598 hdsp->control_register &= ~HDSP_SyncRefMask;
2600 case HDSP_SYNC_FROM_ADAT1:
2601 hdsp->control_register &= ~HDSP_SyncRefMask; /* clear SyncRef bits */
2603 case HDSP_SYNC_FROM_ADAT2:
2604 hdsp->control_register |= HDSP_SyncRef_ADAT2;
2606 case HDSP_SYNC_FROM_ADAT3:
2607 hdsp->control_register |= HDSP_SyncRef_ADAT3;
2609 case HDSP_SYNC_FROM_SPDIF:
2610 hdsp->control_register |= HDSP_SyncRef_SPDIF;
2612 case HDSP_SYNC_FROM_WORD:
2613 hdsp->control_register |= HDSP_SyncRef_WORD;
2615 case HDSP_SYNC_FROM_ADAT_SYNC:
2616 hdsp->control_register |= HDSP_SyncRef_ADAT_SYNC;
2621 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2625 static int snd_hdsp_info_pref_sync_ref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2627 static char *texts[] = {"Word", "IEC958", "ADAT1", "ADAT Sync", "ADAT2", "ADAT3" };
2628 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2630 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2633 switch (hdsp->io_type) {
2636 uinfo->value.enumerated.items = 6;
2639 uinfo->value.enumerated.items = 4;
2642 uinfo->value.enumerated.items = 3;
2648 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2649 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2650 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2654 static int snd_hdsp_get_pref_sync_ref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2656 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2658 ucontrol->value.enumerated.item[0] = hdsp_pref_sync_ref(hdsp);
2662 static int snd_hdsp_put_pref_sync_ref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2664 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2668 if (!snd_hdsp_use_is_exclusive(hdsp))
2671 switch (hdsp->io_type) {
2686 val = ucontrol->value.enumerated.item[0] % max;
2687 spin_lock_irq(&hdsp->lock);
2688 change = (int)val != hdsp_pref_sync_ref(hdsp);
2689 hdsp_set_pref_sync_ref(hdsp, val);
2690 spin_unlock_irq(&hdsp->lock);
2694 #define HDSP_AUTOSYNC_REF(xname, xindex) \
2695 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2698 .access = SNDRV_CTL_ELEM_ACCESS_READ, \
2699 .info = snd_hdsp_info_autosync_ref, \
2700 .get = snd_hdsp_get_autosync_ref, \
2703 static int hdsp_autosync_ref(struct hdsp *hdsp)
2705 /* This looks at the autosync selected sync reference */
2706 unsigned int status2 = hdsp_read(hdsp, HDSP_status2Register);
2708 switch (status2 & HDSP_SelSyncRefMask) {
2709 case HDSP_SelSyncRef_WORD:
2710 return HDSP_AUTOSYNC_FROM_WORD;
2711 case HDSP_SelSyncRef_ADAT_SYNC:
2712 return HDSP_AUTOSYNC_FROM_ADAT_SYNC;
2713 case HDSP_SelSyncRef_SPDIF:
2714 return HDSP_AUTOSYNC_FROM_SPDIF;
2715 case HDSP_SelSyncRefMask:
2716 return HDSP_AUTOSYNC_FROM_NONE;
2717 case HDSP_SelSyncRef_ADAT1:
2718 return HDSP_AUTOSYNC_FROM_ADAT1;
2719 case HDSP_SelSyncRef_ADAT2:
2720 return HDSP_AUTOSYNC_FROM_ADAT2;
2721 case HDSP_SelSyncRef_ADAT3:
2722 return HDSP_AUTOSYNC_FROM_ADAT3;
2724 return HDSP_AUTOSYNC_FROM_WORD;
2729 static int snd_hdsp_info_autosync_ref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2731 static char *texts[] = {"Word", "ADAT Sync", "IEC958", "None", "ADAT1", "ADAT2", "ADAT3" };
2733 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2735 uinfo->value.enumerated.items = 7;
2736 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2737 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2738 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2742 static int snd_hdsp_get_autosync_ref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2744 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2746 ucontrol->value.enumerated.item[0] = hdsp_autosync_ref(hdsp);
2750 #define HDSP_LINE_OUT(xname, xindex) \
2751 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2754 .info = snd_hdsp_info_line_out, \
2755 .get = snd_hdsp_get_line_out, \
2756 .put = snd_hdsp_put_line_out \
2759 static int hdsp_line_out(struct hdsp *hdsp)
2761 return (hdsp->control_register & HDSP_LineOut) ? 1 : 0;
2764 static int hdsp_set_line_output(struct hdsp *hdsp, int out)
2767 hdsp->control_register |= HDSP_LineOut;
2769 hdsp->control_register &= ~HDSP_LineOut;
2770 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2774 #define snd_hdsp_info_line_out snd_ctl_boolean_mono_info
2776 static int snd_hdsp_get_line_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2778 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2780 spin_lock_irq(&hdsp->lock);
2781 ucontrol->value.integer.value[0] = hdsp_line_out(hdsp);
2782 spin_unlock_irq(&hdsp->lock);
2786 static int snd_hdsp_put_line_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2788 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2792 if (!snd_hdsp_use_is_exclusive(hdsp))
2794 val = ucontrol->value.integer.value[0] & 1;
2795 spin_lock_irq(&hdsp->lock);
2796 change = (int)val != hdsp_line_out(hdsp);
2797 hdsp_set_line_output(hdsp, val);
2798 spin_unlock_irq(&hdsp->lock);
2802 #define HDSP_PRECISE_POINTER(xname, xindex) \
2803 { .iface = SNDRV_CTL_ELEM_IFACE_CARD, \
2806 .info = snd_hdsp_info_precise_pointer, \
2807 .get = snd_hdsp_get_precise_pointer, \
2808 .put = snd_hdsp_put_precise_pointer \
2811 static int hdsp_set_precise_pointer(struct hdsp *hdsp, int precise)
2814 hdsp->precise_ptr = 1;
2816 hdsp->precise_ptr = 0;
2820 #define snd_hdsp_info_precise_pointer snd_ctl_boolean_mono_info
2822 static int snd_hdsp_get_precise_pointer(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2824 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2826 spin_lock_irq(&hdsp->lock);
2827 ucontrol->value.integer.value[0] = hdsp->precise_ptr;
2828 spin_unlock_irq(&hdsp->lock);
2832 static int snd_hdsp_put_precise_pointer(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2834 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2838 if (!snd_hdsp_use_is_exclusive(hdsp))
2840 val = ucontrol->value.integer.value[0] & 1;
2841 spin_lock_irq(&hdsp->lock);
2842 change = (int)val != hdsp->precise_ptr;
2843 hdsp_set_precise_pointer(hdsp, val);
2844 spin_unlock_irq(&hdsp->lock);
2848 #define HDSP_USE_MIDI_TASKLET(xname, xindex) \
2849 { .iface = SNDRV_CTL_ELEM_IFACE_CARD, \
2852 .info = snd_hdsp_info_use_midi_tasklet, \
2853 .get = snd_hdsp_get_use_midi_tasklet, \
2854 .put = snd_hdsp_put_use_midi_tasklet \
2857 static int hdsp_set_use_midi_tasklet(struct hdsp *hdsp, int use_tasklet)
2860 hdsp->use_midi_tasklet = 1;
2862 hdsp->use_midi_tasklet = 0;
2866 #define snd_hdsp_info_use_midi_tasklet snd_ctl_boolean_mono_info
2868 static int snd_hdsp_get_use_midi_tasklet(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2870 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2872 spin_lock_irq(&hdsp->lock);
2873 ucontrol->value.integer.value[0] = hdsp->use_midi_tasklet;
2874 spin_unlock_irq(&hdsp->lock);
2878 static int snd_hdsp_put_use_midi_tasklet(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2880 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2884 if (!snd_hdsp_use_is_exclusive(hdsp))
2886 val = ucontrol->value.integer.value[0] & 1;
2887 spin_lock_irq(&hdsp->lock);
2888 change = (int)val != hdsp->use_midi_tasklet;
2889 hdsp_set_use_midi_tasklet(hdsp, val);
2890 spin_unlock_irq(&hdsp->lock);
2894 #define HDSP_MIXER(xname, xindex) \
2895 { .iface = SNDRV_CTL_ELEM_IFACE_HWDEP, \
2899 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
2900 SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
2901 .info = snd_hdsp_info_mixer, \
2902 .get = snd_hdsp_get_mixer, \
2903 .put = snd_hdsp_put_mixer \
2906 static int snd_hdsp_info_mixer(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2908 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
2910 uinfo->value.integer.min = 0;
2911 uinfo->value.integer.max = 65536;
2912 uinfo->value.integer.step = 1;
2916 static int snd_hdsp_get_mixer(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2918 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2923 source = ucontrol->value.integer.value[0];
2924 destination = ucontrol->value.integer.value[1];
2926 if (source >= hdsp->max_channels)
2927 addr = hdsp_playback_to_output_key(hdsp,source-hdsp->max_channels,destination);
2929 addr = hdsp_input_to_output_key(hdsp,source, destination);
2931 spin_lock_irq(&hdsp->lock);
2932 ucontrol->value.integer.value[2] = hdsp_read_gain (hdsp, addr);
2933 spin_unlock_irq(&hdsp->lock);
2937 static int snd_hdsp_put_mixer(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2939 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2946 if (!snd_hdsp_use_is_exclusive(hdsp))
2949 source = ucontrol->value.integer.value[0];
2950 destination = ucontrol->value.integer.value[1];
2952 if (source >= hdsp->max_channels)
2953 addr = hdsp_playback_to_output_key(hdsp,source-hdsp->max_channels, destination);
2955 addr = hdsp_input_to_output_key(hdsp,source, destination);
2957 gain = ucontrol->value.integer.value[2];
2959 spin_lock_irq(&hdsp->lock);
2960 change = gain != hdsp_read_gain(hdsp, addr);
2962 hdsp_write_gain(hdsp, addr, gain);
2963 spin_unlock_irq(&hdsp->lock);
2967 #define HDSP_WC_SYNC_CHECK(xname, xindex) \
2968 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2971 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
2972 .info = snd_hdsp_info_sync_check, \
2973 .get = snd_hdsp_get_wc_sync_check \
2976 static int snd_hdsp_info_sync_check(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2978 static char *texts[] = {"No Lock", "Lock", "Sync" };
2979 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2981 uinfo->value.enumerated.items = 3;
2982 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2983 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2984 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2988 static int hdsp_wc_sync_check(struct hdsp *hdsp)
2990 int status2 = hdsp_read(hdsp, HDSP_status2Register);
2991 if (status2 & HDSP_wc_lock) {
2992 if (status2 & HDSP_wc_sync)
3001 static int snd_hdsp_get_wc_sync_check(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3003 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3005 ucontrol->value.enumerated.item[0] = hdsp_wc_sync_check(hdsp);
3009 #define HDSP_SPDIF_SYNC_CHECK(xname, xindex) \
3010 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
3013 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
3014 .info = snd_hdsp_info_sync_check, \
3015 .get = snd_hdsp_get_spdif_sync_check \
3018 static int hdsp_spdif_sync_check(struct hdsp *hdsp)
3020 int status = hdsp_read(hdsp, HDSP_statusRegister);
3021 if (status & HDSP_SPDIFErrorFlag)
3024 if (status & HDSP_SPDIFSync)
3032 static int snd_hdsp_get_spdif_sync_check(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3034 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3036 ucontrol->value.enumerated.item[0] = hdsp_spdif_sync_check(hdsp);
3040 #define HDSP_ADATSYNC_SYNC_CHECK(xname, xindex) \
3041 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
3044 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
3045 .info = snd_hdsp_info_sync_check, \
3046 .get = snd_hdsp_get_adatsync_sync_check \
3049 static int hdsp_adatsync_sync_check(struct hdsp *hdsp)
3051 int status = hdsp_read(hdsp, HDSP_statusRegister);
3052 if (status & HDSP_TimecodeLock) {
3053 if (status & HDSP_TimecodeSync)
3061 static int snd_hdsp_get_adatsync_sync_check(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3063 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3065 ucontrol->value.enumerated.item[0] = hdsp_adatsync_sync_check(hdsp);
3069 #define HDSP_ADAT_SYNC_CHECK \
3070 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
3071 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
3072 .info = snd_hdsp_info_sync_check, \
3073 .get = snd_hdsp_get_adat_sync_check \
3076 static int hdsp_adat_sync_check(struct hdsp *hdsp, int idx)
3078 int status = hdsp_read(hdsp, HDSP_statusRegister);
3080 if (status & (HDSP_Lock0>>idx)) {
3081 if (status & (HDSP_Sync0>>idx))
3089 static int snd_hdsp_get_adat_sync_check(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3092 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3094 offset = ucontrol->id.index - 1;
3095 snd_BUG_ON(offset < 0);
3097 switch (hdsp->io_type) {
3112 ucontrol->value.enumerated.item[0] = hdsp_adat_sync_check(hdsp, offset);
3116 #define HDSP_DDS_OFFSET(xname, xindex) \
3117 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
3120 .info = snd_hdsp_info_dds_offset, \
3121 .get = snd_hdsp_get_dds_offset, \
3122 .put = snd_hdsp_put_dds_offset \
3125 static int hdsp_dds_offset(struct hdsp *hdsp)
3128 unsigned int dds_value = hdsp->dds_value;
3129 int system_sample_rate = hdsp->system_sample_rate;
3136 * dds_value = n / rate
3137 * rate = n / dds_value
3139 n = div_u64(n, dds_value);
3140 if (system_sample_rate >= 112000)
3142 else if (system_sample_rate >= 56000)
3144 return ((int)n) - system_sample_rate;
3147 static int hdsp_set_dds_offset(struct hdsp *hdsp, int offset_hz)
3149 int rate = hdsp->system_sample_rate + offset_hz;
3150 hdsp_set_dds_value(hdsp, rate);
3154 static int snd_hdsp_info_dds_offset(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
3156 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
3158 uinfo->value.integer.min = -5000;
3159 uinfo->value.integer.max = 5000;
3163 static int snd_hdsp_get_dds_offset(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3165 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3167 ucontrol->value.enumerated.item[0] = hdsp_dds_offset(hdsp);
3171 static int snd_hdsp_put_dds_offset(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3173 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3177 if (!snd_hdsp_use_is_exclusive(hdsp))
3179 val = ucontrol->value.enumerated.item[0];
3180 spin_lock_irq(&hdsp->lock);
3181 if (val != hdsp_dds_offset(hdsp))
3182 change = (hdsp_set_dds_offset(hdsp, val) == 0) ? 1 : 0;
3185 spin_unlock_irq(&hdsp->lock);
3189 static struct snd_kcontrol_new snd_hdsp_9632_controls[] = {
3190 HDSP_DA_GAIN("DA Gain", 0),
3191 HDSP_AD_GAIN("AD Gain", 0),
3192 HDSP_PHONE_GAIN("Phones Gain", 0),
3193 HDSP_XLR_BREAKOUT_CABLE("XLR Breakout Cable", 0),
3194 HDSP_DDS_OFFSET("DDS Sample Rate Offset", 0)
3197 static struct snd_kcontrol_new snd_hdsp_controls[] = {
3199 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
3200 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
3201 .info = snd_hdsp_control_spdif_info,
3202 .get = snd_hdsp_control_spdif_get,
3203 .put = snd_hdsp_control_spdif_put,
3206 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
3207 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
3208 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
3209 .info = snd_hdsp_control_spdif_stream_info,
3210 .get = snd_hdsp_control_spdif_stream_get,
3211 .put = snd_hdsp_control_spdif_stream_put,
3214 .access = SNDRV_CTL_ELEM_ACCESS_READ,
3215 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
3216 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
3217 .info = snd_hdsp_control_spdif_mask_info,
3218 .get = snd_hdsp_control_spdif_mask_get,
3219 .private_value = IEC958_AES0_NONAUDIO |
3220 IEC958_AES0_PROFESSIONAL |
3221 IEC958_AES0_CON_EMPHASIS,
3224 .access = SNDRV_CTL_ELEM_ACCESS_READ,
3225 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
3226 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK),
3227 .info = snd_hdsp_control_spdif_mask_info,
3228 .get = snd_hdsp_control_spdif_mask_get,
3229 .private_value = IEC958_AES0_NONAUDIO |
3230 IEC958_AES0_PROFESSIONAL |
3231 IEC958_AES0_PRO_EMPHASIS,
3233 HDSP_MIXER("Mixer", 0),
3234 HDSP_SPDIF_IN("IEC958 Input Connector", 0),
3235 HDSP_SPDIF_OUT("IEC958 Output also on ADAT1", 0),
3236 HDSP_SPDIF_PROFESSIONAL("IEC958 Professional Bit", 0),
3237 HDSP_SPDIF_EMPHASIS("IEC958 Emphasis Bit", 0),
3238 HDSP_SPDIF_NON_AUDIO("IEC958 Non-audio Bit", 0),
3239 /* 'Sample Clock Source' complies with the alsa control naming scheme */
3240 HDSP_CLOCK_SOURCE("Sample Clock Source", 0),
3242 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3243 .name = "Sample Clock Source Locking",
3244 .info = snd_hdsp_info_clock_source_lock,
3245 .get = snd_hdsp_get_clock_source_lock,
3246 .put = snd_hdsp_put_clock_source_lock,
3248 HDSP_SYSTEM_CLOCK_MODE("System Clock Mode", 0),
3249 HDSP_PREF_SYNC_REF("Preferred Sync Reference", 0),
3250 HDSP_AUTOSYNC_REF("AutoSync Reference", 0),
3251 HDSP_SPDIF_SAMPLE_RATE("SPDIF Sample Rate", 0),
3252 HDSP_SYSTEM_SAMPLE_RATE("System Sample Rate", 0),
3253 /* 'External Rate' complies with the alsa control naming scheme */
3254 HDSP_AUTOSYNC_SAMPLE_RATE("External Rate", 0),
3255 HDSP_WC_SYNC_CHECK("Word Clock Lock Status", 0),
3256 HDSP_SPDIF_SYNC_CHECK("SPDIF Lock Status", 0),
3257 HDSP_ADATSYNC_SYNC_CHECK("ADAT Sync Lock Status", 0),
3258 HDSP_LINE_OUT("Line Out", 0),
3259 HDSP_PRECISE_POINTER("Precise Pointer", 0),
3260 HDSP_USE_MIDI_TASKLET("Use Midi Tasklet", 0),
3264 static int hdsp_rpm_input12(struct hdsp *hdsp)
3266 switch (hdsp->control_register & HDSP_RPM_Inp12) {
3267 case HDSP_RPM_Inp12_Phon_6dB:
3269 case HDSP_RPM_Inp12_Phon_n6dB:
3271 case HDSP_RPM_Inp12_Line_0dB:
3273 case HDSP_RPM_Inp12_Line_n6dB:
3280 static int snd_hdsp_get_rpm_input12(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3282 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3284 ucontrol->value.enumerated.item[0] = hdsp_rpm_input12(hdsp);
3289 static int hdsp_set_rpm_input12(struct hdsp *hdsp, int mode)
3291 hdsp->control_register &= ~HDSP_RPM_Inp12;
3294 hdsp->control_register |= HDSP_RPM_Inp12_Phon_6dB;
3299 hdsp->control_register |= HDSP_RPM_Inp12_Phon_n6dB;
3302 hdsp->control_register |= HDSP_RPM_Inp12_Line_0dB;
3305 hdsp->control_register |= HDSP_RPM_Inp12_Line_n6dB;
3311 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
3316 static int snd_hdsp_put_rpm_input12(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3318 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3322 if (!snd_hdsp_use_is_exclusive(hdsp))
3324 val = ucontrol->value.enumerated.item[0];
3329 spin_lock_irq(&hdsp->lock);
3330 if (val != hdsp_rpm_input12(hdsp))
3331 change = (hdsp_set_rpm_input12(hdsp, val) == 0) ? 1 : 0;
3334 spin_unlock_irq(&hdsp->lock);
3339 static int snd_hdsp_info_rpm_input(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
3341 static char *texts[] = {"Phono +6dB", "Phono 0dB", "Phono -6dB", "Line 0dB", "Line -6dB"};
3343 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
3345 uinfo->value.enumerated.items = 5;
3346 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
3347 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
3348 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
3353 static int hdsp_rpm_input34(struct hdsp *hdsp)
3355 switch (hdsp->control_register & HDSP_RPM_Inp34) {
3356 case HDSP_RPM_Inp34_Phon_6dB:
3358 case HDSP_RPM_Inp34_Phon_n6dB:
3360 case HDSP_RPM_Inp34_Line_0dB:
3362 case HDSP_RPM_Inp34_Line_n6dB:
3369 static int snd_hdsp_get_rpm_input34(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3371 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3373 ucontrol->value.enumerated.item[0] = hdsp_rpm_input34(hdsp);
3378 static int hdsp_set_rpm_input34(struct hdsp *hdsp, int mode)
3380 hdsp->control_register &= ~HDSP_RPM_Inp34;
3383 hdsp->control_register |= HDSP_RPM_Inp34_Phon_6dB;
3388 hdsp->control_register |= HDSP_RPM_Inp34_Phon_n6dB;
3391 hdsp->control_register |= HDSP_RPM_Inp34_Line_0dB;
3394 hdsp->control_register |= HDSP_RPM_Inp34_Line_n6dB;
3400 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
3405 static int snd_hdsp_put_rpm_input34(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3407 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3411 if (!snd_hdsp_use_is_exclusive(hdsp))
3413 val = ucontrol->value.enumerated.item[0];
3418 spin_lock_irq(&hdsp->lock);
3419 if (val != hdsp_rpm_input34(hdsp))
3420 change = (hdsp_set_rpm_input34(hdsp, val) == 0) ? 1 : 0;
3423 spin_unlock_irq(&hdsp->lock);
3428 /* RPM Bypass switch */
3429 static int hdsp_rpm_bypass(struct hdsp *hdsp)
3431 return (hdsp->control_register & HDSP_RPM_Bypass) ? 1 : 0;
3435 static int snd_hdsp_get_rpm_bypass(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3437 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3439 ucontrol->value.integer.value[0] = hdsp_rpm_bypass(hdsp);
3444 static int hdsp_set_rpm_bypass(struct hdsp *hdsp, int on)
3447 hdsp->control_register |= HDSP_RPM_Bypass;
3449 hdsp->control_register &= ~HDSP_RPM_Bypass;
3450 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
3455 static int snd_hdsp_put_rpm_bypass(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3457 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3461 if (!snd_hdsp_use_is_exclusive(hdsp))
3463 val = ucontrol->value.integer.value[0] & 1;
3464 spin_lock_irq(&hdsp->lock);
3465 change = (int)val != hdsp_rpm_bypass(hdsp);
3466 hdsp_set_rpm_bypass(hdsp, val);
3467 spin_unlock_irq(&hdsp->lock);
3472 static int snd_hdsp_info_rpm_bypass(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
3474 static char *texts[] = {"On", "Off"};
3476 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
3478 uinfo->value.enumerated.items = 2;
3479 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
3480 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
3481 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
3486 /* RPM Disconnect switch */
3487 static int hdsp_rpm_disconnect(struct hdsp *hdsp)
3489 return (hdsp->control_register & HDSP_RPM_Disconnect) ? 1 : 0;
3493 static int snd_hdsp_get_rpm_disconnect(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3495 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3497 ucontrol->value.integer.value[0] = hdsp_rpm_disconnect(hdsp);
3502 static int hdsp_set_rpm_disconnect(struct hdsp *hdsp, int on)
3505 hdsp->control_register |= HDSP_RPM_Disconnect;
3507 hdsp->control_register &= ~HDSP_RPM_Disconnect;
3508 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
3513 static int snd_hdsp_put_rpm_disconnect(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3515 struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3519 if (!snd_hdsp_use_is_exclusive(hdsp))
3521 val = ucontrol->value.integer.value[0] & 1;
3522 spin_lock_irq(&hdsp->lock);
3523 change = (int)val != hdsp_rpm_disconnect(hdsp);
3524 hdsp_set_rpm_disconnect(hdsp, val);
3525 spin_unlock_irq(&hdsp->lock);
3529 static int snd_hdsp_info_rpm_disconnect(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
3531 static char *texts[] = {"On", "Off"};
3533 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
3535 uinfo->value.enumerated.items = 2;
3536 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
3537 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
3538 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
3542 static struct snd_kcontrol_new snd_hdsp_rpm_controls[] = {
3544 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3545 .name = "RPM Bypass",
3546 .get = snd_hdsp_get_rpm_bypass,
3547 .put = snd_hdsp_put_rpm_bypass,
3548 .info = snd_hdsp_info_rpm_bypass
3551 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3552 .name = "RPM Disconnect",
3553 .get = snd_hdsp_get_rpm_disconnect,
3554 .put = snd_hdsp_put_rpm_disconnect,
3555 .info = snd_hdsp_info_rpm_disconnect
3558 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3559 .name = "Input 1/2",
3560 .get = snd_hdsp_get_rpm_input12,
3561 .put = snd_hdsp_put_rpm_input12,
3562 .info = snd_hdsp_info_rpm_input
3565 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3566 .name = "Input 3/4",
3567 .get = snd_hdsp_get_rpm_input34,
3568 .put = snd_hdsp_put_rpm_input34,
3569 .info = snd_hdsp_info_rpm_input
3571 HDSP_SYSTEM_SAMPLE_RATE("System Sample Rate", 0),
3572 HDSP_MIXER("Mixer", 0)
3575 static struct snd_kcontrol_new snd_hdsp_96xx_aeb = HDSP_AEB("Analog Extension Board", 0);
3576 static struct snd_kcontrol_new snd_hdsp_adat_sync_check = HDSP_ADAT_SYNC_CHECK;
3578 static int snd_hdsp_create_controls(struct snd_card *card, struct hdsp *hdsp)
3582 struct snd_kcontrol *kctl;
3584 if (hdsp->io_type == RPM) {
3585 /* RPM Bypass, Disconnect and Input switches */
3586 for (idx = 0; idx < ARRAY_SIZE(snd_hdsp_rpm_controls); idx++) {
3587 err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_hdsp_rpm_controls[idx], hdsp));
3594 for (idx = 0; idx < ARRAY_SIZE(snd_hdsp_controls); idx++) {
3595 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_hdsp_controls[idx], hdsp))) < 0)
3597 if (idx == 1) /* IEC958 (S/PDIF) Stream */
3598 hdsp->spdif_ctl = kctl;
3601 /* ADAT SyncCheck status */
3602 snd_hdsp_adat_sync_check.name = "ADAT Lock Status";
3603 snd_hdsp_adat_sync_check.index = 1;
3604 if ((err = snd_ctl_add (card, kctl = snd_ctl_new1(&snd_hdsp_adat_sync_check, hdsp))))
3606 if (hdsp->io_type == Digiface || hdsp->io_type == H9652) {
3607 for (idx = 1; idx < 3; ++idx) {
3608 snd_hdsp_adat_sync_check.index = idx+1;
3609 if ((err = snd_ctl_add (card, kctl = snd_ctl_new1(&snd_hdsp_adat_sync_check, hdsp))))
3614 /* DA, AD and Phone gain and XLR breakout cable controls for H9632 cards */
3615 if (hdsp->io_type == H9632) {
3616 for (idx = 0; idx < ARRAY_SIZE(snd_hdsp_9632_controls); idx++) {
3617 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_hdsp_9632_controls[idx], hdsp))) < 0)
3622 /* AEB control for H96xx card */
3623 if (hdsp->io_type == H9632 || hdsp->io_type == H9652) {
3624 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_hdsp_96xx_aeb, hdsp))) < 0)
3631 /*------------------------------------------------------------
3633 ------------------------------------------------------------*/
3636 snd_hdsp_proc_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
3638 struct hdsp *hdsp = entry->private_data;
3639 unsigned int status;
3640 unsigned int status2;
3641 char *pref_sync_ref;
3643 char *system_clock_mode;
3647 status = hdsp_read(hdsp, HDSP_statusRegister);
3648 status2 = hdsp_read(hdsp, HDSP_status2Register);
3650 snd_iprintf(buffer, "%s (Card #%d)\n", hdsp->card_name,
3651 hdsp->card->number + 1);
3652 snd_iprintf(buffer, "Buffers: capture %p playback %p\n",
3653 hdsp->capture_buffer, hdsp->playback_buffer);
3654 snd_iprintf(buffer, "IRQ: %d Registers bus: 0x%lx VM: 0x%lx\n",
3655 hdsp->irq, hdsp->port, (unsigned long)hdsp->iobase);
3656 snd_iprintf(buffer, "Control register: 0x%x\n", hdsp->control_register);
3657 snd_iprintf(buffer, "Control2 register: 0x%x\n",
3658 hdsp->control2_register);
3659 snd_iprintf(buffer, "Status register: 0x%x\n", status);
3660 snd_iprintf(buffer, "Status2 register: 0x%x\n", status2);
3662 if (hdsp_check_for_iobox(hdsp)) {
3663 snd_iprintf(buffer, "No I/O box connected.\n"
3664 "Please connect one and upload firmware.\n");
3668 if (hdsp_check_for_firmware(hdsp, 0)) {
3669 if (hdsp->state & HDSP_FirmwareCached) {
3670 if (snd_hdsp_load_firmware_from_cache(hdsp) != 0) {
3671 snd_iprintf(buffer, "Firmware loading from "
3673 "please upload manually.\n");
3678 err = hdsp_request_fw_loader(hdsp);
3681 "No firmware loaded nor cached, "
3682 "please upload firmware.\n");
3688 snd_iprintf(buffer, "FIFO status: %d\n", hdsp_read(hdsp, HDSP_fifoStatus) & 0xff);
3689 snd_iprintf(buffer, "MIDI1 Output status: 0x%x\n", hdsp_read(hdsp, HDSP_midiStatusOut0));
3690 snd_iprintf(buffer, "MIDI1 Input status: 0x%x\n", hdsp_read(hdsp, HDSP_midiStatusIn0));
3691 snd_iprintf(buffer, "MIDI2 Output status: 0x%x\n", hdsp_read(hdsp, HDSP_midiStatusOut1));
3692 snd_iprintf(buffer, "MIDI2 Input status: 0x%x\n", hdsp_read(hdsp, HDSP_midiStatusIn1));
3693 snd_iprintf(buffer, "Use Midi Tasklet: %s\n", hdsp->use_midi_tasklet ? "on" : "off");
3695 snd_iprintf(buffer, "\n");
3697 x = 1 << (6 + hdsp_decode_latency(hdsp->control_register & HDSP_LatencyMask));
3699 snd_iprintf(buffer, "Buffer Size (Latency): %d samples (2 periods of %lu bytes)\n", x, (unsigned long) hdsp->period_bytes);
3700 snd_iprintf(buffer, "Hardware pointer (frames): %ld\n", hdsp_hw_pointer(hdsp));
3701 snd_iprintf(buffer, "Precise pointer: %s\n", hdsp->precise_ptr ? "on" : "off");
3702 snd_iprintf(buffer, "Line out: %s\n", (hdsp->control_register & HDSP_LineOut) ? "on" : "off");
3704 snd_iprintf(buffer, "Firmware version: %d\n", (status2&HDSP_version0)|(status2&HDSP_version1)<<1|(status2&HDSP_version2)<<2);
3706 snd_iprintf(buffer, "\n");
3708 switch (hdsp_clock_source(hdsp)) {
3709 case HDSP_CLOCK_SOURCE_AUTOSYNC:
3710 clock_source = "AutoSync";
3712 case HDSP_CLOCK_SOURCE_INTERNAL_32KHZ:
3713 clock_source = "Internal 32 kHz";
3715 case HDSP_CLOCK_SOURCE_INTERNAL_44_1KHZ:
3716 clock_source = "Internal 44.1 kHz";
3718 case HDSP_CLOCK_SOURCE_INTERNAL_48KHZ:
3719 clock_source = "Internal 48 kHz";
3721 case HDSP_CLOCK_SOURCE_INTERNAL_64KHZ:
3722 clock_source = "Internal 64 kHz";
3724 case HDSP_CLOCK_SOURCE_INTERNAL_88_2KHZ:
3725 clock_source = "Internal 88.2 kHz";
3727 case HDSP_CLOCK_SOURCE_INTERNAL_96KHZ:
3728 clock_source = "Internal 96 kHz";
3730 case HDSP_CLOCK_SOURCE_INTERNAL_128KHZ:
3731 clock_source = "Internal 128 kHz";
3733 case HDSP_CLOCK_SOURCE_INTERNAL_176_4KHZ:
3734 clock_source = "Internal 176.4 kHz";
3736 case HDSP_CLOCK_SOURCE_INTERNAL_192KHZ:
3737 clock_source = "Internal 192 kHz";
3740 clock_source = "Error";
3742 snd_iprintf (buffer, "Sample Clock Source: %s\n", clock_source);
3744 if (hdsp_system_clock_mode(hdsp))
3745 system_clock_mode = "Slave";
3747 system_clock_mode = "Master";
3749 switch (hdsp_pref_sync_ref (hdsp)) {
3750 case HDSP_SYNC_FROM_WORD:
3751 pref_sync_ref = "Word Clock";
3753 case HDSP_SYNC_FROM_ADAT_SYNC:
3754 pref_sync_ref = "ADAT Sync";
3756 case HDSP_SYNC_FROM_SPDIF:
3757 pref_sync_ref = "SPDIF";
3759 case HDSP_SYNC_FROM_ADAT1:
3760 pref_sync_ref = "ADAT1";
3762 case HDSP_SYNC_FROM_ADAT2:
3763 pref_sync_ref = "ADAT2";
3765 case HDSP_SYNC_FROM_ADAT3:
3766 pref_sync_ref = "ADAT3";
3769 pref_sync_ref = "Word Clock";
3772 snd_iprintf (buffer, "Preferred Sync Reference: %s\n", pref_sync_ref);
3774 switch (hdsp_autosync_ref (hdsp)) {
3775 case HDSP_AUTOSYNC_FROM_WORD:
3776 autosync_ref = "Word Clock";
3778 case HDSP_AUTOSYNC_FROM_ADAT_SYNC:
3779 autosync_ref = "ADAT Sync";
3781 case HDSP_AUTOSYNC_FROM_SPDIF:
3782 autosync_ref = "SPDIF";
3784 case HDSP_AUTOSYNC_FROM_NONE:
3785 autosync_ref = "None";
3787 case HDSP_AUTOSYNC_FROM_ADAT1:
3788 autosync_ref = "ADAT1";
3790 case HDSP_AUTOSYNC_FROM_ADAT2:
3791 autosync_ref = "ADAT2";
3793 case HDSP_AUTOSYNC_FROM_ADAT3:
3794 autosync_ref = "ADAT3";
3797 autosync_ref = "---";
3800 snd_iprintf (buffer, "AutoSync Reference: %s\n", autosync_ref);
3802 snd_iprintf (buffer, "AutoSync Frequency: %d\n", hdsp_external_sample_rate(hdsp));
3804 snd_iprintf (buffer, "System Clock Mode: %s\n", system_clock_mode);
3806 snd_iprintf (buffer, "System Clock Frequency: %d\n", hdsp->system_sample_rate);
3807 snd_iprintf (buffer, "System Clock Locked: %s\n", hdsp->clock_source_locked ? "Yes" : "No");
3809 snd_iprintf(buffer, "\n");
3811 if (hdsp->io_type != RPM) {
3812 switch (hdsp_spdif_in(hdsp)) {
3813 case HDSP_SPDIFIN_OPTICAL:
3814 snd_iprintf(buffer, "IEC958 input: Optical\n");
3816 case HDSP_SPDIFIN_COAXIAL:
3817 snd_iprintf(buffer, "IEC958 input: Coaxial\n");
3819 case HDSP_SPDIFIN_INTERNAL:
3820 snd_iprintf(buffer, "IEC958 input: Internal\n");
3822 case HDSP_SPDIFIN_AES:
3823 snd_iprintf(buffer, "IEC958 input: AES\n");
3826 snd_iprintf(buffer, "IEC958 input: ???\n");
3831 if (RPM == hdsp->io_type) {
3832 if (hdsp->control_register & HDSP_RPM_Bypass)
3833 snd_iprintf(buffer, "RPM Bypass: disabled\n");
3835 snd_iprintf(buffer, "RPM Bypass: enabled\n");
3836 if (hdsp->control_register & HDSP_RPM_Disconnect)
3837 snd_iprintf(buffer, "RPM disconnected\n");
3839 snd_iprintf(buffer, "RPM connected\n");
3841 switch (hdsp->control_register & HDSP_RPM_Inp12) {
3842 case HDSP_RPM_Inp12_Phon_6dB:
3843 snd_iprintf(buffer, "Input 1/2: Phono, 6dB\n");
3845 case HDSP_RPM_Inp12_Phon_0dB:
3846 snd_iprintf(buffer, "Input 1/2: Phono, 0dB\n");
3848 case HDSP_RPM_Inp12_Phon_n6dB:
3849 snd_iprintf(buffer, "Input 1/2: Phono, -6dB\n");
3851 case HDSP_RPM_Inp12_Line_0dB:
3852 snd_iprintf(buffer, "Input 1/2: Line, 0dB\n");
3854 case HDSP_RPM_Inp12_Line_n6dB:
3855 snd_iprintf(buffer, "Input 1/2: Line, -6dB\n");
3858 snd_iprintf(buffer, "Input 1/2: ???\n");
3861 switch (hdsp->control_register & HDSP_RPM_Inp34) {
3862 case HDSP_RPM_Inp34_Phon_6dB:
3863 snd_iprintf(buffer, "Input 3/4: Phono, 6dB\n");
3865 case HDSP_RPM_Inp34_Phon_0dB:
3866 snd_iprintf(buffer, "Input 3/4: Phono, 0dB\n");
3868 case HDSP_RPM_Inp34_Phon_n6dB:
3869 snd_iprintf(buffer, "Input 3/4: Phono, -6dB\n");
3871 case HDSP_RPM_Inp34_Line_0dB:
3872 snd_iprintf(buffer, "Input 3/4: Line, 0dB\n");
3874 case HDSP_RPM_Inp34_Line_n6dB:
3875 snd_iprintf(buffer, "Input 3/4: Line, -6dB\n");
3878 snd_iprintf(buffer, "Input 3/4: ???\n");
3882 if (hdsp->control_register & HDSP_SPDIFOpticalOut)
3883 snd_iprintf(buffer, "IEC958 output: Coaxial & ADAT1\n");
3885 snd_iprintf(buffer, "IEC958 output: Coaxial only\n");
3887 if (hdsp->control_register & HDSP_SPDIFProfessional)
3888 snd_iprintf(buffer, "IEC958 quality: Professional\n");
3890 snd_iprintf(buffer, "IEC958 quality: Consumer\n");
3892 if (hdsp->control_register & HDSP_SPDIFEmphasis)
3893 snd_iprintf(buffer, "IEC958 emphasis: on\n");
3895 snd_iprintf(buffer, "IEC958 emphasis: off\n");
3897 if (hdsp->control_register & HDSP_SPDIFNonAudio)
3898 snd_iprintf(buffer, "IEC958 NonAudio: on\n");
3900 snd_iprintf(buffer, "IEC958 NonAudio: off\n");
3901 x = hdsp_spdif_sample_rate(hdsp);
3903 snd_iprintf(buffer, "IEC958 sample rate: %d\n", x);
3905 snd_iprintf(buffer, "IEC958 sample rate: Error flag set\n");
3907 snd_iprintf(buffer, "\n");
3910 x = status & HDSP_Sync0;
3911 if (status & HDSP_Lock0)
3912 snd_iprintf(buffer, "ADAT1: %s\n", x ? "Sync" : "Lock");
3914 snd_iprintf(buffer, "ADAT1: No Lock\n");
3916 switch (hdsp->io_type) {
3919 x = status & HDSP_Sync1;
3920 if (status & HDSP_Lock1)
3921 snd_iprintf(buffer, "ADAT2: %s\n", x ? "Sync" : "Lock");
3923 snd_iprintf(buffer, "ADAT2: No Lock\n");
3924 x = status & HDSP_Sync2;
3925 if (status & HDSP_Lock2)
3926 snd_iprintf(buffer, "ADAT3: %s\n", x ? "Sync" : "Lock");
3928 snd_iprintf(buffer, "ADAT3: No Lock\n");
3935 x = status & HDSP_SPDIFSync;
3936 if (status & HDSP_SPDIFErrorFlag)
3937 snd_iprintf (buffer, "SPDIF: No Lock\n");
3939 snd_iprintf (buffer, "SPDIF: %s\n", x ? "Sync" : "Lock");
3941 x = status2 & HDSP_wc_sync;
3942 if (status2 & HDSP_wc_lock)
3943 snd_iprintf (buffer, "Word Clock: %s\n", x ? "Sync" : "Lock");
3945 snd_iprintf (buffer, "Word Clock: No Lock\n");
3947 x = status & HDSP_TimecodeSync;
3948 if (status & HDSP_TimecodeLock)
3949 snd_iprintf(buffer, "ADAT Sync: %s\n", x ? "Sync" : "Lock");
3951 snd_iprintf(buffer, "ADAT Sync: No Lock\n");
3953 snd_iprintf(buffer, "\n");
3955 /* Informations about H9632 specific controls */
3956 if (hdsp->io_type == H9632) {
3959 switch (hdsp_ad_gain(hdsp)) {
3970 snd_iprintf(buffer, "AD Gain : %s\n", tmp);
3972 switch (hdsp_da_gain(hdsp)) {
3983 snd_iprintf(buffer, "DA Gain : %s\n", tmp);
3985 switch (hdsp_phone_gain(hdsp)) {
3996 snd_iprintf(buffer, "Phones Gain : %s\n", tmp);
3998 snd_iprintf(buffer, "XLR Breakout Cable : %s\n", hdsp_xlr_breakout_cable(hdsp) ? "yes" : "no");
4000 if (hdsp->control_register & HDSP_AnalogExtensionBoard)
4001 snd_iprintf(buffer, "AEB : on (ADAT1 internal)\n");
4003 snd_iprintf(buffer, "AEB : off (ADAT1 external)\n");
4004 snd_iprintf(buffer, "\n");
4009 static void snd_hdsp_proc_init(struct hdsp *hdsp)
4011 struct snd_info_entry *entry;
4013 if (! snd_card_proc_new(hdsp->card, "hdsp", &entry))
4014 snd_info_set_text_ops(entry, hdsp, snd_hdsp_proc_read);
4017 static void snd_hdsp_free_buffers(struct hdsp *hdsp)
4019 snd_hammerfall_free_buffer(&hdsp->capture_dma_buf, hdsp->pci);
4020 snd_hammerfall_free_buffer(&hdsp->playback_dma_buf, hdsp->pci);
4023 static int snd_hdsp_initialize_memory(struct hdsp *hdsp)
4025 unsigned long pb_bus, cb_bus;
4027 if (snd_hammerfall_get_buffer(hdsp->pci, &hdsp->capture_dma_buf, HDSP_DMA_AREA_BYTES) < 0 ||
4028 snd_hammerfall_get_buffer(hdsp->pci, &hdsp->playback_dma_buf, HDSP_DMA_AREA_BYTES) < 0) {
4029 if (hdsp->capture_dma_buf.area)
4030 snd_dma_free_pages(&hdsp->capture_dma_buf);
4031 printk(KERN_ERR "%s: no buffers available\n", hdsp->card_name);
4035 /* Align to bus-space 64K boundary */
4037 cb_bus = ALIGN(hdsp->capture_dma_buf.addr, 0x10000ul);
4038 pb_bus = ALIGN(hdsp->playback_dma_buf.addr, 0x10000ul);
4040 /* Tell the card where it is */
4042 hdsp_write(hdsp, HDSP_inputBufferAddress, cb_bus);
4043 hdsp_write(hdsp, HDSP_outputBufferAddress, pb_bus);
4045 hdsp->capture_buffer = hdsp->capture_dma_buf.area + (cb_bus - hdsp->capture_dma_buf.addr);
4046 hdsp->playback_buffer = hdsp->playback_dma_buf.area + (pb_bus - hdsp->playback_dma_buf.addr);
4051 static int snd_hdsp_set_defaults(struct hdsp *hdsp)
4055 /* ASSUMPTION: hdsp->lock is either held, or
4056 there is no need to hold it (e.g. during module
4062 SPDIF Input via Coax
4064 maximum latency (7 => 2^7 = 8192 samples, 64Kbyte buffer,
4065 which implies 2 4096 sample, 32Kbyte periods).
4069 hdsp->control_register = HDSP_ClockModeMaster |
4070 HDSP_SPDIFInputCoaxial |
4071 hdsp_encode_latency(7) |
4075 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
4077 #ifdef SNDRV_BIG_ENDIAN
4078 hdsp->control2_register = HDSP_BIGENDIAN_MODE;
4080 hdsp->control2_register = 0;
4082 if (hdsp->io_type == H9652)
4083 snd_hdsp_9652_enable_mixer (hdsp);
4085 hdsp_write (hdsp, HDSP_control2Reg, hdsp->control2_register);
4087 hdsp_reset_hw_pointer(hdsp);
4088 hdsp_compute_period_size(hdsp);
4090 /* silence everything */
4092 for (i = 0; i < HDSP_MATRIX_MIXER_SIZE; ++i)
4093 hdsp->mixer_matrix[i] = MINUS_INFINITY_GAIN;
4095 for (i = 0; i < ((hdsp->io_type == H9652 || hdsp->io_type == H9632) ? 1352 : HDSP_MATRIX_MIXER_SIZE); ++i) {
4096 if (hdsp_write_gain (hdsp, i, MINUS_INFINITY_GAIN))
4100 /* H9632 specific defaults */
4101 if (hdsp->io_type == H9632) {
4102 hdsp->control_register |= (HDSP_DAGainPlus4dBu | HDSP_ADGainPlus4dBu | HDSP_PhoneGain0dB);
4103 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
4106 /* set a default rate so that the channel map is set up.
4109 hdsp_set_rate(hdsp, 48000, 1);
4114 static void hdsp_midi_tasklet(unsigned long arg)
4116 struct hdsp *hdsp = (struct hdsp *)arg;
4118 if (hdsp->midi[0].pending)
4119 snd_hdsp_midi_input_read (&hdsp->midi[0]);
4120 if (hdsp->midi[1].pending)
4121 snd_hdsp_midi_input_read (&hdsp->midi[1]);
4124 static irqreturn_t snd_hdsp_interrupt(int irq, void *dev_id)
4126 struct hdsp *hdsp = (struct hdsp *) dev_id;
4127 unsigned int status;
4131 unsigned int midi0status;
4132 unsigned int midi1status;
4135 status = hdsp_read(hdsp, HDSP_statusRegister);
4137 audio = status & HDSP_audioIRQPending;
4138 midi0 = status & HDSP_midi0IRQPending;
4139 midi1 = status & HDSP_midi1IRQPending;
4141 if (!audio && !midi0 && !midi1)
4144 hdsp_write(hdsp, HDSP_interruptConfirmation, 0);
4146 midi0status = hdsp_read (hdsp, HDSP_midiStatusIn0) & 0xff;
4147 midi1status = hdsp_read (hdsp, HDSP_midiStatusIn1) & 0xff;
4149 if (!(hdsp->state & HDSP_InitializationComplete))
4153 if (hdsp->capture_substream)
4154 snd_pcm_period_elapsed(hdsp->pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream);
4156 if (hdsp->playback_substream)
4157 snd_pcm_period_elapsed(hdsp->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream);
4160 if (midi0 && midi0status) {
4161 if (hdsp->use_midi_tasklet) {
4162 /* we disable interrupts for this input until processing is done */
4163 hdsp->control_register &= ~HDSP_Midi0InterruptEnable;
4164 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
4165 hdsp->midi[0].pending = 1;
4168 snd_hdsp_midi_input_read (&hdsp->midi[0]);
4171 if (hdsp->io_type != Multiface && hdsp->io_type != RPM && hdsp->io_type != H9632 && midi1 && midi1status) {
4172 if (hdsp->use_midi_tasklet) {
4173 /* we disable interrupts for this input until processing is done */
4174 hdsp->control_register &= ~HDSP_Midi1InterruptEnable;
4175 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
4176 hdsp->midi[1].pending = 1;
4179 snd_hdsp_midi_input_read (&hdsp->midi[1]);
4182 if (hdsp->use_midi_tasklet && schedule)
4183 tasklet_schedule(&hdsp->midi_tasklet);
4187 static snd_pcm_uframes_t snd_hdsp_hw_pointer(struct snd_pcm_substream *substream)
4189 struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4190 return hdsp_hw_pointer(hdsp);
4193 static char *hdsp_channel_buffer_location(struct hdsp *hdsp,
4200 if (snd_BUG_ON(channel < 0 || channel >= hdsp->max_channels))
4203 if ((mapped_channel = hdsp->channel_map[channel]) < 0)
4206 if (stream == SNDRV_PCM_STREAM_CAPTURE)
4207 return hdsp->capture_buffer + (mapped_channel * HDSP_CHANNEL_BUFFER_BYTES);
4209 return hdsp->playback_buffer + (mapped_channel * HDSP_CHANNEL_BUFFER_BYTES);
4212 static int snd_hdsp_playback_copy(struct snd_pcm_substream *substream, int channel,
4213 snd_pcm_uframes_t pos, void __user *src, snd_pcm_uframes_t count)
4215 struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4218 if (snd_BUG_ON(pos + count > HDSP_CHANNEL_BUFFER_BYTES / 4))
4221 channel_buf = hdsp_channel_buffer_location (hdsp, substream->pstr->stream, channel);
4222 if (snd_BUG_ON(!channel_buf))
4224 if (copy_from_user(channel_buf + pos * 4, src, count * 4))
4229 static int snd_hdsp_capture_copy(struct snd_pcm_substream *substream, int channel,
4230 snd_pcm_uframes_t pos, void __user *dst, snd_pcm_uframes_t count)
4232 struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4235 if (snd_BUG_ON(pos + count > HDSP_CHANNEL_BUFFER_BYTES / 4))
4238 channel_buf = hdsp_channel_buffer_location (hdsp, substream->pstr->stream, channel);
4239 if (snd_BUG_ON(!channel_buf))
4241 if (copy_to_user(dst, channel_buf + pos * 4, count * 4))
4246 static int snd_hdsp_hw_silence(struct snd_pcm_substream *substream, int channel,
4247 snd_pcm_uframes_t pos, snd_pcm_uframes_t count)
4249 struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4252 channel_buf = hdsp_channel_buffer_location (hdsp, substream->pstr->stream, channel);
4253 if (snd_BUG_ON(!channel_buf))
4255 memset(channel_buf + pos * 4, 0, count * 4);
4259 static int snd_hdsp_reset(struct snd_pcm_substream *substream)
4261 struct snd_pcm_runtime *runtime = substream->runtime;
4262 struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4263 struct snd_pcm_substream *other;
4264 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
4265 other = hdsp->capture_substream;
4267 other = hdsp->playback_substream;
4269 runtime->status->hw_ptr = hdsp_hw_pointer(hdsp);
4271 runtime->status->hw_ptr = 0;
4273 struct snd_pcm_substream *s;
4274 struct snd_pcm_runtime *oruntime = other->runtime;
4275 snd_pcm_group_for_each_entry(s, substream) {
4277 oruntime->status->hw_ptr = runtime->status->hw_ptr;
4285 static int snd_hdsp_hw_params(struct snd_pcm_substream *substream,
4286 struct snd_pcm_hw_params *params)
4288 struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4293 if (hdsp_check_for_iobox (hdsp))
4296 if (hdsp_check_for_firmware(hdsp, 1))
4299 spin_lock_irq(&hdsp->lock);
4301 if (substream->pstr->stream == SNDRV_PCM_STREAM_PLAYBACK) {
4302 hdsp->control_register &= ~(HDSP_SPDIFProfessional | HDSP_SPDIFNonAudio | HDSP_SPDIFEmphasis);
4303 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register |= hdsp->creg_spdif_stream);
4304 this_pid = hdsp->playback_pid;
4305 other_pid = hdsp->capture_pid;
4307 this_pid = hdsp->capture_pid;
4308 other_pid = hdsp->playback_pid;
4311 if ((other_pid > 0) && (this_pid != other_pid)) {
4313 /* The other stream is open, and not by the same
4314 task as this one. Make sure that the parameters
4315 that matter are the same.
4318 if (params_rate(params) != hdsp->system_sample_rate) {
4319 spin_unlock_irq(&hdsp->lock);
4320 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
4324 if (params_period_size(params) != hdsp->period_bytes / 4) {
4325 spin_unlock_irq(&hdsp->lock);
4326 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
4332 spin_unlock_irq(&hdsp->lock);
4336 spin_unlock_irq(&hdsp->lock);
4339 /* how to make sure that the rate matches an externally-set one ?
4342 spin_lock_irq(&hdsp->lock);
4343 if (! hdsp->clock_source_locked) {
4344 if ((err = hdsp_set_rate(hdsp, params_rate(params), 0)) < 0) {
4345 spin_unlock_irq(&hdsp->lock);
4346 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
4350 spin_unlock_irq(&hdsp->lock);
4352 if ((err = hdsp_set_interrupt_interval(hdsp, params_period_size(params))) < 0) {
4353 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
4360 static int snd_hdsp_channel_info(struct snd_pcm_substream *substream,
4361 struct snd_pcm_channel_info *info)
4363 struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4366 if (snd_BUG_ON(info->channel >= hdsp->max_channels))
4369 if ((mapped_channel = hdsp->channel_map[info->channel]) < 0)
4372 info->offset = mapped_channel * HDSP_CHANNEL_BUFFER_BYTES;
4378 static int snd_hdsp_ioctl(struct snd_pcm_substream *substream,
4379 unsigned int cmd, void *arg)
4382 case SNDRV_PCM_IOCTL1_RESET:
4383 return snd_hdsp_reset(substream);
4384 case SNDRV_PCM_IOCTL1_CHANNEL_INFO:
4385 return snd_hdsp_channel_info(substream, arg);
4390 return snd_pcm_lib_ioctl(substream, cmd, arg);
4393 static int snd_hdsp_trigger(struct snd_pcm_substream *substream, int cmd)
4395 struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4396 struct snd_pcm_substream *other;
4399 if (hdsp_check_for_iobox (hdsp))
4402 if (hdsp_check_for_firmware(hdsp, 0)) /* no auto-loading in trigger */
4405 spin_lock(&hdsp->lock);
4406 running = hdsp->running;
4408 case SNDRV_PCM_TRIGGER_START:
4409 running |= 1 << substream->stream;
4411 case SNDRV_PCM_TRIGGER_STOP:
4412 running &= ~(1 << substream->stream);
4416 spin_unlock(&hdsp->lock);
4419 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
4420 other = hdsp->capture_substream;
4422 other = hdsp->playback_substream;
4425 struct snd_pcm_substream *s;
4426 snd_pcm_group_for_each_entry(s, substream) {
4428 snd_pcm_trigger_done(s, substream);
4429 if (cmd == SNDRV_PCM_TRIGGER_START)
4430 running |= 1 << s->stream;
4432 running &= ~(1 << s->stream);
4436 if (cmd == SNDRV_PCM_TRIGGER_START) {
4437 if (!(running & (1 << SNDRV_PCM_STREAM_PLAYBACK)) &&
4438 substream->stream == SNDRV_PCM_STREAM_CAPTURE)
4439 hdsp_silence_playback(hdsp);
4442 substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
4443 hdsp_silence_playback(hdsp);
4446 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
4447 hdsp_silence_playback(hdsp);
4450 snd_pcm_trigger_done(substream, substream);
4451 if (!hdsp->running && running)
4452 hdsp_start_audio(hdsp);
4453 else if (hdsp->running && !running)
4454 hdsp_stop_audio(hdsp);
4455 hdsp->running = running;
4456 spin_unlock(&hdsp->lock);
4461 static int snd_hdsp_prepare(struct snd_pcm_substream *substream)
4463 struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4466 if (hdsp_check_for_iobox (hdsp))
4469 if (hdsp_check_for_firmware(hdsp, 1))
4472 spin_lock_irq(&hdsp->lock);
4474 hdsp_reset_hw_pointer(hdsp);
4475 spin_unlock_irq(&hdsp->lock);
4479 static struct snd_pcm_hardware snd_hdsp_playback_subinfo =
4481 .info = (SNDRV_PCM_INFO_MMAP |
4482 SNDRV_PCM_INFO_MMAP_VALID |
4483 SNDRV_PCM_INFO_NONINTERLEAVED |
4484 SNDRV_PCM_INFO_SYNC_START |
4485 SNDRV_PCM_INFO_DOUBLE),
4486 #ifdef SNDRV_BIG_ENDIAN
4487 .formats = SNDRV_PCM_FMTBIT_S32_BE,
4489 .formats = SNDRV_PCM_FMTBIT_S32_LE,
4491 .rates = (SNDRV_PCM_RATE_32000 |
4492 SNDRV_PCM_RATE_44100 |
4493 SNDRV_PCM_RATE_48000 |
4494 SNDRV_PCM_RATE_64000 |
4495 SNDRV_PCM_RATE_88200 |
4496 SNDRV_PCM_RATE_96000),
4500 .channels_max = HDSP_MAX_CHANNELS,
4501 .buffer_bytes_max = HDSP_CHANNEL_BUFFER_BYTES * HDSP_MAX_CHANNELS,
4502 .period_bytes_min = (64 * 4) * 10,
4503 .period_bytes_max = (8192 * 4) * HDSP_MAX_CHANNELS,
4509 static struct snd_pcm_hardware snd_hdsp_capture_subinfo =
4511 .info = (SNDRV_PCM_INFO_MMAP |
4512 SNDRV_PCM_INFO_MMAP_VALID |
4513 SNDRV_PCM_INFO_NONINTERLEAVED |
4514 SNDRV_PCM_INFO_SYNC_START),
4515 #ifdef SNDRV_BIG_ENDIAN
4516 .formats = SNDRV_PCM_FMTBIT_S32_BE,
4518 .formats = SNDRV_PCM_FMTBIT_S32_LE,
4520 .rates = (SNDRV_PCM_RATE_32000 |
4521 SNDRV_PCM_RATE_44100 |
4522 SNDRV_PCM_RATE_48000 |
4523 SNDRV_PCM_RATE_64000 |
4524 SNDRV_PCM_RATE_88200 |
4525 SNDRV_PCM_RATE_96000),
4529 .channels_max = HDSP_MAX_CHANNELS,
4530 .buffer_bytes_max = HDSP_CHANNEL_BUFFER_BYTES * HDSP_MAX_CHANNELS,
4531 .period_bytes_min = (64 * 4) * 10,
4532 .period_bytes_max = (8192 * 4) * HDSP_MAX_CHANNELS,
4538 static unsigned int hdsp_period_sizes[] = { 64, 128, 256, 512, 1024, 2048, 4096, 8192 };
4540 static struct snd_pcm_hw_constraint_list hdsp_hw_constraints_period_sizes = {
4541 .count = ARRAY_SIZE(hdsp_period_sizes),
4542 .list = hdsp_period_sizes,
4546 static unsigned int hdsp_9632_sample_rates[] = { 32000, 44100, 48000, 64000, 88200, 96000, 128000, 176400, 192000 };
4548 static struct snd_pcm_hw_constraint_list hdsp_hw_constraints_9632_sample_rates = {
4549 .count = ARRAY_SIZE(hdsp_9632_sample_rates),
4550 .list = hdsp_9632_sample_rates,
4554 static int snd_hdsp_hw_rule_in_channels(struct snd_pcm_hw_params *params,
4555 struct snd_pcm_hw_rule *rule)
4557 struct hdsp *hdsp = rule->private;
4558 struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
4559 if (hdsp->io_type == H9632) {
4560 unsigned int list[3];
4561 list[0] = hdsp->qs_in_channels;
4562 list[1] = hdsp->ds_in_channels;
4563 list[2] = hdsp->ss_in_channels;
4564 return snd_interval_list(c, 3, list, 0);
4566 unsigned int list[2];
4567 list[0] = hdsp->ds_in_channels;
4568 list[1] = hdsp->ss_in_channels;
4569 return snd_interval_list(c, 2, list, 0);
4573 static int snd_hdsp_hw_rule_out_channels(struct snd_pcm_hw_params *params,
4574 struct snd_pcm_hw_rule *rule)
4576 unsigned int list[3];
4577 struct hdsp *hdsp = rule->private;
4578 struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
4579 if (hdsp->io_type == H9632) {
4580 list[0] = hdsp->qs_out_channels;
4581 list[1] = hdsp->ds_out_channels;
4582 list[2] = hdsp->ss_out_channels;
4583 return snd_interval_list(c, 3, list, 0);
4585 list[0] = hdsp->ds_out_channels;
4586 list[1] = hdsp->ss_out_channels;
4588 return snd_interval_list(c, 2, list, 0);
4591 static int snd_hdsp_hw_rule_in_channels_rate(struct snd_pcm_hw_params *params,
4592 struct snd_pcm_hw_rule *rule)
4594 struct hdsp *hdsp = rule->private;
4595 struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
4596 struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
4597 if (r->min > 96000 && hdsp->io_type == H9632) {
4598 struct snd_interval t = {
4599 .min = hdsp->qs_in_channels,
4600 .max = hdsp->qs_in_channels,
4603 return snd_interval_refine(c, &t);
4604 } else if (r->min > 48000 && r->max <= 96000) {
4605 struct snd_interval t = {
4606 .min = hdsp->ds_in_channels,
4607 .max = hdsp->ds_in_channels,
4610 return snd_interval_refine(c, &t);
4611 } else if (r->max < 64000) {
4612 struct snd_interval t = {
4613 .min = hdsp->ss_in_channels,
4614 .max = hdsp->ss_in_channels,
4617 return snd_interval_refine(c, &t);
4622 static int snd_hdsp_hw_rule_out_channels_rate(struct snd_pcm_hw_params *params,
4623 struct snd_pcm_hw_rule *rule)
4625 struct hdsp *hdsp = rule->private;
4626 struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
4627 struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
4628 if (r->min > 96000 && hdsp->io_type == H9632) {
4629 struct snd_interval t = {
4630 .min = hdsp->qs_out_channels,
4631 .max = hdsp->qs_out_channels,
4634 return snd_interval_refine(c, &t);
4635 } else if (r->min > 48000 && r->max <= 96000) {
4636 struct snd_interval t = {
4637 .min = hdsp->ds_out_channels,
4638 .max = hdsp->ds_out_channels,
4641 return snd_interval_refine(c, &t);
4642 } else if (r->max < 64000) {
4643 struct snd_interval t = {
4644 .min = hdsp->ss_out_channels,
4645 .max = hdsp->ss_out_channels,
4648 return snd_interval_refine(c, &t);
4653 static int snd_hdsp_hw_rule_rate_out_channels(struct snd_pcm_hw_params *params,
4654 struct snd_pcm_hw_rule *rule)
4656 struct hdsp *hdsp = rule->private;
4657 struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
4658 struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
4659 if (c->min >= hdsp->ss_out_channels) {
4660 struct snd_interval t = {
4665 return snd_interval_refine(r, &t);
4666 } else if (c->max <= hdsp->qs_out_channels && hdsp->io_type == H9632) {
4667 struct snd_interval t = {
4672 return snd_interval_refine(r, &t);
4673 } else if (c->max <= hdsp->ds_out_channels) {
4674 struct snd_interval t = {
4679 return snd_interval_refine(r, &t);
4684 static int snd_hdsp_hw_rule_rate_in_channels(struct snd_pcm_hw_params *params,
4685 struct snd_pcm_hw_rule *rule)
4687 struct hdsp *hdsp = rule->private;
4688 struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
4689 struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
4690 if (c->min >= hdsp->ss_in_channels) {
4691 struct snd_interval t = {
4696 return snd_interval_refine(r, &t);
4697 } else if (c->max <= hdsp->qs_in_channels && hdsp->io_type == H9632) {
4698 struct snd_interval t = {
4703 return snd_interval_refine(r, &t);
4704 } else if (c->max <= hdsp->ds_in_channels) {
4705 struct snd_interval t = {
4710 return snd_interval_refine(r, &t);
4715 static int snd_hdsp_playback_open(struct snd_pcm_substream *substream)
4717 struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4718 struct snd_pcm_runtime *runtime = substream->runtime;
4720 if (hdsp_check_for_iobox (hdsp))
4723 if (hdsp_check_for_firmware(hdsp, 1))
4726 spin_lock_irq(&hdsp->lock);
4728 snd_pcm_set_sync(substream);
4730 runtime->hw = snd_hdsp_playback_subinfo;
4731 runtime->dma_area = hdsp->playback_buffer;
4732 runtime->dma_bytes = HDSP_DMA_AREA_BYTES;
4734 hdsp->playback_pid = current->pid;
4735 hdsp->playback_substream = substream;
4737 spin_unlock_irq(&hdsp->lock);
4739 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
4740 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hdsp_hw_constraints_period_sizes);
4741 if (hdsp->clock_source_locked) {
4742 runtime->hw.rate_min = runtime->hw.rate_max = hdsp->system_sample_rate;
4743 } else if (hdsp->io_type == H9632) {
4744 runtime->hw.rate_max = 192000;
4745 runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
4746 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hdsp_hw_constraints_9632_sample_rates);
4748 if (hdsp->io_type == H9632) {
4749 runtime->hw.channels_min = hdsp->qs_out_channels;
4750 runtime->hw.channels_max = hdsp->ss_out_channels;
4753 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
4754 snd_hdsp_hw_rule_out_channels, hdsp,
4755 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
4756 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
4757 snd_hdsp_hw_rule_out_channels_rate, hdsp,
4758 SNDRV_PCM_HW_PARAM_RATE, -1);
4759 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
4760 snd_hdsp_hw_rule_rate_out_channels, hdsp,
4761 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
4763 if (RPM != hdsp->io_type) {
4764 hdsp->creg_spdif_stream = hdsp->creg_spdif;
4765 hdsp->spdif_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
4766 snd_ctl_notify(hdsp->card, SNDRV_CTL_EVENT_MASK_VALUE |
4767 SNDRV_CTL_EVENT_MASK_INFO, &hdsp->spdif_ctl->id);
4772 static int snd_hdsp_playback_release(struct snd_pcm_substream *substream)
4774 struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4776 spin_lock_irq(&hdsp->lock);
4778 hdsp->playback_pid = -1;
4779 hdsp->playback_substream = NULL;
4781 spin_unlock_irq(&hdsp->lock);
4783 if (RPM != hdsp->io_type) {
4784 hdsp->spdif_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
4785 snd_ctl_notify(hdsp->card, SNDRV_CTL_EVENT_MASK_VALUE |
4786 SNDRV_CTL_EVENT_MASK_INFO, &hdsp->spdif_ctl->id);
4792 static int snd_hdsp_capture_open(struct snd_pcm_substream *substream)
4794 struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4795 struct snd_pcm_runtime *runtime = substream->runtime;
4797 if (hdsp_check_for_iobox (hdsp))
4800 if (hdsp_check_for_firmware(hdsp, 1))
4803 spin_lock_irq(&hdsp->lock);
4805 snd_pcm_set_sync(substream);
4807 runtime->hw = snd_hdsp_capture_subinfo;
4808 runtime->dma_area = hdsp->capture_buffer;
4809 runtime->dma_bytes = HDSP_DMA_AREA_BYTES;
4811 hdsp->capture_pid = current->pid;
4812 hdsp->capture_substream = substream;
4814 spin_unlock_irq(&hdsp->lock);
4816 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
4817 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hdsp_hw_constraints_period_sizes);
4818 if (hdsp->io_type == H9632) {
4819 runtime->hw.channels_min = hdsp->qs_in_channels;
4820 runtime->hw.channels_max = hdsp->ss_in_channels;
4821 runtime->hw.rate_max = 192000;
4822 runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
4823 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hdsp_hw_constraints_9632_sample_rates);
4825 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
4826 snd_hdsp_hw_rule_in_channels, hdsp,
4827 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
4828 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
4829 snd_hdsp_hw_rule_in_channels_rate, hdsp,
4830 SNDRV_PCM_HW_PARAM_RATE, -1);
4831 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
4832 snd_hdsp_hw_rule_rate_in_channels, hdsp,
4833 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
4837 static int snd_hdsp_capture_release(struct snd_pcm_substream *substream)
4839 struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4841 spin_lock_irq(&hdsp->lock);
4843 hdsp->capture_pid = -1;
4844 hdsp->capture_substream = NULL;
4846 spin_unlock_irq(&hdsp->lock);
4850 /* helper functions for copying meter values */
4851 static inline int copy_u32_le(void __user *dest, void __iomem *src)
4853 u32 val = readl(src);
4854 return copy_to_user(dest, &val, 4);
4857 static inline int copy_u64_le(void __user *dest, void __iomem *src_low, void __iomem *src_high)
4859 u32 rms_low, rms_high;
4861 rms_low = readl(src_low);
4862 rms_high = readl(src_high);
4863 rms = ((u64)rms_high << 32) | rms_low;
4864 return copy_to_user(dest, &rms, 8);
4867 static inline int copy_u48_le(void __user *dest, void __iomem *src_low, void __iomem *src_high)
4869 u32 rms_low, rms_high;
4871 rms_low = readl(src_low) & 0xffffff00;
4872 rms_high = readl(src_high) & 0xffffff00;
4873 rms = ((u64)rms_high << 32) | rms_low;
4874 return copy_to_user(dest, &rms, 8);
4877 static int hdsp_9652_get_peak(struct hdsp *hdsp, struct hdsp_peak_rms __user *peak_rms)
4879 int doublespeed = 0;
4880 int i, j, channels, ofs;
4882 if (hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DoubleSpeedStatus)
4884 channels = doublespeed ? 14 : 26;
4885 for (i = 0, j = 0; i < 26; ++i) {
4886 if (doublespeed && (i & 4))
4888 ofs = HDSP_9652_peakBase - j * 4;
4889 if (copy_u32_le(&peak_rms->input_peaks[i], hdsp->iobase + ofs))
4891 ofs -= channels * 4;
4892 if (copy_u32_le(&peak_rms->playback_peaks[i], hdsp->iobase + ofs))
4894 ofs -= channels * 4;
4895 if (copy_u32_le(&peak_rms->output_peaks[i], hdsp->iobase + ofs))
4897 ofs = HDSP_9652_rmsBase + j * 8;
4898 if (copy_u48_le(&peak_rms->input_rms[i], hdsp->iobase + ofs,
4899 hdsp->iobase + ofs + 4))
4901 ofs += channels * 8;
4902 if (copy_u48_le(&peak_rms->playback_rms[i], hdsp->iobase + ofs,
4903 hdsp->iobase + ofs + 4))
4905 ofs += channels * 8;
4906 if (copy_u48_le(&peak_rms->output_rms[i], hdsp->iobase + ofs,
4907 hdsp->iobase + ofs + 4))
4914 static int hdsp_9632_get_peak(struct hdsp *hdsp, struct hdsp_peak_rms __user *peak_rms)
4917 struct hdsp_9632_meters __iomem *m;
4918 int doublespeed = 0;
4920 if (hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DoubleSpeedStatus)
4922 m = (struct hdsp_9632_meters __iomem *)(hdsp->iobase+HDSP_9632_metersBase);
4923 for (i = 0, j = 0; i < 16; ++i, ++j) {
4924 if (copy_u32_le(&peak_rms->input_peaks[i], &m->input_peak[j]))
4926 if (copy_u32_le(&peak_rms->playback_peaks[i], &m->playback_peak[j]))
4928 if (copy_u32_le(&peak_rms->output_peaks[i], &m->output_peak[j]))
4930 if (copy_u64_le(&peak_rms->input_rms[i], &m->input_rms_low[j],
4931 &m->input_rms_high[j]))
4933 if (copy_u64_le(&peak_rms->playback_rms[i], &m->playback_rms_low[j],
4934 &m->playback_rms_high[j]))
4936 if (copy_u64_le(&peak_rms->output_rms[i], &m->output_rms_low[j],
4937 &m->output_rms_high[j]))
4939 if (doublespeed && i == 3) i += 4;
4944 static int hdsp_get_peak(struct hdsp *hdsp, struct hdsp_peak_rms __user *peak_rms)
4948 for (i = 0; i < 26; i++) {
4949 if (copy_u32_le(&peak_rms->playback_peaks[i],
4950 hdsp->iobase + HDSP_playbackPeakLevel + i * 4))
4952 if (copy_u32_le(&peak_rms->input_peaks[i],
4953 hdsp->iobase + HDSP_inputPeakLevel + i * 4))
4956 for (i = 0; i < 28; i++) {
4957 if (copy_u32_le(&peak_rms->output_peaks[i],
4958 hdsp->iobase + HDSP_outputPeakLevel + i * 4))
4961 for (i = 0; i < 26; ++i) {
4962 if (copy_u64_le(&peak_rms->playback_rms[i],
4963 hdsp->iobase + HDSP_playbackRmsLevel + i * 8 + 4,
4964 hdsp->iobase + HDSP_playbackRmsLevel + i * 8))
4966 if (copy_u64_le(&peak_rms->input_rms[i],
4967 hdsp->iobase + HDSP_inputRmsLevel + i * 8 + 4,
4968 hdsp->iobase + HDSP_inputRmsLevel + i * 8))
4974 static int snd_hdsp_hwdep_ioctl(struct snd_hwdep *hw, struct file *file, unsigned int cmd, unsigned long arg)
4976 struct hdsp *hdsp = hw->private_data;
4977 void __user *argp = (void __user *)arg;
4981 case SNDRV_HDSP_IOCTL_GET_PEAK_RMS: {
4982 struct hdsp_peak_rms __user *peak_rms = (struct hdsp_peak_rms __user *)arg;
4984 err = hdsp_check_for_iobox(hdsp);
4988 err = hdsp_check_for_firmware(hdsp, 1);
4992 if (!(hdsp->state & HDSP_FirmwareLoaded)) {
4993 snd_printk(KERN_ERR "Hammerfall-DSP: firmware needs to be uploaded to the card.\n");
4997 switch (hdsp->io_type) {
4999 return hdsp_9652_get_peak(hdsp, peak_rms);
5001 return hdsp_9632_get_peak(hdsp, peak_rms);
5003 return hdsp_get_peak(hdsp, peak_rms);
5006 case SNDRV_HDSP_IOCTL_GET_CONFIG_INFO: {
5007 struct hdsp_config_info info;
5008 unsigned long flags;
5011 err = hdsp_check_for_iobox(hdsp);
5015 err = hdsp_check_for_firmware(hdsp, 1);
5019 memset(&info, 0, sizeof(info));
5020 spin_lock_irqsave(&hdsp->lock, flags);
5021 info.pref_sync_ref = (unsigned char)hdsp_pref_sync_ref(hdsp);
5022 info.wordclock_sync_check = (unsigned char)hdsp_wc_sync_check(hdsp);
5023 if (hdsp->io_type != H9632)
5024 info.adatsync_sync_check = (unsigned char)hdsp_adatsync_sync_check(hdsp);
5025 info.spdif_sync_check = (unsigned char)hdsp_spdif_sync_check(hdsp);
5026 for (i = 0; i < ((hdsp->io_type != Multiface && hdsp->io_type != RPM && hdsp->io_type != H9632) ? 3 : 1); ++i)
5027 info.adat_sync_check[i] = (unsigned char)hdsp_adat_sync_check(hdsp, i);
5028 info.spdif_in = (unsigned char)hdsp_spdif_in(hdsp);
5029 info.spdif_out = (unsigned char)hdsp_spdif_out(hdsp);
5030 info.spdif_professional = (unsigned char)hdsp_spdif_professional(hdsp);
5031 info.spdif_emphasis = (unsigned char)hdsp_spdif_emphasis(hdsp);
5032 info.spdif_nonaudio = (unsigned char)hdsp_spdif_nonaudio(hdsp);
5033 info.spdif_sample_rate = hdsp_spdif_sample_rate(hdsp);
5034 info.system_sample_rate = hdsp->system_sample_rate;
5035 info.autosync_sample_rate = hdsp_external_sample_rate(hdsp);
5036 info.system_clock_mode = (unsigned char)hdsp_system_clock_mode(hdsp);
5037 info.clock_source = (unsigned char)hdsp_clock_source(hdsp);
5038 info.autosync_ref = (unsigned char)hdsp_autosync_ref(hdsp);
5039 info.line_out = (unsigned char)hdsp_line_out(hdsp);
5040 if (hdsp->io_type == H9632) {
5041 info.da_gain = (unsigned char)hdsp_da_gain(hdsp);
5042 info.ad_gain = (unsigned char)hdsp_ad_gain(hdsp);
5043 info.phone_gain = (unsigned char)hdsp_phone_gain(hdsp);
5044 info.xlr_breakout_cable = (unsigned char)hdsp_xlr_breakout_cable(hdsp);
5046 } else if (hdsp->io_type == RPM) {
5047 info.da_gain = (unsigned char) hdsp_rpm_input12(hdsp);
5048 info.ad_gain = (unsigned char) hdsp_rpm_input34(hdsp);
5050 if (hdsp->io_type == H9632 || hdsp->io_type == H9652)
5051 info.analog_extension_board = (unsigned char)hdsp_aeb(hdsp);
5052 spin_unlock_irqrestore(&hdsp->lock, flags);
5053 if (copy_to_user(argp, &info, sizeof(info)))
5057 case SNDRV_HDSP_IOCTL_GET_9632_AEB: {
5058 struct hdsp_9632_aeb h9632_aeb;
5060 if (hdsp->io_type != H9632) return -EINVAL;
5061 h9632_aeb.aebi = hdsp->ss_in_channels - H9632_SS_CHANNELS;
5062 h9632_aeb.aebo = hdsp->ss_out_channels - H9632_SS_CHANNELS;
5063 if (copy_to_user(argp, &h9632_aeb, sizeof(h9632_aeb)))
5067 case SNDRV_HDSP_IOCTL_GET_VERSION: {
5068 struct hdsp_version hdsp_version;
5071 if (hdsp->io_type == H9652 || hdsp->io_type == H9632) return -EINVAL;
5072 if (hdsp->io_type == Undefined) {
5073 if ((err = hdsp_get_iobox_version(hdsp)) < 0)
5076 hdsp_version.io_type = hdsp->io_type;
5077 hdsp_version.firmware_rev = hdsp->firmware_rev;
5078 if ((err = copy_to_user(argp, &hdsp_version, sizeof(hdsp_version))))
5082 case SNDRV_HDSP_IOCTL_UPLOAD_FIRMWARE: {
5083 struct hdsp_firmware __user *firmware;
5084 u32 __user *firmware_data;
5087 if (hdsp->io_type == H9652 || hdsp->io_type == H9632) return -EINVAL;
5088 /* SNDRV_HDSP_IOCTL_GET_VERSION must have been called */
5089 if (hdsp->io_type == Undefined) return -EINVAL;
5091 if (hdsp->state & (HDSP_FirmwareCached | HDSP_FirmwareLoaded))
5094 snd_printk(KERN_INFO "Hammerfall-DSP: initializing firmware upload\n");
5095 firmware = (struct hdsp_firmware __user *)argp;
5097 if (get_user(firmware_data, &firmware->firmware_data))
5100 if (hdsp_check_for_iobox (hdsp))
5103 if (!hdsp->fw_uploaded) {
5104 hdsp->fw_uploaded = vmalloc(HDSP_FIRMWARE_SIZE);
5105 if (!hdsp->fw_uploaded)
5109 if (copy_from_user(hdsp->fw_uploaded, firmware_data,
5110 HDSP_FIRMWARE_SIZE)) {
5111 vfree(hdsp->fw_uploaded);
5112 hdsp->fw_uploaded = NULL;
5116 hdsp->state |= HDSP_FirmwareCached;
5118 if ((err = snd_hdsp_load_firmware_from_cache(hdsp)) < 0)
5121 if (!(hdsp->state & HDSP_InitializationComplete)) {
5122 if ((err = snd_hdsp_enable_io(hdsp)) < 0)
5125 snd_hdsp_initialize_channels(hdsp);
5126 snd_hdsp_initialize_midi_flush(hdsp);
5128 if ((err = snd_hdsp_create_alsa_devices(hdsp->card, hdsp)) < 0) {
5129 snd_printk(KERN_ERR "Hammerfall-DSP: error creating alsa devices\n");
5135 case SNDRV_HDSP_IOCTL_GET_MIXER: {
5136 struct hdsp_mixer __user *mixer = (struct hdsp_mixer __user *)argp;
5137 if (copy_to_user(mixer->matrix, hdsp->mixer_matrix, sizeof(unsigned short)*HDSP_MATRIX_MIXER_SIZE))
5147 static struct snd_pcm_ops snd_hdsp_playback_ops = {
5148 .open = snd_hdsp_playback_open,
5149 .close = snd_hdsp_playback_release,
5150 .ioctl = snd_hdsp_ioctl,
5151 .hw_params = snd_hdsp_hw_params,
5152 .prepare = snd_hdsp_prepare,
5153 .trigger = snd_hdsp_trigger,
5154 .pointer = snd_hdsp_hw_pointer,
5155 .copy = snd_hdsp_playback_copy,
5156 .silence = snd_hdsp_hw_silence,
5159 static struct snd_pcm_ops snd_hdsp_capture_ops = {
5160 .open = snd_hdsp_capture_open,
5161 .close = snd_hdsp_capture_release,
5162 .ioctl = snd_hdsp_ioctl,
5163 .hw_params = snd_hdsp_hw_params,
5164 .prepare = snd_hdsp_prepare,
5165 .trigger = snd_hdsp_trigger,
5166 .pointer = snd_hdsp_hw_pointer,
5167 .copy = snd_hdsp_capture_copy,
5170 static int snd_hdsp_create_hwdep(struct snd_card *card, struct hdsp *hdsp)
5172 struct snd_hwdep *hw;
5175 if ((err = snd_hwdep_new(card, "HDSP hwdep", 0, &hw)) < 0)
5179 hw->private_data = hdsp;
5180 strcpy(hw->name, "HDSP hwdep interface");
5182 hw->ops.ioctl = snd_hdsp_hwdep_ioctl;
5183 hw->ops.ioctl_compat = snd_hdsp_hwdep_ioctl;
5188 static int snd_hdsp_create_pcm(struct snd_card *card, struct hdsp *hdsp)
5190 struct snd_pcm *pcm;
5193 if ((err = snd_pcm_new(card, hdsp->card_name, 0, 1, 1, &pcm)) < 0)
5197 pcm->private_data = hdsp;
5198 strcpy(pcm->name, hdsp->card_name);
5200 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_hdsp_playback_ops);
5201 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_hdsp_capture_ops);
5203 pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
5208 static void snd_hdsp_9652_enable_mixer (struct hdsp *hdsp)
5210 hdsp->control2_register |= HDSP_9652_ENABLE_MIXER;
5211 hdsp_write (hdsp, HDSP_control2Reg, hdsp->control2_register);
5214 static int snd_hdsp_enable_io (struct hdsp *hdsp)
5218 if (hdsp_fifo_wait (hdsp, 0, 100)) {
5219 snd_printk(KERN_ERR "Hammerfall-DSP: enable_io fifo_wait failed\n");
5223 for (i = 0; i < hdsp->max_channels; ++i) {
5224 hdsp_write (hdsp, HDSP_inputEnable + (4 * i), 1);
5225 hdsp_write (hdsp, HDSP_outputEnable + (4 * i), 1);
5231 static void snd_hdsp_initialize_channels(struct hdsp *hdsp)
5233 int status, aebi_channels, aebo_channels;
5235 switch (hdsp->io_type) {
5237 hdsp->card_name = "RME Hammerfall DSP + Digiface";
5238 hdsp->ss_in_channels = hdsp->ss_out_channels = DIGIFACE_SS_CHANNELS;
5239 hdsp->ds_in_channels = hdsp->ds_out_channels = DIGIFACE_DS_CHANNELS;
5243 hdsp->card_name = "RME Hammerfall HDSP 9652";
5244 hdsp->ss_in_channels = hdsp->ss_out_channels = H9652_SS_CHANNELS;
5245 hdsp->ds_in_channels = hdsp->ds_out_channels = H9652_DS_CHANNELS;
5249 status = hdsp_read(hdsp, HDSP_statusRegister);
5250 /* HDSP_AEBx bits are low when AEB are connected */
5251 aebi_channels = (status & HDSP_AEBI) ? 0 : 4;
5252 aebo_channels = (status & HDSP_AEBO) ? 0 : 4;
5253 hdsp->card_name = "RME Hammerfall HDSP 9632";
5254 hdsp->ss_in_channels = H9632_SS_CHANNELS+aebi_channels;
5255 hdsp->ds_in_channels = H9632_DS_CHANNELS+aebi_channels;
5256 hdsp->qs_in_channels = H9632_QS_CHANNELS+aebi_channels;
5257 hdsp->ss_out_channels = H9632_SS_CHANNELS+aebo_channels;
5258 hdsp->ds_out_channels = H9632_DS_CHANNELS+aebo_channels;
5259 hdsp->qs_out_channels = H9632_QS_CHANNELS+aebo_channels;
5263 hdsp->card_name = "RME Hammerfall DSP + Multiface";
5264 hdsp->ss_in_channels = hdsp->ss_out_channels = MULTIFACE_SS_CHANNELS;
5265 hdsp->ds_in_channels = hdsp->ds_out_channels = MULTIFACE_DS_CHANNELS;
5269 hdsp->card_name = "RME Hammerfall DSP + RPM";
5270 hdsp->ss_in_channels = RPM_CHANNELS-1;
5271 hdsp->ss_out_channels = RPM_CHANNELS;
5272 hdsp->ds_in_channels = RPM_CHANNELS-1;
5273 hdsp->ds_out_channels = RPM_CHANNELS;
5277 /* should never get here */
5282 static void snd_hdsp_initialize_midi_flush (struct hdsp *hdsp)
5284 snd_hdsp_flush_midi_input (hdsp, 0);
5285 snd_hdsp_flush_midi_input (hdsp, 1);
5288 static int snd_hdsp_create_alsa_devices(struct snd_card *card, struct hdsp *hdsp)
5292 if ((err = snd_hdsp_create_pcm(card, hdsp)) < 0) {
5293 snd_printk(KERN_ERR "Hammerfall-DSP: Error creating pcm interface\n");
5298 if ((err = snd_hdsp_create_midi(card, hdsp, 0)) < 0) {
5299 snd_printk(KERN_ERR "Hammerfall-DSP: Error creating first midi interface\n");
5303 if (hdsp->io_type == Digiface || hdsp->io_type == H9652) {
5304 if ((err = snd_hdsp_create_midi(card, hdsp, 1)) < 0) {
5305 snd_printk(KERN_ERR "Hammerfall-DSP: Error creating second midi interface\n");
5310 if ((err = snd_hdsp_create_controls(card, hdsp)) < 0) {
5311 snd_printk(KERN_ERR "Hammerfall-DSP: Error creating ctl interface\n");
5315 snd_hdsp_proc_init(hdsp);
5317 hdsp->system_sample_rate = -1;
5318 hdsp->playback_pid = -1;
5319 hdsp->capture_pid = -1;
5320 hdsp->capture_substream = NULL;
5321 hdsp->playback_substream = NULL;
5323 if ((err = snd_hdsp_set_defaults(hdsp)) < 0) {
5324 snd_printk(KERN_ERR "Hammerfall-DSP: Error setting default values\n");
5328 if (!(hdsp->state & HDSP_InitializationComplete)) {
5329 strcpy(card->shortname, "Hammerfall DSP");
5330 sprintf(card->longname, "%s at 0x%lx, irq %d", hdsp->card_name,
5331 hdsp->port, hdsp->irq);
5333 if ((err = snd_card_register(card)) < 0) {
5334 snd_printk(KERN_ERR "Hammerfall-DSP: error registering card\n");
5337 hdsp->state |= HDSP_InitializationComplete;
5343 /* load firmware via hotplug fw loader */
5344 static int hdsp_request_fw_loader(struct hdsp *hdsp)
5347 const struct firmware *fw;
5350 if (hdsp->io_type == H9652 || hdsp->io_type == H9632)
5352 if (hdsp->io_type == Undefined) {
5353 if ((err = hdsp_get_iobox_version(hdsp)) < 0)
5355 if (hdsp->io_type == H9652 || hdsp->io_type == H9632)
5359 /* caution: max length of firmware filename is 30! */
5360 switch (hdsp->io_type) {
5362 fwfile = "rpm_firmware.bin";
5365 if (hdsp->firmware_rev == 0xa)
5366 fwfile = "multiface_firmware.bin";
5368 fwfile = "multiface_firmware_rev11.bin";
5371 if (hdsp->firmware_rev == 0xa)
5372 fwfile = "digiface_firmware.bin";
5374 fwfile = "digiface_firmware_rev11.bin";
5377 snd_printk(KERN_ERR "Hammerfall-DSP: invalid io_type %d\n", hdsp->io_type);
5381 if (request_firmware(&fw, fwfile, &hdsp->pci->dev)) {
5382 snd_printk(KERN_ERR "Hammerfall-DSP: cannot load firmware %s\n", fwfile);
5385 if (fw->size < HDSP_FIRMWARE_SIZE) {
5386 snd_printk(KERN_ERR "Hammerfall-DSP: too short firmware size %d (expected %d)\n",
5387 (int)fw->size, HDSP_FIRMWARE_SIZE);
5391 hdsp->firmware = fw;
5393 hdsp->state |= HDSP_FirmwareCached;
5395 if ((err = snd_hdsp_load_firmware_from_cache(hdsp)) < 0)
5398 if (!(hdsp->state & HDSP_InitializationComplete)) {
5399 if ((err = snd_hdsp_enable_io(hdsp)) < 0)
5402 if ((err = snd_hdsp_create_hwdep(hdsp->card, hdsp)) < 0) {
5403 snd_printk(KERN_ERR "Hammerfall-DSP: error creating hwdep device\n");
5406 snd_hdsp_initialize_channels(hdsp);
5407 snd_hdsp_initialize_midi_flush(hdsp);
5408 if ((err = snd_hdsp_create_alsa_devices(hdsp->card, hdsp)) < 0) {
5409 snd_printk(KERN_ERR "Hammerfall-DSP: error creating alsa devices\n");
5416 static int snd_hdsp_create(struct snd_card *card,
5419 struct pci_dev *pci = hdsp->pci;
5426 hdsp->midi[0].rmidi = NULL;
5427 hdsp->midi[1].rmidi = NULL;
5428 hdsp->midi[0].input = NULL;
5429 hdsp->midi[1].input = NULL;
5430 hdsp->midi[0].output = NULL;
5431 hdsp->midi[1].output = NULL;
5432 hdsp->midi[0].pending = 0;
5433 hdsp->midi[1].pending = 0;
5434 spin_lock_init(&hdsp->midi[0].lock);
5435 spin_lock_init(&hdsp->midi[1].lock);
5436 hdsp->iobase = NULL;
5437 hdsp->control_register = 0;
5438 hdsp->control2_register = 0;
5439 hdsp->io_type = Undefined;
5440 hdsp->max_channels = 26;
5444 spin_lock_init(&hdsp->lock);
5446 tasklet_init(&hdsp->midi_tasklet, hdsp_midi_tasklet, (unsigned long)hdsp);
5448 pci_read_config_word(hdsp->pci, PCI_CLASS_REVISION, &hdsp->firmware_rev);
5449 hdsp->firmware_rev &= 0xff;
5451 /* From Martin Bjoernsen :
5452 "It is important that the card's latency timer register in
5453 the PCI configuration space is set to a value much larger
5454 than 0 by the computer's BIOS or the driver.
5455 The windows driver always sets this 8 bit register [...]
5456 to its maximum 255 to avoid problems with some computers."
5458 pci_write_config_byte(hdsp->pci, PCI_LATENCY_TIMER, 0xFF);
5460 strcpy(card->driver, "H-DSP");
5461 strcpy(card->mixername, "Xilinx FPGA");
5463 if (hdsp->firmware_rev < 0xa)
5465 else if (hdsp->firmware_rev < 0x64)
5466 hdsp->card_name = "RME Hammerfall DSP";
5467 else if (hdsp->firmware_rev < 0x96) {
5468 hdsp->card_name = "RME HDSP 9652";
5471 hdsp->card_name = "RME HDSP 9632";
5472 hdsp->max_channels = 16;
5476 if ((err = pci_enable_device(pci)) < 0)
5479 pci_set_master(hdsp->pci);
5481 if ((err = pci_request_regions(pci, "hdsp")) < 0)
5483 hdsp->port = pci_resource_start(pci, 0);
5484 if ((hdsp->iobase = ioremap_nocache(hdsp->port, HDSP_IO_EXTENT)) == NULL) {
5485 snd_printk(KERN_ERR "Hammerfall-DSP: unable to remap region 0x%lx-0x%lx\n", hdsp->port, hdsp->port + HDSP_IO_EXTENT - 1);
5489 if (request_irq(pci->irq, snd_hdsp_interrupt, IRQF_SHARED,
5490 KBUILD_MODNAME, hdsp)) {
5491 snd_printk(KERN_ERR "Hammerfall-DSP: unable to use IRQ %d\n", pci->irq);
5495 hdsp->irq = pci->irq;
5496 hdsp->precise_ptr = 0;
5497 hdsp->use_midi_tasklet = 1;
5498 hdsp->dds_value = 0;
5500 if ((err = snd_hdsp_initialize_memory(hdsp)) < 0)
5503 if (!is_9652 && !is_9632) {
5504 /* we wait a maximum of 10 seconds to let freshly
5505 * inserted cardbus cards do their hardware init */
5506 err = hdsp_wait_for_iobox(hdsp, 1000, 10);
5511 if ((hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DllError) != 0) {
5512 if ((err = hdsp_request_fw_loader(hdsp)) < 0)
5513 /* we don't fail as this can happen
5514 if userspace is not ready for
5517 snd_printk(KERN_ERR "Hammerfall-DSP: couldn't get firmware from userspace. try using hdsploader\n");
5519 /* init is complete, we return */
5521 /* we defer initialization */
5522 snd_printk(KERN_INFO "Hammerfall-DSP: card initialization pending : waiting for firmware\n");
5523 if ((err = snd_hdsp_create_hwdep(card, hdsp)) < 0)
5527 snd_printk(KERN_INFO "Hammerfall-DSP: Firmware already present, initializing card.\n");
5528 if (hdsp_read(hdsp, HDSP_status2Register) & HDSP_version2)
5529 hdsp->io_type = RPM;
5530 else if (hdsp_read(hdsp, HDSP_status2Register) & HDSP_version1)
5531 hdsp->io_type = Multiface;
5533 hdsp->io_type = Digiface;
5537 if ((err = snd_hdsp_enable_io(hdsp)) != 0)
5541 hdsp->io_type = H9652;
5544 hdsp->io_type = H9632;
5546 if ((err = snd_hdsp_create_hwdep(card, hdsp)) < 0)
5549 snd_hdsp_initialize_channels(hdsp);
5550 snd_hdsp_initialize_midi_flush(hdsp);
5552 hdsp->state |= HDSP_FirmwareLoaded;
5554 if ((err = snd_hdsp_create_alsa_devices(card, hdsp)) < 0)
5560 static int snd_hdsp_free(struct hdsp *hdsp)
5563 /* stop the audio, and cancel all interrupts */
5564 tasklet_kill(&hdsp->midi_tasklet);
5565 hdsp->control_register &= ~(HDSP_Start|HDSP_AudioInterruptEnable|HDSP_Midi0InterruptEnable|HDSP_Midi1InterruptEnable);
5566 hdsp_write (hdsp, HDSP_controlRegister, hdsp->control_register);
5570 free_irq(hdsp->irq, (void *)hdsp);
5572 snd_hdsp_free_buffers(hdsp);
5575 release_firmware(hdsp->firmware);
5576 vfree(hdsp->fw_uploaded);
5579 iounmap(hdsp->iobase);
5582 pci_release_regions(hdsp->pci);
5584 pci_disable_device(hdsp->pci);
5588 static void snd_hdsp_card_free(struct snd_card *card)
5590 struct hdsp *hdsp = card->private_data;
5593 snd_hdsp_free(hdsp);
5596 static int snd_hdsp_probe(struct pci_dev *pci,
5597 const struct pci_device_id *pci_id)
5601 struct snd_card *card;
5604 if (dev >= SNDRV_CARDS)
5611 err = snd_card_create(index[dev], id[dev], THIS_MODULE,
5612 sizeof(struct hdsp), &card);
5616 hdsp = card->private_data;
5617 card->private_free = snd_hdsp_card_free;
5620 snd_card_set_dev(card, &pci->dev);
5622 if ((err = snd_hdsp_create(card, hdsp)) < 0) {
5623 snd_card_free(card);
5627 strcpy(card->shortname, "Hammerfall DSP");
5628 sprintf(card->longname, "%s at 0x%lx, irq %d", hdsp->card_name,
5629 hdsp->port, hdsp->irq);
5631 if ((err = snd_card_register(card)) < 0) {
5632 snd_card_free(card);
5635 pci_set_drvdata(pci, card);
5640 static void snd_hdsp_remove(struct pci_dev *pci)
5642 snd_card_free(pci_get_drvdata(pci));
5643 pci_set_drvdata(pci, NULL);
5646 static struct pci_driver hdsp_driver = {
5647 .name = KBUILD_MODNAME,
5648 .id_table = snd_hdsp_ids,
5649 .probe = snd_hdsp_probe,
5650 .remove = snd_hdsp_remove,
5653 module_pci_driver(hdsp_driver);