sound/pci/rme9652/rme9652.c

   1 /*
   2  *   ALSA driver for RME Digi9652 audio interfaces
   3  *
   4  *      Copyright (c) 1999 IEM - Winfried Ritsch
   5  *      Copyright (c) 1999-2001  Paul Davis
   6  *
   7  *   This program is free software; you can redistribute it and/or modify
   8  *   it under the terms of the GNU General Public License as published by
   9  *   the Free Software Foundation; either version 2 of the License, or
  10  *   (at your option) any later version.
  11  *
  12  *   This program is distributed in the hope that it will be useful,
  13  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  *   GNU General Public License for more details.
  16  *
  17  *   You should have received a copy of the GNU General Public License
  18  *   along with this program; if not, write to the Free Software
  19  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  20  *
  21  */
  22
  23 #include <linux/delay.h>
  24 #include <linux/init.h>
  25 #include <linux/interrupt.h>
  26 #include <linux/pci.h>
  27 #include <linux/module.h>
  28
  29 #include <sound/core.h>
  30 #include <sound/control.h>
  31 #include <sound/pcm.h>
  32 #include <sound/info.h>
  33 #include <sound/asoundef.h>
  34 #include <sound/initval.h>
  35
  36 #include <asm/current.h>
  37 #include <asm/io.h>
  38
  39 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;      /* Index 0-MAX */
  40 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;       /* ID for this card */
  41 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;     /* Enable this card */
  42 static bool precise_ptr[SNDRV_CARDS];                   /* Enable precise pointer */
  43
  44 module_param_array(index, int, NULL, 0444);
  45 MODULE_PARM_DESC(index, "Index value for RME Digi9652 (Hammerfall) soundcard.");
  46 module_param_array(id, charp, NULL, 0444);
  47 MODULE_PARM_DESC(id, "ID string for RME Digi9652 (Hammerfall) soundcard.");
  48 module_param_array(enable, bool, NULL, 0444);
  49 MODULE_PARM_DESC(enable, "Enable/disable specific RME96{52,36} soundcards.");
  50 module_param_array(precise_ptr, bool, NULL, 0444);
  51 MODULE_PARM_DESC(precise_ptr, "Enable precise pointer (doesn't work reliably).");
  52 MODULE_AUTHOR("Paul Davis <pbd@op.net>, Winfried Ritsch");
  53 MODULE_DESCRIPTION("RME Digi9652/Digi9636");
  54 MODULE_LICENSE("GPL");
  55 MODULE_SUPPORTED_DEVICE("{{RME,Hammerfall},"
  56                 "{RME,Hammerfall-Light}}");
  57
  58 /* The Hammerfall has two sets of 24 ADAT + 2 S/PDIF channels, one for
  59    capture, one for playback. Both the ADAT and S/PDIF channels appear
  60    to the host CPU in the same block of memory. There is no functional
  61    difference between them in terms of access.
  62
  63    The Hammerfall Light is identical to the Hammerfall, except that it
  64    has 2 sets 18 channels (16 ADAT + 2 S/PDIF) for capture and playback.
  65 */
  66
  67 #define RME9652_NCHANNELS       26
  68 #define RME9636_NCHANNELS       18
  69
  70 /* Preferred sync source choices - used by "sync_pref" control switch */
  71
  72 #define RME9652_SYNC_FROM_SPDIF 0
  73 #define RME9652_SYNC_FROM_ADAT1 1
  74 #define RME9652_SYNC_FROM_ADAT2 2
  75 #define RME9652_SYNC_FROM_ADAT3 3
  76
  77 /* Possible sources of S/PDIF input */
  78
  79 #define RME9652_SPDIFIN_OPTICAL 0       /* optical (ADAT1) */
  80 #define RME9652_SPDIFIN_COAXIAL 1       /* coaxial (RCA) */
  81 #define RME9652_SPDIFIN_INTERN  2       /* internal (CDROM) */
  82
  83 /* ------------- Status-Register bits --------------------- */
  84
  85 #define RME9652_IRQ        (1<<0)       /* IRQ is High if not reset by irq_clear */
  86 #define RME9652_lock_2     (1<<1)       /* ADAT 3-PLL: 1=locked, 0=unlocked */
  87 #define RME9652_lock_1     (1<<2)       /* ADAT 2-PLL: 1=locked, 0=unlocked */
  88 #define RME9652_lock_0     (1<<3)       /* ADAT 1-PLL: 1=locked, 0=unlocked */
  89 #define RME9652_fs48       (1<<4)       /* sample rate is 0=44.1/88.2,1=48/96 Khz */
  90 #define RME9652_wsel_rd    (1<<5)       /* if Word-Clock is used and valid then 1 */
  91                                         /* bits 6-15 encode h/w buffer pointer position */
  92 #define RME9652_sync_2     (1<<16)      /* if ADAT-IN 3 in sync to system clock */
  93 #define RME9652_sync_1     (1<<17)      /* if ADAT-IN 2 in sync to system clock */
  94 #define RME9652_sync_0     (1<<18)      /* if ADAT-IN 1 in sync to system clock */
  95 #define RME9652_DS_rd      (1<<19)      /* 1=Double Speed Mode, 0=Normal Speed */
  96 #define RME9652_tc_busy    (1<<20)      /* 1=time-code copy in progress (960ms) */
  97 #define RME9652_tc_out     (1<<21)      /* time-code out bit */
  98 #define RME9652_F_0        (1<<22)      /* 000=64kHz, 100=88.2kHz, 011=96kHz  */
  99 #define RME9652_F_1        (1<<23)      /* 111=32kHz, 110=44.1kHz, 101=48kHz, */
 100 #define RME9652_F_2        (1<<24)      /* external Crystal Chip if ERF=1 */
 101 #define RME9652_ERF        (1<<25)      /* Error-Flag of SDPIF Receiver (1=No Lock) */
 102 #define RME9652_buffer_id  (1<<26)      /* toggles by each interrupt on rec/play */
 103 #define RME9652_tc_valid   (1<<27)      /* 1 = a signal is detected on time-code input */
 104 #define RME9652_SPDIF_READ (1<<28)      /* byte available from Rev 1.5+ S/PDIF interface */
 105
 106 #define RME9652_sync      (RME9652_sync_0|RME9652_sync_1|RME9652_sync_2)
 107 #define RME9652_lock      (RME9652_lock_0|RME9652_lock_1|RME9652_lock_2)
 108 #define RME9652_F         (RME9652_F_0|RME9652_F_1|RME9652_F_2)
 109 #define rme9652_decode_spdif_rate(x) ((x)>>22)
 110
 111 /* Bit 6..15 : h/w buffer pointer */
 112
 113 #define RME9652_buf_pos   0x000FFC0
 114
 115 /* Bits 31,30,29 are bits 5,4,3 of h/w pointer position on later
 116    Rev G EEPROMS and Rev 1.5 cards or later.
 117 */
 118
 119 #define RME9652_REV15_buf_pos(x) ((((x)&0xE0000000)>>26)|((x)&RME9652_buf_pos))
 120
 121 /* amount of io space we remap for register access. i'm not sure we
 122    even need this much, but 1K is nice round number :)
 123 */
 124
 125 #define RME9652_IO_EXTENT     1024
 126
 127 #define RME9652_init_buffer       0
 128 #define RME9652_play_buffer       32    /* holds ptr to 26x64kBit host RAM */
 129 #define RME9652_rec_buffer        36    /* holds ptr to 26x64kBit host RAM */
 130 #define RME9652_control_register  64
 131 #define RME9652_irq_clear         96
 132 #define RME9652_time_code         100   /* useful if used with alesis adat */
 133 #define RME9652_thru_base         128   /* 132...228 Thru for 26 channels */
 134
 135 /* Read-only registers */
 136
 137 /* Writing to any of the register locations writes to the status
 138    register. We'll use the first location as our point of access.
 139 */
 140
 141 #define RME9652_status_register    0
 142
 143 /* --------- Control-Register Bits ---------------- */
 144
 145
 146 #define RME9652_start_bit          (1<<0)       /* start record/play */
 147                                                 /* bits 1-3 encode buffersize/latency */
 148 #define RME9652_Master             (1<<4)       /* Clock Mode Master=1,Slave/Auto=0 */
 149 #define RME9652_IE                 (1<<5)       /* Interrupt Enable */
 150 #define RME9652_freq               (1<<6)       /* samplerate 0=44.1/88.2, 1=48/96 kHz */
 151 #define RME9652_freq1              (1<<7)       /* if 0, 32kHz, else always 1 */
 152 #define RME9652_DS                 (1<<8)       /* Doule Speed 0=44.1/48, 1=88.2/96 Khz */
 153 #define RME9652_PRO                (1<<9)       /* S/PDIF out: 0=consumer, 1=professional */
 154 #define RME9652_EMP                (1<<10)      /*  Emphasis 0=None, 1=ON */
 155 #define RME9652_Dolby              (1<<11)      /*  Non-audio bit 1=set, 0=unset */
 156 #define RME9652_opt_out            (1<<12)      /* Use 1st optical OUT as SPDIF: 1=yes,0=no */
 157 #define RME9652_wsel               (1<<13)      /* use Wordclock as sync (overwrites master) */
 158 #define RME9652_inp_0              (1<<14)      /* SPDIF-IN: 00=optical (ADAT1),     */
 159 #define RME9652_inp_1              (1<<15)      /* 01=koaxial (Cinch), 10=Internal CDROM */
 160 #define RME9652_SyncPref_ADAT2     (1<<16)
 161 #define RME9652_SyncPref_ADAT3     (1<<17)
 162 #define RME9652_SPDIF_RESET        (1<<18)      /* Rev 1.5+: h/w S/PDIF receiver */
 163 #define RME9652_SPDIF_SELECT       (1<<19)
 164 #define RME9652_SPDIF_CLOCK        (1<<20)
 165 #define RME9652_SPDIF_WRITE        (1<<21)
 166 #define RME9652_ADAT1_INTERNAL     (1<<22)      /* Rev 1.5+: if set, internal CD connector carries ADAT */
 167
 168 /* buffersize = 512Bytes * 2^n, where n is made from Bit2 ... Bit0 */
 169
 170 #define RME9652_latency            0x0e
 171 #define rme9652_encode_latency(x)  (((x)&0x7)<<1)
 172 #define rme9652_decode_latency(x)  (((x)>>1)&0x7)
 173 #define rme9652_running_double_speed(s) ((s)->control_register & RME9652_DS)
 174 #define RME9652_inp                (RME9652_inp_0|RME9652_inp_1)
 175 #define rme9652_encode_spdif_in(x) (((x)&0x3)<<14)
 176 #define rme9652_decode_spdif_in(x) (((x)>>14)&0x3)
 177
 178 #define RME9652_SyncPref_Mask      (RME9652_SyncPref_ADAT2|RME9652_SyncPref_ADAT3)
 179 #define RME9652_SyncPref_ADAT1     0
 180 #define RME9652_SyncPref_SPDIF     (RME9652_SyncPref_ADAT2|RME9652_SyncPref_ADAT3)
 181
 182 /* the size of a substream (1 mono data stream) */
 183
 184 #define RME9652_CHANNEL_BUFFER_SAMPLES  (16*1024)
 185 #define RME9652_CHANNEL_BUFFER_BYTES    (4*RME9652_CHANNEL_BUFFER_SAMPLES)
 186
 187 /* the size of the area we need to allocate for DMA transfers. the
 188    size is the same regardless of the number of channels - the
 189    9636 still uses the same memory area.
 190
 191    Note that we allocate 1 more channel than is apparently needed
 192    because the h/w seems to write 1 byte beyond the end of the last
 193    page. Sigh.
 194 */
 195
 196 #define RME9652_DMA_AREA_BYTES ((RME9652_NCHANNELS+1) * RME9652_CHANNEL_BUFFER_BYTES)
 197 #define RME9652_DMA_AREA_KILOBYTES (RME9652_DMA_AREA_BYTES/1024)
 198
 199 struct snd_rme9652 {
 200         int dev;
 201
 202         spinlock_t lock;
 203         int irq;
 204         unsigned long port;
 205         void __iomem *iobase;
 206
 207         int precise_ptr;
 208
 209         u32 control_register;   /* cached value */
 210         u32 thru_bits;          /* thru 1=on, 0=off channel 1=Bit1... channel 26= Bit26 */
 211
 212         u32 creg_spdif;
 213         u32 creg_spdif_stream;
 214
 215         char *card_name;                /* hammerfall or hammerfall light names */
 216
 217         size_t hw_offsetmask;           /* &-with status register to get real hw_offset */
 218         size_t prev_hw_offset;          /* previous hw offset */
 219         size_t max_jitter;              /* maximum jitter in frames for
 220                                            hw pointer */
 221         size_t period_bytes;            /* guess what this is */
 222
 223         unsigned char ds_channels;
 224         unsigned char ss_channels;      /* different for hammerfall/hammerfall-light */
 225
 226         struct snd_dma_buffer playback_dma_buf;
 227         struct snd_dma_buffer capture_dma_buf;
 228
 229         unsigned char *capture_buffer;  /* suitably aligned address */
 230         unsigned char *playback_buffer; /* suitably aligned address */
 231
 232         pid_t capture_pid;
 233         pid_t playback_pid;
 234
 235         struct snd_pcm_substream *capture_substream;
 236         struct snd_pcm_substream *playback_substream;
 237         int running;
 238
 239         int passthru;                   /* non-zero if doing pass-thru */
 240         int hw_rev;                     /* h/w rev * 10 (i.e. 1.5 has hw_rev = 15) */
 241
 242         int last_spdif_sample_rate;     /* so that we can catch externally ... */
 243         int last_adat_sample_rate;      /* ... induced rate changes            */
 244
 245         char *channel_map;
 246
 247         struct snd_card *card;
 248         struct snd_pcm *pcm;
 249         struct pci_dev *pci;
 250         struct snd_kcontrol *spdif_ctl;
 251
 252 };
 253
 254 /* These tables map the ALSA channels 1..N to the channels that we
 255    need to use in order to find the relevant channel buffer. RME
 256    refer to this kind of mapping as between "the ADAT channel and
 257    the DMA channel." We index it using the logical audio channel,
 258    and the value is the DMA channel (i.e. channel buffer number)
 259    where the data for that channel can be read/written from/to.
 260 */
 261
 262 static char channel_map_9652_ss[26] = {
 263         0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
 264         18, 19, 20, 21, 22, 23, 24, 25
 265 };
 266
 267 static char channel_map_9636_ss[26] = {
 268         0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
 269         /* channels 16 and 17 are S/PDIF */
 270         24, 25,
 271         /* channels 18-25 don't exist */
 272         -1, -1, -1, -1, -1, -1, -1, -1
 273 };
 274
 275 static char channel_map_9652_ds[26] = {
 276         /* ADAT channels are remapped */
 277         1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23,
 278         /* channels 12 and 13 are S/PDIF */
 279         24, 25,
 280         /* others don't exist */
 281         -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
 282 };
 283
 284 static char channel_map_9636_ds[26] = {
 285         /* ADAT channels are remapped */
 286         1, 3, 5, 7, 9, 11, 13, 15,
 287         /* channels 8 and 9 are S/PDIF */
 288         24, 25,
 289         /* others don't exist */
 290         -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
 291 };
 292
 293 static int snd_hammerfall_get_buffer(struct pci_dev *pci, struct snd_dma_buffer *dmab, size_t size)
 294 {
 295         dmab->dev.type = SNDRV_DMA_TYPE_DEV;
 296         dmab->dev.dev = snd_dma_pci_data(pci);
 297         if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
 298                                 size, dmab) < 0)
 299                 return -ENOMEM;
 300         return 0;
 301 }
 302
 303 static void snd_hammerfall_free_buffer(struct snd_dma_buffer *dmab, struct pci_dev *pci)
 304 {
 305         if (dmab->area)
 306                 snd_dma_free_pages(dmab);
 307 }
 308
 309
 310 static DEFINE_PCI_DEVICE_TABLE(snd_rme9652_ids) = {
 311         {
 312                 .vendor    = 0x10ee,
 313                 .device    = 0x3fc4,
 314                 .subvendor = PCI_ANY_ID,
 315                 .subdevice = PCI_ANY_ID,
 316         },      /* RME Digi9652 */
 317         { 0, },
 318 };
 319
 320 MODULE_DEVICE_TABLE(pci, snd_rme9652_ids);
 321
 322 static inline void rme9652_write(struct snd_rme9652 *rme9652, int reg, int val)
 323 {
 324         writel(val, rme9652->iobase + reg);
 325 }
 326
 327 static inline unsigned int rme9652_read(struct snd_rme9652 *rme9652, int reg)
 328 {
 329         return readl(rme9652->iobase + reg);
 330 }
 331
 332 static inline int snd_rme9652_use_is_exclusive(struct snd_rme9652 *rme9652)
 333 {
 334         unsigned long flags;
 335         int ret = 1;
 336
 337         spin_lock_irqsave(&rme9652->lock, flags);
 338         if ((rme9652->playback_pid != rme9652->capture_pid) &&
 339             (rme9652->playback_pid >= 0) && (rme9652->capture_pid >= 0)) {
 340                 ret = 0;
 341         }
 342         spin_unlock_irqrestore(&rme9652->lock, flags);
 343         return ret;
 344 }
 345
 346 static inline int rme9652_adat_sample_rate(struct snd_rme9652 *rme9652)
 347 {
 348         if (rme9652_running_double_speed(rme9652)) {
 349                 return (rme9652_read(rme9652, RME9652_status_register) &
 350                         RME9652_fs48) ? 96000 : 88200;
 351         } else {
 352                 return (rme9652_read(rme9652, RME9652_status_register) &
 353                         RME9652_fs48) ? 48000 : 44100;
 354         }
 355 }
 356
 357 static inline void rme9652_compute_period_size(struct snd_rme9652 *rme9652)
 358 {
 359         unsigned int i;
 360
 361         i = rme9652->control_register & RME9652_latency;
 362         rme9652->period_bytes = 1 << ((rme9652_decode_latency(i) + 8));
 363         rme9652->hw_offsetmask =
 364                 (rme9652->period_bytes * 2 - 1) & RME9652_buf_pos;
 365         rme9652->max_jitter = 80;
 366 }
 367
 368 static snd_pcm_uframes_t rme9652_hw_pointer(struct snd_rme9652 *rme9652)
 369 {
 370         int status;
 371         unsigned int offset, frag;
 372         snd_pcm_uframes_t period_size = rme9652->period_bytes / 4;
 373         snd_pcm_sframes_t delta;
 374
 375         status = rme9652_read(rme9652, RME9652_status_register);
 376         if (!rme9652->precise_ptr)
 377                 return (status & RME9652_buffer_id) ? period_size : 0;
 378         offset = status & RME9652_buf_pos;
 379
 380         /* The hardware may give a backward movement for up to 80 frames
 381            Martin Kirst <martin.kirst@freenet.de> knows the details.
 382         */
 383
 384         delta = rme9652->prev_hw_offset - offset;
 385         delta &= 0xffff;
 386         if (delta <= (snd_pcm_sframes_t)rme9652->max_jitter * 4)
 387                 offset = rme9652->prev_hw_offset;
 388         else
 389                 rme9652->prev_hw_offset = offset;
 390         offset &= rme9652->hw_offsetmask;
 391         offset /= 4;
 392         frag = status & RME9652_buffer_id;
 393
 394         if (offset < period_size) {
 395                 if (offset > rme9652->max_jitter) {
 396                         if (frag)
 397                                 printk(KERN_ERR "Unexpected hw_pointer position (bufid == 0): status: %x offset: %d\n", status, offset);
 398                 } else if (!frag)
 399                         return 0;
 400                 offset -= rme9652->max_jitter;
 401                 if ((int)offset < 0)
 402                         offset += period_size * 2;
 403         } else {
 404                 if (offset > period_size + rme9652->max_jitter) {
 405                         if (!frag)
 406                                 printk(KERN_ERR "Unexpected hw_pointer position (bufid == 1): status: %x offset: %d\n", status, offset);
 407                 } else if (frag)
 408                         return period_size;
 409                 offset -= rme9652->max_jitter;
 410         }
 411
 412         return offset;
 413 }
 414
 415 static inline void rme9652_reset_hw_pointer(struct snd_rme9652 *rme9652)
 416 {
 417         int i;
 418
 419         /* reset the FIFO pointer to zero. We do this by writing to 8
 420            registers, each of which is a 32bit wide register, and set
 421            them all to zero. Note that s->iobase is a pointer to
 422            int32, not pointer to char.
 423         */
 424
 425         for (i = 0; i < 8; i++) {
 426                 rme9652_write(rme9652, i * 4, 0);
 427                 udelay(10);
 428         }
 429         rme9652->prev_hw_offset = 0;
 430 }
 431
 432 static inline void rme9652_start(struct snd_rme9652 *s)
 433 {
 434         s->control_register |= (RME9652_IE | RME9652_start_bit);
 435         rme9652_write(s, RME9652_control_register, s->control_register);
 436 }
 437
 438 static inline void rme9652_stop(struct snd_rme9652 *s)
 439 {
 440         s->control_register &= ~(RME9652_start_bit | RME9652_IE);
 441         rme9652_write(s, RME9652_control_register, s->control_register);
 442 }
 443
 444 static int rme9652_set_interrupt_interval(struct snd_rme9652 *s,
 445                                           unsigned int frames)
 446 {
 447         int restart = 0;
 448         int n;
 449
 450         spin_lock_irq(&s->lock);
 451
 452         if ((restart = s->running)) {
 453                 rme9652_stop(s);
 454         }
 455
 456         frames >>= 7;
 457         n = 0;
 458         while (frames) {
 459                 n++;
 460                 frames >>= 1;
 461         }
 462
 463         s->control_register &= ~RME9652_latency;
 464         s->control_register |= rme9652_encode_latency(n);
 465
 466         rme9652_write(s, RME9652_control_register, s->control_register);
 467
 468         rme9652_compute_period_size(s);
 469
 470         if (restart)
 471                 rme9652_start(s);
 472
 473         spin_unlock_irq(&s->lock);
 474
 475         return 0;
 476 }
 477
 478 static int rme9652_set_rate(struct snd_rme9652 *rme9652, int rate)
 479 {
 480         int restart;
 481         int reject_if_open = 0;
 482         int xrate;
 483
 484         if (!snd_rme9652_use_is_exclusive (rme9652)) {
 485                 return -EBUSY;
 486         }
 487
 488         /* Changing from a "single speed" to a "double speed" rate is
 489            not allowed if any substreams are open. This is because
 490            such a change causes a shift in the location of
 491            the DMA buffers and a reduction in the number of available
 492            buffers.
 493
 494            Note that a similar but essentially insoluble problem
 495            exists for externally-driven rate changes. All we can do
 496            is to flag rate changes in the read/write routines.
 497          */
 498
 499         spin_lock_irq(&rme9652->lock);
 500         xrate = rme9652_adat_sample_rate(rme9652);
 501
 502         switch (rate) {
 503         case 44100:
 504                 if (xrate > 48000) {
 505                         reject_if_open = 1;
 506                 }
 507                 rate = 0;
 508                 break;
 509         case 48000:
 510                 if (xrate > 48000) {
 511                         reject_if_open = 1;
 512                 }
 513                 rate = RME9652_freq;
 514                 break;
 515         case 88200:
 516                 if (xrate < 48000) {
 517                         reject_if_open = 1;
 518                 }
 519                 rate = RME9652_DS;
 520                 break;
 521         case 96000:
 522                 if (xrate < 48000) {
 523                         reject_if_open = 1;
 524                 }
 525                 rate = RME9652_DS | RME9652_freq;
 526                 break;
 527         default:
 528                 spin_unlock_irq(&rme9652->lock);
 529                 return -EINVAL;
 530         }
 531
 532         if (reject_if_open && (rme9652->capture_pid >= 0 || rme9652->playback_pid >= 0)) {
 533                 spin_unlock_irq(&rme9652->lock);
 534                 return -EBUSY;
 535         }
 536
 537         if ((restart = rme9652->running)) {
 538                 rme9652_stop(rme9652);
 539         }
 540         rme9652->control_register &= ~(RME9652_freq | RME9652_DS);
 541         rme9652->control_register |= rate;
 542         rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
 543
 544         if (restart) {
 545                 rme9652_start(rme9652);
 546         }
 547
 548         if (rate & RME9652_DS) {
 549                 if (rme9652->ss_channels == RME9652_NCHANNELS) {
 550                         rme9652->channel_map = channel_map_9652_ds;
 551                 } else {
 552                         rme9652->channel_map = channel_map_9636_ds;
 553                 }
 554         } else {
 555                 if (rme9652->ss_channels == RME9652_NCHANNELS) {
 556                         rme9652->channel_map = channel_map_9652_ss;
 557                 } else {
 558                         rme9652->channel_map = channel_map_9636_ss;
 559                 }
 560         }
 561
 562         spin_unlock_irq(&rme9652->lock);
 563         return 0;
 564 }
 565
 566 static void rme9652_set_thru(struct snd_rme9652 *rme9652, int channel, int enable)
 567 {
 568         int i;
 569
 570         rme9652->passthru = 0;
 571
 572         if (channel < 0) {
 573
 574                 /* set thru for all channels */
 575
 576                 if (enable) {
 577                         for (i = 0; i < RME9652_NCHANNELS; i++) {
 578                                 rme9652->thru_bits |= (1 << i);
 579                                 rme9652_write(rme9652, RME9652_thru_base + i * 4, 1);
 580                         }
 581                 } else {
 582                         for (i = 0; i < RME9652_NCHANNELS; i++) {
 583                                 rme9652->thru_bits &= ~(1 << i);
 584                                 rme9652_write(rme9652, RME9652_thru_base + i * 4, 0);
 585                         }
 586                 }
 587
 588         } else {
 589                 int mapped_channel;
 590
 591                 mapped_channel = rme9652->channel_map[channel];
 592
 593                 if (enable) {
 594                         rme9652->thru_bits |= (1 << mapped_channel);
 595                 } else {
 596                         rme9652->thru_bits &= ~(1 << mapped_channel);
 597                 }
 598
 599                 rme9652_write(rme9652,
 600                                RME9652_thru_base + mapped_channel * 4,
 601                                enable ? 1 : 0);
 602         }
 603 }
 604
 605 static int rme9652_set_passthru(struct snd_rme9652 *rme9652, int onoff)
 606 {
 607         if (onoff) {
 608                 rme9652_set_thru(rme9652, -1, 1);
 609
 610                 /* we don't want interrupts, so do a
 611                    custom version of rme9652_start().
 612                 */
 613
 614                 rme9652->control_register =
 615                         RME9652_inp_0 |
 616                         rme9652_encode_latency(7) |
 617                         RME9652_start_bit;
 618
 619                 rme9652_reset_hw_pointer(rme9652);
 620
 621                 rme9652_write(rme9652, RME9652_control_register,
 622                               rme9652->control_register);
 623                 rme9652->passthru = 1;
 624         } else {
 625                 rme9652_set_thru(rme9652, -1, 0);
 626                 rme9652_stop(rme9652);
 627                 rme9652->passthru = 0;
 628         }
 629
 630         return 0;
 631 }
 632
 633 static void rme9652_spdif_set_bit (struct snd_rme9652 *rme9652, int mask, int onoff)
 634 {
 635         if (onoff)
 636                 rme9652->control_register |= mask;
 637         else
 638                 rme9652->control_register &= ~mask;
 639
 640         rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
 641 }
 642
 643 static void rme9652_spdif_write_byte (struct snd_rme9652 *rme9652, const int val)
 644 {
 645         long mask;
 646         long i;
 647
 648         for (i = 0, mask = 0x80; i < 8; i++, mask >>= 1) {
 649                 if (val & mask)
 650                         rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_WRITE, 1);
 651                 else
 652                         rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_WRITE, 0);
 653
 654                 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 1);
 655                 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 0);
 656         }
 657 }
 658
 659 static int rme9652_spdif_read_byte (struct snd_rme9652 *rme9652)
 660 {
 661         long mask;
 662         long val;
 663         long i;
 664
 665         val = 0;
 666
 667         for (i = 0, mask = 0x80;  i < 8; i++, mask >>= 1) {
 668                 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 1);
 669                 if (rme9652_read (rme9652, RME9652_status_register) & RME9652_SPDIF_READ)
 670                         val |= mask;
 671                 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 0);
 672         }
 673
 674         return val;
 675 }
 676
 677 static void rme9652_write_spdif_codec (struct snd_rme9652 *rme9652, const int address, const int data)
 678 {
 679         rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
 680         rme9652_spdif_write_byte (rme9652, 0x20);
 681         rme9652_spdif_write_byte (rme9652, address);
 682         rme9652_spdif_write_byte (rme9652, data);
 683         rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
 684 }
 685
 686
 687 static int rme9652_spdif_read_codec (struct snd_rme9652 *rme9652, const int address)
 688 {
 689         int ret;
 690
 691         rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
 692         rme9652_spdif_write_byte (rme9652, 0x20);
 693         rme9652_spdif_write_byte (rme9652, address);
 694         rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
 695         rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
 696
 697         rme9652_spdif_write_byte (rme9652, 0x21);
 698         ret = rme9652_spdif_read_byte (rme9652);
 699         rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
 700
 701         return ret;
 702 }
 703
 704 static void rme9652_initialize_spdif_receiver (struct snd_rme9652 *rme9652)
 705 {
 706         /* XXX what unsets this ? */
 707
 708         rme9652->control_register |= RME9652_SPDIF_RESET;
 709
 710         rme9652_write_spdif_codec (rme9652, 4, 0x40);
 711         rme9652_write_spdif_codec (rme9652, 17, 0x13);
 712         rme9652_write_spdif_codec (rme9652, 6, 0x02);
 713 }
 714
 715 static inline int rme9652_spdif_sample_rate(struct snd_rme9652 *s)
 716 {
 717         unsigned int rate_bits;
 718
 719         if (rme9652_read(s, RME9652_status_register) & RME9652_ERF) {
 720                 return -1;      /* error condition */
 721         }
 722
 723         if (s->hw_rev == 15) {
 724
 725                 int x, y, ret;
 726
 727                 x = rme9652_spdif_read_codec (s, 30);
 728
 729                 if (x != 0)
 730                         y = 48000 * 64 / x;
 731                 else
 732                         y = 0;
 733
 734                 if      (y > 30400 && y < 33600)  ret = 32000;
 735                 else if (y > 41900 && y < 46000)  ret = 44100;
 736                 else if (y > 46000 && y < 50400)  ret = 48000;
 737                 else if (y > 60800 && y < 67200)  ret = 64000;
 738                 else if (y > 83700 && y < 92000)  ret = 88200;
 739                 else if (y > 92000 && y < 100000) ret = 96000;
 740                 else                              ret = 0;
 741                 return ret;
 742         }
 743
 744         rate_bits = rme9652_read(s, RME9652_status_register) & RME9652_F;
 745
 746         switch (rme9652_decode_spdif_rate(rate_bits)) {
 747         case 0x7:
 748                 return 32000;
 749                 break;
 750
 751         case 0x6:
 752                 return 44100;
 753                 break;
 754
 755         case 0x5:
 756                 return 48000;
 757                 break;
 758
 759         case 0x4:
 760                 return 88200;
 761                 break;
 762
 763         case 0x3:
 764                 return 96000;
 765                 break;
 766
 767         case 0x0:
 768                 return 64000;
 769                 break;
 770
 771         default:
 772                 snd_printk(KERN_ERR "%s: unknown S/PDIF input rate (bits = 0x%x)\n",
 773                            s->card_name, rate_bits);
 774                 return 0;
 775                 break;
 776         }
 777 }
 778
 779 /*-----------------------------------------------------------------------------
 780   Control Interface
 781   ----------------------------------------------------------------------------*/
 782
 783 static u32 snd_rme9652_convert_from_aes(struct snd_aes_iec958 *aes)
 784 {
 785         u32 val = 0;
 786         val |= (aes->status[0] & IEC958_AES0_PROFESSIONAL) ? RME9652_PRO : 0;
 787         val |= (aes->status[0] & IEC958_AES0_NONAUDIO) ? RME9652_Dolby : 0;
 788         if (val & RME9652_PRO)
 789                 val |= (aes->status[0] & IEC958_AES0_PRO_EMPHASIS_5015) ? RME9652_EMP : 0;
 790         else
 791                 val |= (aes->status[0] & IEC958_AES0_CON_EMPHASIS_5015) ? RME9652_EMP : 0;
 792         return val;
 793 }
 794
 795 static void snd_rme9652_convert_to_aes(struct snd_aes_iec958 *aes, u32 val)
 796 {
 797         aes->status[0] = ((val & RME9652_PRO) ? IEC958_AES0_PROFESSIONAL : 0) |
 798                          ((val & RME9652_Dolby) ? IEC958_AES0_NONAUDIO : 0);
 799         if (val & RME9652_PRO)
 800                 aes->status[0] |= (val & RME9652_EMP) ? IEC958_AES0_PRO_EMPHASIS_5015 : 0;
 801         else
 802                 aes->status[0] |= (val & RME9652_EMP) ? IEC958_AES0_CON_EMPHASIS_5015 : 0;
 803 }
 804
 805 static int snd_rme9652_control_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
 806 {
 807         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
 808         uinfo->count = 1;
 809         return 0;
 810 }
 811
 812 static int snd_rme9652_control_spdif_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
 813 {
 814         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
 815
 816         snd_rme9652_convert_to_aes(&ucontrol->value.iec958, rme9652->creg_spdif);
 817         return 0;
 818 }
 819
 820 static int snd_rme9652_control_spdif_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
 821 {
 822         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
 823         int change;
 824         u32 val;
 825
 826         val = snd_rme9652_convert_from_aes(&ucontrol->value.iec958);
 827         spin_lock_irq(&rme9652->lock);
 828         change = val != rme9652->creg_spdif;
 829         rme9652->creg_spdif = val;
 830         spin_unlock_irq(&rme9652->lock);
 831         return change;
 832 }
 833
 834 static int snd_rme9652_control_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
 835 {
 836         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
 837         uinfo->count = 1;
 838         return 0;
 839 }
 840
 841 static int snd_rme9652_control_spdif_stream_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
 842 {
 843         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
 844
 845         snd_rme9652_convert_to_aes(&ucontrol->value.iec958, rme9652->creg_spdif_stream);
 846         return 0;
 847 }
 848
 849 static int snd_rme9652_control_spdif_stream_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
 850 {
 851         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
 852         int change;
 853         u32 val;
 854
 855         val = snd_rme9652_convert_from_aes(&ucontrol->value.iec958);
 856         spin_lock_irq(&rme9652->lock);
 857         change = val != rme9652->creg_spdif_stream;
 858         rme9652->creg_spdif_stream = val;
 859         rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP);
 860         rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= val);
 861         spin_unlock_irq(&rme9652->lock);
 862         return change;
 863 }
 864
 865 static int snd_rme9652_control_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
 866 {
 867         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
 868         uinfo->count = 1;
 869         return 0;
 870 }
 871
 872 static int snd_rme9652_control_spdif_mask_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
 873 {
 874         ucontrol->value.iec958.status[0] = kcontrol->private_value;
 875         return 0;
 876 }
 877
 878 #define RME9652_ADAT1_IN(xname, xindex) \
 879 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
 880   .info = snd_rme9652_info_adat1_in, \
 881   .get = snd_rme9652_get_adat1_in, \
 882   .put = snd_rme9652_put_adat1_in }
 883
 884 static unsigned int rme9652_adat1_in(struct snd_rme9652 *rme9652)
 885 {
 886         if (rme9652->control_register & RME9652_ADAT1_INTERNAL)
 887                 return 1;
 888         return 0;
 889 }
 890
 891 static int rme9652_set_adat1_input(struct snd_rme9652 *rme9652, int internal)
 892 {
 893         int restart = 0;
 894
 895         if (internal) {
 896                 rme9652->control_register |= RME9652_ADAT1_INTERNAL;
 897         } else {
 898                 rme9652->control_register &= ~RME9652_ADAT1_INTERNAL;
 899         }
 900
 901         /* XXX do we actually need to stop the card when we do this ? */
 902
 903         if ((restart = rme9652->running)) {
 904                 rme9652_stop(rme9652);
 905         }
 906
 907         rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
 908
 909         if (restart) {
 910                 rme9652_start(rme9652);
 911         }
 912
 913         return 0;
 914 }
 915
 916 static int snd_rme9652_info_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
 917 {
 918         static char *texts[2] = {"ADAT1", "Internal"};
 919
 920         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
 921         uinfo->count = 1;
 922         uinfo->value.enumerated.items = 2;
 923         if (uinfo->value.enumerated.item > 1)
 924                 uinfo->value.enumerated.item = 1;
 925         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
 926         return 0;
 927 }
 928
 929 static int snd_rme9652_get_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
 930 {
 931         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
 932
 933         spin_lock_irq(&rme9652->lock);
 934         ucontrol->value.enumerated.item[0] = rme9652_adat1_in(rme9652);
 935         spin_unlock_irq(&rme9652->lock);
 936         return 0;
 937 }
 938
 939 static int snd_rme9652_put_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
 940 {
 941         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
 942         int change;
 943         unsigned int val;
 944
 945         if (!snd_rme9652_use_is_exclusive(rme9652))
 946                 return -EBUSY;
 947         val = ucontrol->value.enumerated.item[0] % 2;
 948         spin_lock_irq(&rme9652->lock);
 949         change = val != rme9652_adat1_in(rme9652);
 950         if (change)
 951                 rme9652_set_adat1_input(rme9652, val);
 952         spin_unlock_irq(&rme9652->lock);
 953         return change;
 954 }
 955
 956 #define RME9652_SPDIF_IN(xname, xindex) \
 957 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
 958   .info = snd_rme9652_info_spdif_in, \
 959   .get = snd_rme9652_get_spdif_in, .put = snd_rme9652_put_spdif_in }
 960
 961 static unsigned int rme9652_spdif_in(struct snd_rme9652 *rme9652)
 962 {
 963         return rme9652_decode_spdif_in(rme9652->control_register &
 964                                        RME9652_inp);
 965 }
 966
 967 static int rme9652_set_spdif_input(struct snd_rme9652 *rme9652, int in)
 968 {
 969         int restart = 0;
 970
 971         rme9652->control_register &= ~RME9652_inp;
 972         rme9652->control_register |= rme9652_encode_spdif_in(in);
 973
 974         if ((restart = rme9652->running)) {
 975                 rme9652_stop(rme9652);
 976         }
 977
 978         rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
 979
 980         if (restart) {
 981                 rme9652_start(rme9652);
 982         }
 983
 984         return 0;
 985 }
 986
 987 static int snd_rme9652_info_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
 988 {
 989         static char *texts[3] = {"ADAT1", "Coaxial", "Internal"};
 990
 991         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
 992         uinfo->count = 1;
 993         uinfo->value.enumerated.items = 3;
 994         if (uinfo->value.enumerated.item > 2)
 995                 uinfo->value.enumerated.item = 2;
 996         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
 997         return 0;
 998 }
 999
1000 static int snd_rme9652_get_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1001 {
1002         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1003
1004         spin_lock_irq(&rme9652->lock);
1005         ucontrol->value.enumerated.item[0] = rme9652_spdif_in(rme9652);
1006         spin_unlock_irq(&rme9652->lock);
1007         return 0;
1008 }
1009
1010 static int snd_rme9652_put_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1011 {
1012         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1013         int change;
1014         unsigned int val;
1015
1016         if (!snd_rme9652_use_is_exclusive(rme9652))
1017                 return -EBUSY;
1018         val = ucontrol->value.enumerated.item[0] % 3;
1019         spin_lock_irq(&rme9652->lock);
1020         change = val != rme9652_spdif_in(rme9652);
1021         if (change)
1022                 rme9652_set_spdif_input(rme9652, val);
1023         spin_unlock_irq(&rme9652->lock);
1024         return change;
1025 }
1026
1027 #define RME9652_SPDIF_OUT(xname, xindex) \
1028 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1029   .info = snd_rme9652_info_spdif_out, \
1030   .get = snd_rme9652_get_spdif_out, .put = snd_rme9652_put_spdif_out }
1031
1032 static int rme9652_spdif_out(struct snd_rme9652 *rme9652)
1033 {
1034         return (rme9652->control_register & RME9652_opt_out) ? 1 : 0;
1035 }
1036
1037 static int rme9652_set_spdif_output(struct snd_rme9652 *rme9652, int out)
1038 {
1039         int restart = 0;
1040
1041         if (out) {
1042                 rme9652->control_register |= RME9652_opt_out;
1043         } else {
1044                 rme9652->control_register &= ~RME9652_opt_out;
1045         }
1046
1047         if ((restart = rme9652->running)) {
1048                 rme9652_stop(rme9652);
1049         }
1050
1051         rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1052
1053         if (restart) {
1054                 rme9652_start(rme9652);
1055         }
1056
1057         return 0;
1058 }
1059
1060 #define snd_rme9652_info_spdif_out      snd_ctl_boolean_mono_info
1061
1062 static int snd_rme9652_get_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1063 {
1064         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1065
1066         spin_lock_irq(&rme9652->lock);
1067         ucontrol->value.integer.value[0] = rme9652_spdif_out(rme9652);
1068         spin_unlock_irq(&rme9652->lock);
1069         return 0;
1070 }
1071
1072 static int snd_rme9652_put_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1073 {
1074         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1075         int change;
1076         unsigned int val;
1077
1078         if (!snd_rme9652_use_is_exclusive(rme9652))
1079                 return -EBUSY;
1080         val = ucontrol->value.integer.value[0] & 1;
1081         spin_lock_irq(&rme9652->lock);
1082         change = (int)val != rme9652_spdif_out(rme9652);
1083         rme9652_set_spdif_output(rme9652, val);
1084         spin_unlock_irq(&rme9652->lock);
1085         return change;
1086 }
1087
1088 #define RME9652_SYNC_MODE(xname, xindex) \
1089 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1090   .info = snd_rme9652_info_sync_mode, \
1091   .get = snd_rme9652_get_sync_mode, .put = snd_rme9652_put_sync_mode }
1092
1093 static int rme9652_sync_mode(struct snd_rme9652 *rme9652)
1094 {
1095         if (rme9652->control_register & RME9652_wsel) {
1096                 return 2;
1097         } else if (rme9652->control_register & RME9652_Master) {
1098                 return 1;
1099         } else {
1100                 return 0;
1101         }
1102 }
1103
1104 static int rme9652_set_sync_mode(struct snd_rme9652 *rme9652, int mode)
1105 {
1106         int restart = 0;
1107
1108         switch (mode) {
1109         case 0:
1110                 rme9652->control_register &=
1111                     ~(RME9652_Master | RME9652_wsel);
1112                 break;
1113         case 1:
1114                 rme9652->control_register =
1115                     (rme9652->control_register & ~RME9652_wsel) | RME9652_Master;
1116                 break;
1117         case 2:
1118                 rme9652->control_register |=
1119                     (RME9652_Master | RME9652_wsel);
1120                 break;
1121         }
1122
1123         if ((restart = rme9652->running)) {
1124                 rme9652_stop(rme9652);
1125         }
1126
1127         rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1128
1129         if (restart) {
1130                 rme9652_start(rme9652);
1131         }
1132
1133         return 0;
1134 }
1135
1136 static int snd_rme9652_info_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1137 {
1138         static char *texts[3] = {"AutoSync", "Master", "Word Clock"};
1139
1140         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1141         uinfo->count = 1;
1142         uinfo->value.enumerated.items = 3;
1143         if (uinfo->value.enumerated.item > 2)
1144                 uinfo->value.enumerated.item = 2;
1145         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1146         return 0;
1147 }
1148
1149 static int snd_rme9652_get_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1150 {
1151         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1152
1153         spin_lock_irq(&rme9652->lock);
1154         ucontrol->value.enumerated.item[0] = rme9652_sync_mode(rme9652);
1155         spin_unlock_irq(&rme9652->lock);
1156         return 0;
1157 }
1158
1159 static int snd_rme9652_put_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1160 {
1161         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1162         int change;
1163         unsigned int val;
1164
1165         val = ucontrol->value.enumerated.item[0] % 3;
1166         spin_lock_irq(&rme9652->lock);
1167         change = (int)val != rme9652_sync_mode(rme9652);
1168         rme9652_set_sync_mode(rme9652, val);
1169         spin_unlock_irq(&rme9652->lock);
1170         return change;
1171 }
1172
1173 #define RME9652_SYNC_PREF(xname, xindex) \
1174 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1175   .info = snd_rme9652_info_sync_pref, \
1176   .get = snd_rme9652_get_sync_pref, .put = snd_rme9652_put_sync_pref }
1177
1178 static int rme9652_sync_pref(struct snd_rme9652 *rme9652)
1179 {
1180         switch (rme9652->control_register & RME9652_SyncPref_Mask) {
1181         case RME9652_SyncPref_ADAT1:
1182                 return RME9652_SYNC_FROM_ADAT1;
1183         case RME9652_SyncPref_ADAT2:
1184                 return RME9652_SYNC_FROM_ADAT2;
1185         case RME9652_SyncPref_ADAT3:
1186                 return RME9652_SYNC_FROM_ADAT3;
1187         case RME9652_SyncPref_SPDIF:
1188                 return RME9652_SYNC_FROM_SPDIF;
1189         }
1190         /* Not reachable */
1191         return 0;
1192 }
1193
1194 static int rme9652_set_sync_pref(struct snd_rme9652 *rme9652, int pref)
1195 {
1196         int restart;
1197
1198         rme9652->control_register &= ~RME9652_SyncPref_Mask;
1199         switch (pref) {
1200         case RME9652_SYNC_FROM_ADAT1:
1201                 rme9652->control_register |= RME9652_SyncPref_ADAT1;
1202                 break;
1203         case RME9652_SYNC_FROM_ADAT2:
1204                 rme9652->control_register |= RME9652_SyncPref_ADAT2;
1205                 break;
1206         case RME9652_SYNC_FROM_ADAT3:
1207                 rme9652->control_register |= RME9652_SyncPref_ADAT3;
1208                 break;
1209         case RME9652_SYNC_FROM_SPDIF:
1210                 rme9652->control_register |= RME9652_SyncPref_SPDIF;
1211                 break;
1212         }
1213
1214         if ((restart = rme9652->running)) {
1215                 rme9652_stop(rme9652);
1216         }
1217
1218         rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1219
1220         if (restart) {
1221                 rme9652_start(rme9652);
1222         }
1223
1224         return 0;
1225 }
1226
1227 static int snd_rme9652_info_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1228 {
1229         static char *texts[4] = {"IEC958 In", "ADAT1 In", "ADAT2 In", "ADAT3 In"};
1230         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1231
1232         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1233         uinfo->count = 1;
1234         uinfo->value.enumerated.items = rme9652->ss_channels == RME9652_NCHANNELS ? 4 : 3;
1235         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1236                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1237         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1238         return 0;
1239 }
1240
1241 static int snd_rme9652_get_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1242 {
1243         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1244
1245         spin_lock_irq(&rme9652->lock);
1246         ucontrol->value.enumerated.item[0] = rme9652_sync_pref(rme9652);
1247         spin_unlock_irq(&rme9652->lock);
1248         return 0;
1249 }
1250
1251 static int snd_rme9652_put_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1252 {
1253         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1254         int change, max;
1255         unsigned int val;
1256
1257         if (!snd_rme9652_use_is_exclusive(rme9652))
1258                 return -EBUSY;
1259         max = rme9652->ss_channels == RME9652_NCHANNELS ? 4 : 3;
1260         val = ucontrol->value.enumerated.item[0] % max;
1261         spin_lock_irq(&rme9652->lock);
1262         change = (int)val != rme9652_sync_pref(rme9652);
1263         rme9652_set_sync_pref(rme9652, val);
1264         spin_unlock_irq(&rme9652->lock);
1265         return change;
1266 }
1267
1268 static int snd_rme9652_info_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1269 {
1270         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1271         uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1272         uinfo->count = rme9652->ss_channels;
1273         uinfo->value.integer.min = 0;
1274         uinfo->value.integer.max = 1;
1275         return 0;
1276 }
1277
1278 static int snd_rme9652_get_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1279 {
1280         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1281         unsigned int k;
1282         u32 thru_bits = rme9652->thru_bits;
1283
1284         for (k = 0; k < rme9652->ss_channels; ++k) {
1285                 ucontrol->value.integer.value[k] = !!(thru_bits & (1 << k));
1286         }
1287         return 0;
1288 }
1289
1290 static int snd_rme9652_put_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1291 {
1292         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1293         int change;
1294         unsigned int chn;
1295         u32 thru_bits = 0;
1296
1297         if (!snd_rme9652_use_is_exclusive(rme9652))
1298                 return -EBUSY;
1299
1300         for (chn = 0; chn < rme9652->ss_channels; ++chn) {
1301                 if (ucontrol->value.integer.value[chn])
1302                         thru_bits |= 1 << chn;
1303         }
1304
1305         spin_lock_irq(&rme9652->lock);
1306         change = thru_bits ^ rme9652->thru_bits;
1307         if (change) {
1308                 for (chn = 0; chn < rme9652->ss_channels; ++chn) {
1309                         if (!(change & (1 << chn)))
1310                                 continue;
1311                         rme9652_set_thru(rme9652,chn,thru_bits&(1<<chn));
1312                 }
1313         }
1314         spin_unlock_irq(&rme9652->lock);
1315         return !!change;
1316 }
1317
1318 #define RME9652_PASSTHRU(xname, xindex) \
1319 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1320   .info = snd_rme9652_info_passthru, \
1321   .put = snd_rme9652_put_passthru, \
1322   .get = snd_rme9652_get_passthru }
1323
1324 #define snd_rme9652_info_passthru       snd_ctl_boolean_mono_info
1325
1326 static int snd_rme9652_get_passthru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1327 {
1328         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1329
1330         spin_lock_irq(&rme9652->lock);
1331         ucontrol->value.integer.value[0] = rme9652->passthru;
1332         spin_unlock_irq(&rme9652->lock);
1333         return 0;
1334 }
1335
1336 static int snd_rme9652_put_passthru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1337 {
1338         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1339         int change;
1340         unsigned int val;
1341         int err = 0;
1342
1343         if (!snd_rme9652_use_is_exclusive(rme9652))
1344                 return -EBUSY;
1345
1346         val = ucontrol->value.integer.value[0] & 1;
1347         spin_lock_irq(&rme9652->lock);
1348         change = (ucontrol->value.integer.value[0] != rme9652->passthru);
1349         if (change)
1350                 err = rme9652_set_passthru(rme9652, val);
1351         spin_unlock_irq(&rme9652->lock);
1352         return err ? err : change;
1353 }
1354
1355 /* Read-only switches */
1356
1357 #define RME9652_SPDIF_RATE(xname, xindex) \
1358 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1359   .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1360   .info = snd_rme9652_info_spdif_rate, \
1361   .get = snd_rme9652_get_spdif_rate }
1362
1363 static int snd_rme9652_info_spdif_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1364 {
1365         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1366         uinfo->count = 1;
1367         uinfo->value.integer.min = 0;
1368         uinfo->value.integer.max = 96000;
1369         return 0;
1370 }
1371
1372 static int snd_rme9652_get_spdif_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1373 {
1374         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1375
1376         spin_lock_irq(&rme9652->lock);
1377         ucontrol->value.integer.value[0] = rme9652_spdif_sample_rate(rme9652);
1378         spin_unlock_irq(&rme9652->lock);
1379         return 0;
1380 }
1381
1382 #define RME9652_ADAT_SYNC(xname, xindex, xidx) \
1383 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1384   .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1385   .info = snd_rme9652_info_adat_sync, \
1386   .get = snd_rme9652_get_adat_sync, .private_value = xidx }
1387
1388 static int snd_rme9652_info_adat_sync(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1389 {
1390         static char *texts[4] = {"No Lock", "Lock", "No Lock Sync", "Lock Sync"};
1391
1392         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1393         uinfo->count = 1;
1394         uinfo->value.enumerated.items = 4;
1395         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1396                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1397         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1398         return 0;
1399 }
1400
1401 static int snd_rme9652_get_adat_sync(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1402 {
1403         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1404         unsigned int mask1, mask2, val;
1405
1406         switch (kcontrol->private_value) {
1407         case 0: mask1 = RME9652_lock_0; mask2 = RME9652_sync_0; break;
1408         case 1: mask1 = RME9652_lock_1; mask2 = RME9652_sync_1; break;
1409         case 2: mask1 = RME9652_lock_2; mask2 = RME9652_sync_2; break;
1410         default: return -EINVAL;
1411         }
1412         val = rme9652_read(rme9652, RME9652_status_register);
1413         ucontrol->value.enumerated.item[0] = (val & mask1) ? 1 : 0;
1414         ucontrol->value.enumerated.item[0] |= (val & mask2) ? 2 : 0;
1415         return 0;
1416 }
1417
1418 #define RME9652_TC_VALID(xname, xindex) \
1419 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1420   .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1421   .info = snd_rme9652_info_tc_valid, \
1422   .get = snd_rme9652_get_tc_valid }
1423
1424 #define snd_rme9652_info_tc_valid       snd_ctl_boolean_mono_info
1425
1426 static int snd_rme9652_get_tc_valid(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1427 {
1428         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1429
1430         ucontrol->value.integer.value[0] =
1431                 (rme9652_read(rme9652, RME9652_status_register) & RME9652_tc_valid) ? 1 : 0;
1432         return 0;
1433 }
1434
1435 #ifdef ALSA_HAS_STANDARD_WAY_OF_RETURNING_TIMECODE
1436
1437 /* FIXME: this routine needs a port to the new control API --jk */
1438
1439 static int snd_rme9652_get_tc_value(void *private_data,
1440                                     snd_kswitch_t *kswitch,
1441                                     snd_switch_t *uswitch)
1442 {
1443         struct snd_rme9652 *s = (struct snd_rme9652 *) private_data;
1444         u32 value;
1445         int i;
1446
1447         uswitch->type = SNDRV_SW_TYPE_DWORD;
1448
1449         if ((rme9652_read(s, RME9652_status_register) &
1450              RME9652_tc_valid) == 0) {
1451                 uswitch->value.data32[0] = 0;
1452                 return 0;
1453         }
1454
1455         /* timecode request */
1456
1457         rme9652_write(s, RME9652_time_code, 0);
1458
1459         /* XXX bug alert: loop-based timing !!!! */
1460
1461         for (i = 0; i < 50; i++) {
1462                 if (!(rme9652_read(s, i * 4) & RME9652_tc_busy))
1463                         break;
1464         }
1465
1466         if (!(rme9652_read(s, i * 4) & RME9652_tc_busy)) {
1467                 return -EIO;
1468         }
1469
1470         value = 0;
1471
1472         for (i = 0; i < 32; i++) {
1473                 value >>= 1;
1474
1475                 if (rme9652_read(s, i * 4) & RME9652_tc_out)
1476                         value |= 0x80000000;
1477         }
1478
1479         if (value > 2 * 60 * 48000) {
1480                 value -= 2 * 60 * 48000;
1481         } else {
1482                 value = 0;
1483         }
1484
1485         uswitch->value.data32[0] = value;
1486
1487         return 0;
1488 }
1489
1490 #endif                          /* ALSA_HAS_STANDARD_WAY_OF_RETURNING_TIMECODE */
1491
1492 static struct snd_kcontrol_new snd_rme9652_controls[] = {
1493 {
1494         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
1495         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
1496         .info =         snd_rme9652_control_spdif_info,
1497         .get =          snd_rme9652_control_spdif_get,
1498         .put =          snd_rme9652_control_spdif_put,
1499 },
1500 {
1501         .access =       SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1502         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
1503         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
1504         .info =         snd_rme9652_control_spdif_stream_info,
1505         .get =          snd_rme9652_control_spdif_stream_get,
1506         .put =          snd_rme9652_control_spdif_stream_put,
1507 },
1508 {
1509         .access =       SNDRV_CTL_ELEM_ACCESS_READ,
1510         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
1511         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
1512         .info =         snd_rme9652_control_spdif_mask_info,
1513         .get =          snd_rme9652_control_spdif_mask_get,
1514         .private_value = IEC958_AES0_NONAUDIO |
1515                         IEC958_AES0_PROFESSIONAL |
1516                         IEC958_AES0_CON_EMPHASIS,
1517 },
1518 {
1519         .access =       SNDRV_CTL_ELEM_ACCESS_READ,
1520         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
1521         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK),
1522         .info =         snd_rme9652_control_spdif_mask_info,
1523         .get =          snd_rme9652_control_spdif_mask_get,
1524         .private_value = IEC958_AES0_NONAUDIO |
1525                         IEC958_AES0_PROFESSIONAL |
1526                         IEC958_AES0_PRO_EMPHASIS,
1527 },
1528 RME9652_SPDIF_IN("IEC958 Input Connector", 0),
1529 RME9652_SPDIF_OUT("IEC958 Output also on ADAT1", 0),
1530 RME9652_SYNC_MODE("Sync Mode", 0),
1531 RME9652_SYNC_PREF("Preferred Sync Source", 0),
1532 {
1533         .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1534         .name = "Channels Thru",
1535         .index = 0,
1536         .info = snd_rme9652_info_thru,
1537         .get = snd_rme9652_get_thru,
1538         .put = snd_rme9652_put_thru,
1539 },
1540 RME9652_SPDIF_RATE("IEC958 Sample Rate", 0),
1541 RME9652_ADAT_SYNC("ADAT1 Sync Check", 0, 0),
1542 RME9652_ADAT_SYNC("ADAT2 Sync Check", 0, 1),
1543 RME9652_TC_VALID("Timecode Valid", 0),
1544 RME9652_PASSTHRU("Passthru", 0)
1545 };
1546
1547 static struct snd_kcontrol_new snd_rme9652_adat3_check =
1548 RME9652_ADAT_SYNC("ADAT3 Sync Check", 0, 2);
1549
1550 static struct snd_kcontrol_new snd_rme9652_adat1_input =
1551 RME9652_ADAT1_IN("ADAT1 Input Source", 0);
1552
1553 static int snd_rme9652_create_controls(struct snd_card *card, struct snd_rme9652 *rme9652)
1554 {
1555         unsigned int idx;
1556         int err;
1557         struct snd_kcontrol *kctl;
1558
1559         for (idx = 0; idx < ARRAY_SIZE(snd_rme9652_controls); idx++) {
1560                 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_controls[idx], rme9652))) < 0)
1561                         return err;
1562                 if (idx == 1)   /* IEC958 (S/PDIF) Stream */
1563                         rme9652->spdif_ctl = kctl;
1564         }
1565
1566         if (rme9652->ss_channels == RME9652_NCHANNELS)
1567                 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_adat3_check, rme9652))) < 0)
1568                         return err;
1569
1570         if (rme9652->hw_rev >= 15)
1571                 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_adat1_input, rme9652))) < 0)
1572                         return err;
1573
1574         return 0;
1575 }
1576
1577 /*------------------------------------------------------------
1578    /proc interface
1579  ------------------------------------------------------------*/
1580
1581 static void
1582 snd_rme9652_proc_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
1583 {
1584         struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) entry->private_data;
1585         u32 thru_bits = rme9652->thru_bits;
1586         int show_auto_sync_source = 0;
1587         int i;
1588         unsigned int status;
1589         int x;
1590
1591         status = rme9652_read(rme9652, RME9652_status_register);
1592
1593         snd_iprintf(buffer, "%s (Card #%d)\n", rme9652->card_name, rme9652->card->number + 1);
1594         snd_iprintf(buffer, "Buffers: capture %p playback %p\n",
1595                     rme9652->capture_buffer, rme9652->playback_buffer);
1596         snd_iprintf(buffer, "IRQ: %d Registers bus: 0x%lx VM: 0x%lx\n",
1597                     rme9652->irq, rme9652->port, (unsigned long)rme9652->iobase);
1598         snd_iprintf(buffer, "Control register: %x\n", rme9652->control_register);
1599
1600         snd_iprintf(buffer, "\n");
1601
1602         x = 1 << (6 + rme9652_decode_latency(rme9652->control_register &
1603                                              RME9652_latency));
1604
1605         snd_iprintf(buffer, "Latency: %d samples (2 periods of %lu bytes)\n",
1606                     x, (unsigned long) rme9652->period_bytes);
1607         snd_iprintf(buffer, "Hardware pointer (frames): %ld\n",
1608                     rme9652_hw_pointer(rme9652));
1609         snd_iprintf(buffer, "Passthru: %s\n",
1610                     rme9652->passthru ? "yes" : "no");
1611
1612         if ((rme9652->control_register & (RME9652_Master | RME9652_wsel)) == 0) {
1613                 snd_iprintf(buffer, "Clock mode: autosync\n");
1614                 show_auto_sync_source = 1;
1615         } else if (rme9652->control_register & RME9652_wsel) {
1616                 if (status & RME9652_wsel_rd) {
1617                         snd_iprintf(buffer, "Clock mode: word clock\n");
1618                 } else {
1619                         snd_iprintf(buffer, "Clock mode: word clock (no signal)\n");
1620                 }
1621         } else {
1622                 snd_iprintf(buffer, "Clock mode: master\n");
1623         }
1624
1625         if (show_auto_sync_source) {
1626                 switch (rme9652->control_register & RME9652_SyncPref_Mask) {
1627                 case RME9652_SyncPref_ADAT1:
1628                         snd_iprintf(buffer, "Pref. sync source: ADAT1\n");
1629                         break;
1630                 case RME9652_SyncPref_ADAT2:
1631                         snd_iprintf(buffer, "Pref. sync source: ADAT2\n");
1632                         break;
1633                 case RME9652_SyncPref_ADAT3:
1634                         snd_iprintf(buffer, "Pref. sync source: ADAT3\n");
1635                         break;
1636                 case RME9652_SyncPref_SPDIF:
1637                         snd_iprintf(buffer, "Pref. sync source: IEC958\n");
1638                         break;
1639                 default:
1640                         snd_iprintf(buffer, "Pref. sync source: ???\n");
1641                 }
1642         }
1643
1644         if (rme9652->hw_rev >= 15)
1645                 snd_iprintf(buffer, "\nADAT1 Input source: %s\n",
1646                             (rme9652->control_register & RME9652_ADAT1_INTERNAL) ?
1647                             "Internal" : "ADAT1 optical");
1648
1649         snd_iprintf(buffer, "\n");
1650
1651         switch (rme9652_decode_spdif_in(rme9652->control_register &
1652                                         RME9652_inp)) {
1653         case RME9652_SPDIFIN_OPTICAL:
1654                 snd_iprintf(buffer, "IEC958 input: ADAT1\n");
1655                 break;
1656         case RME9652_SPDIFIN_COAXIAL:
1657                 snd_iprintf(buffer, "IEC958 input: Coaxial\n");
1658                 break;
1659         case RME9652_SPDIFIN_INTERN:
1660                 snd_iprintf(buffer, "IEC958 input: Internal\n");
1661                 break;
1662         default:
1663                 snd_iprintf(buffer, "IEC958 input: ???\n");
1664                 break;
1665         }
1666
1667         if (rme9652->control_register & RME9652_opt_out) {
1668                 snd_iprintf(buffer, "IEC958 output: Coaxial & ADAT1\n");
1669         } else {
1670                 snd_iprintf(buffer, "IEC958 output: Coaxial only\n");
1671         }
1672
1673         if (rme9652->control_register & RME9652_PRO) {
1674                 snd_iprintf(buffer, "IEC958 quality: Professional\n");
1675         } else {
1676                 snd_iprintf(buffer, "IEC958 quality: Consumer\n");
1677         }
1678
1679         if (rme9652->control_register & RME9652_EMP) {
1680                 snd_iprintf(buffer, "IEC958 emphasis: on\n");
1681         } else {
1682                 snd_iprintf(buffer, "IEC958 emphasis: off\n");
1683         }
1684
1685         if (rme9652->control_register & RME9652_Dolby) {
1686                 snd_iprintf(buffer, "IEC958 Dolby: on\n");
1687         } else {
1688                 snd_iprintf(buffer, "IEC958 Dolby: off\n");
1689         }
1690
1691         i = rme9652_spdif_sample_rate(rme9652);
1692
1693         if (i < 0) {
1694                 snd_iprintf(buffer,
1695                             "IEC958 sample rate: error flag set\n");
1696         } else if (i == 0) {
1697                 snd_iprintf(buffer, "IEC958 sample rate: undetermined\n");
1698         } else {
1699                 snd_iprintf(buffer, "IEC958 sample rate: %d\n", i);
1700         }
1701
1702         snd_iprintf(buffer, "\n");
1703
1704         snd_iprintf(buffer, "ADAT Sample rate: %dHz\n",
1705                     rme9652_adat_sample_rate(rme9652));
1706
1707         /* Sync Check */
1708
1709         x = status & RME9652_sync_0;
1710         if (status & RME9652_lock_0) {
1711                 snd_iprintf(buffer, "ADAT1: %s\n", x ? "Sync" : "Lock");
1712         } else {
1713                 snd_iprintf(buffer, "ADAT1: No Lock\n");
1714         }
1715
1716         x = status & RME9652_sync_1;
1717         if (status & RME9652_lock_1) {
1718                 snd_iprintf(buffer, "ADAT2: %s\n", x ? "Sync" : "Lock");
1719         } else {
1720                 snd_iprintf(buffer, "ADAT2: No Lock\n");
1721         }
1722
1723         x = status & RME9652_sync_2;
1724         if (status & RME9652_lock_2) {
1725                 snd_iprintf(buffer, "ADAT3: %s\n", x ? "Sync" : "Lock");
1726         } else {
1727                 snd_iprintf(buffer, "ADAT3: No Lock\n");
1728         }
1729
1730         snd_iprintf(buffer, "\n");
1731
1732         snd_iprintf(buffer, "Timecode signal: %s\n",
1733                     (status & RME9652_tc_valid) ? "yes" : "no");
1734
1735         /* thru modes */
1736
1737         snd_iprintf(buffer, "Punch Status:\n\n");
1738
1739         for (i = 0; i < rme9652->ss_channels; i++) {
1740                 if (thru_bits & (1 << i)) {
1741                         snd_iprintf(buffer, "%2d:  on ", i + 1);
1742                 } else {
1743                         snd_iprintf(buffer, "%2d: off ", i + 1);
1744                 }
1745
1746                 if (((i + 1) % 8) == 0) {
1747                         snd_iprintf(buffer, "\n");
1748                 }
1749         }
1750
1751         snd_iprintf(buffer, "\n");
1752 }
1753
1754 static void snd_rme9652_proc_init(struct snd_rme9652 *rme9652)
1755 {
1756         struct snd_info_entry *entry;
1757
1758         if (! snd_card_proc_new(rme9652->card, "rme9652", &entry))
1759                 snd_info_set_text_ops(entry, rme9652, snd_rme9652_proc_read);
1760 }
1761
1762 static void snd_rme9652_free_buffers(struct snd_rme9652 *rme9652)
1763 {
1764         snd_hammerfall_free_buffer(&rme9652->capture_dma_buf, rme9652->pci);
1765         snd_hammerfall_free_buffer(&rme9652->playback_dma_buf, rme9652->pci);
1766 }
1767
1768 static int snd_rme9652_free(struct snd_rme9652 *rme9652)
1769 {
1770         if (rme9652->irq >= 0)
1771                 rme9652_stop(rme9652);
1772         snd_rme9652_free_buffers(rme9652);
1773
1774         if (rme9652->irq >= 0)
1775                 free_irq(rme9652->irq, (void *)rme9652);
1776         if (rme9652->iobase)
1777                 iounmap(rme9652->iobase);
1778         if (rme9652->port)
1779                 pci_release_regions(rme9652->pci);
1780
1781         pci_disable_device(rme9652->pci);
1782         return 0;
1783 }
1784
1785 static int snd_rme9652_initialize_memory(struct snd_rme9652 *rme9652)
1786 {
1787         unsigned long pb_bus, cb_bus;
1788
1789         if (snd_hammerfall_get_buffer(rme9652->pci, &rme9652->capture_dma_buf, RME9652_DMA_AREA_BYTES) < 0 ||
1790             snd_hammerfall_get_buffer(rme9652->pci, &rme9652->playback_dma_buf, RME9652_DMA_AREA_BYTES) < 0) {
1791                 if (rme9652->capture_dma_buf.area)
1792                         snd_dma_free_pages(&rme9652->capture_dma_buf);
1793                 printk(KERN_ERR "%s: no buffers available\n", rme9652->card_name);
1794                 return -ENOMEM;
1795         }
1796
1797         /* Align to bus-space 64K boundary */
1798
1799         cb_bus = ALIGN(rme9652->capture_dma_buf.addr, 0x10000ul);
1800         pb_bus = ALIGN(rme9652->playback_dma_buf.addr, 0x10000ul);
1801
1802         /* Tell the card where it is */
1803
1804         rme9652_write(rme9652, RME9652_rec_buffer, cb_bus);
1805         rme9652_write(rme9652, RME9652_play_buffer, pb_bus);
1806
1807         rme9652->capture_buffer = rme9652->capture_dma_buf.area + (cb_bus - rme9652->capture_dma_buf.addr);
1808         rme9652->playback_buffer = rme9652->playback_dma_buf.area + (pb_bus - rme9652->playback_dma_buf.addr);
1809
1810         return 0;
1811 }
1812
1813 static void snd_rme9652_set_defaults(struct snd_rme9652 *rme9652)
1814 {
1815         unsigned int k;
1816
1817         /* ASSUMPTION: rme9652->lock is either held, or
1818            there is no need to hold it (e.g. during module
1819            initialization).
1820          */
1821
1822         /* set defaults:
1823
1824            SPDIF Input via Coax
1825            autosync clock mode
1826            maximum latency (7 = 8192 samples, 64Kbyte buffer,
1827            which implies 2 4096 sample, 32Kbyte periods).
1828
1829            if rev 1.5, initialize the S/PDIF receiver.
1830
1831          */
1832
1833         rme9652->control_register =
1834             RME9652_inp_0 | rme9652_encode_latency(7);
1835
1836         rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1837
1838         rme9652_reset_hw_pointer(rme9652);
1839         rme9652_compute_period_size(rme9652);
1840
1841         /* default: thru off for all channels */
1842
1843         for (k = 0; k < RME9652_NCHANNELS; ++k)
1844                 rme9652_write(rme9652, RME9652_thru_base + k * 4, 0);
1845
1846         rme9652->thru_bits = 0;
1847         rme9652->passthru = 0;
1848
1849         /* set a default rate so that the channel map is set up */
1850
1851         rme9652_set_rate(rme9652, 48000);
1852 }
1853
1854 static irqreturn_t snd_rme9652_interrupt(int irq, void *dev_id)
1855 {
1856         struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) dev_id;
1857
1858         if (!(rme9652_read(rme9652, RME9652_status_register) & RME9652_IRQ)) {
1859                 return IRQ_NONE;
1860         }
1861
1862         rme9652_write(rme9652, RME9652_irq_clear, 0);
1863
1864         if (rme9652->capture_substream) {
1865                 snd_pcm_period_elapsed(rme9652->pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream);
1866         }
1867
1868         if (rme9652->playback_substream) {
1869                 snd_pcm_period_elapsed(rme9652->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream);
1870         }
1871         return IRQ_HANDLED;
1872 }
1873
1874 static snd_pcm_uframes_t snd_rme9652_hw_pointer(struct snd_pcm_substream *substream)
1875 {
1876         struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1877         return rme9652_hw_pointer(rme9652);
1878 }
1879
1880 static char *rme9652_channel_buffer_location(struct snd_rme9652 *rme9652,
1881                                              int stream,
1882                                              int channel)
1883
1884 {
1885         int mapped_channel;
1886
1887         if (snd_BUG_ON(channel < 0 || channel >= RME9652_NCHANNELS))
1888                 return NULL;
1889
1890         if ((mapped_channel = rme9652->channel_map[channel]) < 0) {
1891                 return NULL;
1892         }
1893
1894         if (stream == SNDRV_PCM_STREAM_CAPTURE) {
1895                 return rme9652->capture_buffer +
1896                         (mapped_channel * RME9652_CHANNEL_BUFFER_BYTES);
1897         } else {
1898                 return rme9652->playback_buffer +
1899                         (mapped_channel * RME9652_CHANNEL_BUFFER_BYTES);
1900         }
1901 }
1902
1903 static int snd_rme9652_playback_copy(struct snd_pcm_substream *substream, int channel,
1904                                      snd_pcm_uframes_t pos, void __user *src, snd_pcm_uframes_t count)
1905 {
1906         struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1907         char *channel_buf;
1908
1909         if (snd_BUG_ON(pos + count > RME9652_CHANNEL_BUFFER_BYTES / 4))
1910                 return -EINVAL;
1911
1912         channel_buf = rme9652_channel_buffer_location (rme9652,
1913                                                        substream->pstr->stream,
1914                                                        channel);
1915         if (snd_BUG_ON(!channel_buf))
1916                 return -EIO;
1917         if (copy_from_user(channel_buf + pos * 4, src, count * 4))
1918                 return -EFAULT;
1919         return count;
1920 }
1921
1922 static int snd_rme9652_capture_copy(struct snd_pcm_substream *substream, int channel,
1923                                     snd_pcm_uframes_t pos, void __user *dst, snd_pcm_uframes_t count)
1924 {
1925         struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1926         char *channel_buf;
1927
1928         if (snd_BUG_ON(pos + count > RME9652_CHANNEL_BUFFER_BYTES / 4))
1929                 return -EINVAL;
1930
1931         channel_buf = rme9652_channel_buffer_location (rme9652,
1932                                                        substream->pstr->stream,
1933                                                        channel);
1934         if (snd_BUG_ON(!channel_buf))
1935                 return -EIO;
1936         if (copy_to_user(dst, channel_buf + pos * 4, count * 4))
1937                 return -EFAULT;
1938         return count;
1939 }
1940
1941 static int snd_rme9652_hw_silence(struct snd_pcm_substream *substream, int channel,
1942                                   snd_pcm_uframes_t pos, snd_pcm_uframes_t count)
1943 {
1944         struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1945         char *channel_buf;
1946
1947         channel_buf = rme9652_channel_buffer_location (rme9652,
1948                                                        substream->pstr->stream,
1949                                                        channel);
1950         if (snd_BUG_ON(!channel_buf))
1951                 return -EIO;
1952         memset(channel_buf + pos * 4, 0, count * 4);
1953         return count;
1954 }
1955
1956 static int snd_rme9652_reset(struct snd_pcm_substream *substream)
1957 {
1958         struct snd_pcm_runtime *runtime = substream->runtime;
1959         struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1960         struct snd_pcm_substream *other;
1961         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
1962                 other = rme9652->capture_substream;
1963         else
1964                 other = rme9652->playback_substream;
1965         if (rme9652->running)
1966                 runtime->status->hw_ptr = rme9652_hw_pointer(rme9652);
1967         else
1968                 runtime->status->hw_ptr = 0;
1969         if (other) {
1970                 struct snd_pcm_substream *s;
1971                 struct snd_pcm_runtime *oruntime = other->runtime;
1972                 snd_pcm_group_for_each_entry(s, substream) {
1973                         if (s == other) {
1974                                 oruntime->status->hw_ptr = runtime->status->hw_ptr;
1975                                 break;
1976                         }
1977                 }
1978         }
1979         return 0;
1980 }
1981
1982 static int snd_rme9652_hw_params(struct snd_pcm_substream *substream,
1983                                  struct snd_pcm_hw_params *params)
1984 {
1985         struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1986         int err;
1987         pid_t this_pid;
1988         pid_t other_pid;
1989
1990         spin_lock_irq(&rme9652->lock);
1991
1992         if (substream->pstr->stream == SNDRV_PCM_STREAM_PLAYBACK) {
1993                 rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP);
1994                 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= rme9652->creg_spdif_stream);
1995                 this_pid = rme9652->playback_pid;
1996                 other_pid = rme9652->capture_pid;
1997         } else {
1998                 this_pid = rme9652->capture_pid;
1999                 other_pid = rme9652->playback_pid;
2000         }
2001
2002         if ((other_pid > 0) && (this_pid != other_pid)) {
2003
2004                 /* The other stream is open, and not by the same
2005                    task as this one. Make sure that the parameters
2006                    that matter are the same.
2007                  */
2008
2009                 if ((int)params_rate(params) !=
2010                     rme9652_adat_sample_rate(rme9652)) {
2011                         spin_unlock_irq(&rme9652->lock);
2012                         _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
2013                         return -EBUSY;
2014                 }
2015
2016                 if (params_period_size(params) != rme9652->period_bytes / 4) {
2017                         spin_unlock_irq(&rme9652->lock);
2018                         _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
2019                         return -EBUSY;
2020                 }
2021
2022                 /* We're fine. */
2023
2024                 spin_unlock_irq(&rme9652->lock);
2025                 return 0;
2026
2027         } else {
2028                 spin_unlock_irq(&rme9652->lock);
2029         }
2030
2031         /* how to make sure that the rate matches an externally-set one ?
2032          */
2033
2034         if ((err = rme9652_set_rate(rme9652, params_rate(params))) < 0) {
2035                 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
2036                 return err;
2037         }
2038
2039         if ((err = rme9652_set_interrupt_interval(rme9652, params_period_size(params))) < 0) {
2040                 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
2041                 return err;
2042         }
2043
2044         return 0;
2045 }
2046
2047 static int snd_rme9652_channel_info(struct snd_pcm_substream *substream,
2048                                     struct snd_pcm_channel_info *info)
2049 {
2050         struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2051         int chn;
2052
2053         if (snd_BUG_ON(info->channel >= RME9652_NCHANNELS))
2054                 return -EINVAL;
2055
2056         if ((chn = rme9652->channel_map[info->channel]) < 0) {
2057                 return -EINVAL;
2058         }
2059
2060         info->offset = chn * RME9652_CHANNEL_BUFFER_BYTES;
2061         info->first = 0;
2062         info->step = 32;
2063         return 0;
2064 }
2065
2066 static int snd_rme9652_ioctl(struct snd_pcm_substream *substream,
2067                              unsigned int cmd, void *arg)
2068 {
2069         switch (cmd) {
2070         case SNDRV_PCM_IOCTL1_RESET:
2071         {
2072                 return snd_rme9652_reset(substream);
2073         }
2074         case SNDRV_PCM_IOCTL1_CHANNEL_INFO:
2075         {
2076                 struct snd_pcm_channel_info *info = arg;
2077                 return snd_rme9652_channel_info(substream, info);
2078         }
2079         default:
2080                 break;
2081         }
2082
2083         return snd_pcm_lib_ioctl(substream, cmd, arg);
2084 }
2085
2086 static void rme9652_silence_playback(struct snd_rme9652 *rme9652)
2087 {
2088         memset(rme9652->playback_buffer, 0, RME9652_DMA_AREA_BYTES);
2089 }
2090
2091 static int snd_rme9652_trigger(struct snd_pcm_substream *substream,
2092                                int cmd)
2093 {
2094         struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2095         struct snd_pcm_substream *other;
2096         int running;
2097         spin_lock(&rme9652->lock);
2098         running = rme9652->running;
2099         switch (cmd) {
2100         case SNDRV_PCM_TRIGGER_START:
2101                 running |= 1 << substream->stream;
2102                 break;
2103         case SNDRV_PCM_TRIGGER_STOP:
2104                 running &= ~(1 << substream->stream);
2105                 break;
2106         default:
2107                 snd_BUG();
2108                 spin_unlock(&rme9652->lock);
2109                 return -EINVAL;
2110         }
2111         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
2112                 other = rme9652->capture_substream;
2113         else
2114                 other = rme9652->playback_substream;
2115
2116         if (other) {
2117                 struct snd_pcm_substream *s;
2118                 snd_pcm_group_for_each_entry(s, substream) {
2119                         if (s == other) {
2120                                 snd_pcm_trigger_done(s, substream);
2121                                 if (cmd == SNDRV_PCM_TRIGGER_START)
2122                                         running |= 1 << s->stream;
2123                                 else
2124                                         running &= ~(1 << s->stream);
2125                                 goto _ok;
2126                         }
2127                 }
2128                 if (cmd == SNDRV_PCM_TRIGGER_START) {
2129                         if (!(running & (1 << SNDRV_PCM_STREAM_PLAYBACK)) &&
2130                             substream->stream == SNDRV_PCM_STREAM_CAPTURE)
2131                                 rme9652_silence_playback(rme9652);
2132                 } else {
2133                         if (running &&
2134                             substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
2135                                 rme9652_silence_playback(rme9652);
2136                 }
2137         } else {
2138                 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
2139                         rme9652_silence_playback(rme9652);
2140         }
2141  _ok:
2142         snd_pcm_trigger_done(substream, substream);
2143         if (!rme9652->running && running)
2144                 rme9652_start(rme9652);
2145         else if (rme9652->running && !running)
2146                 rme9652_stop(rme9652);
2147         rme9652->running = running;
2148         spin_unlock(&rme9652->lock);
2149
2150         return 0;
2151 }
2152
2153 static int snd_rme9652_prepare(struct snd_pcm_substream *substream)
2154 {
2155         struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2156         unsigned long flags;
2157         int result = 0;
2158
2159         spin_lock_irqsave(&rme9652->lock, flags);
2160         if (!rme9652->running)
2161                 rme9652_reset_hw_pointer(rme9652);
2162         spin_unlock_irqrestore(&rme9652->lock, flags);
2163         return result;
2164 }
2165
2166 static struct snd_pcm_hardware snd_rme9652_playback_subinfo =
2167 {
2168         .info =                 (SNDRV_PCM_INFO_MMAP |
2169                                  SNDRV_PCM_INFO_MMAP_VALID |
2170                                  SNDRV_PCM_INFO_NONINTERLEAVED |
2171                                  SNDRV_PCM_INFO_SYNC_START |
2172                                  SNDRV_PCM_INFO_DOUBLE),
2173         .formats =              SNDRV_PCM_FMTBIT_S32_LE,
2174         .rates =                (SNDRV_PCM_RATE_44100 |
2175                                  SNDRV_PCM_RATE_48000 |
2176                                  SNDRV_PCM_RATE_88200 |
2177                                  SNDRV_PCM_RATE_96000),
2178         .rate_min =             44100,
2179         .rate_max =             96000,
2180         .channels_min =         10,
2181         .channels_max =         26,
2182         .buffer_bytes_max =     RME9652_CHANNEL_BUFFER_BYTES * 26,
2183         .period_bytes_min =     (64 * 4) * 10,
2184         .period_bytes_max =     (8192 * 4) * 26,
2185         .periods_min =          2,
2186         .periods_max =          2,
2187         .fifo_size =            0,
2188 };
2189
2190 static struct snd_pcm_hardware snd_rme9652_capture_subinfo =
2191 {
2192         .info =                 (SNDRV_PCM_INFO_MMAP |
2193                                  SNDRV_PCM_INFO_MMAP_VALID |
2194                                  SNDRV_PCM_INFO_NONINTERLEAVED |
2195                                  SNDRV_PCM_INFO_SYNC_START),
2196         .formats =              SNDRV_PCM_FMTBIT_S32_LE,
2197         .rates =                (SNDRV_PCM_RATE_44100 |
2198                                  SNDRV_PCM_RATE_48000 |
2199                                  SNDRV_PCM_RATE_88200 |
2200                                  SNDRV_PCM_RATE_96000),
2201         .rate_min =             44100,
2202         .rate_max =             96000,
2203         .channels_min =         10,
2204         .channels_max =         26,
2205         .buffer_bytes_max =     RME9652_CHANNEL_BUFFER_BYTES *26,
2206         .period_bytes_min =     (64 * 4) * 10,
2207         .period_bytes_max =     (8192 * 4) * 26,
2208         .periods_min =          2,
2209         .periods_max =          2,
2210         .fifo_size =            0,
2211 };
2212
2213 static unsigned int period_sizes[] = { 64, 128, 256, 512, 1024, 2048, 4096, 8192 };
2214
2215 static struct snd_pcm_hw_constraint_list hw_constraints_period_sizes = {
2216         .count = ARRAY_SIZE(period_sizes),
2217         .list = period_sizes,
2218         .mask = 0
2219 };
2220
2221 static int snd_rme9652_hw_rule_channels(struct snd_pcm_hw_params *params,
2222                                         struct snd_pcm_hw_rule *rule)
2223 {
2224         struct snd_rme9652 *rme9652 = rule->private;
2225         struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2226         unsigned int list[2] = { rme9652->ds_channels, rme9652->ss_channels };
2227         return snd_interval_list(c, 2, list, 0);
2228 }
2229
2230 static int snd_rme9652_hw_rule_channels_rate(struct snd_pcm_hw_params *params,
2231                                              struct snd_pcm_hw_rule *rule)
2232 {
2233         struct snd_rme9652 *rme9652 = rule->private;
2234         struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2235         struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
2236         if (r->min > 48000) {
2237                 struct snd_interval t = {
2238                         .min = rme9652->ds_channels,
2239                         .max = rme9652->ds_channels,
2240                         .integer = 1,
2241                 };
2242                 return snd_interval_refine(c, &t);
2243         } else if (r->max < 88200) {
2244                 struct snd_interval t = {
2245                         .min = rme9652->ss_channels,
2246                         .max = rme9652->ss_channels,
2247                         .integer = 1,
2248                 };
2249                 return snd_interval_refine(c, &t);
2250         }
2251         return 0;
2252 }
2253
2254 static int snd_rme9652_hw_rule_rate_channels(struct snd_pcm_hw_params *params,
2255                                              struct snd_pcm_hw_rule *rule)
2256 {
2257         struct snd_rme9652 *rme9652 = rule->private;
2258         struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2259         struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
2260         if (c->min >= rme9652->ss_channels) {
2261                 struct snd_interval t = {
2262                         .min = 44100,
2263                         .max = 48000,
2264                         .integer = 1,
2265                 };
2266                 return snd_interval_refine(r, &t);
2267         } else if (c->max <= rme9652->ds_channels) {
2268                 struct snd_interval t = {
2269                         .min = 88200,
2270                         .max = 96000,
2271                         .integer = 1,
2272                 };
2273                 return snd_interval_refine(r, &t);
2274         }
2275         return 0;
2276 }
2277
2278 static int snd_rme9652_playback_open(struct snd_pcm_substream *substream)
2279 {
2280         struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2281         struct snd_pcm_runtime *runtime = substream->runtime;
2282
2283         spin_lock_irq(&rme9652->lock);
2284
2285         snd_pcm_set_sync(substream);
2286
2287         runtime->hw = snd_rme9652_playback_subinfo;
2288         runtime->dma_area = rme9652->playback_buffer;
2289         runtime->dma_bytes = RME9652_DMA_AREA_BYTES;
2290
2291         if (rme9652->capture_substream == NULL) {
2292                 rme9652_stop(rme9652);
2293                 rme9652_set_thru(rme9652, -1, 0);
2294         }
2295
2296         rme9652->playback_pid = current->pid;
2297         rme9652->playback_substream = substream;
2298
2299         spin_unlock_irq(&rme9652->lock);
2300
2301         snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
2302         snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_period_sizes);
2303         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2304                              snd_rme9652_hw_rule_channels, rme9652,
2305                              SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2306         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2307                              snd_rme9652_hw_rule_channels_rate, rme9652,
2308                              SNDRV_PCM_HW_PARAM_RATE, -1);
2309         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
2310                              snd_rme9652_hw_rule_rate_channels, rme9652,
2311                              SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2312
2313         rme9652->creg_spdif_stream = rme9652->creg_spdif;
2314         rme9652->spdif_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
2315         snd_ctl_notify(rme9652->card, SNDRV_CTL_EVENT_MASK_VALUE |
2316                        SNDRV_CTL_EVENT_MASK_INFO, &rme9652->spdif_ctl->id);
2317         return 0;
2318 }
2319
2320 static int snd_rme9652_playback_release(struct snd_pcm_substream *substream)
2321 {
2322         struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2323
2324         spin_lock_irq(&rme9652->lock);
2325
2326         rme9652->playback_pid = -1;
2327         rme9652->playback_substream = NULL;
2328
2329         spin_unlock_irq(&rme9652->lock);
2330
2331         rme9652->spdif_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
2332         snd_ctl_notify(rme9652->card, SNDRV_CTL_EVENT_MASK_VALUE |
2333                        SNDRV_CTL_EVENT_MASK_INFO, &rme9652->spdif_ctl->id);
2334         return 0;
2335 }
2336
2337
2338 static int snd_rme9652_capture_open(struct snd_pcm_substream *substream)
2339 {
2340         struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2341         struct snd_pcm_runtime *runtime = substream->runtime;
2342
2343         spin_lock_irq(&rme9652->lock);
2344
2345         snd_pcm_set_sync(substream);
2346
2347         runtime->hw = snd_rme9652_capture_subinfo;
2348         runtime->dma_area = rme9652->capture_buffer;
2349         runtime->dma_bytes = RME9652_DMA_AREA_BYTES;
2350
2351         if (rme9652->playback_substream == NULL) {
2352                 rme9652_stop(rme9652);
2353                 rme9652_set_thru(rme9652, -1, 0);
2354         }
2355
2356         rme9652->capture_pid = current->pid;
2357         rme9652->capture_substream = substream;
2358
2359         spin_unlock_irq(&rme9652->lock);
2360
2361         snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
2362         snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_period_sizes);
2363         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2364                              snd_rme9652_hw_rule_channels, rme9652,
2365                              SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2366         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2367                              snd_rme9652_hw_rule_channels_rate, rme9652,
2368                              SNDRV_PCM_HW_PARAM_RATE, -1);
2369         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
2370                              snd_rme9652_hw_rule_rate_channels, rme9652,
2371                              SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2372         return 0;
2373 }
2374
2375 static int snd_rme9652_capture_release(struct snd_pcm_substream *substream)
2376 {
2377         struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2378
2379         spin_lock_irq(&rme9652->lock);
2380
2381         rme9652->capture_pid = -1;
2382         rme9652->capture_substream = NULL;
2383
2384         spin_unlock_irq(&rme9652->lock);
2385         return 0;
2386 }
2387
2388 static struct snd_pcm_ops snd_rme9652_playback_ops = {
2389         .open =         snd_rme9652_playback_open,
2390         .close =        snd_rme9652_playback_release,
2391         .ioctl =        snd_rme9652_ioctl,
2392         .hw_params =    snd_rme9652_hw_params,
2393         .prepare =      snd_rme9652_prepare,
2394         .trigger =      snd_rme9652_trigger,
2395         .pointer =      snd_rme9652_hw_pointer,
2396         .copy =         snd_rme9652_playback_copy,
2397         .silence =      snd_rme9652_hw_silence,
2398 };
2399
2400 static struct snd_pcm_ops snd_rme9652_capture_ops = {
2401         .open =         snd_rme9652_capture_open,
2402         .close =        snd_rme9652_capture_release,
2403         .ioctl =        snd_rme9652_ioctl,
2404         .hw_params =    snd_rme9652_hw_params,
2405         .prepare =      snd_rme9652_prepare,
2406         .trigger =      snd_rme9652_trigger,
2407         .pointer =      snd_rme9652_hw_pointer,
2408         .copy =         snd_rme9652_capture_copy,
2409 };
2410
2411 static int snd_rme9652_create_pcm(struct snd_card *card,
2412                                   struct snd_rme9652 *rme9652)
2413 {
2414         struct snd_pcm *pcm;
2415         int err;
2416
2417         if ((err = snd_pcm_new(card,
2418                                rme9652->card_name,
2419                                0, 1, 1, &pcm)) < 0) {
2420                 return err;
2421         }
2422
2423         rme9652->pcm = pcm;
2424         pcm->private_data = rme9652;
2425         strcpy(pcm->name, rme9652->card_name);
2426
2427         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_rme9652_playback_ops);
2428         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_rme9652_capture_ops);
2429
2430         pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
2431
2432         return 0;
2433 }
2434
2435 static int snd_rme9652_create(struct snd_card *card,
2436                               struct snd_rme9652 *rme9652,
2437                               int precise_ptr)
2438 {
2439         struct pci_dev *pci = rme9652->pci;
2440         int err;
2441         int status;
2442         unsigned short rev;
2443
2444         rme9652->irq = -1;
2445         rme9652->card = card;
2446
2447         pci_read_config_word(rme9652->pci, PCI_CLASS_REVISION, &rev);
2448
2449         switch (rev & 0xff) {
2450         case 3:
2451         case 4:
2452         case 8:
2453         case 9:
2454                 break;
2455
2456         default:
2457                 /* who knows? */
2458                 return -ENODEV;
2459         }
2460
2461         if ((err = pci_enable_device(pci)) < 0)
2462                 return err;
2463
2464         spin_lock_init(&rme9652->lock);
2465
2466         if ((err = pci_request_regions(pci, "rme9652")) < 0)
2467                 return err;
2468         rme9652->port = pci_resource_start(pci, 0);
2469         rme9652->iobase = ioremap_nocache(rme9652->port, RME9652_IO_EXTENT);
2470         if (rme9652->iobase == NULL) {
2471                 snd_printk(KERN_ERR "unable to remap region 0x%lx-0x%lx\n", rme9652->port, rme9652->port + RME9652_IO_EXTENT - 1);
2472                 return -EBUSY;
2473         }
2474
2475         if (request_irq(pci->irq, snd_rme9652_interrupt, IRQF_SHARED,
2476                         KBUILD_MODNAME, rme9652)) {
2477                 snd_printk(KERN_ERR "unable to request IRQ %d\n", pci->irq);
2478                 return -EBUSY;
2479         }
2480         rme9652->irq = pci->irq;
2481         rme9652->precise_ptr = precise_ptr;
2482
2483         /* Determine the h/w rev level of the card. This seems like
2484            a particularly kludgy way to encode it, but its what RME
2485            chose to do, so we follow them ...
2486         */
2487
2488         status = rme9652_read(rme9652, RME9652_status_register);
2489         if (rme9652_decode_spdif_rate(status&RME9652_F) == 1) {
2490                 rme9652->hw_rev = 15;
2491         } else {
2492                 rme9652->hw_rev = 11;
2493         }
2494
2495         /* Differentiate between the standard Hammerfall, and the
2496            "Light", which does not have the expansion board. This
2497            method comes from information received from Mathhias
2498            Clausen at RME. Display the EEPROM and h/w revID where
2499            relevant.
2500         */
2501
2502         switch (rev) {
2503         case 8: /* original eprom */
2504                 strcpy(card->driver, "RME9636");
2505                 if (rme9652->hw_rev == 15) {
2506                         rme9652->card_name = "RME Digi9636 (Rev 1.5)";
2507                 } else {
2508                         rme9652->card_name = "RME Digi9636";
2509                 }
2510                 rme9652->ss_channels = RME9636_NCHANNELS;
2511                 break;
2512         case 9: /* W36_G EPROM */
2513                 strcpy(card->driver, "RME9636");
2514                 rme9652->card_name = "RME Digi9636 (Rev G)";
2515                 rme9652->ss_channels = RME9636_NCHANNELS;
2516                 break;
2517         case 4: /* W52_G EPROM */
2518                 strcpy(card->driver, "RME9652");
2519                 rme9652->card_name = "RME Digi9652 (Rev G)";
2520                 rme9652->ss_channels = RME9652_NCHANNELS;
2521                 break;
2522         case 3: /* original eprom */
2523                 strcpy(card->driver, "RME9652");
2524                 if (rme9652->hw_rev == 15) {
2525                         rme9652->card_name = "RME Digi9652 (Rev 1.5)";
2526                 } else {
2527                         rme9652->card_name = "RME Digi9652";
2528                 }
2529                 rme9652->ss_channels = RME9652_NCHANNELS;
2530                 break;
2531         }
2532
2533         rme9652->ds_channels = (rme9652->ss_channels - 2) / 2 + 2;
2534
2535         pci_set_master(rme9652->pci);
2536
2537         if ((err = snd_rme9652_initialize_memory(rme9652)) < 0) {
2538                 return err;
2539         }
2540
2541         if ((err = snd_rme9652_create_pcm(card, rme9652)) < 0) {
2542                 return err;
2543         }
2544
2545         if ((err = snd_rme9652_create_controls(card, rme9652)) < 0) {
2546                 return err;
2547         }
2548
2549         snd_rme9652_proc_init(rme9652);
2550
2551         rme9652->last_spdif_sample_rate = -1;
2552         rme9652->last_adat_sample_rate = -1;
2553         rme9652->playback_pid = -1;
2554         rme9652->capture_pid = -1;
2555         rme9652->capture_substream = NULL;
2556         rme9652->playback_substream = NULL;
2557
2558         snd_rme9652_set_defaults(rme9652);
2559
2560         if (rme9652->hw_rev == 15) {
2561                 rme9652_initialize_spdif_receiver (rme9652);
2562         }
2563
2564         return 0;
2565 }
2566
2567 static void snd_rme9652_card_free(struct snd_card *card)
2568 {
2569         struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) card->private_data;
2570
2571         if (rme9652)
2572                 snd_rme9652_free(rme9652);
2573 }
2574
2575 static int snd_rme9652_probe(struct pci_dev *pci,
2576                              const struct pci_device_id *pci_id)
2577 {
2578         static int dev;
2579         struct snd_rme9652 *rme9652;
2580         struct snd_card *card;
2581         int err;
2582
2583         if (dev >= SNDRV_CARDS)
2584                 return -ENODEV;
2585         if (!enable[dev]) {
2586                 dev++;
2587                 return -ENOENT;
2588         }
2589
2590         err = snd_card_create(index[dev], id[dev], THIS_MODULE,
2591                               sizeof(struct snd_rme9652), &card);
2592
2593         if (err < 0)
2594                 return err;
2595
2596         rme9652 = (struct snd_rme9652 *) card->private_data;
2597         card->private_free = snd_rme9652_card_free;
2598         rme9652->dev = dev;
2599         rme9652->pci = pci;
2600         snd_card_set_dev(card, &pci->dev);
2601
2602         if ((err = snd_rme9652_create(card, rme9652, precise_ptr[dev])) < 0) {
2603                 snd_card_free(card);
2604                 return err;
2605         }
2606
2607         strcpy(card->shortname, rme9652->card_name);
2608
2609         sprintf(card->longname, "%s at 0x%lx, irq %d",
2610                 card->shortname, rme9652->port, rme9652->irq);
2611
2612
2613         if ((err = snd_card_register(card)) < 0) {
2614                 snd_card_free(card);
2615                 return err;
2616         }
2617         pci_set_drvdata(pci, card);
2618         dev++;
2619         return 0;
2620 }
2621
2622 static void snd_rme9652_remove(struct pci_dev *pci)
2623 {
2624         snd_card_free(pci_get_drvdata(pci));
2625 }
2626
2627 static struct pci_driver rme9652_driver = {
2628         .name     = KBUILD_MODNAME,
2629         .id_table = snd_rme9652_ids,
2630         .probe    = snd_rme9652_probe,
2631         .remove   = snd_rme9652_remove,
2632 };
2633
2634 module_pci_driver(rme9652_driver);