2 * Driver for ADAU1701 SigmaDSP processor
4 * Copyright 2011 Analog Devices Inc.
5 * Author: Lars-Peter Clausen <lars@metafoo.de>
6 * based on an inital version by Cliff Cai <cliff.cai@analog.com>
8 * Licensed under the GPL-2 or later.
11 #include <linux/module.h>
12 #include <linux/init.h>
13 #include <linux/i2c.h>
14 #include <linux/delay.h>
15 #include <linux/slab.h>
17 #include <linux/of_gpio.h>
18 #include <linux/of_device.h>
19 #include <linux/regulator/consumer.h>
20 #include <linux/regmap.h>
21 #include <sound/core.h>
22 #include <sound/pcm.h>
23 #include <sound/pcm_params.h>
24 #include <sound/soc.h>
26 #include <asm/unaligned.h>
31 #define ADAU1701_SAFELOAD_DATA(i) (0x0810 + (i))
32 #define ADAU1701_SAFELOAD_ADDR(i) (0x0815 + (i))
34 #define ADAU1701_DSPCTRL 0x081c
35 #define ADAU1701_SEROCTL 0x081e
36 #define ADAU1701_SERICTL 0x081f
38 #define ADAU1701_AUXNPOW 0x0822
39 #define ADAU1701_PINCONF_0 0x0820
40 #define ADAU1701_PINCONF_1 0x0821
41 #define ADAU1701_AUXNPOW 0x0822
43 #define ADAU1701_OSCIPOW 0x0826
44 #define ADAU1701_DACSET 0x0827
46 #define ADAU1701_MAX_REGISTER 0x0828
48 #define ADAU1701_DSPCTRL_CR (1 << 2)
49 #define ADAU1701_DSPCTRL_DAM (1 << 3)
50 #define ADAU1701_DSPCTRL_ADM (1 << 4)
51 #define ADAU1701_DSPCTRL_IST (1 << 5)
52 #define ADAU1701_DSPCTRL_SR_48 0x00
53 #define ADAU1701_DSPCTRL_SR_96 0x01
54 #define ADAU1701_DSPCTRL_SR_192 0x02
55 #define ADAU1701_DSPCTRL_SR_MASK 0x03
57 #define ADAU1701_SEROCTL_INV_LRCLK 0x2000
58 #define ADAU1701_SEROCTL_INV_BCLK 0x1000
59 #define ADAU1701_SEROCTL_MASTER 0x0800
61 #define ADAU1701_SEROCTL_OBF16 0x0000
62 #define ADAU1701_SEROCTL_OBF8 0x0200
63 #define ADAU1701_SEROCTL_OBF4 0x0400
64 #define ADAU1701_SEROCTL_OBF2 0x0600
65 #define ADAU1701_SEROCTL_OBF_MASK 0x0600
67 #define ADAU1701_SEROCTL_OLF1024 0x0000
68 #define ADAU1701_SEROCTL_OLF512 0x0080
69 #define ADAU1701_SEROCTL_OLF256 0x0100
70 #define ADAU1701_SEROCTL_OLF_MASK 0x0180
72 #define ADAU1701_SEROCTL_MSB_DEALY1 0x0000
73 #define ADAU1701_SEROCTL_MSB_DEALY0 0x0004
74 #define ADAU1701_SEROCTL_MSB_DEALY8 0x0008
75 #define ADAU1701_SEROCTL_MSB_DEALY12 0x000c
76 #define ADAU1701_SEROCTL_MSB_DEALY16 0x0010
77 #define ADAU1701_SEROCTL_MSB_DEALY_MASK 0x001c
79 #define ADAU1701_SEROCTL_WORD_LEN_24 0x0000
80 #define ADAU1701_SEROCTL_WORD_LEN_20 0x0001
81 #define ADAU1701_SEROCTL_WORD_LEN_16 0x0002
82 #define ADAU1701_SEROCTL_WORD_LEN_MASK 0x0003
84 #define ADAU1701_AUXNPOW_VBPD 0x40
85 #define ADAU1701_AUXNPOW_VRPD 0x20
87 #define ADAU1701_SERICTL_I2S 0
88 #define ADAU1701_SERICTL_LEFTJ 1
89 #define ADAU1701_SERICTL_TDM 2
90 #define ADAU1701_SERICTL_RIGHTJ_24 3
91 #define ADAU1701_SERICTL_RIGHTJ_20 4
92 #define ADAU1701_SERICTL_RIGHTJ_18 5
93 #define ADAU1701_SERICTL_RIGHTJ_16 6
94 #define ADAU1701_SERICTL_MODE_MASK 7
95 #define ADAU1701_SERICTL_INV_BCLK BIT(3)
96 #define ADAU1701_SERICTL_INV_LRCLK BIT(4)
98 #define ADAU1701_OSCIPOW_OPD 0x04
99 #define ADAU1701_DACSET_DACINIT 1
101 #define ADAU1707_CLKDIV_UNSET (-1U)
103 #define ADAU1701_FIRMWARE "adau1701.bin"
105 static const char * const supply_names[] = {
111 int gpio_pll_mode[2];
112 unsigned int dai_fmt;
113 unsigned int pll_clkdiv;
115 struct regmap *regmap;
116 struct i2c_client *client;
119 struct sigmadsp *sigmadsp;
120 struct regulator_bulk_data supplies[ARRAY_SIZE(supply_names)];
123 static const struct snd_kcontrol_new adau1701_controls[] = {
124 SOC_SINGLE("Master Capture Switch", ADAU1701_DSPCTRL, 4, 1, 0),
127 static const struct snd_soc_dapm_widget adau1701_dapm_widgets[] = {
128 SND_SOC_DAPM_DAC("DAC0", "Playback", ADAU1701_AUXNPOW, 3, 1),
129 SND_SOC_DAPM_DAC("DAC1", "Playback", ADAU1701_AUXNPOW, 2, 1),
130 SND_SOC_DAPM_DAC("DAC2", "Playback", ADAU1701_AUXNPOW, 1, 1),
131 SND_SOC_DAPM_DAC("DAC3", "Playback", ADAU1701_AUXNPOW, 0, 1),
132 SND_SOC_DAPM_ADC("ADC", "Capture", ADAU1701_AUXNPOW, 7, 1),
134 SND_SOC_DAPM_OUTPUT("OUT0"),
135 SND_SOC_DAPM_OUTPUT("OUT1"),
136 SND_SOC_DAPM_OUTPUT("OUT2"),
137 SND_SOC_DAPM_OUTPUT("OUT3"),
138 SND_SOC_DAPM_INPUT("IN0"),
139 SND_SOC_DAPM_INPUT("IN1"),
142 static const struct snd_soc_dapm_route adau1701_dapm_routes[] = {
143 { "OUT0", NULL, "DAC0" },
144 { "OUT1", NULL, "DAC1" },
145 { "OUT2", NULL, "DAC2" },
146 { "OUT3", NULL, "DAC3" },
148 { "ADC", NULL, "IN0" },
149 { "ADC", NULL, "IN1" },
152 static unsigned int adau1701_register_size(struct device *dev,
156 case ADAU1701_PINCONF_0:
157 case ADAU1701_PINCONF_1:
159 case ADAU1701_DSPCTRL:
160 case ADAU1701_SEROCTL:
161 case ADAU1701_AUXNPOW:
162 case ADAU1701_OSCIPOW:
163 case ADAU1701_DACSET:
165 case ADAU1701_SERICTL:
169 dev_err(dev, "Unsupported register address: %d\n", reg);
173 static bool adau1701_volatile_reg(struct device *dev, unsigned int reg)
176 case ADAU1701_DACSET:
177 case ADAU1701_DSPCTRL:
184 static int adau1701_reg_write(void *context, unsigned int reg,
187 struct i2c_client *client = context;
193 size = adau1701_register_size(&client->dev, reg);
200 for (i = size + 1; i >= 2; --i) {
205 ret = i2c_master_send(client, buf, size + 2);
214 static int adau1701_reg_read(void *context, unsigned int reg,
220 uint8_t send_buf[2], recv_buf[3];
221 struct i2c_client *client = context;
222 struct i2c_msg msgs[2];
224 size = adau1701_register_size(&client->dev, reg);
228 send_buf[0] = reg >> 8;
229 send_buf[1] = reg & 0xff;
231 msgs[0].addr = client->addr;
232 msgs[0].len = sizeof(send_buf);
233 msgs[0].buf = send_buf;
236 msgs[1].addr = client->addr;
238 msgs[1].buf = recv_buf;
239 msgs[1].flags = I2C_M_RD;
241 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
244 else if (ret != ARRAY_SIZE(msgs))
249 for (i = 0; i < size; i++) {
251 *value |= recv_buf[i];
257 static int adau1701_safeload(struct sigmadsp *sigmadsp, unsigned int addr,
258 const uint8_t bytes[], size_t len)
260 struct i2c_client *client = to_i2c_client(sigmadsp->dev);
261 struct adau1701 *adau1701 = i2c_get_clientdata(client);
267 ret = regmap_read(adau1701->regmap, ADAU1701_DSPCTRL, &val);
271 if (val & ADAU1701_DSPCTRL_IST)
274 for (i = 0; i < len / 4; i++) {
275 put_unaligned_le16(ADAU1701_SAFELOAD_DATA(i), buf);
277 memcpy(buf + 3, bytes + i * 4, 4);
278 ret = i2c_master_send(client, buf, 7);
284 put_unaligned_le16(ADAU1701_SAFELOAD_ADDR(i), buf);
285 put_unaligned_le16(addr + i, buf + 2);
286 ret = i2c_master_send(client, buf, 4);
293 return regmap_update_bits(adau1701->regmap, ADAU1701_DSPCTRL,
294 ADAU1701_DSPCTRL_IST, ADAU1701_DSPCTRL_IST);
297 static const struct sigmadsp_ops adau1701_sigmadsp_ops = {
298 .safeload = adau1701_safeload,
301 static int adau1701_reset(struct snd_soc_codec *codec, unsigned int clkdiv,
304 struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec);
307 sigmadsp_reset(adau1701->sigmadsp);
309 if (clkdiv != ADAU1707_CLKDIV_UNSET &&
310 gpio_is_valid(adau1701->gpio_pll_mode[0]) &&
311 gpio_is_valid(adau1701->gpio_pll_mode[1])) {
314 gpio_set_value_cansleep(adau1701->gpio_pll_mode[0], 0);
315 gpio_set_value_cansleep(adau1701->gpio_pll_mode[1], 0);
318 gpio_set_value_cansleep(adau1701->gpio_pll_mode[0], 0);
319 gpio_set_value_cansleep(adau1701->gpio_pll_mode[1], 1);
322 gpio_set_value_cansleep(adau1701->gpio_pll_mode[0], 1);
323 gpio_set_value_cansleep(adau1701->gpio_pll_mode[1], 0);
325 case 0: /* fallback */
327 gpio_set_value_cansleep(adau1701->gpio_pll_mode[0], 1);
328 gpio_set_value_cansleep(adau1701->gpio_pll_mode[1], 1);
333 adau1701->pll_clkdiv = clkdiv;
335 if (gpio_is_valid(adau1701->gpio_nreset)) {
336 gpio_set_value_cansleep(adau1701->gpio_nreset, 0);
337 /* minimum reset time is 20ns */
339 gpio_set_value_cansleep(adau1701->gpio_nreset, 1);
340 /* power-up time may be as long as 85ms */
345 * Postpone the firmware download to a point in time when we
346 * know the correct PLL setup
348 if (clkdiv != ADAU1707_CLKDIV_UNSET) {
349 ret = sigmadsp_setup(adau1701->sigmadsp, rate);
351 dev_warn(codec->dev, "Failed to load firmware\n");
356 regmap_write(adau1701->regmap, ADAU1701_DACSET, ADAU1701_DACSET_DACINIT);
357 regmap_write(adau1701->regmap, ADAU1701_DSPCTRL, ADAU1701_DSPCTRL_CR);
359 regcache_mark_dirty(adau1701->regmap);
360 regcache_sync(adau1701->regmap);
365 static int adau1701_set_capture_pcm_format(struct snd_soc_codec *codec,
366 struct snd_pcm_hw_params *params)
368 struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec);
369 unsigned int mask = ADAU1701_SEROCTL_WORD_LEN_MASK;
372 switch (params_width(params)) {
374 val = ADAU1701_SEROCTL_WORD_LEN_16;
377 val = ADAU1701_SEROCTL_WORD_LEN_20;
380 val = ADAU1701_SEROCTL_WORD_LEN_24;
386 if (adau1701->dai_fmt == SND_SOC_DAIFMT_RIGHT_J) {
387 switch (params_width(params)) {
389 val |= ADAU1701_SEROCTL_MSB_DEALY16;
392 val |= ADAU1701_SEROCTL_MSB_DEALY12;
395 val |= ADAU1701_SEROCTL_MSB_DEALY8;
398 mask |= ADAU1701_SEROCTL_MSB_DEALY_MASK;
401 regmap_update_bits(adau1701->regmap, ADAU1701_SEROCTL, mask, val);
406 static int adau1701_set_playback_pcm_format(struct snd_soc_codec *codec,
407 struct snd_pcm_hw_params *params)
409 struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec);
412 if (adau1701->dai_fmt != SND_SOC_DAIFMT_RIGHT_J)
415 switch (params_width(params)) {
417 val = ADAU1701_SERICTL_RIGHTJ_16;
420 val = ADAU1701_SERICTL_RIGHTJ_20;
423 val = ADAU1701_SERICTL_RIGHTJ_24;
429 regmap_update_bits(adau1701->regmap, ADAU1701_SERICTL,
430 ADAU1701_SERICTL_MODE_MASK, val);
435 static int adau1701_hw_params(struct snd_pcm_substream *substream,
436 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
438 struct snd_soc_codec *codec = dai->codec;
439 struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec);
440 unsigned int clkdiv = adau1701->sysclk / params_rate(params);
445 * If the mclk/lrclk ratio changes, the chip needs updated PLL
446 * mode GPIO settings, and a full reset cycle, including a new
449 if (clkdiv != adau1701->pll_clkdiv) {
450 ret = adau1701_reset(codec, clkdiv, params_rate(params));
455 switch (params_rate(params)) {
457 val = ADAU1701_DSPCTRL_SR_192;
460 val = ADAU1701_DSPCTRL_SR_96;
463 val = ADAU1701_DSPCTRL_SR_48;
469 regmap_update_bits(adau1701->regmap, ADAU1701_DSPCTRL,
470 ADAU1701_DSPCTRL_SR_MASK, val);
472 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
473 return adau1701_set_playback_pcm_format(codec, params);
475 return adau1701_set_capture_pcm_format(codec, params);
478 static int adau1701_set_dai_fmt(struct snd_soc_dai *codec_dai,
481 struct snd_soc_codec *codec = codec_dai->codec;
482 struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec);
483 unsigned int serictl = 0x00, seroctl = 0x00;
486 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
487 case SND_SOC_DAIFMT_CBM_CFM:
488 /* master, 64-bits per sample, 1 frame per sample */
489 seroctl |= ADAU1701_SEROCTL_MASTER | ADAU1701_SEROCTL_OBF16
490 | ADAU1701_SEROCTL_OLF1024;
492 case SND_SOC_DAIFMT_CBS_CFS:
498 /* clock inversion */
499 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
500 case SND_SOC_DAIFMT_NB_NF:
501 invert_lrclk = false;
503 case SND_SOC_DAIFMT_NB_IF:
506 case SND_SOC_DAIFMT_IB_NF:
507 invert_lrclk = false;
508 serictl |= ADAU1701_SERICTL_INV_BCLK;
509 seroctl |= ADAU1701_SEROCTL_INV_BCLK;
511 case SND_SOC_DAIFMT_IB_IF:
513 serictl |= ADAU1701_SERICTL_INV_BCLK;
514 seroctl |= ADAU1701_SEROCTL_INV_BCLK;
520 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
521 case SND_SOC_DAIFMT_I2S:
523 case SND_SOC_DAIFMT_LEFT_J:
524 serictl |= ADAU1701_SERICTL_LEFTJ;
525 seroctl |= ADAU1701_SEROCTL_MSB_DEALY0;
526 invert_lrclk = !invert_lrclk;
528 case SND_SOC_DAIFMT_RIGHT_J:
529 serictl |= ADAU1701_SERICTL_RIGHTJ_24;
530 seroctl |= ADAU1701_SEROCTL_MSB_DEALY8;
531 invert_lrclk = !invert_lrclk;
538 seroctl |= ADAU1701_SEROCTL_INV_LRCLK;
539 serictl |= ADAU1701_SERICTL_INV_LRCLK;
542 adau1701->dai_fmt = fmt & SND_SOC_DAIFMT_FORMAT_MASK;
544 regmap_write(adau1701->regmap, ADAU1701_SERICTL, serictl);
545 regmap_update_bits(adau1701->regmap, ADAU1701_SEROCTL,
546 ~ADAU1701_SEROCTL_WORD_LEN_MASK, seroctl);
551 static int adau1701_set_bias_level(struct snd_soc_codec *codec,
552 enum snd_soc_bias_level level)
554 unsigned int mask = ADAU1701_AUXNPOW_VBPD | ADAU1701_AUXNPOW_VRPD;
555 struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec);
558 case SND_SOC_BIAS_ON:
560 case SND_SOC_BIAS_PREPARE:
562 case SND_SOC_BIAS_STANDBY:
563 /* Enable VREF and VREF buffer */
564 regmap_update_bits(adau1701->regmap,
565 ADAU1701_AUXNPOW, mask, 0x00);
567 case SND_SOC_BIAS_OFF:
568 /* Disable VREF and VREF buffer */
569 regmap_update_bits(adau1701->regmap,
570 ADAU1701_AUXNPOW, mask, mask);
577 static int adau1701_digital_mute(struct snd_soc_dai *dai, int mute)
579 struct snd_soc_codec *codec = dai->codec;
580 unsigned int mask = ADAU1701_DSPCTRL_DAM;
581 struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec);
589 regmap_update_bits(adau1701->regmap, ADAU1701_DSPCTRL, mask, val);
594 static int adau1701_set_sysclk(struct snd_soc_codec *codec, int clk_id,
595 int source, unsigned int freq, int dir)
598 struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec);
601 case ADAU1701_CLK_SRC_OSC:
604 case ADAU1701_CLK_SRC_MCLK:
605 val = ADAU1701_OSCIPOW_OPD;
611 regmap_update_bits(adau1701->regmap, ADAU1701_OSCIPOW,
612 ADAU1701_OSCIPOW_OPD, val);
613 adau1701->sysclk = freq;
618 static int adau1701_startup(struct snd_pcm_substream *substream,
619 struct snd_soc_dai *dai)
621 struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(dai->codec);
623 return sigmadsp_restrict_params(adau1701->sigmadsp, substream);
626 #define ADAU1701_RATES (SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 | \
627 SNDRV_PCM_RATE_192000)
629 #define ADAU1701_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
630 SNDRV_PCM_FMTBIT_S24_LE)
632 static const struct snd_soc_dai_ops adau1701_dai_ops = {
633 .set_fmt = adau1701_set_dai_fmt,
634 .hw_params = adau1701_hw_params,
635 .digital_mute = adau1701_digital_mute,
636 .startup = adau1701_startup,
639 static struct snd_soc_dai_driver adau1701_dai = {
642 .stream_name = "Playback",
645 .rates = ADAU1701_RATES,
646 .formats = ADAU1701_FORMATS,
649 .stream_name = "Capture",
652 .rates = ADAU1701_RATES,
653 .formats = ADAU1701_FORMATS,
655 .ops = &adau1701_dai_ops,
656 .symmetric_rates = 1,
660 static const struct of_device_id adau1701_dt_ids[] = {
661 { .compatible = "adi,adau1701", },
664 MODULE_DEVICE_TABLE(of, adau1701_dt_ids);
667 static int adau1701_probe(struct snd_soc_codec *codec)
671 struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec);
673 ret = sigmadsp_attach(adau1701->sigmadsp, &codec->component);
677 ret = regulator_bulk_enable(ARRAY_SIZE(adau1701->supplies),
680 dev_err(codec->dev, "Failed to enable regulators: %d\n", ret);
685 * Let the pll_clkdiv variable default to something that won't happen
686 * at runtime. That way, we can postpone the firmware download from
687 * adau1701_reset() to a point in time when we know the correct PLL
690 adau1701->pll_clkdiv = ADAU1707_CLKDIV_UNSET;
692 /* initalize with pre-configured pll mode settings */
693 ret = adau1701_reset(codec, adau1701->pll_clkdiv, 0);
695 goto exit_regulators_disable;
697 /* set up pin config */
699 for (i = 0; i < 6; i++)
700 val |= adau1701->pin_config[i] << (i * 4);
702 regmap_write(adau1701->regmap, ADAU1701_PINCONF_0, val);
705 for (i = 0; i < 6; i++)
706 val |= adau1701->pin_config[i + 6] << (i * 4);
708 regmap_write(adau1701->regmap, ADAU1701_PINCONF_1, val);
712 exit_regulators_disable:
714 regulator_bulk_disable(ARRAY_SIZE(adau1701->supplies), adau1701->supplies);
718 static int adau1701_remove(struct snd_soc_codec *codec)
720 struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec);
722 if (gpio_is_valid(adau1701->gpio_nreset))
723 gpio_set_value_cansleep(adau1701->gpio_nreset, 0);
725 regulator_bulk_disable(ARRAY_SIZE(adau1701->supplies), adau1701->supplies);
731 static int adau1701_suspend(struct snd_soc_codec *codec)
733 struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec);
735 regulator_bulk_disable(ARRAY_SIZE(adau1701->supplies),
741 static int adau1701_resume(struct snd_soc_codec *codec)
743 struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec);
746 ret = regulator_bulk_enable(ARRAY_SIZE(adau1701->supplies),
749 dev_err(codec->dev, "Failed to enable regulators: %d\n", ret);
753 return adau1701_reset(codec, adau1701->pll_clkdiv, 0);
756 #define adau1701_resume NULL
757 #define adau1701_suspend NULL
758 #endif /* CONFIG_PM */
760 static struct snd_soc_codec_driver adau1701_codec_drv = {
761 .probe = adau1701_probe,
762 .remove = adau1701_remove,
763 .resume = adau1701_resume,
764 .suspend = adau1701_suspend,
765 .set_bias_level = adau1701_set_bias_level,
766 .idle_bias_off = true,
768 .controls = adau1701_controls,
769 .num_controls = ARRAY_SIZE(adau1701_controls),
770 .dapm_widgets = adau1701_dapm_widgets,
771 .num_dapm_widgets = ARRAY_SIZE(adau1701_dapm_widgets),
772 .dapm_routes = adau1701_dapm_routes,
773 .num_dapm_routes = ARRAY_SIZE(adau1701_dapm_routes),
775 .set_sysclk = adau1701_set_sysclk,
778 static const struct regmap_config adau1701_regmap = {
781 .max_register = ADAU1701_MAX_REGISTER,
782 .cache_type = REGCACHE_RBTREE,
783 .volatile_reg = adau1701_volatile_reg,
784 .reg_write = adau1701_reg_write,
785 .reg_read = adau1701_reg_read,
788 static int adau1701_i2c_probe(struct i2c_client *client,
789 const struct i2c_device_id *id)
791 struct adau1701 *adau1701;
792 struct device *dev = &client->dev;
793 int gpio_nreset = -EINVAL;
794 int gpio_pll_mode[2] = { -EINVAL, -EINVAL };
797 adau1701 = devm_kzalloc(dev, sizeof(*adau1701), GFP_KERNEL);
801 for (i = 0; i < ARRAY_SIZE(supply_names); i++)
802 adau1701->supplies[i].supply = supply_names[i];
804 ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(adau1701->supplies),
807 dev_err(dev, "Failed to get regulators: %d\n", ret);
811 ret = regulator_bulk_enable(ARRAY_SIZE(adau1701->supplies),
814 dev_err(dev, "Failed to enable regulators: %d\n", ret);
818 adau1701->client = client;
819 adau1701->regmap = devm_regmap_init(dev, NULL, client,
821 if (IS_ERR(adau1701->regmap)) {
822 ret = PTR_ERR(adau1701->regmap);
823 goto exit_regulators_disable;
828 gpio_nreset = of_get_named_gpio(dev->of_node, "reset-gpio", 0);
829 if (gpio_nreset < 0 && gpio_nreset != -ENOENT) {
831 goto exit_regulators_disable;
834 gpio_pll_mode[0] = of_get_named_gpio(dev->of_node,
835 "adi,pll-mode-gpios", 0);
836 if (gpio_pll_mode[0] < 0 && gpio_pll_mode[0] != -ENOENT) {
837 ret = gpio_pll_mode[0];
838 goto exit_regulators_disable;
841 gpio_pll_mode[1] = of_get_named_gpio(dev->of_node,
842 "adi,pll-mode-gpios", 1);
843 if (gpio_pll_mode[1] < 0 && gpio_pll_mode[1] != -ENOENT) {
844 ret = gpio_pll_mode[1];
845 goto exit_regulators_disable;
848 of_property_read_u32(dev->of_node, "adi,pll-clkdiv",
849 &adau1701->pll_clkdiv);
851 of_property_read_u8_array(dev->of_node, "adi,pin-config",
852 adau1701->pin_config,
853 ARRAY_SIZE(adau1701->pin_config));
856 if (gpio_is_valid(gpio_nreset)) {
857 ret = devm_gpio_request_one(dev, gpio_nreset, GPIOF_OUT_INIT_LOW,
860 goto exit_regulators_disable;
863 if (gpio_is_valid(gpio_pll_mode[0]) &&
864 gpio_is_valid(gpio_pll_mode[1])) {
865 ret = devm_gpio_request_one(dev, gpio_pll_mode[0],
867 "ADAU1701 PLL mode 0");
869 goto exit_regulators_disable;
871 ret = devm_gpio_request_one(dev, gpio_pll_mode[1],
873 "ADAU1701 PLL mode 1");
875 goto exit_regulators_disable;
878 adau1701->gpio_nreset = gpio_nreset;
879 adau1701->gpio_pll_mode[0] = gpio_pll_mode[0];
880 adau1701->gpio_pll_mode[1] = gpio_pll_mode[1];
882 i2c_set_clientdata(client, adau1701);
884 adau1701->sigmadsp = devm_sigmadsp_init_i2c(client,
885 &adau1701_sigmadsp_ops, ADAU1701_FIRMWARE);
886 if (IS_ERR(adau1701->sigmadsp)) {
887 ret = PTR_ERR(adau1701->sigmadsp);
888 goto exit_regulators_disable;
891 ret = snd_soc_register_codec(&client->dev, &adau1701_codec_drv,
894 exit_regulators_disable:
896 regulator_bulk_disable(ARRAY_SIZE(adau1701->supplies), adau1701->supplies);
900 static int adau1701_i2c_remove(struct i2c_client *client)
902 snd_soc_unregister_codec(&client->dev);
906 static const struct i2c_device_id adau1701_i2c_id[] = {
913 MODULE_DEVICE_TABLE(i2c, adau1701_i2c_id);
915 static struct i2c_driver adau1701_i2c_driver = {
918 .of_match_table = of_match_ptr(adau1701_dt_ids),
920 .probe = adau1701_i2c_probe,
921 .remove = adau1701_i2c_remove,
922 .id_table = adau1701_i2c_id,
925 module_i2c_driver(adau1701_i2c_driver);
927 MODULE_DESCRIPTION("ASoC ADAU1701 SigmaDSP driver");
928 MODULE_AUTHOR("Cliff Cai <cliff.cai@analog.com>");
929 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
930 MODULE_LICENSE("GPL");