2 * CS4270 ALSA SoC (ASoC) codec driver
4 * Author: Timur Tabi <timur@freescale.com>
6 * Copyright 2007-2009 Freescale Semiconductor, Inc. This file is licensed
7 * under the terms of the GNU General Public License version 2. This
8 * program is licensed "as is" without any warranty of any kind, whether
11 * This is an ASoC device driver for the Cirrus Logic CS4270 codec.
13 * Current features/limitations:
15 * - Software mode is supported. Stand-alone mode is not supported.
16 * - Only I2C is supported, not SPI
17 * - Support for master and slave mode
18 * - The machine driver's 'startup' function must call
19 * cs4270_set_dai_sysclk() with the value of MCLK.
20 * - Only I2S and left-justified modes are supported
21 * - Power management is supported
24 #include <linux/module.h>
25 #include <linux/slab.h>
26 #include <sound/core.h>
27 #include <sound/soc.h>
28 #include <sound/initval.h>
29 #include <linux/i2c.h>
30 #include <linux/delay.h>
31 #include <linux/regulator/consumer.h>
32 #include <linux/of_device.h>
35 * The codec isn't really big-endian or little-endian, since the I2S
36 * interface requires data to be sent serially with the MSbit first.
37 * However, to support BE and LE I2S devices, we specify both here. That
38 * way, ALSA will always match the bit patterns.
40 #define CS4270_FORMATS (SNDRV_PCM_FMTBIT_S8 | \
41 SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE | \
42 SNDRV_PCM_FMTBIT_S18_3LE | SNDRV_PCM_FMTBIT_S18_3BE | \
43 SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S20_3BE | \
44 SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_3BE | \
45 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S24_BE)
47 /* CS4270 registers addresses */
48 #define CS4270_CHIPID 0x01 /* Chip ID */
49 #define CS4270_PWRCTL 0x02 /* Power Control */
50 #define CS4270_MODE 0x03 /* Mode Control */
51 #define CS4270_FORMAT 0x04 /* Serial Format, ADC/DAC Control */
52 #define CS4270_TRANS 0x05 /* Transition Control */
53 #define CS4270_MUTE 0x06 /* Mute Control */
54 #define CS4270_VOLA 0x07 /* DAC Channel A Volume Control */
55 #define CS4270_VOLB 0x08 /* DAC Channel B Volume Control */
57 #define CS4270_FIRSTREG 0x01
58 #define CS4270_LASTREG 0x08
59 #define CS4270_NUMREGS (CS4270_LASTREG - CS4270_FIRSTREG + 1)
60 #define CS4270_I2C_INCR 0x80
62 /* Bit masks for the CS4270 registers */
63 #define CS4270_CHIPID_ID 0xF0
64 #define CS4270_CHIPID_REV 0x0F
65 #define CS4270_PWRCTL_FREEZE 0x80
66 #define CS4270_PWRCTL_PDN_ADC 0x20
67 #define CS4270_PWRCTL_PDN_DAC 0x02
68 #define CS4270_PWRCTL_PDN 0x01
69 #define CS4270_PWRCTL_PDN_ALL \
70 (CS4270_PWRCTL_PDN_ADC | CS4270_PWRCTL_PDN_DAC | CS4270_PWRCTL_PDN)
71 #define CS4270_MODE_SPEED_MASK 0x30
72 #define CS4270_MODE_1X 0x00
73 #define CS4270_MODE_2X 0x10
74 #define CS4270_MODE_4X 0x20
75 #define CS4270_MODE_SLAVE 0x30
76 #define CS4270_MODE_DIV_MASK 0x0E
77 #define CS4270_MODE_DIV1 0x00
78 #define CS4270_MODE_DIV15 0x02
79 #define CS4270_MODE_DIV2 0x04
80 #define CS4270_MODE_DIV3 0x06
81 #define CS4270_MODE_DIV4 0x08
82 #define CS4270_MODE_POPGUARD 0x01
83 #define CS4270_FORMAT_FREEZE_A 0x80
84 #define CS4270_FORMAT_FREEZE_B 0x40
85 #define CS4270_FORMAT_LOOPBACK 0x20
86 #define CS4270_FORMAT_DAC_MASK 0x18
87 #define CS4270_FORMAT_DAC_LJ 0x00
88 #define CS4270_FORMAT_DAC_I2S 0x08
89 #define CS4270_FORMAT_DAC_RJ16 0x18
90 #define CS4270_FORMAT_DAC_RJ24 0x10
91 #define CS4270_FORMAT_ADC_MASK 0x01
92 #define CS4270_FORMAT_ADC_LJ 0x00
93 #define CS4270_FORMAT_ADC_I2S 0x01
94 #define CS4270_TRANS_ONE_VOL 0x80
95 #define CS4270_TRANS_SOFT 0x40
96 #define CS4270_TRANS_ZERO 0x20
97 #define CS4270_TRANS_INV_ADC_A 0x08
98 #define CS4270_TRANS_INV_ADC_B 0x10
99 #define CS4270_TRANS_INV_DAC_A 0x02
100 #define CS4270_TRANS_INV_DAC_B 0x04
101 #define CS4270_TRANS_DEEMPH 0x01
102 #define CS4270_MUTE_AUTO 0x20
103 #define CS4270_MUTE_ADC_A 0x08
104 #define CS4270_MUTE_ADC_B 0x10
105 #define CS4270_MUTE_POLARITY 0x04
106 #define CS4270_MUTE_DAC_A 0x01
107 #define CS4270_MUTE_DAC_B 0x02
109 /* Power-on default values for the registers
111 * This array contains the power-on default values of the registers, with the
112 * exception of the "CHIPID" register (01h). The lower four bits of that
113 * register contain the hardware revision, so it is treated as volatile.
115 * Also note that on the CS4270, the first readable register is 1, but ASoC
116 * assumes the first register is 0. Therfore, the array must have an entry for
117 * register 0, but we use cs4270_reg_is_readable() to tell ASoC that it can't
120 static const u8 cs4270_default_reg_cache[CS4270_LASTREG + 1] = {
121 0x00, 0x00, 0x00, 0x30, 0x00, 0x60, 0x20, 0x00, 0x00
124 static const char *supply_names[] = {
128 /* Private data for the CS4270 */
129 struct cs4270_private {
130 enum snd_soc_control_type control_type;
131 unsigned int mclk; /* Input frequency of the MCLK pin */
132 unsigned int mode; /* The mode (I2S or left-justified) */
133 unsigned int slave_mode;
134 unsigned int manual_mute;
136 /* power domain regulators */
137 struct regulator_bulk_data supplies[ARRAY_SIZE(supply_names)];
141 * struct cs4270_mode_ratios - clock ratio tables
142 * @ratio: the ratio of MCLK to the sample rate
143 * @speed_mode: the Speed Mode bits to set in the Mode Control register for
145 * @mclk: the Ratio Select bits to set in the Mode Control register for this
148 * The data for this chart is taken from Table 5 of the CS4270 reference
151 * This table is used to determine how to program the Mode Control register.
152 * It is also used by cs4270_set_dai_sysclk() to tell ALSA which sampling
153 * rates the CS4270 currently supports.
155 * @speed_mode is the corresponding bit pattern to be written to the
156 * MODE bits of the Mode Control Register
158 * @mclk is the corresponding bit pattern to be wirten to the MCLK bits of
159 * the Mode Control Register.
161 * In situations where a single ratio is represented by multiple speed
162 * modes, we favor the slowest speed. E.g, for a ratio of 128, we pick
163 * double-speed instead of quad-speed. However, the CS4270 errata states
164 * that divide-By-1.5 can cause failures, so we avoid that mode where
167 * Errata: There is an errata for the CS4270 where divide-by-1.5 does not
168 * work if Vd is 3.3V. If this effects you, select the
169 * CONFIG_SND_SOC_CS4270_VD33_ERRATA Kconfig option, and the driver will
170 * never select any sample rates that require divide-by-1.5.
172 struct cs4270_mode_ratios {
178 static struct cs4270_mode_ratios cs4270_mode_ratios[] = {
179 {64, CS4270_MODE_4X, CS4270_MODE_DIV1},
180 #ifndef CONFIG_SND_SOC_CS4270_VD33_ERRATA
181 {96, CS4270_MODE_4X, CS4270_MODE_DIV15},
183 {128, CS4270_MODE_2X, CS4270_MODE_DIV1},
184 {192, CS4270_MODE_4X, CS4270_MODE_DIV3},
185 {256, CS4270_MODE_1X, CS4270_MODE_DIV1},
186 {384, CS4270_MODE_2X, CS4270_MODE_DIV3},
187 {512, CS4270_MODE_1X, CS4270_MODE_DIV2},
188 {768, CS4270_MODE_1X, CS4270_MODE_DIV3},
189 {1024, CS4270_MODE_1X, CS4270_MODE_DIV4}
192 /* The number of MCLK/LRCK ratios supported by the CS4270 */
193 #define NUM_MCLK_RATIOS ARRAY_SIZE(cs4270_mode_ratios)
195 static int cs4270_reg_is_readable(struct snd_soc_codec *codec, unsigned int reg)
197 return (reg >= CS4270_FIRSTREG) && (reg <= CS4270_LASTREG);
200 static int cs4270_reg_is_volatile(struct snd_soc_codec *codec, unsigned int reg)
202 /* Unreadable registers are considered volatile */
203 if ((reg < CS4270_FIRSTREG) || (reg > CS4270_LASTREG))
206 return reg == CS4270_CHIPID;
210 * cs4270_set_dai_sysclk - determine the CS4270 samples rates.
211 * @codec_dai: the codec DAI
212 * @clk_id: the clock ID (ignored)
213 * @freq: the MCLK input frequency
214 * @dir: the clock direction (ignored)
216 * This function is used to tell the codec driver what the input MCLK
219 * The value of MCLK is used to determine which sample rates are supported
220 * by the CS4270. The ratio of MCLK / Fs must be equal to one of nine
221 * supported values - 64, 96, 128, 192, 256, 384, 512, 768, and 1024.
223 * This function calculates the nine ratios and determines which ones match
224 * a standard sample rate. If there's a match, then it is added to the list
225 * of supported sample rates.
227 * This function must be called by the machine driver's 'startup' function,
228 * otherwise the list of supported sample rates will not be available in
231 * For setups with variable MCLKs, pass 0 as 'freq' argument. This will cause
232 * theoretically possible sample rates to be enabled. Call it again with a
233 * proper value set one the external clock is set (most probably you would do
234 * that from a machine's driver 'hw_param' hook.
236 static int cs4270_set_dai_sysclk(struct snd_soc_dai *codec_dai,
237 int clk_id, unsigned int freq, int dir)
239 struct snd_soc_codec *codec = codec_dai->codec;
240 struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
247 * cs4270_set_dai_fmt - configure the codec for the selected audio format
248 * @codec_dai: the codec DAI
249 * @format: a SND_SOC_DAIFMT_x value indicating the data format
251 * This function takes a bitmask of SND_SOC_DAIFMT_x bits and programs the
254 * Currently, this function only supports SND_SOC_DAIFMT_I2S and
255 * SND_SOC_DAIFMT_LEFT_J. The CS4270 codec also supports right-justified
256 * data for playback only, but ASoC currently does not support different
257 * formats for playback vs. record.
259 static int cs4270_set_dai_fmt(struct snd_soc_dai *codec_dai,
262 struct snd_soc_codec *codec = codec_dai->codec;
263 struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
266 switch (format & SND_SOC_DAIFMT_FORMAT_MASK) {
267 case SND_SOC_DAIFMT_I2S:
268 case SND_SOC_DAIFMT_LEFT_J:
269 cs4270->mode = format & SND_SOC_DAIFMT_FORMAT_MASK;
272 dev_err(codec->dev, "invalid dai format\n");
276 /* set master/slave audio interface */
277 switch (format & SND_SOC_DAIFMT_MASTER_MASK) {
278 case SND_SOC_DAIFMT_CBS_CFS:
279 cs4270->slave_mode = 1;
281 case SND_SOC_DAIFMT_CBM_CFM:
282 cs4270->slave_mode = 0;
285 /* all other modes are unsupported by the hardware */
286 dev_err(codec->dev, "Unknown master/slave configuration\n");
294 * cs4270_hw_params - program the CS4270 with the given hardware parameters.
295 * @substream: the audio stream
296 * @params: the hardware parameters to set
297 * @dai: the SOC DAI (ignored)
299 * This function programs the hardware with the values provided.
300 * Specifically, the sample rate and the data format.
302 * The .ops functions are used to provide board-specific data, like input
303 * frequencies, to this driver. This function takes that information,
304 * combines it with the hardware parameters provided, and programs the
305 * hardware accordingly.
307 static int cs4270_hw_params(struct snd_pcm_substream *substream,
308 struct snd_pcm_hw_params *params,
309 struct snd_soc_dai *dai)
311 struct snd_soc_codec *codec = dai->codec;
312 struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
319 /* Figure out which MCLK/LRCK ratio to use */
321 rate = params_rate(params); /* Sampling rate, in Hz */
322 ratio = cs4270->mclk / rate; /* MCLK/LRCK ratio */
324 for (i = 0; i < NUM_MCLK_RATIOS; i++) {
325 if (cs4270_mode_ratios[i].ratio == ratio)
329 if (i == NUM_MCLK_RATIOS) {
330 /* We did not find a matching ratio */
331 dev_err(codec->dev, "could not find matching ratio\n");
335 /* Set the sample rate */
337 reg = snd_soc_read(codec, CS4270_MODE);
338 reg &= ~(CS4270_MODE_SPEED_MASK | CS4270_MODE_DIV_MASK);
339 reg |= cs4270_mode_ratios[i].mclk;
341 if (cs4270->slave_mode)
342 reg |= CS4270_MODE_SLAVE;
344 reg |= cs4270_mode_ratios[i].speed_mode;
346 ret = snd_soc_write(codec, CS4270_MODE, reg);
348 dev_err(codec->dev, "i2c write failed\n");
352 /* Set the DAI format */
354 reg = snd_soc_read(codec, CS4270_FORMAT);
355 reg &= ~(CS4270_FORMAT_DAC_MASK | CS4270_FORMAT_ADC_MASK);
357 switch (cs4270->mode) {
358 case SND_SOC_DAIFMT_I2S:
359 reg |= CS4270_FORMAT_DAC_I2S | CS4270_FORMAT_ADC_I2S;
361 case SND_SOC_DAIFMT_LEFT_J:
362 reg |= CS4270_FORMAT_DAC_LJ | CS4270_FORMAT_ADC_LJ;
365 dev_err(codec->dev, "unknown dai format\n");
369 ret = snd_soc_write(codec, CS4270_FORMAT, reg);
371 dev_err(codec->dev, "i2c write failed\n");
379 * cs4270_dai_mute - enable/disable the CS4270 external mute
381 * @mute: 0 = disable mute, 1 = enable mute
383 * This function toggles the mute bits in the MUTE register. The CS4270's
384 * mute capability is intended for external muting circuitry, so if the
385 * board does not have the MUTEA or MUTEB pins connected to such circuitry,
386 * then this function will do nothing.
388 static int cs4270_dai_mute(struct snd_soc_dai *dai, int mute)
390 struct snd_soc_codec *codec = dai->codec;
391 struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
394 reg6 = snd_soc_read(codec, CS4270_MUTE);
397 reg6 |= CS4270_MUTE_DAC_A | CS4270_MUTE_DAC_B;
399 reg6 &= ~(CS4270_MUTE_DAC_A | CS4270_MUTE_DAC_B);
400 reg6 |= cs4270->manual_mute;
403 return snd_soc_write(codec, CS4270_MUTE, reg6);
407 * cs4270_soc_put_mute - put callback for the 'Master Playback switch'
409 * @kcontrol: mixer control
410 * @ucontrol: control element information
412 * This function basically passes the arguments on to the generic
413 * snd_soc_put_volsw() function and saves the mute information in
414 * our private data structure. This is because we want to prevent
415 * cs4270_dai_mute() neglecting the user's decision to manually
416 * mute the codec's output.
418 * Returns 0 for success.
420 static int cs4270_soc_put_mute(struct snd_kcontrol *kcontrol,
421 struct snd_ctl_elem_value *ucontrol)
423 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
424 struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
425 int left = !ucontrol->value.integer.value[0];
426 int right = !ucontrol->value.integer.value[1];
428 cs4270->manual_mute = (left ? CS4270_MUTE_DAC_A : 0) |
429 (right ? CS4270_MUTE_DAC_B : 0);
431 return snd_soc_put_volsw(kcontrol, ucontrol);
434 /* A list of non-DAPM controls that the CS4270 supports */
435 static const struct snd_kcontrol_new cs4270_snd_controls[] = {
436 SOC_DOUBLE_R("Master Playback Volume",
437 CS4270_VOLA, CS4270_VOLB, 0, 0xFF, 1),
438 SOC_SINGLE("Digital Sidetone Switch", CS4270_FORMAT, 5, 1, 0),
439 SOC_SINGLE("Soft Ramp Switch", CS4270_TRANS, 6, 1, 0),
440 SOC_SINGLE("Zero Cross Switch", CS4270_TRANS, 5, 1, 0),
441 SOC_SINGLE("De-emphasis filter", CS4270_TRANS, 0, 1, 0),
442 SOC_SINGLE("Popguard Switch", CS4270_MODE, 0, 1, 1),
443 SOC_SINGLE("Auto-Mute Switch", CS4270_MUTE, 5, 1, 0),
444 SOC_DOUBLE("Master Capture Switch", CS4270_MUTE, 3, 4, 1, 1),
445 SOC_DOUBLE_EXT("Master Playback Switch", CS4270_MUTE, 0, 1, 1, 1,
446 snd_soc_get_volsw, cs4270_soc_put_mute),
449 static const struct snd_soc_dai_ops cs4270_dai_ops = {
450 .hw_params = cs4270_hw_params,
451 .set_sysclk = cs4270_set_dai_sysclk,
452 .set_fmt = cs4270_set_dai_fmt,
453 .digital_mute = cs4270_dai_mute,
456 static struct snd_soc_dai_driver cs4270_dai = {
457 .name = "cs4270-hifi",
459 .stream_name = "Playback",
462 .rates = SNDRV_PCM_RATE_CONTINUOUS,
465 .formats = CS4270_FORMATS,
468 .stream_name = "Capture",
471 .rates = SNDRV_PCM_RATE_CONTINUOUS,
474 .formats = CS4270_FORMATS,
476 .ops = &cs4270_dai_ops,
480 * cs4270_probe - ASoC probe function
481 * @pdev: platform device
483 * This function is called when ASoC has all the pieces it needs to
484 * instantiate a sound driver.
486 static int cs4270_probe(struct snd_soc_codec *codec)
488 struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
491 /* Tell ASoC what kind of I/O to use to read the registers. ASoC will
492 * then do the I2C transactions itself.
494 ret = snd_soc_codec_set_cache_io(codec, 8, 8, cs4270->control_type);
496 dev_err(codec->dev, "failed to set cache I/O (ret=%i)\n", ret);
500 /* Disable auto-mute. This feature appears to be buggy. In some
501 * situations, auto-mute will not deactivate when it should, so we want
502 * this feature disabled by default. An application (e.g. alsactl) can
503 * re-enabled it by using the controls.
505 ret = snd_soc_update_bits(codec, CS4270_MUTE, CS4270_MUTE_AUTO, 0);
507 dev_err(codec->dev, "i2c write failed\n");
511 /* Disable automatic volume control. The hardware enables, and it
512 * causes volume change commands to be delayed, sometimes until after
513 * playback has started. An application (e.g. alsactl) can
514 * re-enabled it by using the controls.
516 ret = snd_soc_update_bits(codec, CS4270_TRANS,
517 CS4270_TRANS_SOFT | CS4270_TRANS_ZERO, 0);
519 dev_err(codec->dev, "i2c write failed\n");
523 /* Add the non-DAPM controls */
524 ret = snd_soc_add_codec_controls(codec, cs4270_snd_controls,
525 ARRAY_SIZE(cs4270_snd_controls));
527 dev_err(codec->dev, "failed to add controls\n");
531 /* get the power supply regulators */
532 for (i = 0; i < ARRAY_SIZE(supply_names); i++)
533 cs4270->supplies[i].supply = supply_names[i];
535 ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(cs4270->supplies),
540 ret = regulator_bulk_enable(ARRAY_SIZE(cs4270->supplies),
543 goto error_free_regulators;
547 error_free_regulators:
548 regulator_bulk_free(ARRAY_SIZE(cs4270->supplies),
555 * cs4270_remove - ASoC remove function
556 * @pdev: platform device
558 * This function is the counterpart to cs4270_probe().
560 static int cs4270_remove(struct snd_soc_codec *codec)
562 struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
564 regulator_bulk_disable(ARRAY_SIZE(cs4270->supplies), cs4270->supplies);
565 regulator_bulk_free(ARRAY_SIZE(cs4270->supplies), cs4270->supplies);
572 /* This suspend/resume implementation can handle both - a simple standby
573 * where the codec remains powered, and a full suspend, where the voltage
574 * domain the codec is connected to is teared down and/or any other hardware
575 * reset condition is asserted.
577 * The codec's own power saving features are enabled in the suspend callback,
578 * and all registers are written back to the hardware when resuming.
581 static int cs4270_soc_suspend(struct snd_soc_codec *codec)
583 struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
586 reg = snd_soc_read(codec, CS4270_PWRCTL) | CS4270_PWRCTL_PDN_ALL;
590 ret = snd_soc_write(codec, CS4270_PWRCTL, reg);
594 regulator_bulk_disable(ARRAY_SIZE(cs4270->supplies),
600 static int cs4270_soc_resume(struct snd_soc_codec *codec)
602 struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
605 ret = regulator_bulk_enable(ARRAY_SIZE(cs4270->supplies),
610 /* In case the device was put to hard reset during sleep, we need to
611 * wait 500ns here before any I2C communication. */
614 /* first restore the entire register cache ... */
615 snd_soc_cache_sync(codec);
617 /* ... then disable the power-down bits */
618 reg = snd_soc_read(codec, CS4270_PWRCTL);
619 reg &= ~CS4270_PWRCTL_PDN_ALL;
621 return snd_soc_write(codec, CS4270_PWRCTL, reg);
624 #define cs4270_soc_suspend NULL
625 #define cs4270_soc_resume NULL
626 #endif /* CONFIG_PM */
629 * ASoC codec driver structure
631 static const struct snd_soc_codec_driver soc_codec_device_cs4270 = {
632 .probe = cs4270_probe,
633 .remove = cs4270_remove,
634 .suspend = cs4270_soc_suspend,
635 .resume = cs4270_soc_resume,
636 .volatile_register = cs4270_reg_is_volatile,
637 .readable_register = cs4270_reg_is_readable,
638 .reg_cache_size = CS4270_LASTREG + 1,
639 .reg_word_size = sizeof(u8),
640 .reg_cache_default = cs4270_default_reg_cache,
644 * cs4270_of_match - the device tree bindings
646 static const struct of_device_id cs4270_of_match[] = {
647 { .compatible = "cirrus,cs4270", },
650 MODULE_DEVICE_TABLE(of, cs4270_of_match);
653 * cs4270_i2c_probe - initialize the I2C interface of the CS4270
654 * @i2c_client: the I2C client object
655 * @id: the I2C device ID (ignored)
657 * This function is called whenever the I2C subsystem finds a device that
658 * matches the device ID given via a prior call to i2c_add_driver().
660 static int cs4270_i2c_probe(struct i2c_client *i2c_client,
661 const struct i2c_device_id *id)
663 struct cs4270_private *cs4270;
666 /* Verify that we have a CS4270 */
668 ret = i2c_smbus_read_byte_data(i2c_client, CS4270_CHIPID);
670 dev_err(&i2c_client->dev, "failed to read i2c at addr %X\n",
674 /* The top four bits of the chip ID should be 1100. */
675 if ((ret & 0xF0) != 0xC0) {
676 dev_err(&i2c_client->dev, "device at addr %X is not a CS4270\n",
681 dev_info(&i2c_client->dev, "found device at i2c address %X\n",
683 dev_info(&i2c_client->dev, "hardware revision %X\n", ret & 0xF);
685 cs4270 = devm_kzalloc(&i2c_client->dev, sizeof(struct cs4270_private),
688 dev_err(&i2c_client->dev, "could not allocate codec\n");
692 i2c_set_clientdata(i2c_client, cs4270);
693 cs4270->control_type = SND_SOC_I2C;
695 ret = snd_soc_register_codec(&i2c_client->dev,
696 &soc_codec_device_cs4270, &cs4270_dai, 1);
701 * cs4270_i2c_remove - remove an I2C device
702 * @i2c_client: the I2C client object
704 * This function is the counterpart to cs4270_i2c_probe().
706 static int cs4270_i2c_remove(struct i2c_client *i2c_client)
708 snd_soc_unregister_codec(&i2c_client->dev);
713 * cs4270_id - I2C device IDs supported by this driver
715 static const struct i2c_device_id cs4270_id[] = {
719 MODULE_DEVICE_TABLE(i2c, cs4270_id);
722 * cs4270_i2c_driver - I2C device identification
724 * This structure tells the I2C subsystem how to identify and support a
725 * given I2C device type.
727 static struct i2c_driver cs4270_i2c_driver = {
730 .owner = THIS_MODULE,
731 .of_match_table = cs4270_of_match,
733 .id_table = cs4270_id,
734 .probe = cs4270_i2c_probe,
735 .remove = cs4270_i2c_remove,
738 static int __init cs4270_init(void)
740 return i2c_add_driver(&cs4270_i2c_driver);
742 module_init(cs4270_init);
744 static void __exit cs4270_exit(void)
746 i2c_del_driver(&cs4270_i2c_driver);
748 module_exit(cs4270_exit);
750 MODULE_AUTHOR("Timur Tabi <timur@freescale.com>");
751 MODULE_DESCRIPTION("Cirrus Logic CS4270 ALSA SoC Codec Driver");
752 MODULE_LICENSE("GPL");