sound/soc/codecs/rt5616.c

   1 /*
   2  * rt5616.c  --  RT5616 ALSA SoC audio codec driver
   3  *
   4  * Copyright 2015 Realtek Semiconductor Corp.
   5  * Author: Bard Liao <bardliao@realtek.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  */
  11
  12 #include <linux/module.h>
  13 #include <linux/moduleparam.h>
  14 #include <linux/init.h>
  15 #include <linux/clk.h>
  16 #include <linux/delay.h>
  17 #include <linux/pm.h>
  18 #include <linux/i2c.h>
  19 #include <linux/platform_device.h>
  20 #include <linux/spi/spi.h>
  21 #include <sound/core.h>
  22 #include <sound/pcm.h>
  23 #include <sound/pcm_params.h>
  24 #include <sound/soc.h>
  25 #include <sound/soc-dapm.h>
  26 #include <sound/initval.h>
  27 #include <sound/tlv.h>
  28
  29 #include "rl6231.h"
  30 #include "rt5616.h"
  31
  32 #define RT5616_PR_RANGE_BASE (0xff + 1)
  33 #define RT5616_PR_SPACING 0x100
  34
  35 #define RT5616_PR_BASE (RT5616_PR_RANGE_BASE + (0 * RT5616_PR_SPACING))
  36
  37 static const struct regmap_range_cfg rt5616_ranges[] = {
  38         {
  39                 .name = "PR",
  40                 .range_min = RT5616_PR_BASE,
  41                 .range_max = RT5616_PR_BASE + 0xf8,
  42                 .selector_reg = RT5616_PRIV_INDEX,
  43                 .selector_mask = 0xff,
  44                 .selector_shift = 0x0,
  45                 .window_start = RT5616_PRIV_DATA,
  46                 .window_len = 0x1,
  47         },
  48 };
  49
  50 static const struct reg_sequence init_list[] = {
  51         {RT5616_PR_BASE + 0x3d, 0x3e00},
  52         {RT5616_PR_BASE + 0x25, 0x6110},
  53         {RT5616_PR_BASE + 0x20, 0x611f},
  54         {RT5616_PR_BASE + 0x21, 0x4040},
  55         {RT5616_PR_BASE + 0x23, 0x0004},
  56 };
  57
  58 #define RT5616_INIT_REG_LEN ARRAY_SIZE(init_list)
  59
  60 static const struct reg_default rt5616_reg[] = {
  61         { 0x00, 0x0021 },
  62         { 0x02, 0xc8c8 },
  63         { 0x03, 0xc8c8 },
  64         { 0x05, 0x0000 },
  65         { 0x0d, 0x0000 },
  66         { 0x0f, 0x0808 },
  67         { 0x19, 0xafaf },
  68         { 0x1c, 0x2f2f },
  69         { 0x1e, 0x0000 },
  70         { 0x27, 0x7860 },
  71         { 0x29, 0x8080 },
  72         { 0x2a, 0x5252 },
  73         { 0x3b, 0x0000 },
  74         { 0x3c, 0x006f },
  75         { 0x3d, 0x0000 },
  76         { 0x3e, 0x006f },
  77         { 0x45, 0x6000 },
  78         { 0x4d, 0x0000 },
  79         { 0x4e, 0x0000 },
  80         { 0x4f, 0x0279 },
  81         { 0x50, 0x0000 },
  82         { 0x51, 0x0000 },
  83         { 0x52, 0x0279 },
  84         { 0x53, 0xf000 },
  85         { 0x61, 0x0000 },
  86         { 0x62, 0x0000 },
  87         { 0x63, 0x00c0 },
  88         { 0x64, 0x0000 },
  89         { 0x65, 0x0000 },
  90         { 0x66, 0x0000 },
  91         { 0x70, 0x8000 },
  92         { 0x73, 0x1104 },
  93         { 0x74, 0x0c00 },
  94         { 0x80, 0x0000 },
  95         { 0x81, 0x0000 },
  96         { 0x82, 0x0000 },
  97         { 0x8b, 0x0600 },
  98         { 0x8e, 0x0004 },
  99         { 0x8f, 0x1100 },
 100         { 0x90, 0x0000 },
 101         { 0x91, 0x0000 },
 102         { 0x92, 0x0000 },
 103         { 0x93, 0x2000 },
 104         { 0x94, 0x0200 },
 105         { 0x95, 0x0000 },
 106         { 0xb0, 0x2080 },
 107         { 0xb1, 0x0000 },
 108         { 0xb2, 0x0000 },
 109         { 0xb4, 0x2206 },
 110         { 0xb5, 0x1f00 },
 111         { 0xb6, 0x0000 },
 112         { 0xb7, 0x0000 },
 113         { 0xbb, 0x0000 },
 114         { 0xbc, 0x0000 },
 115         { 0xbd, 0x0000 },
 116         { 0xbe, 0x0000 },
 117         { 0xbf, 0x0000 },
 118         { 0xc0, 0x0100 },
 119         { 0xc1, 0x0000 },
 120         { 0xc2, 0x0000 },
 121         { 0xc8, 0x0000 },
 122         { 0xc9, 0x0000 },
 123         { 0xca, 0x0000 },
 124         { 0xcb, 0x0000 },
 125         { 0xcc, 0x0000 },
 126         { 0xcd, 0x0000 },
 127         { 0xce, 0x0000 },
 128         { 0xcf, 0x0013 },
 129         { 0xd0, 0x0680 },
 130         { 0xd1, 0x1c17 },
 131         { 0xd3, 0xb320 },
 132         { 0xd4, 0x0000 },
 133         { 0xd6, 0x0000 },
 134         { 0xd7, 0x0000 },
 135         { 0xd9, 0x0809 },
 136         { 0xda, 0x0000 },
 137         { 0xfa, 0x0010 },
 138         { 0xfb, 0x0000 },
 139         { 0xfc, 0x0000 },
 140         { 0xfe, 0x10ec },
 141         { 0xff, 0x6281 },
 142 };
 143
 144 struct rt5616_priv {
 145         struct snd_soc_codec *codec;
 146         struct delayed_work patch_work;
 147         struct regmap *regmap;
 148         struct clk *mclk;
 149
 150         int sysclk;
 151         int sysclk_src;
 152         int lrck[RT5616_AIFS];
 153         int bclk[RT5616_AIFS];
 154         int master[RT5616_AIFS];
 155
 156         int pll_src;
 157         int pll_in;
 158         int pll_out;
 159
 160 };
 161
 162 static bool rt5616_volatile_register(struct device *dev, unsigned int reg)
 163 {
 164         int i;
 165
 166         for (i = 0; i < ARRAY_SIZE(rt5616_ranges); i++) {
 167                 if (reg >= rt5616_ranges[i].range_min &&
 168                     reg <= rt5616_ranges[i].range_max)
 169                         return true;
 170         }
 171
 172         switch (reg) {
 173         case RT5616_RESET:
 174         case RT5616_PRIV_DATA:
 175         case RT5616_EQ_CTRL1:
 176         case RT5616_DRC_AGC_1:
 177         case RT5616_IRQ_CTRL2:
 178         case RT5616_INT_IRQ_ST:
 179         case RT5616_PGM_REG_ARR1:
 180         case RT5616_PGM_REG_ARR3:
 181         case RT5616_VENDOR_ID:
 182         case RT5616_DEVICE_ID:
 183                 return true;
 184         default:
 185                 return false;
 186         }
 187 }
 188
 189 static bool rt5616_readable_register(struct device *dev, unsigned int reg)
 190 {
 191         int i;
 192
 193         for (i = 0; i < ARRAY_SIZE(rt5616_ranges); i++) {
 194                 if (reg >= rt5616_ranges[i].range_min &&
 195                     reg <= rt5616_ranges[i].range_max)
 196                         return true;
 197         }
 198
 199         switch (reg) {
 200         case RT5616_RESET:
 201         case RT5616_VERSION_ID:
 202         case RT5616_VENDOR_ID:
 203         case RT5616_DEVICE_ID:
 204         case RT5616_HP_VOL:
 205         case RT5616_LOUT_CTRL1:
 206         case RT5616_LOUT_CTRL2:
 207         case RT5616_IN1_IN2:
 208         case RT5616_INL1_INR1_VOL:
 209         case RT5616_DAC1_DIG_VOL:
 210         case RT5616_ADC_DIG_VOL:
 211         case RT5616_ADC_BST_VOL:
 212         case RT5616_STO1_ADC_MIXER:
 213         case RT5616_AD_DA_MIXER:
 214         case RT5616_STO_DAC_MIXER:
 215         case RT5616_REC_L1_MIXER:
 216         case RT5616_REC_L2_MIXER:
 217         case RT5616_REC_R1_MIXER:
 218         case RT5616_REC_R2_MIXER:
 219         case RT5616_HPO_MIXER:
 220         case RT5616_OUT_L1_MIXER:
 221         case RT5616_OUT_L2_MIXER:
 222         case RT5616_OUT_L3_MIXER:
 223         case RT5616_OUT_R1_MIXER:
 224         case RT5616_OUT_R2_MIXER:
 225         case RT5616_OUT_R3_MIXER:
 226         case RT5616_LOUT_MIXER:
 227         case RT5616_PWR_DIG1:
 228         case RT5616_PWR_DIG2:
 229         case RT5616_PWR_ANLG1:
 230         case RT5616_PWR_ANLG2:
 231         case RT5616_PWR_MIXER:
 232         case RT5616_PWR_VOL:
 233         case RT5616_PRIV_INDEX:
 234         case RT5616_PRIV_DATA:
 235         case RT5616_I2S1_SDP:
 236         case RT5616_ADDA_CLK1:
 237         case RT5616_ADDA_CLK2:
 238         case RT5616_GLB_CLK:
 239         case RT5616_PLL_CTRL1:
 240         case RT5616_PLL_CTRL2:
 241         case RT5616_HP_OVCD:
 242         case RT5616_DEPOP_M1:
 243         case RT5616_DEPOP_M2:
 244         case RT5616_DEPOP_M3:
 245         case RT5616_CHARGE_PUMP:
 246         case RT5616_PV_DET_SPK_G:
 247         case RT5616_MICBIAS:
 248         case RT5616_A_JD_CTL1:
 249         case RT5616_A_JD_CTL2:
 250         case RT5616_EQ_CTRL1:
 251         case RT5616_EQ_CTRL2:
 252         case RT5616_WIND_FILTER:
 253         case RT5616_DRC_AGC_1:
 254         case RT5616_DRC_AGC_2:
 255         case RT5616_DRC_AGC_3:
 256         case RT5616_SVOL_ZC:
 257         case RT5616_JD_CTRL1:
 258         case RT5616_JD_CTRL2:
 259         case RT5616_IRQ_CTRL1:
 260         case RT5616_IRQ_CTRL2:
 261         case RT5616_INT_IRQ_ST:
 262         case RT5616_GPIO_CTRL1:
 263         case RT5616_GPIO_CTRL2:
 264         case RT5616_GPIO_CTRL3:
 265         case RT5616_PGM_REG_ARR1:
 266         case RT5616_PGM_REG_ARR2:
 267         case RT5616_PGM_REG_ARR3:
 268         case RT5616_PGM_REG_ARR4:
 269         case RT5616_PGM_REG_ARR5:
 270         case RT5616_SCB_FUNC:
 271         case RT5616_SCB_CTRL:
 272         case RT5616_BASE_BACK:
 273         case RT5616_MP3_PLUS1:
 274         case RT5616_MP3_PLUS2:
 275         case RT5616_ADJ_HPF_CTRL1:
 276         case RT5616_ADJ_HPF_CTRL2:
 277         case RT5616_HP_CALIB_AMP_DET:
 278         case RT5616_HP_CALIB2:
 279         case RT5616_SV_ZCD1:
 280         case RT5616_SV_ZCD2:
 281         case RT5616_D_MISC:
 282         case RT5616_DUMMY2:
 283         case RT5616_DUMMY3:
 284                 return true;
 285         default:
 286                 return false;
 287         }
 288 }
 289
 290 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
 291 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
 292 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
 293 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
 294 static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
 295
 296 /* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
 297 static unsigned int bst_tlv[] = {
 298         TLV_DB_RANGE_HEAD(7),
 299         0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
 300         1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
 301         2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
 302         3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
 303         6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
 304         7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
 305         8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0),
 306 };
 307
 308 static const struct snd_kcontrol_new rt5616_snd_controls[] = {
 309         /* Headphone Output Volume */
 310         SOC_DOUBLE("HP Playback Switch", RT5616_HP_VOL,
 311                    RT5616_L_MUTE_SFT, RT5616_R_MUTE_SFT, 1, 1),
 312         SOC_DOUBLE_TLV("HP Playback Volume", RT5616_HP_VOL,
 313                        RT5616_L_VOL_SFT, RT5616_R_VOL_SFT, 39, 1, out_vol_tlv),
 314         /* OUTPUT Control */
 315         SOC_DOUBLE("OUT Playback Switch", RT5616_LOUT_CTRL1,
 316                    RT5616_L_MUTE_SFT, RT5616_R_MUTE_SFT, 1, 1),
 317         SOC_DOUBLE("OUT Channel Switch", RT5616_LOUT_CTRL1,
 318                    RT5616_VOL_L_SFT, RT5616_VOL_R_SFT, 1, 1),
 319         SOC_DOUBLE_TLV("OUT Playback Volume", RT5616_LOUT_CTRL1,
 320                        RT5616_L_VOL_SFT, RT5616_R_VOL_SFT, 39, 1, out_vol_tlv),
 321
 322         /* DAC Digital Volume */
 323         SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5616_DAC1_DIG_VOL,
 324                        RT5616_L_VOL_SFT, RT5616_R_VOL_SFT,
 325                        175, 0, dac_vol_tlv),
 326         /* IN1/IN2 Control */
 327         SOC_SINGLE_TLV("IN1 Boost Volume", RT5616_IN1_IN2,
 328                        RT5616_BST_SFT1, 8, 0, bst_tlv),
 329         SOC_SINGLE_TLV("IN2 Boost Volume", RT5616_IN1_IN2,
 330                        RT5616_BST_SFT2, 8, 0, bst_tlv),
 331         /* INL/INR Volume Control */
 332         SOC_DOUBLE_TLV("IN Capture Volume", RT5616_INL1_INR1_VOL,
 333                        RT5616_INL_VOL_SFT, RT5616_INR_VOL_SFT,
 334                        31, 1, in_vol_tlv),
 335         /* ADC Digital Volume Control */
 336         SOC_DOUBLE("ADC Capture Switch", RT5616_ADC_DIG_VOL,
 337                    RT5616_L_MUTE_SFT, RT5616_R_MUTE_SFT, 1, 1),
 338         SOC_DOUBLE_TLV("ADC Capture Volume", RT5616_ADC_DIG_VOL,
 339                        RT5616_L_VOL_SFT, RT5616_R_VOL_SFT,
 340                        127, 0, adc_vol_tlv),
 341
 342         /* ADC Boost Volume Control */
 343         SOC_DOUBLE_TLV("ADC Boost Volume", RT5616_ADC_BST_VOL,
 344                        RT5616_ADC_L_BST_SFT, RT5616_ADC_R_BST_SFT,
 345                        3, 0, adc_bst_tlv),
 346 };
 347
 348 static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source,
 349                                struct snd_soc_dapm_widget *sink)
 350 {
 351         unsigned int val;
 352
 353         val = snd_soc_read(snd_soc_dapm_to_codec(source->dapm), RT5616_GLB_CLK);
 354         val &= RT5616_SCLK_SRC_MASK;
 355         if (val == RT5616_SCLK_SRC_PLL1)
 356                 return 1;
 357         else
 358                 return 0;
 359 }
 360
 361 /* Digital Mixer */
 362 static const struct snd_kcontrol_new rt5616_sto1_adc_l_mix[] = {
 363         SOC_DAPM_SINGLE("ADC1 Switch", RT5616_STO1_ADC_MIXER,
 364                         RT5616_M_STO1_ADC_L1_SFT, 1, 1),
 365 };
 366
 367 static const struct snd_kcontrol_new rt5616_sto1_adc_r_mix[] = {
 368         SOC_DAPM_SINGLE("ADC1 Switch", RT5616_STO1_ADC_MIXER,
 369                         RT5616_M_STO1_ADC_R1_SFT, 1, 1),
 370 };
 371
 372 static const struct snd_kcontrol_new rt5616_dac_l_mix[] = {
 373         SOC_DAPM_SINGLE("Stereo ADC Switch", RT5616_AD_DA_MIXER,
 374                         RT5616_M_ADCMIX_L_SFT, 1, 1),
 375         SOC_DAPM_SINGLE("INF1 Switch", RT5616_AD_DA_MIXER,
 376                         RT5616_M_IF1_DAC_L_SFT, 1, 1),
 377 };
 378
 379 static const struct snd_kcontrol_new rt5616_dac_r_mix[] = {
 380         SOC_DAPM_SINGLE("Stereo ADC Switch", RT5616_AD_DA_MIXER,
 381                         RT5616_M_ADCMIX_R_SFT, 1, 1),
 382         SOC_DAPM_SINGLE("INF1 Switch", RT5616_AD_DA_MIXER,
 383                         RT5616_M_IF1_DAC_R_SFT, 1, 1),
 384 };
 385
 386 static const struct snd_kcontrol_new rt5616_sto_dac_l_mix[] = {
 387         SOC_DAPM_SINGLE("DAC L1 Switch", RT5616_STO_DAC_MIXER,
 388                         RT5616_M_DAC_L1_MIXL_SFT, 1, 1),
 389         SOC_DAPM_SINGLE("DAC R1 Switch", RT5616_STO_DAC_MIXER,
 390                         RT5616_M_DAC_R1_MIXL_SFT, 1, 1),
 391 };
 392
 393 static const struct snd_kcontrol_new rt5616_sto_dac_r_mix[] = {
 394         SOC_DAPM_SINGLE("DAC R1 Switch", RT5616_STO_DAC_MIXER,
 395                         RT5616_M_DAC_R1_MIXR_SFT, 1, 1),
 396         SOC_DAPM_SINGLE("DAC L1 Switch", RT5616_STO_DAC_MIXER,
 397                         RT5616_M_DAC_L1_MIXR_SFT, 1, 1),
 398 };
 399
 400 /* Analog Input Mixer */
 401 static const struct snd_kcontrol_new rt5616_rec_l_mix[] = {
 402         SOC_DAPM_SINGLE("INL1 Switch", RT5616_REC_L2_MIXER,
 403                         RT5616_M_IN1_L_RM_L_SFT, 1, 1),
 404         SOC_DAPM_SINGLE("BST2 Switch", RT5616_REC_L2_MIXER,
 405                         RT5616_M_BST2_RM_L_SFT, 1, 1),
 406         SOC_DAPM_SINGLE("BST1 Switch", RT5616_REC_L2_MIXER,
 407                         RT5616_M_BST1_RM_L_SFT, 1, 1),
 408 };
 409
 410 static const struct snd_kcontrol_new rt5616_rec_r_mix[] = {
 411         SOC_DAPM_SINGLE("INR1 Switch", RT5616_REC_R2_MIXER,
 412                         RT5616_M_IN1_R_RM_R_SFT, 1, 1),
 413         SOC_DAPM_SINGLE("BST2 Switch", RT5616_REC_R2_MIXER,
 414                         RT5616_M_BST2_RM_R_SFT, 1, 1),
 415         SOC_DAPM_SINGLE("BST1 Switch", RT5616_REC_R2_MIXER,
 416                         RT5616_M_BST1_RM_R_SFT, 1, 1),
 417 };
 418
 419 /* Analog Output Mixer */
 420
 421 static const struct snd_kcontrol_new rt5616_out_l_mix[] = {
 422         SOC_DAPM_SINGLE("BST1 Switch", RT5616_OUT_L3_MIXER,
 423                         RT5616_M_BST1_OM_L_SFT, 1, 1),
 424         SOC_DAPM_SINGLE("BST2 Switch", RT5616_OUT_L3_MIXER,
 425                         RT5616_M_BST2_OM_L_SFT, 1, 1),
 426         SOC_DAPM_SINGLE("INL1 Switch", RT5616_OUT_L3_MIXER,
 427                         RT5616_M_IN1_L_OM_L_SFT, 1, 1),
 428         SOC_DAPM_SINGLE("REC MIXL Switch", RT5616_OUT_L3_MIXER,
 429                         RT5616_M_RM_L_OM_L_SFT, 1, 1),
 430         SOC_DAPM_SINGLE("DAC L1 Switch", RT5616_OUT_L3_MIXER,
 431                         RT5616_M_DAC_L1_OM_L_SFT, 1, 1),
 432 };
 433
 434 static const struct snd_kcontrol_new rt5616_out_r_mix[] = {
 435         SOC_DAPM_SINGLE("BST2 Switch", RT5616_OUT_R3_MIXER,
 436                         RT5616_M_BST2_OM_R_SFT, 1, 1),
 437         SOC_DAPM_SINGLE("BST1 Switch", RT5616_OUT_R3_MIXER,
 438                         RT5616_M_BST1_OM_R_SFT, 1, 1),
 439         SOC_DAPM_SINGLE("INR1 Switch", RT5616_OUT_R3_MIXER,
 440                         RT5616_M_IN1_R_OM_R_SFT, 1, 1),
 441         SOC_DAPM_SINGLE("REC MIXR Switch", RT5616_OUT_R3_MIXER,
 442                         RT5616_M_RM_R_OM_R_SFT, 1, 1),
 443         SOC_DAPM_SINGLE("DAC R1 Switch", RT5616_OUT_R3_MIXER,
 444                         RT5616_M_DAC_R1_OM_R_SFT, 1, 1),
 445 };
 446
 447 static const struct snd_kcontrol_new rt5616_hpo_mix[] = {
 448         SOC_DAPM_SINGLE("DAC1 Switch", RT5616_HPO_MIXER,
 449                         RT5616_M_DAC1_HM_SFT, 1, 1),
 450         SOC_DAPM_SINGLE("HPVOL Switch", RT5616_HPO_MIXER,
 451                         RT5616_M_HPVOL_HM_SFT, 1, 1),
 452 };
 453
 454 static const struct snd_kcontrol_new rt5616_lout_mix[] = {
 455         SOC_DAPM_SINGLE("DAC L1 Switch", RT5616_LOUT_MIXER,
 456                         RT5616_M_DAC_L1_LM_SFT, 1, 1),
 457         SOC_DAPM_SINGLE("DAC R1 Switch", RT5616_LOUT_MIXER,
 458                         RT5616_M_DAC_R1_LM_SFT, 1, 1),
 459         SOC_DAPM_SINGLE("OUTVOL L Switch", RT5616_LOUT_MIXER,
 460                         RT5616_M_OV_L_LM_SFT, 1, 1),
 461         SOC_DAPM_SINGLE("OUTVOL R Switch", RT5616_LOUT_MIXER,
 462                         RT5616_M_OV_R_LM_SFT, 1, 1),
 463 };
 464
 465 static int rt5616_adc_event(struct snd_soc_dapm_widget *w,
 466                             struct snd_kcontrol *kcontrol, int event)
 467 {
 468         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
 469
 470         switch (event) {
 471         case SND_SOC_DAPM_POST_PMU:
 472                 snd_soc_update_bits(codec, RT5616_ADC_DIG_VOL,
 473                                     RT5616_L_MUTE | RT5616_R_MUTE, 0);
 474                 break;
 475
 476         case SND_SOC_DAPM_POST_PMD:
 477                 snd_soc_update_bits(codec, RT5616_ADC_DIG_VOL,
 478                                     RT5616_L_MUTE | RT5616_R_MUTE,
 479                                     RT5616_L_MUTE | RT5616_R_MUTE);
 480                 break;
 481
 482         default:
 483                 return 0;
 484         }
 485
 486         return 0;
 487 }
 488
 489 static int rt5616_charge_pump_event(struct snd_soc_dapm_widget *w,
 490                                     struct snd_kcontrol *kcontrol, int event)
 491 {
 492         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
 493
 494         switch (event) {
 495         case SND_SOC_DAPM_POST_PMU:
 496                 /* depop parameters */
 497                 snd_soc_update_bits(codec, RT5616_DEPOP_M2,
 498                                     RT5616_DEPOP_MASK, RT5616_DEPOP_MAN);
 499                 snd_soc_update_bits(codec, RT5616_DEPOP_M1,
 500                                     RT5616_HP_CP_MASK | RT5616_HP_SG_MASK |
 501                                     RT5616_HP_CB_MASK, RT5616_HP_CP_PU |
 502                                     RT5616_HP_SG_DIS | RT5616_HP_CB_PU);
 503                 snd_soc_write(codec, RT5616_PR_BASE +
 504                               RT5616_HP_DCC_INT1, 0x9f00);
 505                 /* headphone amp power on */
 506                 snd_soc_update_bits(codec, RT5616_PWR_ANLG1,
 507                                     RT5616_PWR_FV1 | RT5616_PWR_FV2, 0);
 508                 snd_soc_update_bits(codec, RT5616_PWR_VOL,
 509                                     RT5616_PWR_HV_L | RT5616_PWR_HV_R,
 510                                     RT5616_PWR_HV_L | RT5616_PWR_HV_R);
 511                 snd_soc_update_bits(codec, RT5616_PWR_ANLG1,
 512                                     RT5616_PWR_HP_L | RT5616_PWR_HP_R |
 513                                     RT5616_PWR_HA, RT5616_PWR_HP_L |
 514                                     RT5616_PWR_HP_R | RT5616_PWR_HA);
 515                 msleep(50);
 516                 snd_soc_update_bits(codec, RT5616_PWR_ANLG1,
 517                                     RT5616_PWR_FV1 | RT5616_PWR_FV2,
 518                                     RT5616_PWR_FV1 | RT5616_PWR_FV2);
 519
 520                 snd_soc_update_bits(codec, RT5616_CHARGE_PUMP,
 521                                     RT5616_PM_HP_MASK, RT5616_PM_HP_HV);
 522                 snd_soc_update_bits(codec, RT5616_PR_BASE +
 523                                     RT5616_CHOP_DAC_ADC, 0x0200, 0x0200);
 524                 snd_soc_update_bits(codec, RT5616_DEPOP_M1,
 525                                     RT5616_HP_CO_MASK | RT5616_HP_SG_MASK,
 526                                     RT5616_HP_CO_EN | RT5616_HP_SG_EN);
 527                 break;
 528         case SND_SOC_DAPM_PRE_PMD:
 529                 snd_soc_update_bits(codec, RT5616_PR_BASE +
 530                                     RT5616_CHOP_DAC_ADC, 0x0200, 0x0);
 531                 snd_soc_update_bits(codec, RT5616_DEPOP_M1,
 532                                     RT5616_HP_SG_MASK | RT5616_HP_L_SMT_MASK |
 533                                     RT5616_HP_R_SMT_MASK, RT5616_HP_SG_DIS |
 534                                     RT5616_HP_L_SMT_DIS | RT5616_HP_R_SMT_DIS);
 535                 /* headphone amp power down */
 536                 snd_soc_update_bits(codec, RT5616_DEPOP_M1,
 537                                     RT5616_SMT_TRIG_MASK |
 538                                     RT5616_HP_CD_PD_MASK | RT5616_HP_CO_MASK |
 539                                     RT5616_HP_CP_MASK | RT5616_HP_SG_MASK |
 540                                     RT5616_HP_CB_MASK,
 541                                     RT5616_SMT_TRIG_DIS | RT5616_HP_CD_PD_EN |
 542                                     RT5616_HP_CO_DIS | RT5616_HP_CP_PD |
 543                                     RT5616_HP_SG_EN | RT5616_HP_CB_PD);
 544                 snd_soc_update_bits(codec, RT5616_PWR_ANLG1,
 545                                     RT5616_PWR_HP_L | RT5616_PWR_HP_R |
 546                                     RT5616_PWR_HA, 0);
 547                 break;
 548         default:
 549                 return 0;
 550         }
 551
 552         return 0;
 553 }
 554
 555 static int rt5616_hp_event(struct snd_soc_dapm_widget *w,
 556                            struct snd_kcontrol *kcontrol, int event)
 557 {
 558         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
 559
 560         switch (event) {
 561         case SND_SOC_DAPM_POST_PMU:
 562                 /* headphone unmute sequence */
 563                 snd_soc_update_bits(codec, RT5616_DEPOP_M3,
 564                                     RT5616_CP_FQ1_MASK | RT5616_CP_FQ2_MASK |
 565                                     RT5616_CP_FQ3_MASK,
 566                                     RT5616_CP_FQ_192_KHZ << RT5616_CP_FQ1_SFT |
 567                                     RT5616_CP_FQ_12_KHZ << RT5616_CP_FQ2_SFT |
 568                                     RT5616_CP_FQ_192_KHZ << RT5616_CP_FQ3_SFT);
 569                 snd_soc_write(codec, RT5616_PR_BASE +
 570                               RT5616_MAMP_INT_REG2, 0xfc00);
 571                 snd_soc_update_bits(codec, RT5616_DEPOP_M1,
 572                                     RT5616_SMT_TRIG_MASK, RT5616_SMT_TRIG_EN);
 573                 snd_soc_update_bits(codec, RT5616_DEPOP_M1,
 574                                     RT5616_RSTN_MASK, RT5616_RSTN_EN);
 575                 snd_soc_update_bits(codec, RT5616_DEPOP_M1,
 576                                     RT5616_RSTN_MASK | RT5616_HP_L_SMT_MASK |
 577                                     RT5616_HP_R_SMT_MASK, RT5616_RSTN_DIS |
 578                                     RT5616_HP_L_SMT_EN | RT5616_HP_R_SMT_EN);
 579                 snd_soc_update_bits(codec, RT5616_HP_VOL,
 580                                     RT5616_L_MUTE | RT5616_R_MUTE, 0);
 581                 msleep(100);
 582                 snd_soc_update_bits(codec, RT5616_DEPOP_M1,
 583                                     RT5616_HP_SG_MASK | RT5616_HP_L_SMT_MASK |
 584                                     RT5616_HP_R_SMT_MASK, RT5616_HP_SG_DIS |
 585                                     RT5616_HP_L_SMT_DIS | RT5616_HP_R_SMT_DIS);
 586                 msleep(20);
 587                 snd_soc_update_bits(codec, RT5616_HP_CALIB_AMP_DET,
 588                                     RT5616_HPD_PS_MASK, RT5616_HPD_PS_EN);
 589                 break;
 590
 591         case SND_SOC_DAPM_PRE_PMD:
 592                 /* headphone mute sequence */
 593                 snd_soc_update_bits(codec, RT5616_DEPOP_M3,
 594                                     RT5616_CP_FQ1_MASK | RT5616_CP_FQ2_MASK |
 595                                     RT5616_CP_FQ3_MASK,
 596                                     RT5616_CP_FQ_96_KHZ << RT5616_CP_FQ1_SFT |
 597                                     RT5616_CP_FQ_12_KHZ << RT5616_CP_FQ2_SFT |
 598                                     RT5616_CP_FQ_96_KHZ << RT5616_CP_FQ3_SFT);
 599                 snd_soc_write(codec, RT5616_PR_BASE +
 600                               RT5616_MAMP_INT_REG2, 0xfc00);
 601                 snd_soc_update_bits(codec, RT5616_DEPOP_M1,
 602                                     RT5616_HP_SG_MASK, RT5616_HP_SG_EN);
 603                 snd_soc_update_bits(codec, RT5616_DEPOP_M1,
 604                                     RT5616_RSTP_MASK, RT5616_RSTP_EN);
 605                 snd_soc_update_bits(codec, RT5616_DEPOP_M1,
 606                                     RT5616_RSTP_MASK | RT5616_HP_L_SMT_MASK |
 607                                     RT5616_HP_R_SMT_MASK, RT5616_RSTP_DIS |
 608                                     RT5616_HP_L_SMT_EN | RT5616_HP_R_SMT_EN);
 609                 snd_soc_update_bits(codec, RT5616_HP_CALIB_AMP_DET,
 610                                     RT5616_HPD_PS_MASK, RT5616_HPD_PS_DIS);
 611                 msleep(90);
 612                 snd_soc_update_bits(codec, RT5616_HP_VOL,
 613                                     RT5616_L_MUTE | RT5616_R_MUTE,
 614                                     RT5616_L_MUTE | RT5616_R_MUTE);
 615                 msleep(30);
 616                 break;
 617
 618         default:
 619                 return 0;
 620         }
 621
 622         return 0;
 623 }
 624
 625 static int rt5616_lout_event(struct snd_soc_dapm_widget *w,
 626                              struct snd_kcontrol *kcontrol, int event)
 627 {
 628         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
 629
 630         switch (event) {
 631         case SND_SOC_DAPM_POST_PMU:
 632                 snd_soc_update_bits(codec, RT5616_PWR_ANLG1,
 633                                     RT5616_PWR_LM, RT5616_PWR_LM);
 634                 snd_soc_update_bits(codec, RT5616_LOUT_CTRL1,
 635                                     RT5616_L_MUTE | RT5616_R_MUTE, 0);
 636                 break;
 637
 638         case SND_SOC_DAPM_PRE_PMD:
 639                 snd_soc_update_bits(codec, RT5616_LOUT_CTRL1,
 640                                     RT5616_L_MUTE | RT5616_R_MUTE,
 641                                     RT5616_L_MUTE | RT5616_R_MUTE);
 642                 snd_soc_update_bits(codec, RT5616_PWR_ANLG1,
 643                                     RT5616_PWR_LM, 0);
 644                 break;
 645
 646         default:
 647                 return 0;
 648         }
 649
 650         return 0;
 651 }
 652
 653 static int rt5616_bst1_event(struct snd_soc_dapm_widget *w,
 654                              struct snd_kcontrol *kcontrol, int event)
 655 {
 656         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
 657
 658         switch (event) {
 659         case SND_SOC_DAPM_POST_PMU:
 660                 snd_soc_update_bits(codec, RT5616_PWR_ANLG2,
 661                                     RT5616_PWR_BST1_OP2, RT5616_PWR_BST1_OP2);
 662                 break;
 663
 664         case SND_SOC_DAPM_PRE_PMD:
 665                 snd_soc_update_bits(codec, RT5616_PWR_ANLG2,
 666                                     RT5616_PWR_BST1_OP2, 0);
 667                 break;
 668
 669         default:
 670                 return 0;
 671         }
 672
 673         return 0;
 674 }
 675
 676 static int rt5616_bst2_event(struct snd_soc_dapm_widget *w,
 677                              struct snd_kcontrol *kcontrol, int event)
 678 {
 679         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
 680
 681         switch (event) {
 682         case SND_SOC_DAPM_POST_PMU:
 683                 snd_soc_update_bits(codec, RT5616_PWR_ANLG2,
 684                                     RT5616_PWR_BST2_OP2, RT5616_PWR_BST2_OP2);
 685                 break;
 686
 687         case SND_SOC_DAPM_PRE_PMD:
 688                 snd_soc_update_bits(codec, RT5616_PWR_ANLG2,
 689                                     RT5616_PWR_BST2_OP2, 0);
 690                 break;
 691
 692         default:
 693                 return 0;
 694         }
 695
 696         return 0;
 697 }
 698
 699 static const struct snd_soc_dapm_widget rt5616_dapm_widgets[] = {
 700         SND_SOC_DAPM_SUPPLY("PLL1", RT5616_PWR_ANLG2,
 701                             RT5616_PWR_PLL_BIT, 0, NULL, 0),
 702         /* Input Side */
 703         /* micbias */
 704         SND_SOC_DAPM_SUPPLY("LDO", RT5616_PWR_ANLG1,
 705                             RT5616_PWR_LDO_BIT, 0, NULL, 0),
 706         SND_SOC_DAPM_SUPPLY("micbias1", RT5616_PWR_ANLG2,
 707                             RT5616_PWR_MB1_BIT, 0, NULL, 0),
 708
 709         /* Input Lines */
 710         SND_SOC_DAPM_INPUT("MIC1"),
 711         SND_SOC_DAPM_INPUT("MIC2"),
 712
 713         SND_SOC_DAPM_INPUT("IN1P"),
 714         SND_SOC_DAPM_INPUT("IN2P"),
 715         SND_SOC_DAPM_INPUT("IN2N"),
 716
 717         /* Boost */
 718         SND_SOC_DAPM_PGA_E("BST1", RT5616_PWR_ANLG2,
 719                            RT5616_PWR_BST1_BIT, 0, NULL, 0, rt5616_bst1_event,
 720                            SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
 721         SND_SOC_DAPM_PGA_E("BST2", RT5616_PWR_ANLG2,
 722                            RT5616_PWR_BST2_BIT, 0, NULL, 0, rt5616_bst2_event,
 723                            SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
 724         /* Input Volume */
 725         SND_SOC_DAPM_PGA("INL1 VOL", RT5616_PWR_VOL,
 726                          RT5616_PWR_IN1_L_BIT, 0, NULL, 0),
 727         SND_SOC_DAPM_PGA("INR1 VOL", RT5616_PWR_VOL,
 728                          RT5616_PWR_IN1_R_BIT, 0, NULL, 0),
 729         SND_SOC_DAPM_PGA("INL2 VOL", RT5616_PWR_VOL,
 730                          RT5616_PWR_IN2_L_BIT, 0, NULL, 0),
 731         SND_SOC_DAPM_PGA("INR2 VOL", RT5616_PWR_VOL,
 732                          RT5616_PWR_IN2_R_BIT, 0, NULL, 0),
 733
 734         /* REC Mixer */
 735         SND_SOC_DAPM_MIXER("RECMIXL", RT5616_PWR_MIXER, RT5616_PWR_RM_L_BIT, 0,
 736                            rt5616_rec_l_mix, ARRAY_SIZE(rt5616_rec_l_mix)),
 737         SND_SOC_DAPM_MIXER("RECMIXR", RT5616_PWR_MIXER, RT5616_PWR_RM_R_BIT, 0,
 738                            rt5616_rec_r_mix, ARRAY_SIZE(rt5616_rec_r_mix)),
 739         /* ADCs */
 740         SND_SOC_DAPM_ADC_E("ADC L", NULL, RT5616_PWR_DIG1,
 741                            RT5616_PWR_ADC_L_BIT, 0, rt5616_adc_event,
 742                            SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_POST_PMU),
 743         SND_SOC_DAPM_ADC_E("ADC R", NULL, RT5616_PWR_DIG1,
 744                            RT5616_PWR_ADC_R_BIT, 0, rt5616_adc_event,
 745                            SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_POST_PMU),
 746
 747         /* ADC Mixer */
 748         SND_SOC_DAPM_SUPPLY("stereo1 filter", RT5616_PWR_DIG2,
 749                             RT5616_PWR_ADC_STO1_F_BIT, 0, NULL, 0),
 750         SND_SOC_DAPM_MIXER("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0,
 751                            rt5616_sto1_adc_l_mix,
 752                            ARRAY_SIZE(rt5616_sto1_adc_l_mix)),
 753         SND_SOC_DAPM_MIXER("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0,
 754                            rt5616_sto1_adc_r_mix,
 755                            ARRAY_SIZE(rt5616_sto1_adc_r_mix)),
 756
 757         /* Digital Interface */
 758         SND_SOC_DAPM_SUPPLY("I2S1", RT5616_PWR_DIG1,
 759                             RT5616_PWR_I2S1_BIT, 0, NULL, 0),
 760         SND_SOC_DAPM_PGA("IF1 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
 761         SND_SOC_DAPM_PGA("IF1 DAC1 L", SND_SOC_NOPM, 0, 0, NULL, 0),
 762         SND_SOC_DAPM_PGA("IF1 DAC1 R", SND_SOC_NOPM, 0, 0, NULL, 0),
 763         SND_SOC_DAPM_PGA("IF1 ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
 764
 765         /* Digital Interface Select */
 766
 767         /* Audio Interface */
 768         SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
 769         SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
 770
 771         /* Audio DSP */
 772         SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0),
 773
 774         /* Output Side */
 775         /* DAC mixer before sound effect  */
 776         SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
 777                            rt5616_dac_l_mix, ARRAY_SIZE(rt5616_dac_l_mix)),
 778         SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
 779                            rt5616_dac_r_mix, ARRAY_SIZE(rt5616_dac_r_mix)),
 780
 781         SND_SOC_DAPM_SUPPLY("Stero1 DAC Power", RT5616_PWR_DIG2,
 782                             RT5616_PWR_DAC_STO1_F_BIT, 0, NULL, 0),
 783
 784         /* DAC Mixer */
 785         SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
 786                            rt5616_sto_dac_l_mix,
 787                            ARRAY_SIZE(rt5616_sto_dac_l_mix)),
 788         SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
 789                            rt5616_sto_dac_r_mix,
 790                            ARRAY_SIZE(rt5616_sto_dac_r_mix)),
 791
 792         /* DACs */
 793         SND_SOC_DAPM_DAC("DAC L1", NULL, RT5616_PWR_DIG1,
 794                          RT5616_PWR_DAC_L1_BIT, 0),
 795         SND_SOC_DAPM_DAC("DAC R1", NULL, RT5616_PWR_DIG1,
 796                          RT5616_PWR_DAC_R1_BIT, 0),
 797         /* OUT Mixer */
 798         SND_SOC_DAPM_MIXER("OUT MIXL", RT5616_PWR_MIXER, RT5616_PWR_OM_L_BIT,
 799                            0, rt5616_out_l_mix, ARRAY_SIZE(rt5616_out_l_mix)),
 800         SND_SOC_DAPM_MIXER("OUT MIXR", RT5616_PWR_MIXER, RT5616_PWR_OM_R_BIT,
 801                            0, rt5616_out_r_mix, ARRAY_SIZE(rt5616_out_r_mix)),
 802         /* Output Volume */
 803         SND_SOC_DAPM_PGA("OUTVOL L", RT5616_PWR_VOL,
 804                          RT5616_PWR_OV_L_BIT, 0, NULL, 0),
 805         SND_SOC_DAPM_PGA("OUTVOL R", RT5616_PWR_VOL,
 806                          RT5616_PWR_OV_R_BIT, 0, NULL, 0),
 807         SND_SOC_DAPM_PGA("HPOVOL L", RT5616_PWR_VOL,
 808                          RT5616_PWR_HV_L_BIT, 0, NULL, 0),
 809         SND_SOC_DAPM_PGA("HPOVOL R", RT5616_PWR_VOL,
 810                          RT5616_PWR_HV_R_BIT, 0, NULL, 0),
 811         SND_SOC_DAPM_PGA("DAC 1", SND_SOC_NOPM,
 812                          0, 0, NULL, 0),
 813         SND_SOC_DAPM_PGA("DAC 2", SND_SOC_NOPM,
 814                          0, 0, NULL, 0),
 815         SND_SOC_DAPM_PGA("HPOVOL", SND_SOC_NOPM,
 816                          0, 0, NULL, 0),
 817         SND_SOC_DAPM_PGA("INL1", RT5616_PWR_VOL,
 818                          RT5616_PWR_IN1_L_BIT, 0, NULL, 0),
 819         SND_SOC_DAPM_PGA("INR1", RT5616_PWR_VOL,
 820                          RT5616_PWR_IN1_R_BIT, 0, NULL, 0),
 821         SND_SOC_DAPM_PGA("INL2", RT5616_PWR_VOL,
 822                          RT5616_PWR_IN2_L_BIT, 0, NULL, 0),
 823         SND_SOC_DAPM_PGA("INR2", RT5616_PWR_VOL,
 824                          RT5616_PWR_IN2_R_BIT, 0, NULL, 0),
 825         /* HPO/LOUT/Mono Mixer */
 826         SND_SOC_DAPM_MIXER("HPO MIX", SND_SOC_NOPM, 0, 0,
 827                            rt5616_hpo_mix, ARRAY_SIZE(rt5616_hpo_mix)),
 828         SND_SOC_DAPM_MIXER("LOUT MIX", SND_SOC_NOPM, 0, 0,
 829                            rt5616_lout_mix, ARRAY_SIZE(rt5616_lout_mix)),
 830
 831         SND_SOC_DAPM_PGA_S("HP amp", 1, SND_SOC_NOPM, 0, 0,
 832                            rt5616_hp_event, SND_SOC_DAPM_PRE_PMD |
 833                            SND_SOC_DAPM_POST_PMU),
 834         SND_SOC_DAPM_PGA_S("LOUT amp", 1, SND_SOC_NOPM, 0, 0,
 835                            rt5616_lout_event, SND_SOC_DAPM_PRE_PMD |
 836                            SND_SOC_DAPM_POST_PMU),
 837
 838         SND_SOC_DAPM_SUPPLY_S("Charge Pump", 1, SND_SOC_NOPM, 0, 0,
 839                               rt5616_charge_pump_event, SND_SOC_DAPM_POST_PMU |
 840                               SND_SOC_DAPM_PRE_PMD),
 841
 842         /* Output Lines */
 843         SND_SOC_DAPM_OUTPUT("HPOL"),
 844         SND_SOC_DAPM_OUTPUT("HPOR"),
 845         SND_SOC_DAPM_OUTPUT("LOUTL"),
 846         SND_SOC_DAPM_OUTPUT("LOUTR"),
 847 };
 848
 849 static const struct snd_soc_dapm_route rt5616_dapm_routes[] = {
 850         {"IN1P", NULL, "LDO"},
 851         {"IN2P", NULL, "LDO"},
 852
 853         {"IN1P", NULL, "MIC1"},
 854         {"IN2P", NULL, "MIC2"},
 855         {"IN2N", NULL, "MIC2"},
 856
 857         {"BST1", NULL, "IN1P"},
 858         {"BST2", NULL, "IN2P"},
 859         {"BST2", NULL, "IN2N"},
 860         {"BST1", NULL, "micbias1"},
 861         {"BST2", NULL, "micbias1"},
 862
 863         {"INL1 VOL", NULL, "IN2P"},
 864         {"INR1 VOL", NULL, "IN2N"},
 865
 866         {"RECMIXL", "INL1 Switch", "INL1 VOL"},
 867         {"RECMIXL", "BST2 Switch", "BST2"},
 868         {"RECMIXL", "BST1 Switch", "BST1"},
 869
 870         {"RECMIXR", "INR1 Switch", "INR1 VOL"},
 871         {"RECMIXR", "BST2 Switch", "BST2"},
 872         {"RECMIXR", "BST1 Switch", "BST1"},
 873
 874         {"ADC L", NULL, "RECMIXL"},
 875         {"ADC R", NULL, "RECMIXR"},
 876
 877         {"Stereo1 ADC MIXL", "ADC1 Switch", "ADC L"},
 878         {"Stereo1 ADC MIXL", NULL, "stereo1 filter"},
 879         {"stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll},
 880
 881         {"Stereo1 ADC MIXR", "ADC1 Switch", "ADC R"},
 882         {"Stereo1 ADC MIXR", NULL, "stereo1 filter"},
 883         {"stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll},
 884
 885         {"IF1 ADC1", NULL, "Stereo1 ADC MIXL"},
 886         {"IF1 ADC1", NULL, "Stereo1 ADC MIXR"},
 887         {"IF1 ADC1", NULL, "I2S1"},
 888
 889         {"AIF1TX", NULL, "IF1 ADC1"},
 890
 891         {"IF1 DAC", NULL, "AIF1RX"},
 892         {"IF1 DAC", NULL, "I2S1"},
 893
 894         {"IF1 DAC1 L", NULL, "IF1 DAC"},
 895         {"IF1 DAC1 R", NULL, "IF1 DAC"},
 896
 897         {"DAC MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL"},
 898         {"DAC MIXL", "INF1 Switch", "IF1 DAC1 L"},
 899         {"DAC MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR"},
 900         {"DAC MIXR", "INF1 Switch", "IF1 DAC1 R"},
 901
 902         {"Audio DSP", NULL, "DAC MIXL"},
 903         {"Audio DSP", NULL, "DAC MIXR"},
 904
 905         {"Stereo DAC MIXL", "DAC L1 Switch", "Audio DSP"},
 906         {"Stereo DAC MIXL", "DAC R1 Switch", "DAC MIXR"},
 907         {"Stereo DAC MIXL", NULL, "Stero1 DAC Power"},
 908         {"Stereo DAC MIXR", "DAC R1 Switch", "Audio DSP"},
 909         {"Stereo DAC MIXR", "DAC L1 Switch", "DAC MIXL"},
 910         {"Stereo DAC MIXR", NULL, "Stero1 DAC Power"},
 911
 912         {"DAC L1", NULL, "Stereo DAC MIXL"},
 913         {"DAC L1", NULL, "PLL1", is_sys_clk_from_pll},
 914         {"DAC R1", NULL, "Stereo DAC MIXR"},
 915         {"DAC R1", NULL, "PLL1", is_sys_clk_from_pll},
 916
 917         {"OUT MIXL", "BST1 Switch", "BST1"},
 918         {"OUT MIXL", "BST2 Switch", "BST2"},
 919         {"OUT MIXL", "INL1 Switch", "INL1 VOL"},
 920         {"OUT MIXL", "REC MIXL Switch", "RECMIXL"},
 921         {"OUT MIXL", "DAC L1 Switch", "DAC L1"},
 922
 923         {"OUT MIXR", "BST2 Switch", "BST2"},
 924         {"OUT MIXR", "BST1 Switch", "BST1"},
 925         {"OUT MIXR", "INR1 Switch", "INR1 VOL"},
 926         {"OUT MIXR", "REC MIXR Switch", "RECMIXR"},
 927         {"OUT MIXR", "DAC R1 Switch", "DAC R1"},
 928
 929         {"HPOVOL L", NULL, "OUT MIXL"},
 930         {"HPOVOL R", NULL, "OUT MIXR"},
 931         {"OUTVOL L", NULL, "OUT MIXL"},
 932         {"OUTVOL R", NULL, "OUT MIXR"},
 933
 934         {"DAC 1", NULL, "DAC L1"},
 935         {"DAC 1", NULL, "DAC R1"},
 936         {"HPOVOL", NULL, "HPOVOL L"},
 937         {"HPOVOL", NULL, "HPOVOL R"},
 938         {"HPO MIX", "DAC1 Switch", "DAC 1"},
 939         {"HPO MIX", "HPVOL Switch", "HPOVOL"},
 940
 941         {"LOUT MIX", "DAC L1 Switch", "DAC L1"},
 942         {"LOUT MIX", "DAC R1 Switch", "DAC R1"},
 943         {"LOUT MIX", "OUTVOL L Switch", "OUTVOL L"},
 944         {"LOUT MIX", "OUTVOL R Switch", "OUTVOL R"},
 945
 946         {"HP amp", NULL, "HPO MIX"},
 947         {"HP amp", NULL, "Charge Pump"},
 948         {"HPOL", NULL, "HP amp"},
 949         {"HPOR", NULL, "HP amp"},
 950
 951         {"LOUT amp", NULL, "LOUT MIX"},
 952         {"LOUT amp", NULL, "Charge Pump"},
 953         {"LOUTL", NULL, "LOUT amp"},
 954         {"LOUTR", NULL, "LOUT amp"},
 955
 956 };
 957
 958 static int rt5616_hw_params(struct snd_pcm_substream *substream,
 959                             struct snd_pcm_hw_params *params,
 960                             struct snd_soc_dai *dai)
 961 {
 962         struct snd_soc_pcm_runtime *rtd = substream->private_data;
 963         struct snd_soc_codec *codec = rtd->codec;
 964         struct rt5616_priv *rt5616 = snd_soc_codec_get_drvdata(codec);
 965         unsigned int val_len = 0, val_clk, mask_clk;
 966         int pre_div, bclk_ms, frame_size;
 967
 968         rt5616->lrck[dai->id] = params_rate(params);
 969
 970         pre_div = rl6231_get_clk_info(rt5616->sysclk, rt5616->lrck[dai->id]);
 971
 972         if (pre_div < 0) {
 973                 dev_err(codec->dev, "Unsupported clock setting\n");
 974                 return -EINVAL;
 975         }
 976         frame_size = snd_soc_params_to_frame_size(params);
 977         if (frame_size < 0) {
 978                 dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size);
 979                 return -EINVAL;
 980         }
 981         bclk_ms = frame_size > 32 ? 1 : 0;
 982         rt5616->bclk[dai->id] = rt5616->lrck[dai->id] * (32 << bclk_ms);
 983
 984         dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
 985                 rt5616->bclk[dai->id], rt5616->lrck[dai->id]);
 986         dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
 987                 bclk_ms, pre_div, dai->id);
 988
 989         switch (params_format(params)) {
 990         case SNDRV_PCM_FORMAT_S16_LE:
 991                 break;
 992         case SNDRV_PCM_FORMAT_S20_3LE:
 993                 val_len |= RT5616_I2S_DL_20;
 994                 break;
 995         case SNDRV_PCM_FORMAT_S24_LE:
 996                 val_len |= RT5616_I2S_DL_24;
 997                 break;
 998         case SNDRV_PCM_FORMAT_S8:
 999                 val_len |= RT5616_I2S_DL_8;
1000                 break;
1001         default:
1002                 return -EINVAL;
1003         }
1004
1005         mask_clk = RT5616_I2S_PD1_MASK;
1006         val_clk = pre_div << RT5616_I2S_PD1_SFT;
1007         snd_soc_update_bits(codec, RT5616_I2S1_SDP,
1008                             RT5616_I2S_DL_MASK, val_len);
1009         snd_soc_update_bits(codec, RT5616_ADDA_CLK1, mask_clk, val_clk);
1010
1011         return 0;
1012 }
1013
1014 static int rt5616_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
1015 {
1016         struct snd_soc_codec *codec = dai->codec;
1017         struct rt5616_priv *rt5616 = snd_soc_codec_get_drvdata(codec);
1018         unsigned int reg_val = 0;
1019
1020         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1021         case SND_SOC_DAIFMT_CBM_CFM:
1022                 rt5616->master[dai->id] = 1;
1023                 break;
1024         case SND_SOC_DAIFMT_CBS_CFS:
1025                 reg_val |= RT5616_I2S_MS_S;
1026                 rt5616->master[dai->id] = 0;
1027                 break;
1028         default:
1029                 return -EINVAL;
1030         }
1031
1032         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1033         case SND_SOC_DAIFMT_NB_NF:
1034                 break;
1035         case SND_SOC_DAIFMT_IB_NF:
1036                 reg_val |= RT5616_I2S_BP_INV;
1037                 break;
1038         default:
1039                 return -EINVAL;
1040         }
1041
1042         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1043         case SND_SOC_DAIFMT_I2S:
1044                 break;
1045         case SND_SOC_DAIFMT_LEFT_J:
1046                 reg_val |= RT5616_I2S_DF_LEFT;
1047                 break;
1048         case SND_SOC_DAIFMT_DSP_A:
1049                 reg_val |= RT5616_I2S_DF_PCM_A;
1050                 break;
1051         case SND_SOC_DAIFMT_DSP_B:
1052                 reg_val |= RT5616_I2S_DF_PCM_B;
1053                 break;
1054         default:
1055                 return -EINVAL;
1056         }
1057
1058         snd_soc_update_bits(codec, RT5616_I2S1_SDP,
1059                             RT5616_I2S_MS_MASK | RT5616_I2S_BP_MASK |
1060                             RT5616_I2S_DF_MASK, reg_val);
1061
1062         return 0;
1063 }
1064
1065 static int rt5616_set_dai_sysclk(struct snd_soc_dai *dai,
1066                                  int clk_id, unsigned int freq, int dir)
1067 {
1068         struct snd_soc_codec *codec = dai->codec;
1069         struct rt5616_priv *rt5616 = snd_soc_codec_get_drvdata(codec);
1070         unsigned int reg_val = 0;
1071
1072         if (freq == rt5616->sysclk && clk_id == rt5616->sysclk_src)
1073                 return 0;
1074
1075         switch (clk_id) {
1076         case RT5616_SCLK_S_MCLK:
1077                 reg_val |= RT5616_SCLK_SRC_MCLK;
1078                 break;
1079         case RT5616_SCLK_S_PLL1:
1080                 reg_val |= RT5616_SCLK_SRC_PLL1;
1081                 break;
1082         default:
1083                 dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id);
1084                 return -EINVAL;
1085         }
1086
1087         snd_soc_update_bits(codec, RT5616_GLB_CLK,
1088                             RT5616_SCLK_SRC_MASK, reg_val);
1089         rt5616->sysclk = freq;
1090         rt5616->sysclk_src = clk_id;
1091
1092         dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
1093
1094         return 0;
1095 }
1096
1097 static int rt5616_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
1098                               unsigned int freq_in, unsigned int freq_out)
1099 {
1100         struct snd_soc_codec *codec = dai->codec;
1101         struct rt5616_priv *rt5616 = snd_soc_codec_get_drvdata(codec);
1102         struct rl6231_pll_code pll_code;
1103         int ret;
1104
1105         if (source == rt5616->pll_src && freq_in == rt5616->pll_in &&
1106             freq_out == rt5616->pll_out)
1107                 return 0;
1108
1109         if (!freq_in || !freq_out) {
1110                 dev_dbg(codec->dev, "PLL disabled\n");
1111
1112                 rt5616->pll_in = 0;
1113                 rt5616->pll_out = 0;
1114                 snd_soc_update_bits(codec, RT5616_GLB_CLK,
1115                                     RT5616_SCLK_SRC_MASK,
1116                                     RT5616_SCLK_SRC_MCLK);
1117                 return 0;
1118         }
1119
1120         switch (source) {
1121         case RT5616_PLL1_S_MCLK:
1122                 snd_soc_update_bits(codec, RT5616_GLB_CLK,
1123                                     RT5616_PLL1_SRC_MASK,
1124                                     RT5616_PLL1_SRC_MCLK);
1125                 break;
1126         case RT5616_PLL1_S_BCLK1:
1127         case RT5616_PLL1_S_BCLK2:
1128                 snd_soc_update_bits(codec, RT5616_GLB_CLK,
1129                                     RT5616_PLL1_SRC_MASK,
1130                                     RT5616_PLL1_SRC_BCLK1);
1131                 break;
1132         default:
1133                 dev_err(codec->dev, "Unknown PLL source %d\n", source);
1134                 return -EINVAL;
1135         }
1136
1137         ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
1138         if (ret < 0) {
1139                 dev_err(codec->dev, "Unsupport input clock %d\n", freq_in);
1140                 return ret;
1141         }
1142
1143         dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=%d\n",
1144                 pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
1145                 pll_code.n_code, pll_code.k_code);
1146
1147         snd_soc_write(codec, RT5616_PLL_CTRL1,
1148                       pll_code.n_code << RT5616_PLL_N_SFT | pll_code.k_code);
1149         snd_soc_write(codec, RT5616_PLL_CTRL2,
1150                       (pll_code.m_bp ? 0 : pll_code.m_code) <<
1151                       RT5616_PLL_M_SFT |
1152                       pll_code.m_bp << RT5616_PLL_M_BP_SFT);
1153
1154         rt5616->pll_in = freq_in;
1155         rt5616->pll_out = freq_out;
1156         rt5616->pll_src = source;
1157
1158         return 0;
1159 }
1160
1161 static int rt5616_set_bias_level(struct snd_soc_codec *codec,
1162                                  enum snd_soc_bias_level level)
1163 {
1164         struct rt5616_priv *rt5616 = snd_soc_codec_get_drvdata(codec);
1165         int ret;
1166
1167         switch (level) {
1168
1169         case SND_SOC_BIAS_ON:
1170                 break;
1171
1172         case SND_SOC_BIAS_PREPARE:
1173                 /*
1174                  * SND_SOC_BIAS_PREPARE is called while preparing for a
1175                  * transition to ON or away from ON. If current bias_level
1176                  * is SND_SOC_BIAS_ON, then it is preparing for a transition
1177                  * away from ON. Disable the clock in that case, otherwise
1178                  * enable it.
1179                  */
1180                 if (IS_ERR(rt5616->mclk))
1181                         break;
1182
1183                 if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_ON) {
1184                         clk_disable_unprepare(rt5616->mclk);
1185                 } else {
1186                         ret = clk_prepare_enable(rt5616->mclk);
1187                         if (ret)
1188                                 return ret;
1189                 }
1190                 break;
1191
1192         case SND_SOC_BIAS_STANDBY:
1193                 if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) {
1194                         snd_soc_update_bits(codec, RT5616_PWR_ANLG1,
1195                                             RT5616_PWR_VREF1 | RT5616_PWR_MB |
1196                                             RT5616_PWR_BG | RT5616_PWR_VREF2,
1197                                             RT5616_PWR_VREF1 | RT5616_PWR_MB |
1198                                             RT5616_PWR_BG | RT5616_PWR_VREF2);
1199                         mdelay(10);
1200                         snd_soc_update_bits(codec, RT5616_PWR_ANLG1,
1201                                             RT5616_PWR_FV1 | RT5616_PWR_FV2,
1202                                             RT5616_PWR_FV1 | RT5616_PWR_FV2);
1203                         snd_soc_update_bits(codec, RT5616_D_MISC,
1204                                             RT5616_D_GATE_EN,
1205                                             RT5616_D_GATE_EN);
1206                 }
1207                 break;
1208
1209         case SND_SOC_BIAS_OFF:
1210                 snd_soc_update_bits(codec, RT5616_D_MISC, RT5616_D_GATE_EN, 0);
1211                 snd_soc_write(codec, RT5616_PWR_DIG1, 0x0000);
1212                 snd_soc_write(codec, RT5616_PWR_DIG2, 0x0000);
1213                 snd_soc_write(codec, RT5616_PWR_VOL, 0x0000);
1214                 snd_soc_write(codec, RT5616_PWR_MIXER, 0x0000);
1215                 snd_soc_write(codec, RT5616_PWR_ANLG1, 0x0000);
1216                 snd_soc_write(codec, RT5616_PWR_ANLG2, 0x0000);
1217                 break;
1218
1219         default:
1220                 break;
1221         }
1222
1223         return 0;
1224 }
1225
1226 static int rt5616_probe(struct snd_soc_codec *codec)
1227 {
1228         struct rt5616_priv *rt5616 = snd_soc_codec_get_drvdata(codec);
1229
1230         /* Check if MCLK provided */
1231         rt5616->mclk = devm_clk_get(codec->dev, "mclk");
1232         if (PTR_ERR(rt5616->mclk) == -EPROBE_DEFER)
1233                 return -EPROBE_DEFER;
1234
1235         rt5616->codec = codec;
1236
1237         return 0;
1238 }
1239
1240 #ifdef CONFIG_PM
1241 static int rt5616_suspend(struct snd_soc_codec *codec)
1242 {
1243         struct rt5616_priv *rt5616 = snd_soc_codec_get_drvdata(codec);
1244
1245         regcache_cache_only(rt5616->regmap, true);
1246         regcache_mark_dirty(rt5616->regmap);
1247
1248         return 0;
1249 }
1250
1251 static int rt5616_resume(struct snd_soc_codec *codec)
1252 {
1253         struct rt5616_priv *rt5616 = snd_soc_codec_get_drvdata(codec);
1254
1255         regcache_cache_only(rt5616->regmap, false);
1256         regcache_sync(rt5616->regmap);
1257         return 0;
1258 }
1259 #else
1260 #define rt5616_suspend NULL
1261 #define rt5616_resume NULL
1262 #endif
1263
1264 #define RT5616_STEREO_RATES SNDRV_PCM_RATE_8000_192000
1265 #define RT5616_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
1266                         SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
1267
1268 struct snd_soc_dai_ops rt5616_aif_dai_ops = {
1269         .hw_params = rt5616_hw_params,
1270         .set_fmt = rt5616_set_dai_fmt,
1271         .set_sysclk = rt5616_set_dai_sysclk,
1272         .set_pll = rt5616_set_dai_pll,
1273 };
1274
1275 struct snd_soc_dai_driver rt5616_dai[] = {
1276         {
1277                 .name = "rt5616-aif1",
1278                 .id = RT5616_AIF1,
1279                 .playback = {
1280                         .stream_name = "AIF1 Playback",
1281                         .channels_min = 1,
1282                         .channels_max = 2,
1283                         .rates = RT5616_STEREO_RATES,
1284                         .formats = RT5616_FORMATS,
1285                 },
1286                 .capture = {
1287                         .stream_name = "AIF1 Capture",
1288                         .channels_min = 1,
1289                         .channels_max = 2,
1290                         .rates = RT5616_STEREO_RATES,
1291                         .formats = RT5616_FORMATS,
1292                 },
1293                 .ops = &rt5616_aif_dai_ops,
1294         },
1295 };
1296
1297 static struct snd_soc_codec_driver soc_codec_dev_rt5616 = {
1298         .probe = rt5616_probe,
1299         .suspend = rt5616_suspend,
1300         .resume = rt5616_resume,
1301         .set_bias_level = rt5616_set_bias_level,
1302         .idle_bias_off = true,
1303         .controls = rt5616_snd_controls,
1304         .num_controls = ARRAY_SIZE(rt5616_snd_controls),
1305         .dapm_widgets = rt5616_dapm_widgets,
1306         .num_dapm_widgets = ARRAY_SIZE(rt5616_dapm_widgets),
1307         .dapm_routes = rt5616_dapm_routes,
1308         .num_dapm_routes = ARRAY_SIZE(rt5616_dapm_routes),
1309 };
1310
1311 static const struct regmap_config rt5616_regmap = {
1312         .reg_bits = 8,
1313         .val_bits = 16,
1314         .use_single_rw = true,
1315         .max_register = RT5616_DEVICE_ID + 1 + (ARRAY_SIZE(rt5616_ranges) *
1316                                                RT5616_PR_SPACING),
1317         .volatile_reg = rt5616_volatile_register,
1318         .readable_reg = rt5616_readable_register,
1319         .cache_type = REGCACHE_RBTREE,
1320         .reg_defaults = rt5616_reg,
1321         .num_reg_defaults = ARRAY_SIZE(rt5616_reg),
1322         .ranges = rt5616_ranges,
1323         .num_ranges = ARRAY_SIZE(rt5616_ranges),
1324 };
1325
1326 static const struct i2c_device_id rt5616_i2c_id[] = {
1327         { "rt5616", 0 },
1328         { }
1329 };
1330 MODULE_DEVICE_TABLE(i2c, rt5616_i2c_id);
1331
1332 #if defined(CONFIG_OF)
1333 static const struct of_device_id rt5616_of_match[] = {
1334         { .compatible = "realtek,rt5616", },
1335         {},
1336 };
1337 MODULE_DEVICE_TABLE(of, rt5616_of_match);
1338 #endif
1339
1340 static int rt5616_i2c_probe(struct i2c_client *i2c,
1341                             const struct i2c_device_id *id)
1342 {
1343         struct rt5616_priv *rt5616;
1344         unsigned int val;
1345         int ret;
1346
1347         rt5616 = devm_kzalloc(&i2c->dev, sizeof(struct rt5616_priv),
1348                               GFP_KERNEL);
1349         if (!rt5616)
1350                 return -ENOMEM;
1351
1352         i2c_set_clientdata(i2c, rt5616);
1353
1354         rt5616->regmap = devm_regmap_init_i2c(i2c, &rt5616_regmap);
1355         if (IS_ERR(rt5616->regmap)) {
1356                 ret = PTR_ERR(rt5616->regmap);
1357                 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
1358                         ret);
1359                 return ret;
1360         }
1361
1362         regmap_read(rt5616->regmap, RT5616_DEVICE_ID, &val);
1363         if (val != 0x6281) {
1364                 dev_err(&i2c->dev,
1365                         "Device with ID register %#x is not rt5616\n",
1366                         val);
1367                 return -ENODEV;
1368         }
1369         regmap_write(rt5616->regmap, RT5616_RESET, 0);
1370         regmap_update_bits(rt5616->regmap, RT5616_PWR_ANLG1,
1371                            RT5616_PWR_VREF1 | RT5616_PWR_MB |
1372                            RT5616_PWR_BG | RT5616_PWR_VREF2,
1373                            RT5616_PWR_VREF1 | RT5616_PWR_MB |
1374                            RT5616_PWR_BG | RT5616_PWR_VREF2);
1375         mdelay(10);
1376         regmap_update_bits(rt5616->regmap, RT5616_PWR_ANLG1,
1377                            RT5616_PWR_FV1 | RT5616_PWR_FV2,
1378                            RT5616_PWR_FV1 | RT5616_PWR_FV2);
1379
1380         ret = regmap_register_patch(rt5616->regmap, init_list,
1381                                     ARRAY_SIZE(init_list));
1382         if (ret != 0)
1383                 dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
1384
1385         regmap_update_bits(rt5616->regmap, RT5616_PWR_ANLG1,
1386                            RT5616_PWR_LDO_DVO_MASK, RT5616_PWR_LDO_DVO_1_2V);
1387
1388         return snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5616,
1389                                       rt5616_dai, ARRAY_SIZE(rt5616_dai));
1390 }
1391
1392 static int rt5616_i2c_remove(struct i2c_client *i2c)
1393 {
1394         snd_soc_unregister_codec(&i2c->dev);
1395
1396         return 0;
1397 }
1398
1399 static void rt5616_i2c_shutdown(struct i2c_client *client)
1400 {
1401         struct rt5616_priv *rt5616 = i2c_get_clientdata(client);
1402
1403         regmap_write(rt5616->regmap, RT5616_HP_VOL, 0xc8c8);
1404         regmap_write(rt5616->regmap, RT5616_LOUT_CTRL1, 0xc8c8);
1405 }
1406
1407 static struct i2c_driver rt5616_i2c_driver = {
1408         .driver = {
1409                 .name = "rt5616",
1410                 .of_match_table = of_match_ptr(rt5616_of_match),
1411         },
1412         .probe = rt5616_i2c_probe,
1413         .remove = rt5616_i2c_remove,
1414         .shutdown = rt5616_i2c_shutdown,
1415         .id_table = rt5616_i2c_id,
1416 };
1417 module_i2c_driver(rt5616_i2c_driver);
1418
1419 MODULE_DESCRIPTION("ASoC RT5616 driver");
1420 MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
1421 MODULE_LICENSE("GPL");