sound/soc/codecs/tlv320dac33.c

   1 /*
   2  * ALSA SoC Texas Instruments TLV320DAC33 codec driver
   3  *
   4  * Author:      Peter Ujfalusi <peter.ujfalusi@nokia.com>
   5  *
   6  * Copyright:   (C) 2009 Nokia Corporation
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  *
  12  * This program is distributed in the hope that it will be useful, but
  13  * WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  15  * General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  20  * 02110-1301 USA
  21  *
  22  */
  23
  24 #include <linux/module.h>
  25 #include <linux/moduleparam.h>
  26 #include <linux/init.h>
  27 #include <linux/delay.h>
  28 #include <linux/pm.h>
  29 #include <linux/i2c.h>
  30 #include <linux/platform_device.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/gpio.h>
  33 #include <sound/core.h>
  34 #include <sound/pcm.h>
  35 #include <sound/pcm_params.h>
  36 #include <sound/soc.h>
  37 #include <sound/soc-dapm.h>
  38 #include <sound/initval.h>
  39 #include <sound/tlv.h>
  40
  41 #include <sound/tlv320dac33-plat.h>
  42 #include "tlv320dac33.h"
  43
  44 #define DAC33_BUFFER_SIZE_BYTES         24576   /* bytes, 12288 16 bit words,
  45                                                  * 6144 stereo */
  46 #define DAC33_BUFFER_SIZE_SAMPLES       6144
  47
  48 #define NSAMPLE_MAX             5700
  49
  50 #define LATENCY_TIME_MS         20
  51
  52 static struct snd_soc_codec *tlv320dac33_codec;
  53
  54 enum dac33_state {
  55         DAC33_IDLE = 0,
  56         DAC33_PREFILL,
  57         DAC33_PLAYBACK,
  58         DAC33_FLUSH,
  59 };
  60
  61 struct tlv320dac33_priv {
  62         struct mutex mutex;
  63         struct workqueue_struct *dac33_wq;
  64         struct work_struct work;
  65         struct snd_soc_codec codec;
  66         int power_gpio;
  67         int chip_power;
  68         int irq;
  69         unsigned int refclk;
  70
  71         unsigned int alarm_threshold;   /* set to be half of LATENCY_TIME_MS */
  72         unsigned int nsample_min;       /* nsample should not be lower than
  73                                          * this */
  74         unsigned int nsample_max;       /* nsample should not be higher than
  75                                          * this */
  76         unsigned int nsample_switch;    /* Use FIFO or bypass FIFO switch */
  77         unsigned int nsample;           /* burst read amount from host */
  78
  79         enum dac33_state state;
  80 };
  81
  82 static const u8 dac33_reg[DAC33_CACHEREGNUM] = {
  83 0x00, 0x00, 0x00, 0x00, /* 0x00 - 0x03 */
  84 0x00, 0x00, 0x00, 0x00, /* 0x04 - 0x07 */
  85 0x00, 0x00, 0x00, 0x00, /* 0x08 - 0x0b */
  86 0x00, 0x00, 0x00, 0x00, /* 0x0c - 0x0f */
  87 0x00, 0x00, 0x00, 0x00, /* 0x10 - 0x13 */
  88 0x00, 0x00, 0x00, 0x00, /* 0x14 - 0x17 */
  89 0x00, 0x00, 0x00, 0x00, /* 0x18 - 0x1b */
  90 0x00, 0x00, 0x00, 0x00, /* 0x1c - 0x1f */
  91 0x00, 0x00, 0x00, 0x00, /* 0x20 - 0x23 */
  92 0x00, 0x00, 0x00, 0x00, /* 0x24 - 0x27 */
  93 0x00, 0x00, 0x00, 0x00, /* 0x28 - 0x2b */
  94 0x00, 0x00, 0x00, 0x80, /* 0x2c - 0x2f */
  95 0x80, 0x00, 0x00, 0x00, /* 0x30 - 0x33 */
  96 0x00, 0x00, 0x00, 0x00, /* 0x34 - 0x37 */
  97 0x00, 0x00,             /* 0x38 - 0x39 */
  98 /* Registers 0x3a - 0x3f are reserved  */
  99             0x00, 0x00, /* 0x3a - 0x3b */
 100 0x00, 0x00, 0x00, 0x00, /* 0x3c - 0x3f */
 101
 102 0x00, 0x00, 0x00, 0x00, /* 0x40 - 0x43 */
 103 0x00, 0x80,             /* 0x44 - 0x45 */
 104 /* Registers 0x46 - 0x47 are reserved  */
 105             0x80, 0x80, /* 0x46 - 0x47 */
 106
 107 0x80, 0x00, 0x00,       /* 0x48 - 0x4a */
 108 /* Registers 0x4b - 0x7c are reserved  */
 109                   0x00, /* 0x4b        */
 110 0x00, 0x00, 0x00, 0x00, /* 0x4c - 0x4f */
 111 0x00, 0x00, 0x00, 0x00, /* 0x50 - 0x53 */
 112 0x00, 0x00, 0x00, 0x00, /* 0x54 - 0x57 */
 113 0x00, 0x00, 0x00, 0x00, /* 0x58 - 0x5b */
 114 0x00, 0x00, 0x00, 0x00, /* 0x5c - 0x5f */
 115 0x00, 0x00, 0x00, 0x00, /* 0x60 - 0x63 */
 116 0x00, 0x00, 0x00, 0x00, /* 0x64 - 0x67 */
 117 0x00, 0x00, 0x00, 0x00, /* 0x68 - 0x6b */
 118 0x00, 0x00, 0x00, 0x00, /* 0x6c - 0x6f */
 119 0x00, 0x00, 0x00, 0x00, /* 0x70 - 0x73 */
 120 0x00, 0x00, 0x00, 0x00, /* 0x74 - 0x77 */
 121 0x00, 0x00, 0x00, 0x00, /* 0x78 - 0x7b */
 122 0x00,                   /* 0x7c        */
 123
 124       0xda, 0x33, 0x03, /* 0x7d - 0x7f */
 125 };
 126
 127 /* Register read and write */
 128 static inline unsigned int dac33_read_reg_cache(struct snd_soc_codec *codec,
 129                                                 unsigned reg)
 130 {
 131         u8 *cache = codec->reg_cache;
 132         if (reg >= DAC33_CACHEREGNUM)
 133                 return 0;
 134
 135         return cache[reg];
 136 }
 137
 138 static inline void dac33_write_reg_cache(struct snd_soc_codec *codec,
 139                                          u8 reg, u8 value)
 140 {
 141         u8 *cache = codec->reg_cache;
 142         if (reg >= DAC33_CACHEREGNUM)
 143                 return;
 144
 145         cache[reg] = value;
 146 }
 147
 148 static int dac33_read(struct snd_soc_codec *codec, unsigned int reg,
 149                       u8 *value)
 150 {
 151         struct tlv320dac33_priv *dac33 = codec->private_data;
 152         int val;
 153
 154         *value = reg & 0xff;
 155
 156         /* If powered off, return the cached value */
 157         if (dac33->chip_power) {
 158                 val = i2c_smbus_read_byte_data(codec->control_data, value[0]);
 159                 if (val < 0) {
 160                         dev_err(codec->dev, "Read failed (%d)\n", val);
 161                         value[0] = dac33_read_reg_cache(codec, reg);
 162                 } else {
 163                         value[0] = val;
 164                         dac33_write_reg_cache(codec, reg, val);
 165                 }
 166         } else {
 167                 value[0] = dac33_read_reg_cache(codec, reg);
 168         }
 169
 170         return 0;
 171 }
 172
 173 static int dac33_write(struct snd_soc_codec *codec, unsigned int reg,
 174                        unsigned int value)
 175 {
 176         struct tlv320dac33_priv *dac33 = codec->private_data;
 177         u8 data[2];
 178         int ret = 0;
 179
 180         /*
 181          * data is
 182          *   D15..D8 dac33 register offset
 183          *   D7...D0 register data
 184          */
 185         data[0] = reg & 0xff;
 186         data[1] = value & 0xff;
 187
 188         dac33_write_reg_cache(codec, data[0], data[1]);
 189         if (dac33->chip_power) {
 190                 ret = codec->hw_write(codec->control_data, data, 2);
 191                 if (ret != 2)
 192                         dev_err(codec->dev, "Write failed (%d)\n", ret);
 193                 else
 194                         ret = 0;
 195         }
 196
 197         return ret;
 198 }
 199
 200 static int dac33_write_locked(struct snd_soc_codec *codec, unsigned int reg,
 201                        unsigned int value)
 202 {
 203         struct tlv320dac33_priv *dac33 = codec->private_data;
 204         int ret;
 205
 206         mutex_lock(&dac33->mutex);
 207         ret = dac33_write(codec, reg, value);
 208         mutex_unlock(&dac33->mutex);
 209
 210         return ret;
 211 }
 212
 213 #define DAC33_I2C_ADDR_AUTOINC  0x80
 214 static int dac33_write16(struct snd_soc_codec *codec, unsigned int reg,
 215                        unsigned int value)
 216 {
 217         struct tlv320dac33_priv *dac33 = codec->private_data;
 218         u8 data[3];
 219         int ret = 0;
 220
 221         /*
 222          * data is
 223          *   D23..D16 dac33 register offset
 224          *   D15..D8  register data MSB
 225          *   D7...D0  register data LSB
 226          */
 227         data[0] = reg & 0xff;
 228         data[1] = (value >> 8) & 0xff;
 229         data[2] = value & 0xff;
 230
 231         dac33_write_reg_cache(codec, data[0], data[1]);
 232         dac33_write_reg_cache(codec, data[0] + 1, data[2]);
 233
 234         if (dac33->chip_power) {
 235                 /* We need to set autoincrement mode for 16 bit writes */
 236                 data[0] |= DAC33_I2C_ADDR_AUTOINC;
 237                 ret = codec->hw_write(codec->control_data, data, 3);
 238                 if (ret != 3)
 239                         dev_err(codec->dev, "Write failed (%d)\n", ret);
 240                 else
 241                         ret = 0;
 242         }
 243
 244         return ret;
 245 }
 246
 247 static void dac33_restore_regs(struct snd_soc_codec *codec)
 248 {
 249         struct tlv320dac33_priv *dac33 = codec->private_data;
 250         u8 *cache = codec->reg_cache;
 251         u8 data[2];
 252         int i, ret;
 253
 254         if (!dac33->chip_power)
 255                 return;
 256
 257         for (i = DAC33_PWR_CTRL; i <= DAC33_INTP_CTRL_B; i++) {
 258                 data[0] = i;
 259                 data[1] = cache[i];
 260                 /* Skip the read only registers */
 261                 if ((i >= DAC33_INT_OSC_STATUS &&
 262                                 i <= DAC33_INT_OSC_FREQ_RAT_READ_B) ||
 263                     (i >= DAC33_FIFO_WPTR_MSB && i <= DAC33_FIFO_IRQ_FLAG) ||
 264                     i == DAC33_DAC_STATUS_FLAGS ||
 265                     i == DAC33_SRC_EST_REF_CLK_RATIO_A ||
 266                     i == DAC33_SRC_EST_REF_CLK_RATIO_B)
 267                         continue;
 268                 ret = codec->hw_write(codec->control_data, data, 2);
 269                 if (ret != 2)
 270                         dev_err(codec->dev, "Write failed (%d)\n", ret);
 271         }
 272         for (i = DAC33_LDAC_PWR_CTRL; i <= DAC33_LINEL_TO_LLO_VOL; i++) {
 273                 data[0] = i;
 274                 data[1] = cache[i];
 275                 ret = codec->hw_write(codec->control_data, data, 2);
 276                 if (ret != 2)
 277                         dev_err(codec->dev, "Write failed (%d)\n", ret);
 278         }
 279         for (i = DAC33_LINER_TO_RLO_VOL; i <= DAC33_OSC_TRIM; i++) {
 280                 data[0] = i;
 281                 data[1] = cache[i];
 282                 ret = codec->hw_write(codec->control_data, data, 2);
 283                 if (ret != 2)
 284                         dev_err(codec->dev, "Write failed (%d)\n", ret);
 285         }
 286 }
 287
 288 static inline void dac33_soft_power(struct snd_soc_codec *codec, int power)
 289 {
 290         u8 reg;
 291
 292         reg = dac33_read_reg_cache(codec, DAC33_PWR_CTRL);
 293         if (power)
 294                 reg |= DAC33_PDNALLB;
 295         else
 296                 reg &= ~DAC33_PDNALLB;
 297         dac33_write(codec, DAC33_PWR_CTRL, reg);
 298 }
 299
 300 static void dac33_hard_power(struct snd_soc_codec *codec, int power)
 301 {
 302         struct tlv320dac33_priv *dac33 = codec->private_data;
 303
 304         mutex_lock(&dac33->mutex);
 305         if (power) {
 306                 if (dac33->power_gpio >= 0) {
 307                         gpio_set_value(dac33->power_gpio, 1);
 308                         dac33->chip_power = 1;
 309                         /* Restore registers */
 310                         dac33_restore_regs(codec);
 311                 }
 312                 dac33_soft_power(codec, 1);
 313         } else {
 314                 dac33_soft_power(codec, 0);
 315                 if (dac33->power_gpio >= 0) {
 316                         gpio_set_value(dac33->power_gpio, 0);
 317                         dac33->chip_power = 0;
 318                 }
 319         }
 320         mutex_unlock(&dac33->mutex);
 321
 322 }
 323
 324 static int dac33_get_nsample(struct snd_kcontrol *kcontrol,
 325                          struct snd_ctl_elem_value *ucontrol)
 326 {
 327         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
 328         struct tlv320dac33_priv *dac33 = codec->private_data;
 329
 330         ucontrol->value.integer.value[0] = dac33->nsample;
 331
 332         return 0;
 333 }
 334
 335 static int dac33_set_nsample(struct snd_kcontrol *kcontrol,
 336                          struct snd_ctl_elem_value *ucontrol)
 337 {
 338         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
 339         struct tlv320dac33_priv *dac33 = codec->private_data;
 340         int ret = 0;
 341
 342         if (dac33->nsample == ucontrol->value.integer.value[0])
 343                 return 0;
 344
 345         if (ucontrol->value.integer.value[0] < dac33->nsample_min ||
 346             ucontrol->value.integer.value[0] > dac33->nsample_max)
 347                 ret = -EINVAL;
 348         else
 349                 dac33->nsample = ucontrol->value.integer.value[0];
 350
 351         return ret;
 352 }
 353
 354 static int dac33_get_nsample_switch(struct snd_kcontrol *kcontrol,
 355                          struct snd_ctl_elem_value *ucontrol)
 356 {
 357         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
 358         struct tlv320dac33_priv *dac33 = codec->private_data;
 359
 360         ucontrol->value.integer.value[0] = dac33->nsample_switch;
 361
 362         return 0;
 363 }
 364
 365 static int dac33_set_nsample_switch(struct snd_kcontrol *kcontrol,
 366                          struct snd_ctl_elem_value *ucontrol)
 367 {
 368         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
 369         struct tlv320dac33_priv *dac33 = codec->private_data;
 370         int ret = 0;
 371
 372         if (dac33->nsample_switch == ucontrol->value.integer.value[0])
 373                 return 0;
 374         /* Do not allow changes while stream is running*/
 375         if (codec->active)
 376                 return -EPERM;
 377
 378         if (ucontrol->value.integer.value[0] < 0 ||
 379             ucontrol->value.integer.value[0] > 1)
 380                 ret = -EINVAL;
 381         else
 382                 dac33->nsample_switch = ucontrol->value.integer.value[0];
 383
 384         return ret;
 385 }
 386
 387 /*
 388  * DACL/R digital volume control:
 389  * from 0 dB to -63.5 in 0.5 dB steps
 390  * Need to be inverted later on:
 391  * 0x00 == 0 dB
 392  * 0x7f == -63.5 dB
 393  */
 394 static DECLARE_TLV_DB_SCALE(dac_digivol_tlv, -6350, 50, 0);
 395
 396 static const struct snd_kcontrol_new dac33_snd_controls[] = {
 397         SOC_DOUBLE_R_TLV("DAC Digital Playback Volume",
 398                 DAC33_LDAC_DIG_VOL_CTRL, DAC33_RDAC_DIG_VOL_CTRL,
 399                 0, 0x7f, 1, dac_digivol_tlv),
 400         SOC_DOUBLE_R("DAC Digital Playback Switch",
 401                  DAC33_LDAC_DIG_VOL_CTRL, DAC33_RDAC_DIG_VOL_CTRL, 7, 1, 1),
 402         SOC_DOUBLE_R("Line to Line Out Volume",
 403                  DAC33_LINEL_TO_LLO_VOL, DAC33_LINER_TO_RLO_VOL, 0, 127, 1),
 404 };
 405
 406 static const struct snd_kcontrol_new dac33_nsample_snd_controls[] = {
 407         SOC_SINGLE_EXT("nSample", 0, 0, 5900, 0,
 408                  dac33_get_nsample, dac33_set_nsample),
 409         SOC_SINGLE_EXT("nSample Switch", 0, 0, 1, 0,
 410                  dac33_get_nsample_switch, dac33_set_nsample_switch),
 411 };
 412
 413 /* Analog bypass */
 414 static const struct snd_kcontrol_new dac33_dapm_abypassl_control =
 415         SOC_DAPM_SINGLE("Switch", DAC33_LINEL_TO_LLO_VOL, 7, 1, 1);
 416
 417 static const struct snd_kcontrol_new dac33_dapm_abypassr_control =
 418         SOC_DAPM_SINGLE("Switch", DAC33_LINER_TO_RLO_VOL, 7, 1, 1);
 419
 420 static const struct snd_soc_dapm_widget dac33_dapm_widgets[] = {
 421         SND_SOC_DAPM_OUTPUT("LEFT_LO"),
 422         SND_SOC_DAPM_OUTPUT("RIGHT_LO"),
 423
 424         SND_SOC_DAPM_INPUT("LINEL"),
 425         SND_SOC_DAPM_INPUT("LINER"),
 426
 427         SND_SOC_DAPM_DAC("DACL", "Left Playback", DAC33_LDAC_PWR_CTRL, 2, 0),
 428         SND_SOC_DAPM_DAC("DACR", "Right Playback", DAC33_RDAC_PWR_CTRL, 2, 0),
 429
 430         /* Analog bypass */
 431         SND_SOC_DAPM_SWITCH("Analog Left Bypass", SND_SOC_NOPM, 0, 0,
 432                                 &dac33_dapm_abypassl_control),
 433         SND_SOC_DAPM_SWITCH("Analog Right Bypass", SND_SOC_NOPM, 0, 0,
 434                                 &dac33_dapm_abypassr_control),
 435
 436         SND_SOC_DAPM_REG(snd_soc_dapm_mixer, "Output Left Amp Power",
 437                          DAC33_OUT_AMP_PWR_CTRL, 6, 3, 3, 0),
 438         SND_SOC_DAPM_REG(snd_soc_dapm_mixer, "Output Right Amp Power",
 439                          DAC33_OUT_AMP_PWR_CTRL, 4, 3, 3, 0),
 440 };
 441
 442 static const struct snd_soc_dapm_route audio_map[] = {
 443         /* Analog bypass */
 444         {"Analog Left Bypass", "Switch", "LINEL"},
 445         {"Analog Right Bypass", "Switch", "LINER"},
 446
 447         {"Output Left Amp Power", NULL, "DACL"},
 448         {"Output Right Amp Power", NULL, "DACR"},
 449
 450         {"Output Left Amp Power", NULL, "Analog Left Bypass"},
 451         {"Output Right Amp Power", NULL, "Analog Right Bypass"},
 452
 453         /* output */
 454         {"LEFT_LO", NULL, "Output Left Amp Power"},
 455         {"RIGHT_LO", NULL, "Output Right Amp Power"},
 456 };
 457
 458 static int dac33_add_widgets(struct snd_soc_codec *codec)
 459 {
 460         snd_soc_dapm_new_controls(codec, dac33_dapm_widgets,
 461                                   ARRAY_SIZE(dac33_dapm_widgets));
 462
 463         /* set up audio path interconnects */
 464         snd_soc_dapm_add_routes(codec, audio_map, ARRAY_SIZE(audio_map));
 465         snd_soc_dapm_new_widgets(codec);
 466
 467         return 0;
 468 }
 469
 470 static int dac33_set_bias_level(struct snd_soc_codec *codec,
 471                                 enum snd_soc_bias_level level)
 472 {
 473         switch (level) {
 474         case SND_SOC_BIAS_ON:
 475                 dac33_soft_power(codec, 1);
 476                 break;
 477         case SND_SOC_BIAS_PREPARE:
 478                 break;
 479         case SND_SOC_BIAS_STANDBY:
 480                 if (codec->bias_level == SND_SOC_BIAS_OFF)
 481                         dac33_hard_power(codec, 1);
 482                 dac33_soft_power(codec, 0);
 483                 break;
 484         case SND_SOC_BIAS_OFF:
 485                 dac33_hard_power(codec, 0);
 486                 break;
 487         }
 488         codec->bias_level = level;
 489
 490         return 0;
 491 }
 492
 493 static void dac33_work(struct work_struct *work)
 494 {
 495         struct snd_soc_codec *codec;
 496         struct tlv320dac33_priv *dac33;
 497         u8 reg;
 498
 499         dac33 = container_of(work, struct tlv320dac33_priv, work);
 500         codec = &dac33->codec;
 501
 502         mutex_lock(&dac33->mutex);
 503         switch (dac33->state) {
 504         case DAC33_PREFILL:
 505                 dac33->state = DAC33_PLAYBACK;
 506                 dac33_write16(codec, DAC33_NSAMPLE_MSB,
 507                                 DAC33_THRREG(dac33->nsample));
 508                 dac33_write16(codec, DAC33_PREFILL_MSB,
 509                                 DAC33_THRREG(dac33->alarm_threshold));
 510                 break;
 511         case DAC33_PLAYBACK:
 512                 dac33_write16(codec, DAC33_NSAMPLE_MSB,
 513                                 DAC33_THRREG(dac33->nsample));
 514                 break;
 515         case DAC33_IDLE:
 516                 break;
 517         case DAC33_FLUSH:
 518                 dac33->state = DAC33_IDLE;
 519                 /* Mask all interrupts from dac33 */
 520                 dac33_write(codec, DAC33_FIFO_IRQ_MASK, 0);
 521
 522                 /* flush fifo */
 523                 reg = dac33_read_reg_cache(codec, DAC33_FIFO_CTRL_A);
 524                 reg |= DAC33_FIFOFLUSH;
 525                 dac33_write(codec, DAC33_FIFO_CTRL_A, reg);
 526                 break;
 527         }
 528         mutex_unlock(&dac33->mutex);
 529 }
 530
 531 static irqreturn_t dac33_interrupt_handler(int irq, void *dev)
 532 {
 533         struct snd_soc_codec *codec = dev;
 534         struct tlv320dac33_priv *dac33 = codec->private_data;
 535
 536         queue_work(dac33->dac33_wq, &dac33->work);
 537
 538         return IRQ_HANDLED;
 539 }
 540
 541 static void dac33_shutdown(struct snd_pcm_substream *substream,
 542                              struct snd_soc_dai *dai)
 543 {
 544         struct snd_soc_pcm_runtime *rtd = substream->private_data;
 545         struct snd_soc_device *socdev = rtd->socdev;
 546         struct snd_soc_codec *codec = socdev->card->codec;
 547         struct tlv320dac33_priv *dac33 = codec->private_data;
 548         unsigned int pwr_ctrl;
 549
 550         /* Stop pending workqueue */
 551         if (dac33->nsample_switch)
 552                 cancel_work_sync(&dac33->work);
 553
 554         mutex_lock(&dac33->mutex);
 555         pwr_ctrl = dac33_read_reg_cache(codec, DAC33_PWR_CTRL);
 556         pwr_ctrl &= ~(DAC33_OSCPDNB | DAC33_DACRPDNB | DAC33_DACLPDNB);
 557         dac33_write(codec, DAC33_PWR_CTRL, pwr_ctrl);
 558         mutex_unlock(&dac33->mutex);
 559 }
 560
 561 static void dac33_oscwait(struct snd_soc_codec *codec)
 562 {
 563         int timeout = 20;
 564         u8 reg;
 565
 566         do {
 567                 msleep(1);
 568                 dac33_read(codec, DAC33_INT_OSC_STATUS, &reg);
 569         } while (((reg & 0x03) != DAC33_OSCSTATUS_NORMAL) && timeout--);
 570         if ((reg & 0x03) != DAC33_OSCSTATUS_NORMAL)
 571                 dev_err(codec->dev,
 572                         "internal oscillator calibration failed\n");
 573 }
 574
 575 static int dac33_hw_params(struct snd_pcm_substream *substream,
 576                            struct snd_pcm_hw_params *params,
 577                            struct snd_soc_dai *dai)
 578 {
 579         struct snd_soc_pcm_runtime *rtd = substream->private_data;
 580         struct snd_soc_device *socdev = rtd->socdev;
 581         struct snd_soc_codec *codec = socdev->card->codec;
 582
 583         /* Check parameters for validity */
 584         switch (params_rate(params)) {
 585         case 44100:
 586         case 48000:
 587                 break;
 588         default:
 589                 dev_err(codec->dev, "unsupported rate %d\n",
 590                         params_rate(params));
 591                 return -EINVAL;
 592         }
 593
 594         switch (params_format(params)) {
 595         case SNDRV_PCM_FORMAT_S16_LE:
 596                 break;
 597         default:
 598                 dev_err(codec->dev, "unsupported format %d\n",
 599                         params_format(params));
 600                 return -EINVAL;
 601         }
 602
 603         return 0;
 604 }
 605
 606 #define CALC_OSCSET(rate, refclk) ( \
 607         ((((rate * 10000) / refclk) * 4096) + 5000) / 10000)
 608 #define CALC_RATIOSET(rate, refclk) ( \
 609         ((((refclk  * 100000) / rate) * 16384) + 50000) / 100000)
 610
 611 /*
 612  * tlv320dac33 is strict on the sequence of the register writes, if the register
 613  * writes happens in different order, than dac33 might end up in unknown state.
 614  * Use the known, working sequence of register writes to initialize the dac33.
 615  */
 616 static int dac33_prepare_chip(struct snd_pcm_substream *substream)
 617 {
 618         struct snd_soc_pcm_runtime *rtd = substream->private_data;
 619         struct snd_soc_device *socdev = rtd->socdev;
 620         struct snd_soc_codec *codec = socdev->card->codec;
 621         struct tlv320dac33_priv *dac33 = codec->private_data;
 622         unsigned int oscset, ratioset, pwr_ctrl, reg_tmp;
 623         u8 aictrl_a, fifoctrl_a;
 624
 625         switch (substream->runtime->rate) {
 626         case 44100:
 627         case 48000:
 628                 oscset = CALC_OSCSET(substream->runtime->rate, dac33->refclk);
 629                 ratioset = CALC_RATIOSET(substream->runtime->rate,
 630                                          dac33->refclk);
 631                 break;
 632         default:
 633                 dev_err(codec->dev, "unsupported rate %d\n",
 634                         substream->runtime->rate);
 635                 return -EINVAL;
 636         }
 637
 638
 639         aictrl_a = dac33_read_reg_cache(codec, DAC33_SER_AUDIOIF_CTRL_A);
 640         aictrl_a &= ~(DAC33_NCYCL_MASK | DAC33_WLEN_MASK);
 641         fifoctrl_a = dac33_read_reg_cache(codec, DAC33_FIFO_CTRL_A);
 642         fifoctrl_a &= ~DAC33_WIDTH;
 643         switch (substream->runtime->format) {
 644         case SNDRV_PCM_FORMAT_S16_LE:
 645                 aictrl_a |= (DAC33_NCYCL_16 | DAC33_WLEN_16);
 646                 fifoctrl_a |= DAC33_WIDTH;
 647                 break;
 648         default:
 649                 dev_err(codec->dev, "unsupported format %d\n",
 650                         substream->runtime->format);
 651                 return -EINVAL;
 652         }
 653
 654         mutex_lock(&dac33->mutex);
 655         dac33_soft_power(codec, 1);
 656
 657         reg_tmp = dac33_read_reg_cache(codec, DAC33_INT_OSC_CTRL);
 658         dac33_write(codec, DAC33_INT_OSC_CTRL, reg_tmp);
 659
 660         /* Write registers 0x08 and 0x09 (MSB, LSB) */
 661         dac33_write16(codec, DAC33_INT_OSC_FREQ_RAT_A, oscset);
 662
 663         /* calib time: 128 is a nice number ;) */
 664         dac33_write(codec, DAC33_CALIB_TIME, 128);
 665
 666         /* adjustment treshold & step */
 667         dac33_write(codec, DAC33_INT_OSC_CTRL_B, DAC33_ADJTHRSHLD(2) |
 668                                                  DAC33_ADJSTEP(1));
 669
 670         /* div=4 / gain=1 / div */
 671         dac33_write(codec, DAC33_INT_OSC_CTRL_C, DAC33_REFDIV(4));
 672
 673         pwr_ctrl = dac33_read_reg_cache(codec, DAC33_PWR_CTRL);
 674         pwr_ctrl |= DAC33_OSCPDNB | DAC33_DACRPDNB | DAC33_DACLPDNB;
 675         dac33_write(codec, DAC33_PWR_CTRL, pwr_ctrl);
 676
 677         dac33_oscwait(codec);
 678
 679         if (dac33->nsample_switch) {
 680                 /* 50-51 : ASRC Control registers */
 681                 dac33_write(codec, DAC33_ASRC_CTRL_A, (1 << 4)); /* div=2 */
 682                 dac33_write(codec, DAC33_ASRC_CTRL_B, 1); /* ??? */
 683
 684                 /* Write registers 0x34 and 0x35 (MSB, LSB) */
 685                 dac33_write16(codec, DAC33_SRC_REF_CLK_RATIO_A, ratioset);
 686
 687                 /* Set interrupts to high active */
 688                 dac33_write(codec, DAC33_INTP_CTRL_A, DAC33_INTPM_AHIGH);
 689
 690                 dac33_write(codec, DAC33_FIFO_IRQ_MODE_B,
 691                             DAC33_ATM(DAC33_FIFO_IRQ_MODE_LEVEL));
 692                 dac33_write(codec, DAC33_FIFO_IRQ_MASK, DAC33_MAT);
 693         } else {
 694                 /* 50-51 : ASRC Control registers */
 695                 dac33_write(codec, DAC33_ASRC_CTRL_A, DAC33_SRCBYP);
 696                 dac33_write(codec, DAC33_ASRC_CTRL_B, 0); /* ??? */
 697         }
 698
 699         if (dac33->nsample_switch)
 700                 fifoctrl_a &= ~DAC33_FBYPAS;
 701         else
 702                 fifoctrl_a |= DAC33_FBYPAS;
 703         dac33_write(codec, DAC33_FIFO_CTRL_A, fifoctrl_a);
 704
 705         dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_A, aictrl_a);
 706         reg_tmp = dac33_read_reg_cache(codec, DAC33_SER_AUDIOIF_CTRL_B);
 707         if (dac33->nsample_switch)
 708                 reg_tmp &= ~DAC33_BCLKON;
 709         else
 710                 reg_tmp |= DAC33_BCLKON;
 711         dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_B, reg_tmp);
 712
 713         if (dac33->nsample_switch) {
 714                 /* 20: BCLK divide ratio */
 715                 dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_C, 3);
 716
 717                 dac33_write16(codec, DAC33_ATHR_MSB,
 718                               DAC33_THRREG(dac33->alarm_threshold));
 719         } else {
 720                 dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_C, 32);
 721         }
 722
 723         mutex_unlock(&dac33->mutex);
 724
 725         return 0;
 726 }
 727
 728 static void dac33_calculate_times(struct snd_pcm_substream *substream)
 729 {
 730         struct snd_soc_pcm_runtime *rtd = substream->private_data;
 731         struct snd_soc_device *socdev = rtd->socdev;
 732         struct snd_soc_codec *codec = socdev->card->codec;
 733         struct tlv320dac33_priv *dac33 = codec->private_data;
 734         unsigned int nsample_limit;
 735
 736         /* Number of samples (16bit, stereo) in one period */
 737         dac33->nsample_min = snd_pcm_lib_period_bytes(substream) / 4;
 738
 739         /* Number of samples (16bit, stereo) in ALSA buffer */
 740         dac33->nsample_max = snd_pcm_lib_buffer_bytes(substream) / 4;
 741         /* Subtract one period from the total */
 742         dac33->nsample_max -= dac33->nsample_min;
 743
 744         /* Number of samples for LATENCY_TIME_MS / 2 */
 745         dac33->alarm_threshold = substream->runtime->rate /
 746                                  (1000 / (LATENCY_TIME_MS / 2));
 747
 748         /* Find and fix up the lowest nsmaple limit */
 749         nsample_limit = substream->runtime->rate / (1000 / LATENCY_TIME_MS);
 750
 751         if (dac33->nsample_min < nsample_limit)
 752                 dac33->nsample_min = nsample_limit;
 753
 754         if (dac33->nsample < dac33->nsample_min)
 755                 dac33->nsample = dac33->nsample_min;
 756
 757         /*
 758          * Find and fix up the highest nsmaple limit
 759          * In order to not overflow the DAC33 buffer substract the
 760          * alarm_threshold value from the size of the DAC33 buffer
 761          */
 762         nsample_limit = DAC33_BUFFER_SIZE_SAMPLES - dac33->alarm_threshold;
 763
 764         if (dac33->nsample_max > nsample_limit)
 765                 dac33->nsample_max = nsample_limit;
 766
 767         if (dac33->nsample > dac33->nsample_max)
 768                 dac33->nsample = dac33->nsample_max;
 769 }
 770
 771 static int dac33_pcm_prepare(struct snd_pcm_substream *substream,
 772                              struct snd_soc_dai *dai)
 773 {
 774         dac33_calculate_times(substream);
 775         dac33_prepare_chip(substream);
 776
 777         return 0;
 778 }
 779
 780 static int dac33_pcm_trigger(struct snd_pcm_substream *substream, int cmd,
 781                              struct snd_soc_dai *dai)
 782 {
 783         struct snd_soc_pcm_runtime *rtd = substream->private_data;
 784         struct snd_soc_device *socdev = rtd->socdev;
 785         struct snd_soc_codec *codec = socdev->card->codec;
 786         struct tlv320dac33_priv *dac33 = codec->private_data;
 787         int ret = 0;
 788
 789         switch (cmd) {
 790         case SNDRV_PCM_TRIGGER_START:
 791         case SNDRV_PCM_TRIGGER_RESUME:
 792         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 793                 if (dac33->nsample_switch) {
 794                         dac33->state = DAC33_PREFILL;
 795                         queue_work(dac33->dac33_wq, &dac33->work);
 796                 }
 797                 break;
 798         case SNDRV_PCM_TRIGGER_STOP:
 799         case SNDRV_PCM_TRIGGER_SUSPEND:
 800         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 801                 if (dac33->nsample_switch) {
 802                         dac33->state = DAC33_FLUSH;
 803                         queue_work(dac33->dac33_wq, &dac33->work);
 804                 }
 805                 break;
 806         default:
 807                 ret = -EINVAL;
 808         }
 809
 810         return ret;
 811 }
 812
 813 static int dac33_set_dai_sysclk(struct snd_soc_dai *codec_dai,
 814                 int clk_id, unsigned int freq, int dir)
 815 {
 816         struct snd_soc_codec *codec = codec_dai->codec;
 817         struct tlv320dac33_priv *dac33 = codec->private_data;
 818         u8 ioc_reg, asrcb_reg;
 819
 820         ioc_reg = dac33_read_reg_cache(codec, DAC33_INT_OSC_CTRL);
 821         asrcb_reg = dac33_read_reg_cache(codec, DAC33_ASRC_CTRL_B);
 822         switch (clk_id) {
 823         case TLV320DAC33_MCLK:
 824                 ioc_reg |= DAC33_REFSEL;
 825                 asrcb_reg |= DAC33_SRCREFSEL;
 826                 break;
 827         case TLV320DAC33_SLEEPCLK:
 828                 ioc_reg &= ~DAC33_REFSEL;
 829                 asrcb_reg &= ~DAC33_SRCREFSEL;
 830                 break;
 831         default:
 832                 dev_err(codec->dev, "Invalid clock ID (%d)\n", clk_id);
 833                 break;
 834         }
 835         dac33->refclk = freq;
 836
 837         dac33_write_reg_cache(codec, DAC33_INT_OSC_CTRL, ioc_reg);
 838         dac33_write_reg_cache(codec, DAC33_ASRC_CTRL_B, asrcb_reg);
 839
 840         return 0;
 841 }
 842
 843 static int dac33_set_dai_fmt(struct snd_soc_dai *codec_dai,
 844                              unsigned int fmt)
 845 {
 846         struct snd_soc_codec *codec = codec_dai->codec;
 847         u8 aictrl_a, aictrl_b;
 848
 849         aictrl_a = dac33_read_reg_cache(codec, DAC33_SER_AUDIOIF_CTRL_A);
 850         aictrl_b = dac33_read_reg_cache(codec, DAC33_SER_AUDIOIF_CTRL_B);
 851         /* set master/slave audio interface */
 852         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
 853         case SND_SOC_DAIFMT_CBM_CFM:
 854                 /* Codec Master */
 855                 aictrl_a |= (DAC33_MSBCLK | DAC33_MSWCLK);
 856                 break;
 857         case SND_SOC_DAIFMT_CBS_CFS:
 858                 /* Codec Slave */
 859                 aictrl_a &= ~(DAC33_MSBCLK | DAC33_MSWCLK);
 860                 break;
 861         default:
 862                 return -EINVAL;
 863         }
 864
 865         aictrl_a &= ~DAC33_AFMT_MASK;
 866         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
 867         case SND_SOC_DAIFMT_I2S:
 868                 aictrl_a |= DAC33_AFMT_I2S;
 869                 break;
 870         case SND_SOC_DAIFMT_DSP_A:
 871                 aictrl_a |= DAC33_AFMT_DSP;
 872                 aictrl_b &= ~DAC33_DATA_DELAY_MASK;
 873                 aictrl_b |= DAC33_DATA_DELAY(1); /* 1 bit delay */
 874                 break;
 875         case SND_SOC_DAIFMT_DSP_B:
 876                 aictrl_a |= DAC33_AFMT_DSP;
 877                 aictrl_b &= ~DAC33_DATA_DELAY_MASK; /* No delay */
 878                 break;
 879         case SND_SOC_DAIFMT_RIGHT_J:
 880                 aictrl_a |= DAC33_AFMT_RIGHT_J;
 881                 break;
 882         case SND_SOC_DAIFMT_LEFT_J:
 883                 aictrl_a |= DAC33_AFMT_LEFT_J;
 884                 break;
 885         default:
 886                 dev_err(codec->dev, "Unsupported format (%u)\n",
 887                         fmt & SND_SOC_DAIFMT_FORMAT_MASK);
 888                 return -EINVAL;
 889         }
 890
 891         dac33_write_reg_cache(codec, DAC33_SER_AUDIOIF_CTRL_A, aictrl_a);
 892         dac33_write_reg_cache(codec, DAC33_SER_AUDIOIF_CTRL_B, aictrl_b);
 893
 894         return 0;
 895 }
 896
 897 static void dac33_init_chip(struct snd_soc_codec *codec)
 898 {
 899         /* 44-46: DAC Control Registers */
 900         /* A : DAC sample rate Fsref/1.5 */
 901         dac33_write(codec, DAC33_DAC_CTRL_A, DAC33_DACRATE(1));
 902         /* B : DAC src=normal, not muted */
 903         dac33_write(codec, DAC33_DAC_CTRL_B, DAC33_DACSRCR_RIGHT |
 904                                              DAC33_DACSRCL_LEFT);
 905         /* C : (defaults) */
 906         dac33_write(codec, DAC33_DAC_CTRL_C, 0x00);
 907
 908         /* 64-65 : L&R DAC power control
 909          Line In -> OUT 1V/V Gain, DAC -> OUT 4V/V Gain*/
 910         dac33_write(codec, DAC33_LDAC_PWR_CTRL, DAC33_LROUT_GAIN(2));
 911         dac33_write(codec, DAC33_RDAC_PWR_CTRL, DAC33_LROUT_GAIN(2));
 912
 913         /* 73 : volume soft stepping control,
 914          clock source = internal osc (?) */
 915         dac33_write(codec, DAC33_ANA_VOL_SOFT_STEP_CTRL, DAC33_VOLCLKEN);
 916
 917         /* 66 : LOP/LOM Modes */
 918         dac33_write(codec, DAC33_OUT_AMP_CM_CTRL, 0xff);
 919
 920         /* 68 : LOM inverted from LOP */
 921         dac33_write(codec, DAC33_OUT_AMP_CTRL, (3<<2));
 922
 923         dac33_write(codec, DAC33_PWR_CTRL, DAC33_PDNALLB);
 924 }
 925
 926 static int dac33_soc_probe(struct platform_device *pdev)
 927 {
 928         struct snd_soc_device *socdev = platform_get_drvdata(pdev);
 929         struct snd_soc_codec *codec;
 930         struct tlv320dac33_priv *dac33;
 931         int ret = 0;
 932
 933         BUG_ON(!tlv320dac33_codec);
 934
 935         codec = tlv320dac33_codec;
 936         socdev->card->codec = codec;
 937         dac33 = codec->private_data;
 938
 939         /* Power up the codec */
 940         dac33_hard_power(codec, 1);
 941         /* Set default configuration */
 942         dac33_init_chip(codec);
 943
 944         /* register pcms */
 945         ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
 946         if (ret < 0) {
 947                 dev_err(codec->dev, "failed to create pcms\n");
 948                 goto pcm_err;
 949         }
 950
 951         snd_soc_add_controls(codec, dac33_snd_controls,
 952                              ARRAY_SIZE(dac33_snd_controls));
 953         /* Only add the nSample controls, if we have valid IRQ number */
 954         if (dac33->irq >= 0)
 955                 snd_soc_add_controls(codec, dac33_nsample_snd_controls,
 956                                      ARRAY_SIZE(dac33_nsample_snd_controls));
 957
 958         dac33_add_widgets(codec);
 959
 960         /* power on device */
 961         dac33_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
 962
 963         return 0;
 964
 965 pcm_err:
 966         dac33_hard_power(codec, 0);
 967         return ret;
 968 }
 969
 970 static int dac33_soc_remove(struct platform_device *pdev)
 971 {
 972         struct snd_soc_device *socdev = platform_get_drvdata(pdev);
 973         struct snd_soc_codec *codec = socdev->card->codec;
 974
 975         dac33_set_bias_level(codec, SND_SOC_BIAS_OFF);
 976
 977         snd_soc_free_pcms(socdev);
 978         snd_soc_dapm_free(socdev);
 979
 980         return 0;
 981 }
 982
 983 static int dac33_soc_suspend(struct platform_device *pdev, pm_message_t state)
 984 {
 985         struct snd_soc_device *socdev = platform_get_drvdata(pdev);
 986         struct snd_soc_codec *codec = socdev->card->codec;
 987
 988         dac33_set_bias_level(codec, SND_SOC_BIAS_OFF);
 989
 990         return 0;
 991 }
 992
 993 static int dac33_soc_resume(struct platform_device *pdev)
 994 {
 995         struct snd_soc_device *socdev = platform_get_drvdata(pdev);
 996         struct snd_soc_codec *codec = socdev->card->codec;
 997
 998         dac33_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
 999         dac33_set_bias_level(codec, codec->suspend_bias_level);
1000
1001         return 0;
1002 }
1003
1004 struct snd_soc_codec_device soc_codec_dev_tlv320dac33 = {
1005         .probe = dac33_soc_probe,
1006         .remove = dac33_soc_remove,
1007         .suspend = dac33_soc_suspend,
1008         .resume = dac33_soc_resume,
1009 };
1010 EXPORT_SYMBOL_GPL(soc_codec_dev_tlv320dac33);
1011
1012 #define DAC33_RATES     (SNDRV_PCM_RATE_44100 | \
1013                          SNDRV_PCM_RATE_48000)
1014 #define DAC33_FORMATS   SNDRV_PCM_FMTBIT_S16_LE
1015
1016 static struct snd_soc_dai_ops dac33_dai_ops = {
1017         .shutdown       = dac33_shutdown,
1018         .hw_params      = dac33_hw_params,
1019         .prepare        = dac33_pcm_prepare,
1020         .trigger        = dac33_pcm_trigger,
1021         .set_sysclk     = dac33_set_dai_sysclk,
1022         .set_fmt        = dac33_set_dai_fmt,
1023 };
1024
1025 struct snd_soc_dai dac33_dai = {
1026         .name = "tlv320dac33",
1027         .playback = {
1028                 .stream_name = "Playback",
1029                 .channels_min = 2,
1030                 .channels_max = 2,
1031                 .rates = DAC33_RATES,
1032                 .formats = DAC33_FORMATS,},
1033         .ops = &dac33_dai_ops,
1034 };
1035 EXPORT_SYMBOL_GPL(dac33_dai);
1036
1037 static int dac33_i2c_probe(struct i2c_client *client,
1038                            const struct i2c_device_id *id)
1039 {
1040         struct tlv320dac33_platform_data *pdata;
1041         struct tlv320dac33_priv *dac33;
1042         struct snd_soc_codec *codec;
1043         int ret = 0;
1044
1045         if (client->dev.platform_data == NULL) {
1046                 dev_err(&client->dev, "Platform data not set\n");
1047                 return -ENODEV;
1048         }
1049         pdata = client->dev.platform_data;
1050
1051         dac33 = kzalloc(sizeof(struct tlv320dac33_priv), GFP_KERNEL);
1052         if (dac33 == NULL)
1053                 return -ENOMEM;
1054
1055         codec = &dac33->codec;
1056         codec->private_data = dac33;
1057         codec->control_data = client;
1058
1059         mutex_init(&codec->mutex);
1060         mutex_init(&dac33->mutex);
1061         INIT_LIST_HEAD(&codec->dapm_widgets);
1062         INIT_LIST_HEAD(&codec->dapm_paths);
1063
1064         codec->name = "tlv320dac33";
1065         codec->owner = THIS_MODULE;
1066         codec->read = dac33_read_reg_cache;
1067         codec->write = dac33_write_locked;
1068         codec->hw_write = (hw_write_t) i2c_master_send;
1069         codec->bias_level = SND_SOC_BIAS_OFF;
1070         codec->set_bias_level = dac33_set_bias_level;
1071         codec->dai = &dac33_dai;
1072         codec->num_dai = 1;
1073         codec->reg_cache_size = ARRAY_SIZE(dac33_reg);
1074         codec->reg_cache = kmemdup(dac33_reg, ARRAY_SIZE(dac33_reg),
1075                                    GFP_KERNEL);
1076         if (codec->reg_cache == NULL) {
1077                 ret = -ENOMEM;
1078                 goto error_reg;
1079         }
1080
1081         i2c_set_clientdata(client, dac33);
1082
1083         dac33->power_gpio = pdata->power_gpio;
1084         dac33->irq = client->irq;
1085         dac33->nsample = NSAMPLE_MAX;
1086         /* Disable FIFO use by default */
1087         dac33->nsample_switch = 0;
1088
1089         tlv320dac33_codec = codec;
1090
1091         codec->dev = &client->dev;
1092         dac33_dai.dev = codec->dev;
1093
1094         /* Check if the reset GPIO number is valid and request it */
1095         if (dac33->power_gpio >= 0) {
1096                 ret = gpio_request(dac33->power_gpio, "tlv320dac33 reset");
1097                 if (ret < 0) {
1098                         dev_err(codec->dev,
1099                                 "Failed to request reset GPIO (%d)\n",
1100                                 dac33->power_gpio);
1101                         snd_soc_unregister_dai(&dac33_dai);
1102                         snd_soc_unregister_codec(codec);
1103                         goto error_gpio;
1104                 }
1105                 gpio_direction_output(dac33->power_gpio, 0);
1106         } else {
1107                 dac33->chip_power = 1;
1108         }
1109
1110         /* Check if the IRQ number is valid and request it */
1111         if (dac33->irq >= 0) {
1112                 ret = request_irq(dac33->irq, dac33_interrupt_handler,
1113                                   IRQF_TRIGGER_RISING | IRQF_DISABLED,
1114                                   codec->name, codec);
1115                 if (ret < 0) {
1116                         dev_err(codec->dev, "Could not request IRQ%d (%d)\n",
1117                                                 dac33->irq, ret);
1118                         dac33->irq = -1;
1119                 }
1120                 if (dac33->irq != -1) {
1121                         /* Setup work queue */
1122                         dac33->dac33_wq = create_rt_workqueue("tlv320dac33");
1123                         if (dac33->dac33_wq == NULL) {
1124                                 free_irq(dac33->irq, &dac33->codec);
1125                                 ret = -ENOMEM;
1126                                 goto error_wq;
1127                         }
1128
1129                         INIT_WORK(&dac33->work, dac33_work);
1130                 }
1131         }
1132
1133         ret = snd_soc_register_codec(codec);
1134         if (ret != 0) {
1135                 dev_err(codec->dev, "Failed to register codec: %d\n", ret);
1136                 goto error_codec;
1137         }
1138
1139         ret = snd_soc_register_dai(&dac33_dai);
1140         if (ret != 0) {
1141                 dev_err(codec->dev, "Failed to register DAI: %d\n", ret);
1142                 snd_soc_unregister_codec(codec);
1143                 goto error_codec;
1144         }
1145
1146         /* Shut down the codec for now */
1147         dac33_hard_power(codec, 0);
1148
1149         return ret;
1150
1151 error_codec:
1152         if (dac33->irq >= 0) {
1153                 free_irq(dac33->irq, &dac33->codec);
1154                 destroy_workqueue(dac33->dac33_wq);
1155         }
1156 error_wq:
1157         if (dac33->power_gpio >= 0)
1158                 gpio_free(dac33->power_gpio);
1159 error_gpio:
1160         kfree(codec->reg_cache);
1161 error_reg:
1162         tlv320dac33_codec = NULL;
1163         kfree(dac33);
1164
1165         return ret;
1166 }
1167
1168 static int dac33_i2c_remove(struct i2c_client *client)
1169 {
1170         struct tlv320dac33_priv *dac33;
1171
1172         dac33 = i2c_get_clientdata(client);
1173         dac33_hard_power(&dac33->codec, 0);
1174
1175         if (dac33->power_gpio >= 0)
1176                 gpio_free(dac33->power_gpio);
1177         if (dac33->irq >= 0)
1178                 free_irq(dac33->irq, &dac33->codec);
1179
1180         destroy_workqueue(dac33->dac33_wq);
1181         snd_soc_unregister_dai(&dac33_dai);
1182         snd_soc_unregister_codec(&dac33->codec);
1183         kfree(dac33->codec.reg_cache);
1184         kfree(dac33);
1185         tlv320dac33_codec = NULL;
1186
1187         return 0;
1188 }
1189
1190 static const struct i2c_device_id tlv320dac33_i2c_id[] = {
1191         {
1192                 .name = "tlv320dac33",
1193                 .driver_data = 0,
1194         },
1195         { },
1196 };
1197
1198 static struct i2c_driver tlv320dac33_i2c_driver = {
1199         .driver = {
1200                 .name = "tlv320dac33",
1201                 .owner = THIS_MODULE,
1202         },
1203         .probe          = dac33_i2c_probe,
1204         .remove         = __devexit_p(dac33_i2c_remove),
1205         .id_table       = tlv320dac33_i2c_id,
1206 };
1207
1208 static int __init dac33_module_init(void)
1209 {
1210         int r;
1211         r = i2c_add_driver(&tlv320dac33_i2c_driver);
1212         if (r < 0) {
1213                 printk(KERN_ERR "DAC33: driver registration failed\n");
1214                 return r;
1215         }
1216         return 0;
1217 }
1218 module_init(dac33_module_init);
1219
1220 static void __exit dac33_module_exit(void)
1221 {
1222         i2c_del_driver(&tlv320dac33_i2c_driver);
1223 }
1224 module_exit(dac33_module_exit);
1225
1226
1227 MODULE_DESCRIPTION("ASoC TLV320DAC33 codec driver");
1228 MODULE_AUTHOR("Peter Ujfalusi <peter.ujfalusi@nokia.com>");
1229 MODULE_LICENSE("GPL");