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Merge tag 'gvt-fixes-2017-03-23' of https://github.com/01org/gvt-linux into drm-intel...
[karo-tx-linux.git] / sound / soc / codecs / wm8400.h
1 /*
2  * wm8400.h  --  audio driver for WM8400
3  *
4  * Copyright 2008 Wolfson Microelectronics PLC.
5  * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
6  *
7  *  This program is free software; you can redistribute  it and/or modify it
8  *  under  the terms of  the GNU General  Public License as published by the
9  *  Free Software Foundation;  either version 2 of the  License, or (at your
10  *  option) any later version.
11  *
12  */
13
14 #ifndef _WM8400_CODEC_H
15 #define _WM8400_CODEC_H
16
17 #define WM8400_MCLK_DIV 0
18 #define WM8400_DACCLK_DIV 1
19 #define WM8400_ADCCLK_DIV 2
20 #define WM8400_BCLK_DIV 3
21
22 #define WM8400_MCLK_DIV_1 0x400
23 #define WM8400_MCLK_DIV_2 0x800
24
25 #define WM8400_DAC_CLKDIV_1    0x00
26 #define WM8400_DAC_CLKDIV_1_5  0x04
27 #define WM8400_DAC_CLKDIV_2    0x08
28 #define WM8400_DAC_CLKDIV_3    0x0c
29 #define WM8400_DAC_CLKDIV_4    0x10
30 #define WM8400_DAC_CLKDIV_5_5  0x14
31 #define WM8400_DAC_CLKDIV_6    0x18
32
33 #define WM8400_ADC_CLKDIV_1    0x00
34 #define WM8400_ADC_CLKDIV_1_5  0x20
35 #define WM8400_ADC_CLKDIV_2    0x40
36 #define WM8400_ADC_CLKDIV_3    0x60
37 #define WM8400_ADC_CLKDIV_4    0x80
38 #define WM8400_ADC_CLKDIV_5_5  0xa0
39 #define WM8400_ADC_CLKDIV_6    0xc0
40
41
42 #define WM8400_BCLK_DIV_1                       (0x0 << 1)
43 #define WM8400_BCLK_DIV_1_5                     (0x1 << 1)
44 #define WM8400_BCLK_DIV_2                       (0x2 << 1)
45 #define WM8400_BCLK_DIV_3                       (0x3 << 1)
46 #define WM8400_BCLK_DIV_4                       (0x4 << 1)
47 #define WM8400_BCLK_DIV_5_5                     (0x5 << 1)
48 #define WM8400_BCLK_DIV_6                       (0x6 << 1)
49 #define WM8400_BCLK_DIV_8                       (0x7 << 1)
50 #define WM8400_BCLK_DIV_11                      (0x8 << 1)
51 #define WM8400_BCLK_DIV_12                      (0x9 << 1)
52 #define WM8400_BCLK_DIV_16                      (0xA << 1)
53 #define WM8400_BCLK_DIV_22                      (0xB << 1)
54 #define WM8400_BCLK_DIV_24                      (0xC << 1)
55 #define WM8400_BCLK_DIV_32                      (0xD << 1)
56 #define WM8400_BCLK_DIV_44                      (0xE << 1)
57 #define WM8400_BCLK_DIV_48                      (0xF << 1)
58
59 #endif