2 * wm8903.c -- WM8903 ALSA SoC Audio driver
4 * Copyright 2008 Wolfson Microelectronics
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 * - TDM mode configuration.
15 * - Digital microphone support.
16 * - Interrupt support (mic detect and sequencer).
19 #include <linux/module.h>
20 #include <linux/moduleparam.h>
21 #include <linux/init.h>
22 #include <linux/delay.h>
24 #include <linux/i2c.h>
25 #include <linux/platform_device.h>
26 #include <sound/core.h>
27 #include <sound/pcm.h>
28 #include <sound/pcm_params.h>
29 #include <sound/tlv.h>
30 #include <sound/soc.h>
31 #include <sound/soc-dapm.h>
32 #include <sound/initval.h>
36 /* Register defaults at reset */
37 static u16 wm8903_reg_defaults[] = {
38 0x8903, /* R0 - SW Reset and ID */
39 0x0000, /* R1 - Revision Number */
42 0x0018, /* R4 - Bias Control 0 */
43 0x0000, /* R5 - VMID Control 0 */
44 0x0000, /* R6 - Mic Bias Control 0 */
46 0x0001, /* R8 - Analogue DAC 0 */
48 0x0001, /* R10 - Analogue ADC 0 */
50 0x0000, /* R12 - Power Management 0 */
51 0x0000, /* R13 - Power Management 1 */
52 0x0000, /* R14 - Power Management 2 */
53 0x0000, /* R15 - Power Management 3 */
54 0x0000, /* R16 - Power Management 4 */
55 0x0000, /* R17 - Power Management 5 */
56 0x0000, /* R18 - Power Management 6 */
58 0x0400, /* R20 - Clock Rates 0 */
59 0x0D07, /* R21 - Clock Rates 1 */
60 0x0000, /* R22 - Clock Rates 2 */
62 0x0050, /* R24 - Audio Interface 0 */
63 0x0242, /* R25 - Audio Interface 1 */
64 0x0008, /* R26 - Audio Interface 2 */
65 0x0022, /* R27 - Audio Interface 3 */
68 0x00C0, /* R30 - DAC Digital Volume Left */
69 0x00C0, /* R31 - DAC Digital Volume Right */
70 0x0000, /* R32 - DAC Digital 0 */
71 0x0000, /* R33 - DAC Digital 1 */
74 0x00C0, /* R36 - ADC Digital Volume Left */
75 0x00C0, /* R37 - ADC Digital Volume Right */
76 0x0000, /* R38 - ADC Digital 0 */
77 0x0073, /* R39 - Digital Microphone 0 */
78 0x09BF, /* R40 - DRC 0 */
79 0x3241, /* R41 - DRC 1 */
80 0x0020, /* R42 - DRC 2 */
81 0x0000, /* R43 - DRC 3 */
82 0x0085, /* R44 - Analogue Left Input 0 */
83 0x0085, /* R45 - Analogue Right Input 0 */
84 0x0044, /* R46 - Analogue Left Input 1 */
85 0x0044, /* R47 - Analogue Right Input 1 */
88 0x0008, /* R50 - Analogue Left Mix 0 */
89 0x0004, /* R51 - Analogue Right Mix 0 */
90 0x0000, /* R52 - Analogue Spk Mix Left 0 */
91 0x0000, /* R53 - Analogue Spk Mix Left 1 */
92 0x0000, /* R54 - Analogue Spk Mix Right 0 */
93 0x0000, /* R55 - Analogue Spk Mix Right 1 */
95 0x002D, /* R57 - Analogue OUT1 Left */
96 0x002D, /* R58 - Analogue OUT1 Right */
97 0x0039, /* R59 - Analogue OUT2 Left */
98 0x0039, /* R60 - Analogue OUT2 Right */
100 0x0139, /* R62 - Analogue OUT3 Left */
101 0x0139, /* R63 - Analogue OUT3 Right */
103 0x0000, /* R65 - Analogue SPK Output Control 0 */
105 0x0010, /* R67 - DC Servo 0 */
107 0x00A4, /* R69 - DC Servo 2 */
128 0x0000, /* R90 - Analogue HP 0 */
132 0x0000, /* R94 - Analogue Lineout 0 */
136 0x0000, /* R98 - Charge Pump 0 */
142 0x0000, /* R104 - Class W 0 */
146 0x0000, /* R108 - Write Sequencer 0 */
147 0x0000, /* R109 - Write Sequencer 1 */
148 0x0000, /* R110 - Write Sequencer 2 */
149 0x0000, /* R111 - Write Sequencer 3 */
150 0x0000, /* R112 - Write Sequencer 4 */
152 0x0000, /* R114 - Control Interface */
154 0x00A8, /* R116 - GPIO Control 1 */
155 0x00A8, /* R117 - GPIO Control 2 */
156 0x00A8, /* R118 - GPIO Control 3 */
157 0x0220, /* R119 - GPIO Control 4 */
158 0x01A0, /* R120 - GPIO Control 5 */
159 0x0000, /* R121 - Interrupt Status 1 */
160 0xFFFF, /* R122 - Interrupt Status 1 Mask */
161 0x0000, /* R123 - Interrupt Polarity 1 */
164 0x0000, /* R126 - Interrupt Control */
167 0x0000, /* R129 - Control Interface Test 1 */
187 0x6810, /* R149 - Charge Pump Test 1 */
202 0x0028, /* R164 - Clock Rate Test 4 */
210 0x0000, /* R172 - Analogue Output Bias 0 */
214 struct snd_soc_codec codec;
215 u16 reg_cache[ARRAY_SIZE(wm8903_reg_defaults)];
219 /* Reference counts */
224 struct snd_pcm_substream *master_substream;
225 struct snd_pcm_substream *slave_substream;
228 static int wm8903_volatile_register(unsigned int reg)
231 case WM8903_SW_RESET_AND_ID:
232 case WM8903_REVISION_NUMBER:
233 case WM8903_INTERRUPT_STATUS_1:
234 case WM8903_WRITE_SEQUENCER_4:
242 static int wm8903_run_sequence(struct snd_soc_codec *codec, unsigned int start)
245 struct i2c_client *i2c = codec->control_data;
249 /* Enable the sequencer */
250 reg[0] = snd_soc_read(codec, WM8903_WRITE_SEQUENCER_0);
251 reg[0] |= WM8903_WSEQ_ENA;
252 snd_soc_write(codec, WM8903_WRITE_SEQUENCER_0, reg[0]);
254 dev_dbg(&i2c->dev, "Starting sequence at %d\n", start);
256 snd_soc_write(codec, WM8903_WRITE_SEQUENCER_3,
257 start | WM8903_WSEQ_START);
259 /* Wait for it to complete. If we have the interrupt wired up then
260 * we could block waiting for an interrupt, though polling may still
261 * be desirable for diagnostic purposes.
266 reg[4] = snd_soc_read(codec, WM8903_WRITE_SEQUENCER_4);
267 } while (reg[4] & WM8903_WSEQ_BUSY);
269 dev_dbg(&i2c->dev, "Sequence complete\n");
271 /* Disable the sequencer again */
272 snd_soc_write(codec, WM8903_WRITE_SEQUENCER_0,
273 reg[0] & ~WM8903_WSEQ_ENA);
278 static void wm8903_sync_reg_cache(struct snd_soc_codec *codec, u16 *cache)
282 /* There really ought to be something better we can do here :/ */
283 for (i = 0; i < ARRAY_SIZE(wm8903_reg_defaults); i++)
284 cache[i] = codec->hw_read(codec, i);
287 static void wm8903_reset(struct snd_soc_codec *codec)
289 snd_soc_write(codec, WM8903_SW_RESET_AND_ID, 0);
290 memcpy(codec->reg_cache, wm8903_reg_defaults,
291 sizeof(wm8903_reg_defaults));
294 #define WM8903_OUTPUT_SHORT 0x8
295 #define WM8903_OUTPUT_OUT 0x4
296 #define WM8903_OUTPUT_INT 0x2
297 #define WM8903_OUTPUT_IN 0x1
299 static int wm8903_cp_event(struct snd_soc_dapm_widget *w,
300 struct snd_kcontrol *kcontrol, int event)
302 WARN_ON(event != SND_SOC_DAPM_POST_PMU);
309 * Event for headphone and line out amplifier power changes. Special
310 * power up/down sequences are required in order to maximise pop/click
313 static int wm8903_output_event(struct snd_soc_dapm_widget *w,
314 struct snd_kcontrol *kcontrol, int event)
316 struct snd_soc_codec *codec = w->codec;
324 case WM8903_POWER_MANAGEMENT_2:
325 reg = WM8903_ANALOGUE_HP_0;
326 dcs_bit = 0 + w->shift;
328 case WM8903_POWER_MANAGEMENT_3:
329 reg = WM8903_ANALOGUE_LINEOUT_0;
330 dcs_bit = 2 + w->shift;
334 return -EINVAL; /* Spurious warning from some compilers */
346 return -EINVAL; /* Spurious warning from some compilers */
349 if (event & SND_SOC_DAPM_PRE_PMU) {
350 val = snd_soc_read(codec, reg);
352 /* Short the output */
353 val &= ~(WM8903_OUTPUT_SHORT << shift);
354 snd_soc_write(codec, reg, val);
357 if (event & SND_SOC_DAPM_POST_PMU) {
358 val = snd_soc_read(codec, reg);
360 val |= (WM8903_OUTPUT_IN << shift);
361 snd_soc_write(codec, reg, val);
363 val |= (WM8903_OUTPUT_INT << shift);
364 snd_soc_write(codec, reg, val);
366 /* Turn on the output ENA_OUTP */
367 val |= (WM8903_OUTPUT_OUT << shift);
368 snd_soc_write(codec, reg, val);
370 /* Enable the DC servo */
371 dcs_reg = snd_soc_read(codec, WM8903_DC_SERVO_0);
373 snd_soc_write(codec, WM8903_DC_SERVO_0, dcs_reg);
375 /* Remove the short */
376 val |= (WM8903_OUTPUT_SHORT << shift);
377 snd_soc_write(codec, reg, val);
380 if (event & SND_SOC_DAPM_PRE_PMD) {
381 val = snd_soc_read(codec, reg);
383 /* Short the output */
384 val &= ~(WM8903_OUTPUT_SHORT << shift);
385 snd_soc_write(codec, reg, val);
387 /* Disable the DC servo */
388 dcs_reg = snd_soc_read(codec, WM8903_DC_SERVO_0);
390 snd_soc_write(codec, WM8903_DC_SERVO_0, dcs_reg);
392 /* Then disable the intermediate and output stages */
393 val &= ~((WM8903_OUTPUT_OUT | WM8903_OUTPUT_INT |
394 WM8903_OUTPUT_IN) << shift);
395 snd_soc_write(codec, reg, val);
402 * When used with DAC outputs only the WM8903 charge pump supports
403 * operation in class W mode, providing very low power consumption
404 * when used with digital sources. Enable and disable this mode
405 * automatically depending on the mixer configuration.
407 * All the relevant controls are simple switches.
409 static int wm8903_class_w_put(struct snd_kcontrol *kcontrol,
410 struct snd_ctl_elem_value *ucontrol)
412 struct snd_soc_dapm_widget *widget = snd_kcontrol_chip(kcontrol);
413 struct snd_soc_codec *codec = widget->codec;
414 struct wm8903_priv *wm8903 = codec->private_data;
415 struct i2c_client *i2c = codec->control_data;
419 reg = snd_soc_read(codec, WM8903_CLASS_W_0);
421 /* Turn it off if we're about to enable bypass */
422 if (ucontrol->value.integer.value[0]) {
423 if (wm8903->class_w_users == 0) {
424 dev_dbg(&i2c->dev, "Disabling Class W\n");
425 snd_soc_write(codec, WM8903_CLASS_W_0, reg &
426 ~(WM8903_CP_DYN_FREQ | WM8903_CP_DYN_V));
428 wm8903->class_w_users++;
431 /* Implement the change */
432 ret = snd_soc_dapm_put_volsw(kcontrol, ucontrol);
434 /* If we've just disabled the last bypass path turn Class W on */
435 if (!ucontrol->value.integer.value[0]) {
436 if (wm8903->class_w_users == 1) {
437 dev_dbg(&i2c->dev, "Enabling Class W\n");
438 snd_soc_write(codec, WM8903_CLASS_W_0, reg |
439 WM8903_CP_DYN_FREQ | WM8903_CP_DYN_V);
441 wm8903->class_w_users--;
444 dev_dbg(&i2c->dev, "Bypass use count now %d\n",
445 wm8903->class_w_users);
450 #define SOC_DAPM_SINGLE_W(xname, reg, shift, max, invert) \
451 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
452 .info = snd_soc_info_volsw, \
453 .get = snd_soc_dapm_get_volsw, .put = wm8903_class_w_put, \
454 .private_value = SOC_SINGLE_VALUE(reg, shift, max, invert) }
457 /* ALSA can only do steps of .01dB */
458 static const DECLARE_TLV_DB_SCALE(digital_tlv, -7200, 75, 1);
460 static const DECLARE_TLV_DB_SCALE(digital_sidetone_tlv, -3600, 300, 0);
461 static const DECLARE_TLV_DB_SCALE(out_tlv, -5700, 100, 0);
463 static const DECLARE_TLV_DB_SCALE(drc_tlv_thresh, 0, 75, 0);
464 static const DECLARE_TLV_DB_SCALE(drc_tlv_amp, -2250, 75, 0);
465 static const DECLARE_TLV_DB_SCALE(drc_tlv_min, 0, 600, 0);
466 static const DECLARE_TLV_DB_SCALE(drc_tlv_max, 1200, 600, 0);
467 static const DECLARE_TLV_DB_SCALE(drc_tlv_startup, -300, 50, 0);
469 static const char *drc_slope_text[] = {
470 "1", "1/2", "1/4", "1/8", "1/16", "0"
473 static const struct soc_enum drc_slope_r0 =
474 SOC_ENUM_SINGLE(WM8903_DRC_2, 3, 6, drc_slope_text);
476 static const struct soc_enum drc_slope_r1 =
477 SOC_ENUM_SINGLE(WM8903_DRC_2, 0, 6, drc_slope_text);
479 static const char *drc_attack_text[] = {
481 "363us", "762us", "1.45ms", "2.9ms", "5.8ms", "11.6ms", "23.2ms",
482 "46.4ms", "92.8ms", "185.6ms"
485 static const struct soc_enum drc_attack =
486 SOC_ENUM_SINGLE(WM8903_DRC_1, 12, 11, drc_attack_text);
488 static const char *drc_decay_text[] = {
489 "186ms", "372ms", "743ms", "1.49s", "2.97s", "5.94s", "11.89s",
493 static const struct soc_enum drc_decay =
494 SOC_ENUM_SINGLE(WM8903_DRC_1, 8, 9, drc_decay_text);
496 static const char *drc_ff_delay_text[] = {
497 "5 samples", "9 samples"
500 static const struct soc_enum drc_ff_delay =
501 SOC_ENUM_SINGLE(WM8903_DRC_0, 5, 2, drc_ff_delay_text);
503 static const char *drc_qr_decay_text[] = {
504 "0.725ms", "1.45ms", "5.8ms"
507 static const struct soc_enum drc_qr_decay =
508 SOC_ENUM_SINGLE(WM8903_DRC_1, 4, 3, drc_qr_decay_text);
510 static const char *drc_smoothing_text[] = {
511 "Low", "Medium", "High"
514 static const struct soc_enum drc_smoothing =
515 SOC_ENUM_SINGLE(WM8903_DRC_0, 11, 3, drc_smoothing_text);
517 static const char *soft_mute_text[] = {
518 "Fast (fs/2)", "Slow (fs/32)"
521 static const struct soc_enum soft_mute =
522 SOC_ENUM_SINGLE(WM8903_DAC_DIGITAL_1, 10, 2, soft_mute_text);
524 static const char *mute_mode_text[] = {
528 static const struct soc_enum mute_mode =
529 SOC_ENUM_SINGLE(WM8903_DAC_DIGITAL_1, 9, 2, mute_mode_text);
531 static const char *dac_deemphasis_text[] = {
532 "Disabled", "32kHz", "44.1kHz", "48kHz"
535 static const struct soc_enum dac_deemphasis =
536 SOC_ENUM_SINGLE(WM8903_DAC_DIGITAL_1, 1, 4, dac_deemphasis_text);
538 static const char *companding_text[] = {
542 static const struct soc_enum dac_companding =
543 SOC_ENUM_SINGLE(WM8903_AUDIO_INTERFACE_0, 0, 2, companding_text);
545 static const struct soc_enum adc_companding =
546 SOC_ENUM_SINGLE(WM8903_AUDIO_INTERFACE_0, 2, 2, companding_text);
548 static const char *input_mode_text[] = {
549 "Single-Ended", "Differential Line", "Differential Mic"
552 static const struct soc_enum linput_mode_enum =
553 SOC_ENUM_SINGLE(WM8903_ANALOGUE_LEFT_INPUT_1, 0, 3, input_mode_text);
555 static const struct soc_enum rinput_mode_enum =
556 SOC_ENUM_SINGLE(WM8903_ANALOGUE_RIGHT_INPUT_1, 0, 3, input_mode_text);
558 static const char *linput_mux_text[] = {
559 "IN1L", "IN2L", "IN3L"
562 static const struct soc_enum linput_enum =
563 SOC_ENUM_SINGLE(WM8903_ANALOGUE_LEFT_INPUT_1, 2, 3, linput_mux_text);
565 static const struct soc_enum linput_inv_enum =
566 SOC_ENUM_SINGLE(WM8903_ANALOGUE_LEFT_INPUT_1, 4, 3, linput_mux_text);
568 static const char *rinput_mux_text[] = {
569 "IN1R", "IN2R", "IN3R"
572 static const struct soc_enum rinput_enum =
573 SOC_ENUM_SINGLE(WM8903_ANALOGUE_RIGHT_INPUT_1, 2, 3, rinput_mux_text);
575 static const struct soc_enum rinput_inv_enum =
576 SOC_ENUM_SINGLE(WM8903_ANALOGUE_RIGHT_INPUT_1, 4, 3, rinput_mux_text);
579 static const char *sidetone_text[] = {
580 "None", "Left", "Right"
583 static const struct soc_enum lsidetone_enum =
584 SOC_ENUM_SINGLE(WM8903_DAC_DIGITAL_0, 2, 3, sidetone_text);
586 static const struct soc_enum rsidetone_enum =
587 SOC_ENUM_SINGLE(WM8903_DAC_DIGITAL_0, 0, 3, sidetone_text);
589 static const struct snd_kcontrol_new wm8903_snd_controls[] = {
591 /* Input PGAs - No TLV since the scale depends on PGA mode */
592 SOC_SINGLE("Left Input PGA Switch", WM8903_ANALOGUE_LEFT_INPUT_0,
594 SOC_SINGLE("Left Input PGA Volume", WM8903_ANALOGUE_LEFT_INPUT_0,
596 SOC_SINGLE("Left Input PGA Common Mode Switch", WM8903_ANALOGUE_LEFT_INPUT_1,
599 SOC_SINGLE("Right Input PGA Switch", WM8903_ANALOGUE_RIGHT_INPUT_0,
601 SOC_SINGLE("Right Input PGA Volume", WM8903_ANALOGUE_RIGHT_INPUT_0,
603 SOC_SINGLE("Right Input PGA Common Mode Switch", WM8903_ANALOGUE_RIGHT_INPUT_1,
607 SOC_SINGLE("DRC Switch", WM8903_DRC_0, 15, 1, 0),
608 SOC_ENUM("DRC Compressor Slope R0", drc_slope_r0),
609 SOC_ENUM("DRC Compressor Slope R1", drc_slope_r1),
610 SOC_SINGLE_TLV("DRC Compressor Threashold Volume", WM8903_DRC_3, 5, 124, 1,
612 SOC_SINGLE_TLV("DRC Volume", WM8903_DRC_3, 0, 30, 1, drc_tlv_amp),
613 SOC_SINGLE_TLV("DRC Minimum Gain Volume", WM8903_DRC_1, 2, 3, 1, drc_tlv_min),
614 SOC_SINGLE_TLV("DRC Maximum Gain Volume", WM8903_DRC_1, 0, 3, 0, drc_tlv_max),
615 SOC_ENUM("DRC Attack Rate", drc_attack),
616 SOC_ENUM("DRC Decay Rate", drc_decay),
617 SOC_ENUM("DRC FF Delay", drc_ff_delay),
618 SOC_SINGLE("DRC Anticlip Switch", WM8903_DRC_0, 1, 1, 0),
619 SOC_SINGLE("DRC QR Switch", WM8903_DRC_0, 2, 1, 0),
620 SOC_SINGLE_TLV("DRC QR Threashold Volume", WM8903_DRC_0, 6, 3, 0, drc_tlv_max),
621 SOC_ENUM("DRC QR Decay Rate", drc_qr_decay),
622 SOC_SINGLE("DRC Smoothing Switch", WM8903_DRC_0, 3, 1, 0),
623 SOC_SINGLE("DRC Smoothing Hysteresis Switch", WM8903_DRC_0, 0, 1, 0),
624 SOC_ENUM("DRC Smoothing Threashold", drc_smoothing),
625 SOC_SINGLE_TLV("DRC Startup Volume", WM8903_DRC_0, 6, 18, 0, drc_tlv_startup),
627 SOC_DOUBLE_R_TLV("Digital Capture Volume", WM8903_ADC_DIGITAL_VOLUME_LEFT,
628 WM8903_ADC_DIGITAL_VOLUME_RIGHT, 1, 96, 0, digital_tlv),
629 SOC_ENUM("ADC Companding Mode", adc_companding),
630 SOC_SINGLE("ADC Companding Switch", WM8903_AUDIO_INTERFACE_0, 3, 1, 0),
632 SOC_DOUBLE_TLV("Digital Sidetone Volume", WM8903_DAC_DIGITAL_0, 4, 8,
633 12, 0, digital_sidetone_tlv),
636 SOC_DOUBLE_R_TLV("Digital Playback Volume", WM8903_DAC_DIGITAL_VOLUME_LEFT,
637 WM8903_DAC_DIGITAL_VOLUME_RIGHT, 1, 120, 0, digital_tlv),
638 SOC_ENUM("DAC Soft Mute Rate", soft_mute),
639 SOC_ENUM("DAC Mute Mode", mute_mode),
640 SOC_SINGLE("DAC Mono Switch", WM8903_DAC_DIGITAL_1, 12, 1, 0),
641 SOC_ENUM("DAC De-emphasis", dac_deemphasis),
642 SOC_ENUM("DAC Companding Mode", dac_companding),
643 SOC_SINGLE("DAC Companding Switch", WM8903_AUDIO_INTERFACE_0, 1, 1, 0),
646 SOC_DOUBLE_R("Headphone Switch",
647 WM8903_ANALOGUE_OUT1_LEFT, WM8903_ANALOGUE_OUT1_RIGHT,
649 SOC_DOUBLE_R("Headphone ZC Switch",
650 WM8903_ANALOGUE_OUT1_LEFT, WM8903_ANALOGUE_OUT1_RIGHT,
652 SOC_DOUBLE_R_TLV("Headphone Volume",
653 WM8903_ANALOGUE_OUT1_LEFT, WM8903_ANALOGUE_OUT1_RIGHT,
657 SOC_DOUBLE_R("Line Out Switch",
658 WM8903_ANALOGUE_OUT2_LEFT, WM8903_ANALOGUE_OUT2_RIGHT,
660 SOC_DOUBLE_R("Line Out ZC Switch",
661 WM8903_ANALOGUE_OUT2_LEFT, WM8903_ANALOGUE_OUT2_RIGHT,
663 SOC_DOUBLE_R_TLV("Line Out Volume",
664 WM8903_ANALOGUE_OUT2_LEFT, WM8903_ANALOGUE_OUT2_RIGHT,
668 SOC_DOUBLE_R("Speaker Switch",
669 WM8903_ANALOGUE_OUT3_LEFT, WM8903_ANALOGUE_OUT3_RIGHT, 8, 1, 1),
670 SOC_DOUBLE_R("Speaker ZC Switch",
671 WM8903_ANALOGUE_OUT3_LEFT, WM8903_ANALOGUE_OUT3_RIGHT, 6, 1, 0),
672 SOC_DOUBLE_R_TLV("Speaker Volume",
673 WM8903_ANALOGUE_OUT3_LEFT, WM8903_ANALOGUE_OUT3_RIGHT,
677 static const struct snd_kcontrol_new linput_mode_mux =
678 SOC_DAPM_ENUM("Left Input Mode Mux", linput_mode_enum);
680 static const struct snd_kcontrol_new rinput_mode_mux =
681 SOC_DAPM_ENUM("Right Input Mode Mux", rinput_mode_enum);
683 static const struct snd_kcontrol_new linput_mux =
684 SOC_DAPM_ENUM("Left Input Mux", linput_enum);
686 static const struct snd_kcontrol_new linput_inv_mux =
687 SOC_DAPM_ENUM("Left Inverting Input Mux", linput_inv_enum);
689 static const struct snd_kcontrol_new rinput_mux =
690 SOC_DAPM_ENUM("Right Input Mux", rinput_enum);
692 static const struct snd_kcontrol_new rinput_inv_mux =
693 SOC_DAPM_ENUM("Right Inverting Input Mux", rinput_inv_enum);
695 static const struct snd_kcontrol_new lsidetone_mux =
696 SOC_DAPM_ENUM("DACL Sidetone Mux", lsidetone_enum);
698 static const struct snd_kcontrol_new rsidetone_mux =
699 SOC_DAPM_ENUM("DACR Sidetone Mux", rsidetone_enum);
701 static const struct snd_kcontrol_new left_output_mixer[] = {
702 SOC_DAPM_SINGLE("DACL Switch", WM8903_ANALOGUE_LEFT_MIX_0, 3, 1, 0),
703 SOC_DAPM_SINGLE("DACR Switch", WM8903_ANALOGUE_LEFT_MIX_0, 2, 1, 0),
704 SOC_DAPM_SINGLE_W("Left Bypass Switch", WM8903_ANALOGUE_LEFT_MIX_0, 1, 1, 0),
705 SOC_DAPM_SINGLE_W("Right Bypass Switch", WM8903_ANALOGUE_LEFT_MIX_0, 0, 1, 0),
708 static const struct snd_kcontrol_new right_output_mixer[] = {
709 SOC_DAPM_SINGLE("DACL Switch", WM8903_ANALOGUE_RIGHT_MIX_0, 3, 1, 0),
710 SOC_DAPM_SINGLE("DACR Switch", WM8903_ANALOGUE_RIGHT_MIX_0, 2, 1, 0),
711 SOC_DAPM_SINGLE_W("Left Bypass Switch", WM8903_ANALOGUE_RIGHT_MIX_0, 1, 1, 0),
712 SOC_DAPM_SINGLE_W("Right Bypass Switch", WM8903_ANALOGUE_RIGHT_MIX_0, 0, 1, 0),
715 static const struct snd_kcontrol_new left_speaker_mixer[] = {
716 SOC_DAPM_SINGLE("DACL Switch", WM8903_ANALOGUE_SPK_MIX_LEFT_0, 3, 1, 0),
717 SOC_DAPM_SINGLE("DACR Switch", WM8903_ANALOGUE_SPK_MIX_LEFT_0, 2, 1, 0),
718 SOC_DAPM_SINGLE("Left Bypass Switch", WM8903_ANALOGUE_SPK_MIX_LEFT_0, 1, 1, 0),
719 SOC_DAPM_SINGLE("Right Bypass Switch", WM8903_ANALOGUE_SPK_MIX_LEFT_0,
723 static const struct snd_kcontrol_new right_speaker_mixer[] = {
724 SOC_DAPM_SINGLE("DACL Switch", WM8903_ANALOGUE_SPK_MIX_RIGHT_0, 3, 1, 0),
725 SOC_DAPM_SINGLE("DACR Switch", WM8903_ANALOGUE_SPK_MIX_RIGHT_0, 2, 1, 0),
726 SOC_DAPM_SINGLE("Left Bypass Switch", WM8903_ANALOGUE_SPK_MIX_RIGHT_0,
728 SOC_DAPM_SINGLE("Right Bypass Switch", WM8903_ANALOGUE_SPK_MIX_RIGHT_0,
732 static const struct snd_soc_dapm_widget wm8903_dapm_widgets[] = {
733 SND_SOC_DAPM_INPUT("IN1L"),
734 SND_SOC_DAPM_INPUT("IN1R"),
735 SND_SOC_DAPM_INPUT("IN2L"),
736 SND_SOC_DAPM_INPUT("IN2R"),
737 SND_SOC_DAPM_INPUT("IN3L"),
738 SND_SOC_DAPM_INPUT("IN3R"),
740 SND_SOC_DAPM_OUTPUT("HPOUTL"),
741 SND_SOC_DAPM_OUTPUT("HPOUTR"),
742 SND_SOC_DAPM_OUTPUT("LINEOUTL"),
743 SND_SOC_DAPM_OUTPUT("LINEOUTR"),
744 SND_SOC_DAPM_OUTPUT("LOP"),
745 SND_SOC_DAPM_OUTPUT("LON"),
746 SND_SOC_DAPM_OUTPUT("ROP"),
747 SND_SOC_DAPM_OUTPUT("RON"),
749 SND_SOC_DAPM_MICBIAS("Mic Bias", WM8903_MIC_BIAS_CONTROL_0, 0, 0),
751 SND_SOC_DAPM_MUX("Left Input Mux", SND_SOC_NOPM, 0, 0, &linput_mux),
752 SND_SOC_DAPM_MUX("Left Input Inverting Mux", SND_SOC_NOPM, 0, 0,
754 SND_SOC_DAPM_MUX("Left Input Mode Mux", SND_SOC_NOPM, 0, 0, &linput_mode_mux),
756 SND_SOC_DAPM_MUX("Right Input Mux", SND_SOC_NOPM, 0, 0, &rinput_mux),
757 SND_SOC_DAPM_MUX("Right Input Inverting Mux", SND_SOC_NOPM, 0, 0,
759 SND_SOC_DAPM_MUX("Right Input Mode Mux", SND_SOC_NOPM, 0, 0, &rinput_mode_mux),
761 SND_SOC_DAPM_PGA("Left Input PGA", WM8903_POWER_MANAGEMENT_0, 1, 0, NULL, 0),
762 SND_SOC_DAPM_PGA("Right Input PGA", WM8903_POWER_MANAGEMENT_0, 0, 0, NULL, 0),
764 SND_SOC_DAPM_ADC("ADCL", "Left HiFi Capture", WM8903_POWER_MANAGEMENT_6, 1, 0),
765 SND_SOC_DAPM_ADC("ADCR", "Right HiFi Capture", WM8903_POWER_MANAGEMENT_6, 0, 0),
767 SND_SOC_DAPM_MUX("DACL Sidetone", SND_SOC_NOPM, 0, 0, &lsidetone_mux),
768 SND_SOC_DAPM_MUX("DACR Sidetone", SND_SOC_NOPM, 0, 0, &rsidetone_mux),
770 SND_SOC_DAPM_DAC("DACL", "Left Playback", WM8903_POWER_MANAGEMENT_6, 3, 0),
771 SND_SOC_DAPM_DAC("DACR", "Right Playback", WM8903_POWER_MANAGEMENT_6, 2, 0),
773 SND_SOC_DAPM_MIXER("Left Output Mixer", WM8903_POWER_MANAGEMENT_1, 1, 0,
774 left_output_mixer, ARRAY_SIZE(left_output_mixer)),
775 SND_SOC_DAPM_MIXER("Right Output Mixer", WM8903_POWER_MANAGEMENT_1, 0, 0,
776 right_output_mixer, ARRAY_SIZE(right_output_mixer)),
778 SND_SOC_DAPM_MIXER("Left Speaker Mixer", WM8903_POWER_MANAGEMENT_4, 1, 0,
779 left_speaker_mixer, ARRAY_SIZE(left_speaker_mixer)),
780 SND_SOC_DAPM_MIXER("Right Speaker Mixer", WM8903_POWER_MANAGEMENT_4, 0, 0,
781 right_speaker_mixer, ARRAY_SIZE(right_speaker_mixer)),
783 SND_SOC_DAPM_PGA_E("Left Headphone Output PGA", WM8903_POWER_MANAGEMENT_2,
784 1, 0, NULL, 0, wm8903_output_event,
785 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
786 SND_SOC_DAPM_PRE_PMD),
787 SND_SOC_DAPM_PGA_E("Right Headphone Output PGA", WM8903_POWER_MANAGEMENT_2,
788 0, 0, NULL, 0, wm8903_output_event,
789 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
790 SND_SOC_DAPM_PRE_PMD),
792 SND_SOC_DAPM_PGA_E("Left Line Output PGA", WM8903_POWER_MANAGEMENT_3, 1, 0,
793 NULL, 0, wm8903_output_event,
794 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
795 SND_SOC_DAPM_PRE_PMD),
796 SND_SOC_DAPM_PGA_E("Right Line Output PGA", WM8903_POWER_MANAGEMENT_3, 0, 0,
797 NULL, 0, wm8903_output_event,
798 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
799 SND_SOC_DAPM_PRE_PMD),
801 SND_SOC_DAPM_PGA("Left Speaker PGA", WM8903_POWER_MANAGEMENT_5, 1, 0,
803 SND_SOC_DAPM_PGA("Right Speaker PGA", WM8903_POWER_MANAGEMENT_5, 0, 0,
806 SND_SOC_DAPM_SUPPLY("Charge Pump", WM8903_CHARGE_PUMP_0, 0, 0,
807 wm8903_cp_event, SND_SOC_DAPM_POST_PMU),
808 SND_SOC_DAPM_SUPPLY("CLK_DSP", WM8903_CLOCK_RATES_2, 1, 0, NULL, 0),
811 static const struct snd_soc_dapm_route intercon[] = {
813 { "Left Input Mux", "IN1L", "IN1L" },
814 { "Left Input Mux", "IN2L", "IN2L" },
815 { "Left Input Mux", "IN3L", "IN3L" },
817 { "Left Input Inverting Mux", "IN1L", "IN1L" },
818 { "Left Input Inverting Mux", "IN2L", "IN2L" },
819 { "Left Input Inverting Mux", "IN3L", "IN3L" },
821 { "Right Input Mux", "IN1R", "IN1R" },
822 { "Right Input Mux", "IN2R", "IN2R" },
823 { "Right Input Mux", "IN3R", "IN3R" },
825 { "Right Input Inverting Mux", "IN1R", "IN1R" },
826 { "Right Input Inverting Mux", "IN2R", "IN2R" },
827 { "Right Input Inverting Mux", "IN3R", "IN3R" },
829 { "Left Input Mode Mux", "Single-Ended", "Left Input Inverting Mux" },
830 { "Left Input Mode Mux", "Differential Line",
832 { "Left Input Mode Mux", "Differential Line",
833 "Left Input Inverting Mux" },
834 { "Left Input Mode Mux", "Differential Mic",
836 { "Left Input Mode Mux", "Differential Mic",
837 "Left Input Inverting Mux" },
839 { "Right Input Mode Mux", "Single-Ended",
840 "Right Input Inverting Mux" },
841 { "Right Input Mode Mux", "Differential Line",
843 { "Right Input Mode Mux", "Differential Line",
844 "Right Input Inverting Mux" },
845 { "Right Input Mode Mux", "Differential Mic",
847 { "Right Input Mode Mux", "Differential Mic",
848 "Right Input Inverting Mux" },
850 { "Left Input PGA", NULL, "Left Input Mode Mux" },
851 { "Right Input PGA", NULL, "Right Input Mode Mux" },
853 { "ADCL", NULL, "Left Input PGA" },
854 { "ADCL", NULL, "CLK_DSP" },
855 { "ADCR", NULL, "Right Input PGA" },
856 { "ADCR", NULL, "CLK_DSP" },
858 { "DACL Sidetone", "Left", "ADCL" },
859 { "DACL Sidetone", "Right", "ADCR" },
860 { "DACR Sidetone", "Left", "ADCL" },
861 { "DACR Sidetone", "Right", "ADCR" },
863 { "DACL", NULL, "DACL Sidetone" },
864 { "DACL", NULL, "CLK_DSP" },
865 { "DACR", NULL, "DACR Sidetone" },
866 { "DACR", NULL, "CLK_DSP" },
868 { "Left Output Mixer", "Left Bypass Switch", "Left Input PGA" },
869 { "Left Output Mixer", "Right Bypass Switch", "Right Input PGA" },
870 { "Left Output Mixer", "DACL Switch", "DACL" },
871 { "Left Output Mixer", "DACR Switch", "DACR" },
873 { "Right Output Mixer", "Left Bypass Switch", "Left Input PGA" },
874 { "Right Output Mixer", "Right Bypass Switch", "Right Input PGA" },
875 { "Right Output Mixer", "DACL Switch", "DACL" },
876 { "Right Output Mixer", "DACR Switch", "DACR" },
878 { "Left Speaker Mixer", "Left Bypass Switch", "Left Input PGA" },
879 { "Left Speaker Mixer", "Right Bypass Switch", "Right Input PGA" },
880 { "Left Speaker Mixer", "DACL Switch", "DACL" },
881 { "Left Speaker Mixer", "DACR Switch", "DACR" },
883 { "Right Speaker Mixer", "Left Bypass Switch", "Left Input PGA" },
884 { "Right Speaker Mixer", "Right Bypass Switch", "Right Input PGA" },
885 { "Right Speaker Mixer", "DACL Switch", "DACL" },
886 { "Right Speaker Mixer", "DACR Switch", "DACR" },
888 { "Left Line Output PGA", NULL, "Left Output Mixer" },
889 { "Right Line Output PGA", NULL, "Right Output Mixer" },
891 { "Left Headphone Output PGA", NULL, "Left Output Mixer" },
892 { "Right Headphone Output PGA", NULL, "Right Output Mixer" },
894 { "Left Speaker PGA", NULL, "Left Speaker Mixer" },
895 { "Right Speaker PGA", NULL, "Right Speaker Mixer" },
897 { "HPOUTL", NULL, "Left Headphone Output PGA" },
898 { "HPOUTR", NULL, "Right Headphone Output PGA" },
900 { "LINEOUTL", NULL, "Left Line Output PGA" },
901 { "LINEOUTR", NULL, "Right Line Output PGA" },
903 { "LOP", NULL, "Left Speaker PGA" },
904 { "LON", NULL, "Left Speaker PGA" },
906 { "ROP", NULL, "Right Speaker PGA" },
907 { "RON", NULL, "Right Speaker PGA" },
909 { "Left Headphone Output PGA", NULL, "Charge Pump" },
910 { "Right Headphone Output PGA", NULL, "Charge Pump" },
911 { "Left Line Output PGA", NULL, "Charge Pump" },
912 { "Right Line Output PGA", NULL, "Charge Pump" },
915 static int wm8903_add_widgets(struct snd_soc_codec *codec)
917 snd_soc_dapm_new_controls(codec, wm8903_dapm_widgets,
918 ARRAY_SIZE(wm8903_dapm_widgets));
920 snd_soc_dapm_add_routes(codec, intercon, ARRAY_SIZE(intercon));
922 snd_soc_dapm_new_widgets(codec);
927 static int wm8903_set_bias_level(struct snd_soc_codec *codec,
928 enum snd_soc_bias_level level)
930 struct i2c_client *i2c = codec->control_data;
934 case SND_SOC_BIAS_ON:
935 case SND_SOC_BIAS_PREPARE:
936 reg = snd_soc_read(codec, WM8903_VMID_CONTROL_0);
937 reg &= ~(WM8903_VMID_RES_MASK);
938 reg |= WM8903_VMID_RES_50K;
939 snd_soc_write(codec, WM8903_VMID_CONTROL_0, reg);
942 case SND_SOC_BIAS_STANDBY:
943 if (codec->bias_level == SND_SOC_BIAS_OFF) {
944 snd_soc_write(codec, WM8903_CLOCK_RATES_2,
947 /* Change DC servo dither level in startup sequence */
948 snd_soc_write(codec, WM8903_WRITE_SEQUENCER_0, 0x11);
949 snd_soc_write(codec, WM8903_WRITE_SEQUENCER_1, 0x1257);
950 snd_soc_write(codec, WM8903_WRITE_SEQUENCER_2, 0x2);
952 wm8903_run_sequence(codec, 0);
953 wm8903_sync_reg_cache(codec, codec->reg_cache);
955 /* Enable low impedence charge pump output */
956 reg = snd_soc_read(codec,
957 WM8903_CONTROL_INTERFACE_TEST_1);
958 snd_soc_write(codec, WM8903_CONTROL_INTERFACE_TEST_1,
959 reg | WM8903_TEST_KEY);
960 reg2 = snd_soc_read(codec, WM8903_CHARGE_PUMP_TEST_1);
961 snd_soc_write(codec, WM8903_CHARGE_PUMP_TEST_1,
962 reg2 | WM8903_CP_SW_KELVIN_MODE_MASK);
963 snd_soc_write(codec, WM8903_CONTROL_INTERFACE_TEST_1,
966 /* By default no bypass paths are enabled so
967 * enable Class W support.
969 dev_dbg(&i2c->dev, "Enabling Class W\n");
970 snd_soc_write(codec, WM8903_CLASS_W_0, reg |
971 WM8903_CP_DYN_FREQ | WM8903_CP_DYN_V);
974 reg = snd_soc_read(codec, WM8903_VMID_CONTROL_0);
975 reg &= ~(WM8903_VMID_RES_MASK);
976 reg |= WM8903_VMID_RES_250K;
977 snd_soc_write(codec, WM8903_VMID_CONTROL_0, reg);
980 case SND_SOC_BIAS_OFF:
981 wm8903_run_sequence(codec, 32);
982 reg = snd_soc_read(codec, WM8903_CLOCK_RATES_2);
983 reg &= ~WM8903_CLK_SYS_ENA;
984 snd_soc_write(codec, WM8903_CLOCK_RATES_2, reg);
988 codec->bias_level = level;
993 static int wm8903_set_dai_sysclk(struct snd_soc_dai *codec_dai,
994 int clk_id, unsigned int freq, int dir)
996 struct snd_soc_codec *codec = codec_dai->codec;
997 struct wm8903_priv *wm8903 = codec->private_data;
999 wm8903->sysclk = freq;
1004 static int wm8903_set_dai_fmt(struct snd_soc_dai *codec_dai,
1007 struct snd_soc_codec *codec = codec_dai->codec;
1008 u16 aif1 = snd_soc_read(codec, WM8903_AUDIO_INTERFACE_1);
1010 aif1 &= ~(WM8903_LRCLK_DIR | WM8903_BCLK_DIR | WM8903_AIF_FMT_MASK |
1011 WM8903_AIF_LRCLK_INV | WM8903_AIF_BCLK_INV);
1013 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1014 case SND_SOC_DAIFMT_CBS_CFS:
1016 case SND_SOC_DAIFMT_CBS_CFM:
1017 aif1 |= WM8903_LRCLK_DIR;
1019 case SND_SOC_DAIFMT_CBM_CFM:
1020 aif1 |= WM8903_LRCLK_DIR | WM8903_BCLK_DIR;
1022 case SND_SOC_DAIFMT_CBM_CFS:
1023 aif1 |= WM8903_BCLK_DIR;
1029 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1030 case SND_SOC_DAIFMT_DSP_A:
1033 case SND_SOC_DAIFMT_DSP_B:
1034 aif1 |= 0x3 | WM8903_AIF_LRCLK_INV;
1036 case SND_SOC_DAIFMT_I2S:
1039 case SND_SOC_DAIFMT_RIGHT_J:
1042 case SND_SOC_DAIFMT_LEFT_J:
1048 /* Clock inversion */
1049 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1050 case SND_SOC_DAIFMT_DSP_A:
1051 case SND_SOC_DAIFMT_DSP_B:
1052 /* frame inversion not valid for DSP modes */
1053 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1054 case SND_SOC_DAIFMT_NB_NF:
1056 case SND_SOC_DAIFMT_IB_NF:
1057 aif1 |= WM8903_AIF_BCLK_INV;
1063 case SND_SOC_DAIFMT_I2S:
1064 case SND_SOC_DAIFMT_RIGHT_J:
1065 case SND_SOC_DAIFMT_LEFT_J:
1066 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1067 case SND_SOC_DAIFMT_NB_NF:
1069 case SND_SOC_DAIFMT_IB_IF:
1070 aif1 |= WM8903_AIF_BCLK_INV | WM8903_AIF_LRCLK_INV;
1072 case SND_SOC_DAIFMT_IB_NF:
1073 aif1 |= WM8903_AIF_BCLK_INV;
1075 case SND_SOC_DAIFMT_NB_IF:
1076 aif1 |= WM8903_AIF_LRCLK_INV;
1086 snd_soc_write(codec, WM8903_AUDIO_INTERFACE_1, aif1);
1091 static int wm8903_digital_mute(struct snd_soc_dai *codec_dai, int mute)
1093 struct snd_soc_codec *codec = codec_dai->codec;
1096 reg = snd_soc_read(codec, WM8903_DAC_DIGITAL_1);
1099 reg |= WM8903_DAC_MUTE;
1101 reg &= ~WM8903_DAC_MUTE;
1103 snd_soc_write(codec, WM8903_DAC_DIGITAL_1, reg);
1108 /* Lookup table for CLK_SYS/fs ratio. 256fs or more is recommended
1109 * for optimal performance so we list the lower rates first and match
1110 * on the last match we find. */
1116 } clk_sys_ratios[] = {
1117 { 64, 0x0, 0x0, 1 },
1118 { 68, 0x0, 0x1, 1 },
1119 { 125, 0x0, 0x2, 1 },
1120 { 128, 0x1, 0x0, 1 },
1121 { 136, 0x1, 0x1, 1 },
1122 { 192, 0x2, 0x0, 1 },
1123 { 204, 0x2, 0x1, 1 },
1125 { 64, 0x0, 0x0, 2 },
1126 { 68, 0x0, 0x1, 2 },
1127 { 125, 0x0, 0x2, 2 },
1128 { 128, 0x1, 0x0, 2 },
1129 { 136, 0x1, 0x1, 2 },
1130 { 192, 0x2, 0x0, 2 },
1131 { 204, 0x2, 0x1, 2 },
1133 { 250, 0x2, 0x2, 1 },
1134 { 256, 0x3, 0x0, 1 },
1135 { 272, 0x3, 0x1, 1 },
1136 { 384, 0x4, 0x0, 1 },
1137 { 408, 0x4, 0x1, 1 },
1138 { 375, 0x4, 0x2, 1 },
1139 { 512, 0x5, 0x0, 1 },
1140 { 544, 0x5, 0x1, 1 },
1141 { 500, 0x5, 0x2, 1 },
1142 { 768, 0x6, 0x0, 1 },
1143 { 816, 0x6, 0x1, 1 },
1144 { 750, 0x6, 0x2, 1 },
1145 { 1024, 0x7, 0x0, 1 },
1146 { 1088, 0x7, 0x1, 1 },
1147 { 1000, 0x7, 0x2, 1 },
1148 { 1408, 0x8, 0x0, 1 },
1149 { 1496, 0x8, 0x1, 1 },
1150 { 1536, 0x9, 0x0, 1 },
1151 { 1632, 0x9, 0x1, 1 },
1152 { 1500, 0x9, 0x2, 1 },
1154 { 250, 0x2, 0x2, 2 },
1155 { 256, 0x3, 0x0, 2 },
1156 { 272, 0x3, 0x1, 2 },
1157 { 384, 0x4, 0x0, 2 },
1158 { 408, 0x4, 0x1, 2 },
1159 { 375, 0x4, 0x2, 2 },
1160 { 512, 0x5, 0x0, 2 },
1161 { 544, 0x5, 0x1, 2 },
1162 { 500, 0x5, 0x2, 2 },
1163 { 768, 0x6, 0x0, 2 },
1164 { 816, 0x6, 0x1, 2 },
1165 { 750, 0x6, 0x2, 2 },
1166 { 1024, 0x7, 0x0, 2 },
1167 { 1088, 0x7, 0x1, 2 },
1168 { 1000, 0x7, 0x2, 2 },
1169 { 1408, 0x8, 0x0, 2 },
1170 { 1496, 0x8, 0x1, 2 },
1171 { 1536, 0x9, 0x0, 2 },
1172 { 1632, 0x9, 0x1, 2 },
1173 { 1500, 0x9, 0x2, 2 },
1176 /* CLK_SYS/BCLK ratios - multiplied by 10 due to .5s */
1200 /* Sample rates for DSP */
1204 } sample_rates[] = {
1219 static int wm8903_startup(struct snd_pcm_substream *substream,
1220 struct snd_soc_dai *dai)
1222 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1223 struct snd_soc_device *socdev = rtd->socdev;
1224 struct snd_soc_codec *codec = socdev->card->codec;
1225 struct wm8903_priv *wm8903 = codec->private_data;
1226 struct i2c_client *i2c = codec->control_data;
1227 struct snd_pcm_runtime *master_runtime;
1229 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
1230 wm8903->playback_active++;
1232 wm8903->capture_active++;
1234 /* The DAI has shared clocks so if we already have a playback or
1235 * capture going then constrain this substream to match it.
1237 if (wm8903->master_substream) {
1238 master_runtime = wm8903->master_substream->runtime;
1240 dev_dbg(&i2c->dev, "Constraining to %d bits\n",
1241 master_runtime->sample_bits);
1243 snd_pcm_hw_constraint_minmax(substream->runtime,
1244 SNDRV_PCM_HW_PARAM_SAMPLE_BITS,
1245 master_runtime->sample_bits,
1246 master_runtime->sample_bits);
1248 wm8903->slave_substream = substream;
1250 wm8903->master_substream = substream;
1255 static void wm8903_shutdown(struct snd_pcm_substream *substream,
1256 struct snd_soc_dai *dai)
1258 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1259 struct snd_soc_device *socdev = rtd->socdev;
1260 struct snd_soc_codec *codec = socdev->card->codec;
1261 struct wm8903_priv *wm8903 = codec->private_data;
1263 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
1264 wm8903->playback_active--;
1266 wm8903->capture_active--;
1268 if (wm8903->master_substream == substream)
1269 wm8903->master_substream = wm8903->slave_substream;
1271 wm8903->slave_substream = NULL;
1274 static int wm8903_hw_params(struct snd_pcm_substream *substream,
1275 struct snd_pcm_hw_params *params,
1276 struct snd_soc_dai *dai)
1278 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1279 struct snd_soc_device *socdev = rtd->socdev;
1280 struct snd_soc_codec *codec = socdev->card->codec;
1281 struct wm8903_priv *wm8903 = codec->private_data;
1282 struct i2c_client *i2c = codec->control_data;
1283 int fs = params_rate(params);
1293 u16 aif1 = snd_soc_read(codec, WM8903_AUDIO_INTERFACE_1);
1294 u16 aif2 = snd_soc_read(codec, WM8903_AUDIO_INTERFACE_2);
1295 u16 aif3 = snd_soc_read(codec, WM8903_AUDIO_INTERFACE_3);
1296 u16 clock0 = snd_soc_read(codec, WM8903_CLOCK_RATES_0);
1297 u16 clock1 = snd_soc_read(codec, WM8903_CLOCK_RATES_1);
1298 u16 dac_digital1 = snd_soc_read(codec, WM8903_DAC_DIGITAL_1);
1300 if (substream == wm8903->slave_substream) {
1301 dev_dbg(&i2c->dev, "Ignoring hw_params for slave substream\n");
1305 /* Enable sloping stopband filter for low sample rates */
1307 dac_digital1 |= WM8903_DAC_SB_FILT;
1309 dac_digital1 &= ~WM8903_DAC_SB_FILT;
1311 /* Configure sample rate logic for DSP - choose nearest rate */
1313 best_val = abs(sample_rates[dsp_config].rate - fs);
1314 for (i = 1; i < ARRAY_SIZE(sample_rates); i++) {
1315 cur_val = abs(sample_rates[i].rate - fs);
1316 if (cur_val <= best_val) {
1322 /* Constraints should stop us hitting this but let's make sure */
1323 if (wm8903->capture_active)
1324 switch (sample_rates[dsp_config].rate) {
1327 dev_err(&i2c->dev, "%dHz unsupported by ADC\n",
1335 dev_dbg(&i2c->dev, "DSP fs = %dHz\n", sample_rates[dsp_config].rate);
1336 clock1 &= ~WM8903_SAMPLE_RATE_MASK;
1337 clock1 |= sample_rates[dsp_config].value;
1339 aif1 &= ~WM8903_AIF_WL_MASK;
1341 switch (params_format(params)) {
1342 case SNDRV_PCM_FORMAT_S16_LE:
1345 case SNDRV_PCM_FORMAT_S20_3LE:
1349 case SNDRV_PCM_FORMAT_S24_LE:
1353 case SNDRV_PCM_FORMAT_S32_LE:
1361 dev_dbg(&i2c->dev, "MCLK = %dHz, target sample rate = %dHz\n",
1362 wm8903->sysclk, fs);
1364 /* We may not have an MCLK which allows us to generate exactly
1365 * the clock we want, particularly with USB derived inputs, so
1369 best_val = abs((wm8903->sysclk /
1370 (clk_sys_ratios[0].mclk_div *
1371 clk_sys_ratios[0].div)) - fs);
1372 for (i = 1; i < ARRAY_SIZE(clk_sys_ratios); i++) {
1373 cur_val = abs((wm8903->sysclk /
1374 (clk_sys_ratios[i].mclk_div *
1375 clk_sys_ratios[i].div)) - fs);
1377 if (cur_val <= best_val) {
1383 if (clk_sys_ratios[clk_config].mclk_div == 2) {
1384 clock0 |= WM8903_MCLKDIV2;
1385 clk_sys = wm8903->sysclk / 2;
1387 clock0 &= ~WM8903_MCLKDIV2;
1388 clk_sys = wm8903->sysclk;
1391 clock1 &= ~(WM8903_CLK_SYS_RATE_MASK |
1392 WM8903_CLK_SYS_MODE_MASK);
1393 clock1 |= clk_sys_ratios[clk_config].rate << WM8903_CLK_SYS_RATE_SHIFT;
1394 clock1 |= clk_sys_ratios[clk_config].mode << WM8903_CLK_SYS_MODE_SHIFT;
1396 dev_dbg(&i2c->dev, "CLK_SYS_RATE=%x, CLK_SYS_MODE=%x div=%d\n",
1397 clk_sys_ratios[clk_config].rate,
1398 clk_sys_ratios[clk_config].mode,
1399 clk_sys_ratios[clk_config].div);
1401 dev_dbg(&i2c->dev, "Actual CLK_SYS = %dHz\n", clk_sys);
1403 /* We may not get quite the right frequency if using
1404 * approximate clocks so look for the closest match that is
1405 * higher than the target (we need to ensure that there enough
1406 * BCLKs to clock out the samples).
1409 best_val = ((clk_sys * 10) / bclk_divs[0].ratio) - bclk;
1411 while (i < ARRAY_SIZE(bclk_divs)) {
1412 cur_val = ((clk_sys * 10) / bclk_divs[i].ratio) - bclk;
1413 if (cur_val < 0) /* BCLK table is sorted */
1420 aif2 &= ~WM8903_BCLK_DIV_MASK;
1421 aif3 &= ~WM8903_LRCLK_RATE_MASK;
1423 dev_dbg(&i2c->dev, "BCLK ratio %d for %dHz - actual BCLK = %dHz\n",
1424 bclk_divs[bclk_div].ratio / 10, bclk,
1425 (clk_sys * 10) / bclk_divs[bclk_div].ratio);
1427 aif2 |= bclk_divs[bclk_div].div;
1430 snd_soc_write(codec, WM8903_CLOCK_RATES_0, clock0);
1431 snd_soc_write(codec, WM8903_CLOCK_RATES_1, clock1);
1432 snd_soc_write(codec, WM8903_AUDIO_INTERFACE_1, aif1);
1433 snd_soc_write(codec, WM8903_AUDIO_INTERFACE_2, aif2);
1434 snd_soc_write(codec, WM8903_AUDIO_INTERFACE_3, aif3);
1435 snd_soc_write(codec, WM8903_DAC_DIGITAL_1, dac_digital1);
1440 #define WM8903_PLAYBACK_RATES (SNDRV_PCM_RATE_8000 |\
1441 SNDRV_PCM_RATE_11025 | \
1442 SNDRV_PCM_RATE_16000 | \
1443 SNDRV_PCM_RATE_22050 | \
1444 SNDRV_PCM_RATE_32000 | \
1445 SNDRV_PCM_RATE_44100 | \
1446 SNDRV_PCM_RATE_48000 | \
1447 SNDRV_PCM_RATE_88200 | \
1448 SNDRV_PCM_RATE_96000)
1450 #define WM8903_CAPTURE_RATES (SNDRV_PCM_RATE_8000 |\
1451 SNDRV_PCM_RATE_11025 | \
1452 SNDRV_PCM_RATE_16000 | \
1453 SNDRV_PCM_RATE_22050 | \
1454 SNDRV_PCM_RATE_32000 | \
1455 SNDRV_PCM_RATE_44100 | \
1456 SNDRV_PCM_RATE_48000)
1458 #define WM8903_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
1459 SNDRV_PCM_FMTBIT_S20_3LE |\
1460 SNDRV_PCM_FMTBIT_S24_LE)
1462 static struct snd_soc_dai_ops wm8903_dai_ops = {
1463 .startup = wm8903_startup,
1464 .shutdown = wm8903_shutdown,
1465 .hw_params = wm8903_hw_params,
1466 .digital_mute = wm8903_digital_mute,
1467 .set_fmt = wm8903_set_dai_fmt,
1468 .set_sysclk = wm8903_set_dai_sysclk,
1471 struct snd_soc_dai wm8903_dai = {
1474 .stream_name = "Playback",
1477 .rates = WM8903_PLAYBACK_RATES,
1478 .formats = WM8903_FORMATS,
1481 .stream_name = "Capture",
1484 .rates = WM8903_CAPTURE_RATES,
1485 .formats = WM8903_FORMATS,
1487 .ops = &wm8903_dai_ops,
1488 .symmetric_rates = 1,
1490 EXPORT_SYMBOL_GPL(wm8903_dai);
1492 static int wm8903_suspend(struct platform_device *pdev, pm_message_t state)
1494 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
1495 struct snd_soc_codec *codec = socdev->card->codec;
1497 wm8903_set_bias_level(codec, SND_SOC_BIAS_OFF);
1502 static int wm8903_resume(struct platform_device *pdev)
1504 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
1505 struct snd_soc_codec *codec = socdev->card->codec;
1506 struct i2c_client *i2c = codec->control_data;
1508 u16 *reg_cache = codec->reg_cache;
1509 u16 *tmp_cache = kmemdup(codec->reg_cache, sizeof(wm8903_reg_defaults),
1512 /* Bring the codec back up to standby first to minimise pop/clicks */
1513 wm8903_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1514 wm8903_set_bias_level(codec, codec->suspend_bias_level);
1516 /* Sync back everything else */
1518 for (i = 2; i < ARRAY_SIZE(wm8903_reg_defaults); i++)
1519 if (tmp_cache[i] != reg_cache[i])
1520 snd_soc_write(codec, i, tmp_cache[i]);
1522 dev_err(&i2c->dev, "Failed to allocate temporary cache\n");
1528 static struct snd_soc_codec *wm8903_codec;
1530 static __devinit int wm8903_i2c_probe(struct i2c_client *i2c,
1531 const struct i2c_device_id *id)
1533 struct wm8903_priv *wm8903;
1534 struct snd_soc_codec *codec;
1538 wm8903 = kzalloc(sizeof(struct wm8903_priv), GFP_KERNEL);
1542 codec = &wm8903->codec;
1544 mutex_init(&codec->mutex);
1545 INIT_LIST_HEAD(&codec->dapm_widgets);
1546 INIT_LIST_HEAD(&codec->dapm_paths);
1548 codec->dev = &i2c->dev;
1549 codec->name = "WM8903";
1550 codec->owner = THIS_MODULE;
1551 codec->bias_level = SND_SOC_BIAS_OFF;
1552 codec->set_bias_level = wm8903_set_bias_level;
1553 codec->dai = &wm8903_dai;
1555 codec->reg_cache_size = ARRAY_SIZE(wm8903->reg_cache);
1556 codec->reg_cache = &wm8903->reg_cache[0];
1557 codec->private_data = wm8903;
1558 codec->volatile_register = wm8903_volatile_register;
1560 i2c_set_clientdata(i2c, codec);
1561 codec->control_data = i2c;
1563 ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_I2C);
1565 dev_err(&i2c->dev, "Failed to set cache I/O: %d\n", ret);
1569 val = snd_soc_read(codec, WM8903_SW_RESET_AND_ID);
1570 if (val != wm8903_reg_defaults[WM8903_SW_RESET_AND_ID]) {
1572 "Device with ID register %x is not a WM8903\n", val);
1576 val = snd_soc_read(codec, WM8903_REVISION_NUMBER);
1577 dev_info(&i2c->dev, "WM8903 revision %d\n",
1578 val & WM8903_CHIP_REV_MASK);
1580 wm8903_reset(codec);
1582 /* power on device */
1583 wm8903_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1585 /* Latch volume update bits */
1586 val = snd_soc_read(codec, WM8903_ADC_DIGITAL_VOLUME_LEFT);
1587 val |= WM8903_ADCVU;
1588 snd_soc_write(codec, WM8903_ADC_DIGITAL_VOLUME_LEFT, val);
1589 snd_soc_write(codec, WM8903_ADC_DIGITAL_VOLUME_RIGHT, val);
1591 val = snd_soc_read(codec, WM8903_DAC_DIGITAL_VOLUME_LEFT);
1592 val |= WM8903_DACVU;
1593 snd_soc_write(codec, WM8903_DAC_DIGITAL_VOLUME_LEFT, val);
1594 snd_soc_write(codec, WM8903_DAC_DIGITAL_VOLUME_RIGHT, val);
1596 val = snd_soc_read(codec, WM8903_ANALOGUE_OUT1_LEFT);
1597 val |= WM8903_HPOUTVU;
1598 snd_soc_write(codec, WM8903_ANALOGUE_OUT1_LEFT, val);
1599 snd_soc_write(codec, WM8903_ANALOGUE_OUT1_RIGHT, val);
1601 val = snd_soc_read(codec, WM8903_ANALOGUE_OUT2_LEFT);
1602 val |= WM8903_LINEOUTVU;
1603 snd_soc_write(codec, WM8903_ANALOGUE_OUT2_LEFT, val);
1604 snd_soc_write(codec, WM8903_ANALOGUE_OUT2_RIGHT, val);
1606 val = snd_soc_read(codec, WM8903_ANALOGUE_OUT3_LEFT);
1607 val |= WM8903_SPKVU;
1608 snd_soc_write(codec, WM8903_ANALOGUE_OUT3_LEFT, val);
1609 snd_soc_write(codec, WM8903_ANALOGUE_OUT3_RIGHT, val);
1611 /* Enable DAC soft mute by default */
1612 val = snd_soc_read(codec, WM8903_DAC_DIGITAL_1);
1613 val |= WM8903_DAC_MUTEMODE;
1614 snd_soc_write(codec, WM8903_DAC_DIGITAL_1, val);
1616 wm8903_dai.dev = &i2c->dev;
1617 wm8903_codec = codec;
1619 ret = snd_soc_register_codec(codec);
1621 dev_err(&i2c->dev, "Failed to register codec: %d\n", ret);
1625 ret = snd_soc_register_dai(&wm8903_dai);
1627 dev_err(&i2c->dev, "Failed to register DAI: %d\n", ret);
1634 snd_soc_unregister_codec(codec);
1636 wm8903_codec = NULL;
1641 static __devexit int wm8903_i2c_remove(struct i2c_client *client)
1643 struct snd_soc_codec *codec = i2c_get_clientdata(client);
1645 snd_soc_unregister_dai(&wm8903_dai);
1646 snd_soc_unregister_codec(codec);
1648 wm8903_set_bias_level(codec, SND_SOC_BIAS_OFF);
1650 kfree(codec->private_data);
1652 wm8903_codec = NULL;
1653 wm8903_dai.dev = NULL;
1658 /* i2c codec control layer */
1659 static const struct i2c_device_id wm8903_i2c_id[] = {
1663 MODULE_DEVICE_TABLE(i2c, wm8903_i2c_id);
1665 static struct i2c_driver wm8903_i2c_driver = {
1668 .owner = THIS_MODULE,
1670 .probe = wm8903_i2c_probe,
1671 .remove = __devexit_p(wm8903_i2c_remove),
1672 .id_table = wm8903_i2c_id,
1675 static int wm8903_probe(struct platform_device *pdev)
1677 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
1680 if (!wm8903_codec) {
1681 dev_err(&pdev->dev, "I2C device not yet probed\n");
1685 socdev->card->codec = wm8903_codec;
1688 ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
1690 dev_err(&pdev->dev, "failed to create pcms\n");
1694 snd_soc_add_controls(socdev->card->codec, wm8903_snd_controls,
1695 ARRAY_SIZE(wm8903_snd_controls));
1696 wm8903_add_widgets(socdev->card->codec);
1704 /* power down chip */
1705 static int wm8903_remove(struct platform_device *pdev)
1707 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
1708 struct snd_soc_codec *codec = socdev->card->codec;
1710 if (codec->control_data)
1711 wm8903_set_bias_level(codec, SND_SOC_BIAS_OFF);
1713 snd_soc_free_pcms(socdev);
1714 snd_soc_dapm_free(socdev);
1719 struct snd_soc_codec_device soc_codec_dev_wm8903 = {
1720 .probe = wm8903_probe,
1721 .remove = wm8903_remove,
1722 .suspend = wm8903_suspend,
1723 .resume = wm8903_resume,
1725 EXPORT_SYMBOL_GPL(soc_codec_dev_wm8903);
1727 static int __init wm8903_modinit(void)
1729 return i2c_add_driver(&wm8903_i2c_driver);
1731 module_init(wm8903_modinit);
1733 static void __exit wm8903_exit(void)
1735 i2c_del_driver(&wm8903_i2c_driver);
1737 module_exit(wm8903_exit);
1739 MODULE_DESCRIPTION("ASoC WM8903 driver");
1740 MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.cm>");
1741 MODULE_LICENSE("GPL");