2 * wm8993.c -- WM8993 ALSA SoC audio driver
4 * Copyright 2009 Wolfson Microelectronics plc
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/module.h>
14 #include <linux/moduleparam.h>
15 #include <linux/init.h>
16 #include <linux/delay.h>
18 #include <linux/i2c.h>
19 #include <linux/spi/spi.h>
20 #include <sound/core.h>
21 #include <sound/pcm.h>
22 #include <sound/pcm_params.h>
23 #include <sound/tlv.h>
24 #include <sound/soc.h>
25 #include <sound/soc-dapm.h>
26 #include <sound/initval.h>
27 #include <sound/wm8993.h>
32 static u16 wm8993_reg_defaults[WM8993_REGISTER_COUNT] = {
33 0x8993, /* R0 - Software Reset */
34 0x0000, /* R1 - Power Management (1) */
35 0x6000, /* R2 - Power Management (2) */
36 0x0000, /* R3 - Power Management (3) */
37 0x4050, /* R4 - Audio Interface (1) */
38 0x4000, /* R5 - Audio Interface (2) */
39 0x01C8, /* R6 - Clocking 1 */
40 0x0000, /* R7 - Clocking 2 */
41 0x0000, /* R8 - Audio Interface (3) */
42 0x0040, /* R9 - Audio Interface (4) */
43 0x0004, /* R10 - DAC CTRL */
44 0x00C0, /* R11 - Left DAC Digital Volume */
45 0x00C0, /* R12 - Right DAC Digital Volume */
46 0x0000, /* R13 - Digital Side Tone */
47 0x0300, /* R14 - ADC CTRL */
48 0x00C0, /* R15 - Left ADC Digital Volume */
49 0x00C0, /* R16 - Right ADC Digital Volume */
51 0x0000, /* R18 - GPIO CTRL 1 */
52 0x0010, /* R19 - GPIO1 */
53 0x0000, /* R20 - IRQ_DEBOUNCE */
55 0x8000, /* R22 - GPIOCTRL 2 */
56 0x0800, /* R23 - GPIO_POL */
57 0x008B, /* R24 - Left Line Input 1&2 Volume */
58 0x008B, /* R25 - Left Line Input 3&4 Volume */
59 0x008B, /* R26 - Right Line Input 1&2 Volume */
60 0x008B, /* R27 - Right Line Input 3&4 Volume */
61 0x006D, /* R28 - Left Output Volume */
62 0x006D, /* R29 - Right Output Volume */
63 0x0066, /* R30 - Line Outputs Volume */
64 0x0020, /* R31 - HPOUT2 Volume */
65 0x0079, /* R32 - Left OPGA Volume */
66 0x0079, /* R33 - Right OPGA Volume */
67 0x0003, /* R34 - SPKMIXL Attenuation */
68 0x0003, /* R35 - SPKMIXR Attenuation */
69 0x0011, /* R36 - SPKOUT Mixers */
70 0x0100, /* R37 - SPKOUT Boost */
71 0x0079, /* R38 - Speaker Volume Left */
72 0x0079, /* R39 - Speaker Volume Right */
73 0x0000, /* R40 - Input Mixer2 */
74 0x0000, /* R41 - Input Mixer3 */
75 0x0000, /* R42 - Input Mixer4 */
76 0x0000, /* R43 - Input Mixer5 */
77 0x0000, /* R44 - Input Mixer6 */
78 0x0000, /* R45 - Output Mixer1 */
79 0x0000, /* R46 - Output Mixer2 */
80 0x0000, /* R47 - Output Mixer3 */
81 0x0000, /* R48 - Output Mixer4 */
82 0x0000, /* R49 - Output Mixer5 */
83 0x0000, /* R50 - Output Mixer6 */
84 0x0000, /* R51 - HPOUT2 Mixer */
85 0x0000, /* R52 - Line Mixer1 */
86 0x0000, /* R53 - Line Mixer2 */
87 0x0000, /* R54 - Speaker Mixer */
88 0x0000, /* R55 - Additional Control */
89 0x0000, /* R56 - AntiPOP1 */
90 0x0000, /* R57 - AntiPOP2 */
91 0x0000, /* R58 - MICBIAS */
93 0x0000, /* R60 - FLL Control 1 */
94 0x0000, /* R61 - FLL Control 2 */
95 0x0000, /* R62 - FLL Control 3 */
96 0x2EE0, /* R63 - FLL Control 4 */
97 0x0002, /* R64 - FLL Control 5 */
98 0x2287, /* R65 - Clocking 3 */
99 0x025F, /* R66 - Clocking 4 */
100 0x0000, /* R67 - MW Slave Control */
102 0x0002, /* R69 - Bus Control 1 */
103 0x0000, /* R70 - Write Sequencer 0 */
104 0x0000, /* R71 - Write Sequencer 1 */
105 0x0000, /* R72 - Write Sequencer 2 */
106 0x0000, /* R73 - Write Sequencer 3 */
107 0x0000, /* R74 - Write Sequencer 4 */
108 0x0000, /* R75 - Write Sequencer 5 */
109 0x1F25, /* R76 - Charge Pump 1 */
114 0x0000, /* R81 - Class W 0 */
117 0x0000, /* R84 - DC Servo 0 */
118 0x054A, /* R85 - DC Servo 1 */
120 0x0000, /* R87 - DC Servo 3 */
121 0x0000, /* R88 - DC Servo Readback 0 */
122 0x0000, /* R89 - DC Servo Readback 1 */
123 0x0000, /* R90 - DC Servo Readback 2 */
129 0x0100, /* R96 - Analogue HP 0 */
131 0x0000, /* R98 - EQ1 */
132 0x000C, /* R99 - EQ2 */
133 0x000C, /* R100 - EQ3 */
134 0x000C, /* R101 - EQ4 */
135 0x000C, /* R102 - EQ5 */
136 0x000C, /* R103 - EQ6 */
137 0x0FCA, /* R104 - EQ7 */
138 0x0400, /* R105 - EQ8 */
139 0x00D8, /* R106 - EQ9 */
140 0x1EB5, /* R107 - EQ10 */
141 0xF145, /* R108 - EQ11 */
142 0x0B75, /* R109 - EQ12 */
143 0x01C5, /* R110 - EQ13 */
144 0x1C58, /* R111 - EQ14 */
145 0xF373, /* R112 - EQ15 */
146 0x0A54, /* R113 - EQ16 */
147 0x0558, /* R114 - EQ17 */
148 0x168E, /* R115 - EQ18 */
149 0xF829, /* R116 - EQ19 */
150 0x07AD, /* R117 - EQ20 */
151 0x1103, /* R118 - EQ21 */
152 0x0564, /* R119 - EQ22 */
153 0x0559, /* R120 - EQ23 */
154 0x4000, /* R121 - EQ24 */
155 0x0000, /* R122 - Digital Pulls */
156 0x0F08, /* R123 - DRC Control 1 */
157 0x0000, /* R124 - DRC Control 2 */
158 0x0080, /* R125 - DRC Control 3 */
159 0x0000, /* R126 - DRC Control 4 */
165 } clk_sys_rates[] = {
194 int div; /* *10 due to .5s */
216 u16 reg_cache[WM8993_REGISTER_COUNT];
217 struct wm8993_platform_data pdata;
218 struct snd_soc_codec codec;
223 unsigned int mclk_rate;
224 unsigned int sysclk_rate;
228 unsigned int fll_fref;
229 unsigned int fll_fout;
232 static unsigned int wm8993_read_hw(struct snd_soc_codec *codec, u8 reg)
234 struct i2c_msg xfer[2];
237 struct i2c_client *i2c = codec->control_data;
240 xfer[0].addr = i2c->addr;
246 xfer[1].addr = i2c->addr;
247 xfer[1].flags = I2C_M_RD;
249 xfer[1].buf = (u8 *)&data;
251 ret = i2c_transfer(i2c->adapter, xfer, 2);
253 dev_err(codec->dev, "Failed to read 0x%x: %d\n", reg, ret);
257 return (data >> 8) | ((data & 0xff) << 8);
260 static int wm8993_volatile(unsigned int reg)
263 case WM8993_SOFTWARE_RESET:
264 case WM8993_DC_SERVO_0:
265 case WM8993_DC_SERVO_READBACK_0:
266 case WM8993_DC_SERVO_READBACK_1:
267 case WM8993_DC_SERVO_READBACK_2:
274 static unsigned int wm8993_read(struct snd_soc_codec *codec,
277 u16 *reg_cache = codec->reg_cache;
279 BUG_ON(reg > WM8993_MAX_REGISTER);
281 if (wm8993_volatile(reg))
282 return wm8993_read_hw(codec, reg);
284 return reg_cache[reg];
287 static int wm8993_write(struct snd_soc_codec *codec, unsigned int reg,
290 u16 *reg_cache = codec->reg_cache;
294 BUG_ON(reg > WM8993_MAX_REGISTER);
297 * D15..D9 WM8993 register offset
298 * D8...D0 register data
301 data[1] = value >> 8;
302 data[2] = value & 0x00ff;
304 if (!wm8993_volatile(reg))
305 reg_cache[reg] = value;
307 ret = codec->hw_write(codec->control_data, data, 3);
324 /* The size in bits of the FLL divide multiplied by 10
325 * to allow rounding later */
326 #define FIXED_FLL_SIZE ((1 << 16) * 10)
335 { 64000, 128000, 3, 8 },
336 { 128000, 256000, 2, 4 },
337 { 256000, 1000000, 1, 2 },
338 { 1000000, 13500000, 0, 1 },
341 static int fll_factors(struct _fll_div *fll_div, unsigned int Fref,
345 unsigned int K, Ndiv, Nmod, target;
349 /* Fref must be <=13.5MHz */
351 fll_div->fll_clk_ref_div = 0;
352 while ((Fref / div) > 13500000) {
354 fll_div->fll_clk_ref_div++;
357 pr_err("Can't scale %dMHz input down to <=13.5MHz\n",
363 pr_debug("Fref=%u Fout=%u\n", Fref, Fout);
365 /* Apply the division for our remaining calculations */
368 /* Fvco should be 90-100MHz; don't check the upper bound */
371 while (target < 90000000) {
375 pr_err("Unable to find FLL_OUTDIV for Fout=%uHz\n",
380 fll_div->fll_outdiv = div;
382 pr_debug("Fvco=%dHz\n", target);
384 /* Find an appropraite FLL_FRATIO and factor it out of the target */
385 for (i = 0; i < ARRAY_SIZE(fll_fratios); i++) {
386 if (fll_fratios[i].min <= Fref && Fref <= fll_fratios[i].max) {
387 fll_div->fll_fratio = fll_fratios[i].fll_fratio;
388 target /= fll_fratios[i].ratio;
392 if (i == ARRAY_SIZE(fll_fratios)) {
393 pr_err("Unable to find FLL_FRATIO for Fref=%uHz\n", Fref);
397 /* Now, calculate N.K */
398 Ndiv = target / Fref;
401 Nmod = target % Fref;
402 pr_debug("Nmod=%d\n", Nmod);
404 /* Calculate fractional part - scale up so we can round. */
405 Kpart = FIXED_FLL_SIZE * (long long)Nmod;
409 K = Kpart & 0xFFFFFFFF;
414 /* Move down to proper range now rounding is done */
417 pr_debug("N=%x K=%x FLL_FRATIO=%x FLL_OUTDIV=%x FLL_CLK_REF_DIV=%x\n",
418 fll_div->n, fll_div->k,
419 fll_div->fll_fratio, fll_div->fll_outdiv,
420 fll_div->fll_clk_ref_div);
425 static int wm8993_set_fll(struct snd_soc_dai *dai, int fll_id, int source,
426 unsigned int Fref, unsigned int Fout)
428 struct snd_soc_codec *codec = dai->codec;
429 struct wm8993_priv *wm8993 = codec->private_data;
430 u16 reg1, reg4, reg5;
431 struct _fll_div fll_div;
435 if (Fref == wm8993->fll_fref && Fout == wm8993->fll_fout)
438 /* Disable the FLL */
440 dev_dbg(codec->dev, "FLL disabled\n");
441 wm8993->fll_fref = 0;
442 wm8993->fll_fout = 0;
444 reg1 = wm8993_read(codec, WM8993_FLL_CONTROL_1);
445 reg1 &= ~WM8993_FLL_ENA;
446 wm8993_write(codec, WM8993_FLL_CONTROL_1, reg1);
451 ret = fll_factors(&fll_div, Fref, Fout);
455 reg5 = wm8993_read(codec, WM8993_FLL_CONTROL_5);
456 reg5 &= ~WM8993_FLL_CLK_SRC_MASK;
459 case WM8993_FLL_MCLK:
462 case WM8993_FLL_LRCLK:
466 case WM8993_FLL_BCLK:
471 dev_err(codec->dev, "Unknown FLL ID %d\n", fll_id);
475 /* Any FLL configuration change requires that the FLL be
477 reg1 = wm8993_read(codec, WM8993_FLL_CONTROL_1);
478 reg1 &= ~WM8993_FLL_ENA;
479 wm8993_write(codec, WM8993_FLL_CONTROL_1, reg1);
481 /* Apply the configuration */
483 reg1 |= WM8993_FLL_FRAC_MASK;
485 reg1 &= ~WM8993_FLL_FRAC_MASK;
486 wm8993_write(codec, WM8993_FLL_CONTROL_1, reg1);
488 wm8993_write(codec, WM8993_FLL_CONTROL_2,
489 (fll_div.fll_outdiv << WM8993_FLL_OUTDIV_SHIFT) |
490 (fll_div.fll_fratio << WM8993_FLL_FRATIO_SHIFT));
491 wm8993_write(codec, WM8993_FLL_CONTROL_3, fll_div.k);
493 reg4 = wm8993_read(codec, WM8993_FLL_CONTROL_4);
494 reg4 &= ~WM8993_FLL_N_MASK;
495 reg4 |= fll_div.n << WM8993_FLL_N_SHIFT;
496 wm8993_write(codec, WM8993_FLL_CONTROL_4, reg4);
498 reg5 &= ~WM8993_FLL_CLK_REF_DIV_MASK;
499 reg5 |= fll_div.fll_clk_ref_div << WM8993_FLL_CLK_REF_DIV_SHIFT;
500 wm8993_write(codec, WM8993_FLL_CONTROL_5, reg5);
503 wm8993_write(codec, WM8993_FLL_CONTROL_1, reg1 | WM8993_FLL_ENA);
505 dev_dbg(codec->dev, "FLL enabled at %dHz->%dHz\n", Fref, Fout);
507 wm8993->fll_fref = Fref;
508 wm8993->fll_fout = Fout;
513 static int configure_clock(struct snd_soc_codec *codec)
515 struct wm8993_priv *wm8993 = codec->private_data;
518 /* This should be done on init() for bypass paths */
519 switch (wm8993->sysclk_source) {
520 case WM8993_SYSCLK_MCLK:
521 dev_dbg(codec->dev, "Using %dHz MCLK\n", wm8993->mclk_rate);
523 reg = wm8993_read(codec, WM8993_CLOCKING_2);
524 reg &= ~(WM8993_MCLK_DIV | WM8993_SYSCLK_SRC);
525 if (wm8993->mclk_rate > 13500000) {
526 reg |= WM8993_MCLK_DIV;
527 wm8993->sysclk_rate = wm8993->mclk_rate / 2;
529 reg &= ~WM8993_MCLK_DIV;
530 wm8993->sysclk_rate = wm8993->mclk_rate;
532 wm8993_write(codec, WM8993_CLOCKING_2, reg);
535 case WM8993_SYSCLK_FLL:
536 dev_dbg(codec->dev, "Using %dHz FLL clock\n",
539 reg = wm8993_read(codec, WM8993_CLOCKING_2);
540 reg |= WM8993_SYSCLK_SRC;
541 if (wm8993->fll_fout > 13500000) {
542 reg |= WM8993_MCLK_DIV;
543 wm8993->sysclk_rate = wm8993->fll_fout / 2;
545 reg &= ~WM8993_MCLK_DIV;
546 wm8993->sysclk_rate = wm8993->fll_fout;
548 wm8993_write(codec, WM8993_CLOCKING_2, reg);
552 dev_err(codec->dev, "System clock not configured\n");
556 dev_dbg(codec->dev, "CLK_SYS is %dHz\n", wm8993->sysclk_rate);
561 static const DECLARE_TLV_DB_SCALE(sidetone_tlv, -3600, 300, 0);
562 static const DECLARE_TLV_DB_SCALE(drc_comp_threash, -4500, 75, 0);
563 static const DECLARE_TLV_DB_SCALE(drc_comp_amp, -2250, 75, 0);
564 static const DECLARE_TLV_DB_SCALE(drc_min_tlv, -1800, 600, 0);
565 static const unsigned int drc_max_tlv[] = {
566 TLV_DB_RANGE_HEAD(4),
567 0, 2, TLV_DB_SCALE_ITEM(1200, 600, 0),
568 3, 3, TLV_DB_SCALE_ITEM(3600, 0, 0),
570 static const DECLARE_TLV_DB_SCALE(drc_qr_tlv, 1200, 600, 0);
571 static const DECLARE_TLV_DB_SCALE(drc_startup_tlv, -1800, 300, 0);
572 static const DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0);
573 static const DECLARE_TLV_DB_SCALE(digital_tlv, -7200, 75, 1);
574 static const DECLARE_TLV_DB_SCALE(dac_boost_tlv, 0, 600, 0);
576 static const char *dac_deemph_text[] = {
583 static const struct soc_enum dac_deemph =
584 SOC_ENUM_SINGLE(WM8993_DAC_CTRL, 4, 4, dac_deemph_text);
586 static const char *adc_hpf_text[] = {
593 static const struct soc_enum adc_hpf =
594 SOC_ENUM_SINGLE(WM8993_ADC_CTRL, 5, 4, adc_hpf_text);
596 static const char *drc_path_text[] = {
601 static const struct soc_enum drc_path =
602 SOC_ENUM_SINGLE(WM8993_DRC_CONTROL_1, 14, 2, drc_path_text);
604 static const char *drc_r0_text[] = {
613 static const struct soc_enum drc_r0 =
614 SOC_ENUM_SINGLE(WM8993_DRC_CONTROL_3, 8, 6, drc_r0_text);
616 static const char *drc_r1_text[] = {
624 static const struct soc_enum drc_r1 =
625 SOC_ENUM_SINGLE(WM8993_DRC_CONTROL_4, 13, 5, drc_r1_text);
627 static const char *drc_attack_text[] = {
642 static const struct soc_enum drc_attack =
643 SOC_ENUM_SINGLE(WM8993_DRC_CONTROL_2, 12, 12, drc_attack_text);
645 static const char *drc_decay_text[] = {
657 static const struct soc_enum drc_decay =
658 SOC_ENUM_SINGLE(WM8993_DRC_CONTROL_2, 8, 9, drc_decay_text);
660 static const char *drc_ff_text[] = {
665 static const struct soc_enum drc_ff =
666 SOC_ENUM_SINGLE(WM8993_DRC_CONTROL_3, 7, 2, drc_ff_text);
668 static const char *drc_qr_rate_text[] = {
674 static const struct soc_enum drc_qr_rate =
675 SOC_ENUM_SINGLE(WM8993_DRC_CONTROL_3, 0, 3, drc_qr_rate_text);
677 static const char *drc_smooth_text[] = {
683 static const struct soc_enum drc_smooth =
684 SOC_ENUM_SINGLE(WM8993_DRC_CONTROL_1, 4, 3, drc_smooth_text);
686 static const struct snd_kcontrol_new wm8993_snd_controls[] = {
687 SOC_DOUBLE_TLV("Digital Sidetone Volume", WM8993_DIGITAL_SIDE_TONE,
688 5, 9, 12, 0, sidetone_tlv),
690 SOC_SINGLE("DRC Switch", WM8993_DRC_CONTROL_1, 15, 1, 0),
691 SOC_ENUM("DRC Path", drc_path),
692 SOC_SINGLE_TLV("DRC Compressor Threashold Volume", WM8993_DRC_CONTROL_2,
693 2, 60, 1, drc_comp_threash),
694 SOC_SINGLE_TLV("DRC Compressor Amplitude Volume", WM8993_DRC_CONTROL_3,
695 11, 30, 1, drc_comp_amp),
696 SOC_ENUM("DRC R0", drc_r0),
697 SOC_ENUM("DRC R1", drc_r1),
698 SOC_SINGLE_TLV("DRC Minimum Volume", WM8993_DRC_CONTROL_1, 2, 3, 1,
700 SOC_SINGLE_TLV("DRC Maximum Volume", WM8993_DRC_CONTROL_1, 0, 3, 0,
702 SOC_ENUM("DRC Attack Rate", drc_attack),
703 SOC_ENUM("DRC Decay Rate", drc_decay),
704 SOC_ENUM("DRC FF Delay", drc_ff),
705 SOC_SINGLE("DRC Anti-clip Switch", WM8993_DRC_CONTROL_1, 9, 1, 0),
706 SOC_SINGLE("DRC Quick Release Switch", WM8993_DRC_CONTROL_1, 10, 1, 0),
707 SOC_SINGLE_TLV("DRC Quick Release Volume", WM8993_DRC_CONTROL_3, 2, 3, 0,
709 SOC_ENUM("DRC Quick Release Rate", drc_qr_rate),
710 SOC_SINGLE("DRC Smoothing Switch", WM8993_DRC_CONTROL_1, 11, 1, 0),
711 SOC_SINGLE("DRC Smoothing Hysteresis Switch", WM8993_DRC_CONTROL_1, 8, 1, 0),
712 SOC_ENUM("DRC Smoothing Hysteresis Threashold", drc_smooth),
713 SOC_SINGLE_TLV("DRC Startup Volume", WM8993_DRC_CONTROL_4, 8, 18, 0,
716 SOC_SINGLE("EQ Switch", WM8993_EQ1, 0, 1, 0),
718 SOC_DOUBLE_R_TLV("Capture Volume", WM8993_LEFT_ADC_DIGITAL_VOLUME,
719 WM8993_RIGHT_ADC_DIGITAL_VOLUME, 1, 96, 0, digital_tlv),
720 SOC_SINGLE("ADC High Pass Filter Switch", WM8993_ADC_CTRL, 8, 1, 0),
721 SOC_ENUM("ADC High Pass Filter Mode", adc_hpf),
723 SOC_DOUBLE_R_TLV("Playback Volume", WM8993_LEFT_DAC_DIGITAL_VOLUME,
724 WM8993_RIGHT_DAC_DIGITAL_VOLUME, 1, 96, 0, digital_tlv),
725 SOC_SINGLE_TLV("Playback Boost Volume", WM8993_AUDIO_INTERFACE_2, 10, 3, 0,
727 SOC_ENUM("DAC Deemphasis", dac_deemph),
729 SOC_SINGLE_TLV("SPKL DAC Volume", WM8993_SPKMIXL_ATTENUATION,
730 2, 1, 1, wm_hubs_spkmix_tlv),
732 SOC_SINGLE_TLV("SPKR DAC Volume", WM8993_SPKMIXR_ATTENUATION,
733 2, 1, 1, wm_hubs_spkmix_tlv),
736 static const struct snd_kcontrol_new wm8993_eq_controls[] = {
737 SOC_SINGLE_TLV("EQ1 Volume", WM8993_EQ2, 0, 24, 0, eq_tlv),
738 SOC_SINGLE_TLV("EQ2 Volume", WM8993_EQ3, 0, 24, 0, eq_tlv),
739 SOC_SINGLE_TLV("EQ3 Volume", WM8993_EQ4, 0, 24, 0, eq_tlv),
740 SOC_SINGLE_TLV("EQ4 Volume", WM8993_EQ5, 0, 24, 0, eq_tlv),
741 SOC_SINGLE_TLV("EQ5 Volume", WM8993_EQ6, 0, 24, 0, eq_tlv),
744 static int clk_sys_event(struct snd_soc_dapm_widget *w,
745 struct snd_kcontrol *kcontrol, int event)
747 struct snd_soc_codec *codec = w->codec;
750 case SND_SOC_DAPM_PRE_PMU:
751 return configure_clock(codec);
753 case SND_SOC_DAPM_POST_PMD:
761 * When used with DAC outputs only the WM8993 charge pump supports
762 * operation in class W mode, providing very low power consumption
763 * when used with digital sources. Enable and disable this mode
764 * automatically depending on the mixer configuration.
766 * Currently the only supported paths are the direct DAC->headphone
767 * paths (which provide minimum power consumption anyway).
769 static int class_w_put(struct snd_kcontrol *kcontrol,
770 struct snd_ctl_elem_value *ucontrol)
772 struct snd_soc_dapm_widget *widget = snd_kcontrol_chip(kcontrol);
773 struct snd_soc_codec *codec = widget->codec;
774 struct wm8993_priv *wm8993 = codec->private_data;
777 /* Turn it off if we're using the main output mixer */
778 if (ucontrol->value.integer.value[0] == 0) {
779 if (wm8993->class_w_users == 0) {
780 dev_dbg(codec->dev, "Disabling Class W\n");
781 snd_soc_update_bits(codec, WM8993_CLASS_W_0,
786 wm8993->class_w_users++;
789 /* Implement the change */
790 ret = snd_soc_dapm_put_enum_double(kcontrol, ucontrol);
792 /* Enable it if we're using the direct DAC path */
793 if (ucontrol->value.integer.value[0] == 1) {
794 if (wm8993->class_w_users == 1) {
795 dev_dbg(codec->dev, "Enabling Class W\n");
796 snd_soc_update_bits(codec, WM8993_CLASS_W_0,
802 wm8993->class_w_users--;
805 dev_dbg(codec->dev, "Indirect DAC use count now %d\n",
806 wm8993->class_w_users);
811 #define SOC_DAPM_ENUM_W(xname, xenum) \
812 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
813 .info = snd_soc_info_enum_double, \
814 .get = snd_soc_dapm_get_enum_double, \
815 .put = class_w_put, \
816 .private_value = (unsigned long)&xenum }
818 static const char *hp_mux_text[] = {
823 static const struct soc_enum hpl_enum =
824 SOC_ENUM_SINGLE(WM8993_OUTPUT_MIXER1, 8, 2, hp_mux_text);
826 static const struct snd_kcontrol_new hpl_mux =
827 SOC_DAPM_ENUM_W("Left Headphone Mux", hpl_enum);
829 static const struct soc_enum hpr_enum =
830 SOC_ENUM_SINGLE(WM8993_OUTPUT_MIXER2, 8, 2, hp_mux_text);
832 static const struct snd_kcontrol_new hpr_mux =
833 SOC_DAPM_ENUM_W("Right Headphone Mux", hpr_enum);
835 static const struct snd_kcontrol_new left_speaker_mixer[] = {
836 SOC_DAPM_SINGLE("Input Switch", WM8993_SPEAKER_MIXER, 7, 1, 0),
837 SOC_DAPM_SINGLE("IN1LP Switch", WM8993_SPEAKER_MIXER, 5, 1, 0),
838 SOC_DAPM_SINGLE("Output Switch", WM8993_SPEAKER_MIXER, 3, 1, 0),
839 SOC_DAPM_SINGLE("DAC Switch", WM8993_SPEAKER_MIXER, 6, 1, 0),
842 static const struct snd_kcontrol_new right_speaker_mixer[] = {
843 SOC_DAPM_SINGLE("Input Switch", WM8993_SPEAKER_MIXER, 6, 1, 0),
844 SOC_DAPM_SINGLE("IN1RP Switch", WM8993_SPEAKER_MIXER, 4, 1, 0),
845 SOC_DAPM_SINGLE("Output Switch", WM8993_SPEAKER_MIXER, 2, 1, 0),
846 SOC_DAPM_SINGLE("DAC Switch", WM8993_SPEAKER_MIXER, 0, 1, 0),
849 static const char *aif_text[] = {
853 static const struct soc_enum aifoutl_enum =
854 SOC_ENUM_SINGLE(WM8993_AUDIO_INTERFACE_1, 15, 2, aif_text);
856 static const struct snd_kcontrol_new aifoutl_mux =
857 SOC_DAPM_ENUM("AIFOUTL Mux", aifoutl_enum);
859 static const struct soc_enum aifoutr_enum =
860 SOC_ENUM_SINGLE(WM8993_AUDIO_INTERFACE_1, 14, 2, aif_text);
862 static const struct snd_kcontrol_new aifoutr_mux =
863 SOC_DAPM_ENUM("AIFOUTR Mux", aifoutr_enum);
865 static const struct soc_enum aifinl_enum =
866 SOC_ENUM_SINGLE(WM8993_AUDIO_INTERFACE_2, 15, 2, aif_text);
868 static const struct snd_kcontrol_new aifinl_mux =
869 SOC_DAPM_ENUM("AIFINL Mux", aifinl_enum);
871 static const struct soc_enum aifinr_enum =
872 SOC_ENUM_SINGLE(WM8993_AUDIO_INTERFACE_2, 14, 2, aif_text);
874 static const struct snd_kcontrol_new aifinr_mux =
875 SOC_DAPM_ENUM("AIFINR Mux", aifinr_enum);
877 static const char *sidetone_text[] = {
878 "None", "Left", "Right"
881 static const struct soc_enum sidetonel_enum =
882 SOC_ENUM_SINGLE(WM8993_DIGITAL_SIDE_TONE, 2, 3, sidetone_text);
884 static const struct snd_kcontrol_new sidetonel_mux =
885 SOC_DAPM_ENUM("Left Sidetone", sidetonel_enum);
887 static const struct soc_enum sidetoner_enum =
888 SOC_ENUM_SINGLE(WM8993_DIGITAL_SIDE_TONE, 0, 3, sidetone_text);
890 static const struct snd_kcontrol_new sidetoner_mux =
891 SOC_DAPM_ENUM("Right Sidetone", sidetoner_enum);
893 static const struct snd_soc_dapm_widget wm8993_dapm_widgets[] = {
894 SND_SOC_DAPM_SUPPLY("CLK_SYS", WM8993_BUS_CONTROL_1, 1, 0, clk_sys_event,
895 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
896 SND_SOC_DAPM_SUPPLY("TOCLK", WM8993_CLOCKING_1, 14, 0, NULL, 0),
897 SND_SOC_DAPM_SUPPLY("CLK_DSP", WM8993_CLOCKING_3, 0, 0, NULL, 0),
899 SND_SOC_DAPM_ADC("ADCL", NULL, WM8993_POWER_MANAGEMENT_2, 1, 0),
900 SND_SOC_DAPM_ADC("ADCR", NULL, WM8993_POWER_MANAGEMENT_2, 0, 0),
902 SND_SOC_DAPM_MUX("AIFOUTL Mux", SND_SOC_NOPM, 0, 0, &aifoutl_mux),
903 SND_SOC_DAPM_MUX("AIFOUTR Mux", SND_SOC_NOPM, 0, 0, &aifoutr_mux),
905 SND_SOC_DAPM_AIF_OUT("AIFOUTL", "Capture", 0, SND_SOC_NOPM, 0, 0),
906 SND_SOC_DAPM_AIF_OUT("AIFOUTR", "Capture", 1, SND_SOC_NOPM, 0, 0),
908 SND_SOC_DAPM_AIF_IN("AIFINL", "Playback", 0, SND_SOC_NOPM, 0, 0),
909 SND_SOC_DAPM_AIF_IN("AIFINR", "Playback", 1, SND_SOC_NOPM, 0, 0),
911 SND_SOC_DAPM_MUX("DACL Mux", SND_SOC_NOPM, 0, 0, &aifinl_mux),
912 SND_SOC_DAPM_MUX("DACR Mux", SND_SOC_NOPM, 0, 0, &aifinr_mux),
914 SND_SOC_DAPM_MUX("DACL Sidetone", SND_SOC_NOPM, 0, 0, &sidetonel_mux),
915 SND_SOC_DAPM_MUX("DACR Sidetone", SND_SOC_NOPM, 0, 0, &sidetoner_mux),
917 SND_SOC_DAPM_DAC("DACL", NULL, WM8993_POWER_MANAGEMENT_3, 1, 0),
918 SND_SOC_DAPM_DAC("DACR", NULL, WM8993_POWER_MANAGEMENT_3, 0, 0),
920 SND_SOC_DAPM_MUX("Left Headphone Mux", SND_SOC_NOPM, 0, 0, &hpl_mux),
921 SND_SOC_DAPM_MUX("Right Headphone Mux", SND_SOC_NOPM, 0, 0, &hpr_mux),
923 SND_SOC_DAPM_MIXER("SPKL", WM8993_POWER_MANAGEMENT_3, 8, 0,
924 left_speaker_mixer, ARRAY_SIZE(left_speaker_mixer)),
925 SND_SOC_DAPM_MIXER("SPKR", WM8993_POWER_MANAGEMENT_3, 9, 0,
926 right_speaker_mixer, ARRAY_SIZE(right_speaker_mixer)),
930 static const struct snd_soc_dapm_route routes[] = {
931 { "ADCL", NULL, "CLK_SYS" },
932 { "ADCL", NULL, "CLK_DSP" },
933 { "ADCR", NULL, "CLK_SYS" },
934 { "ADCR", NULL, "CLK_DSP" },
936 { "AIFOUTL Mux", "Left", "ADCL" },
937 { "AIFOUTL Mux", "Right", "ADCR" },
938 { "AIFOUTR Mux", "Left", "ADCL" },
939 { "AIFOUTR Mux", "Right", "ADCR" },
941 { "AIFOUTL", NULL, "AIFOUTL Mux" },
942 { "AIFOUTR", NULL, "AIFOUTR Mux" },
944 { "DACL Mux", "Left", "AIFINL" },
945 { "DACL Mux", "Right", "AIFINR" },
946 { "DACR Mux", "Left", "AIFINL" },
947 { "DACR Mux", "Right", "AIFINR" },
949 { "DACL Sidetone", "Left", "ADCL" },
950 { "DACL Sidetone", "Right", "ADCR" },
951 { "DACR Sidetone", "Left", "ADCL" },
952 { "DACR Sidetone", "Right", "ADCR" },
954 { "DACL", NULL, "CLK_SYS" },
955 { "DACL", NULL, "CLK_DSP" },
956 { "DACL", NULL, "DACL Mux" },
957 { "DACL", NULL, "DACL Sidetone" },
958 { "DACR", NULL, "CLK_SYS" },
959 { "DACR", NULL, "CLK_DSP" },
960 { "DACR", NULL, "DACR Mux" },
961 { "DACR", NULL, "DACR Sidetone" },
963 { "Left Output Mixer", "DAC Switch", "DACL" },
965 { "Right Output Mixer", "DAC Switch", "DACR" },
967 { "Left Output PGA", NULL, "CLK_SYS" },
969 { "Right Output PGA", NULL, "CLK_SYS" },
971 { "SPKL", "DAC Switch", "DACL" },
972 { "SPKL", NULL, "CLK_SYS" },
974 { "SPKR", "DAC Switch", "DACR" },
975 { "SPKR", NULL, "CLK_SYS" },
977 { "Left Headphone Mux", "DAC", "DACL" },
978 { "Right Headphone Mux", "DAC", "DACR" },
981 static int wm8993_set_bias_level(struct snd_soc_codec *codec,
982 enum snd_soc_bias_level level)
984 struct wm8993_priv *wm8993 = codec->private_data;
987 case SND_SOC_BIAS_ON:
988 case SND_SOC_BIAS_PREPARE:
990 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
991 WM8993_VMID_SEL_MASK, 0x2);
992 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_2,
993 WM8993_TSHUT_ENA, WM8993_TSHUT_ENA);
996 case SND_SOC_BIAS_STANDBY:
997 if (codec->bias_level == SND_SOC_BIAS_OFF) {
998 /* Bring up VMID with fast soft start */
999 snd_soc_update_bits(codec, WM8993_ANTIPOP2,
1000 WM8993_STARTUP_BIAS_ENA |
1001 WM8993_VMID_BUF_ENA |
1002 WM8993_VMID_RAMP_MASK |
1004 WM8993_STARTUP_BIAS_ENA |
1005 WM8993_VMID_BUF_ENA |
1006 WM8993_VMID_RAMP_MASK |
1009 /* If either line output is single ended we
1010 * need the VMID buffer */
1011 if (!wm8993->pdata.lineout1_diff ||
1012 !wm8993->pdata.lineout2_diff)
1013 snd_soc_update_bits(codec, WM8993_ANTIPOP1,
1014 WM8993_LINEOUT_VMID_BUF_ENA,
1015 WM8993_LINEOUT_VMID_BUF_ENA);
1018 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
1019 WM8993_VMID_SEL_MASK |
1021 WM8993_BIAS_ENA | 0x2);
1024 /* Switch to normal bias */
1025 snd_soc_update_bits(codec, WM8993_ANTIPOP2,
1027 WM8993_STARTUP_BIAS_ENA, 0);
1031 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
1032 WM8993_VMID_SEL_MASK, 0x4);
1034 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_2,
1035 WM8993_TSHUT_ENA, 0);
1038 case SND_SOC_BIAS_OFF:
1039 snd_soc_update_bits(codec, WM8993_ANTIPOP1,
1040 WM8993_LINEOUT_VMID_BUF_ENA, 0);
1042 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
1043 WM8993_VMID_SEL_MASK | WM8993_BIAS_ENA,
1048 codec->bias_level = level;
1053 static int wm8993_set_sysclk(struct snd_soc_dai *codec_dai,
1054 int clk_id, unsigned int freq, int dir)
1056 struct snd_soc_codec *codec = codec_dai->codec;
1057 struct wm8993_priv *wm8993 = codec->private_data;
1060 case WM8993_SYSCLK_MCLK:
1061 wm8993->mclk_rate = freq;
1062 case WM8993_SYSCLK_FLL:
1063 wm8993->sysclk_source = clk_id;
1073 static int wm8993_set_dai_fmt(struct snd_soc_dai *dai,
1076 struct snd_soc_codec *codec = dai->codec;
1077 struct wm8993_priv *wm8993 = codec->private_data;
1078 unsigned int aif1 = wm8993_read(codec, WM8993_AUDIO_INTERFACE_1);
1079 unsigned int aif4 = wm8993_read(codec, WM8993_AUDIO_INTERFACE_4);
1081 aif1 &= ~(WM8993_BCLK_DIR | WM8993_AIF_BCLK_INV |
1082 WM8993_AIF_LRCLK_INV | WM8993_AIF_FMT_MASK);
1083 aif4 &= ~WM8993_LRCLK_DIR;
1085 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1086 case SND_SOC_DAIFMT_CBS_CFS:
1089 case SND_SOC_DAIFMT_CBS_CFM:
1090 aif4 |= WM8993_LRCLK_DIR;
1093 case SND_SOC_DAIFMT_CBM_CFS:
1094 aif1 |= WM8993_BCLK_DIR;
1097 case SND_SOC_DAIFMT_CBM_CFM:
1098 aif1 |= WM8993_BCLK_DIR;
1099 aif4 |= WM8993_LRCLK_DIR;
1106 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1107 case SND_SOC_DAIFMT_DSP_B:
1108 aif1 |= WM8993_AIF_LRCLK_INV;
1109 case SND_SOC_DAIFMT_DSP_A:
1112 case SND_SOC_DAIFMT_I2S:
1115 case SND_SOC_DAIFMT_RIGHT_J:
1117 case SND_SOC_DAIFMT_LEFT_J:
1124 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1125 case SND_SOC_DAIFMT_DSP_A:
1126 case SND_SOC_DAIFMT_DSP_B:
1127 /* frame inversion not valid for DSP modes */
1128 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1129 case SND_SOC_DAIFMT_NB_NF:
1131 case SND_SOC_DAIFMT_IB_NF:
1132 aif1 |= WM8993_AIF_BCLK_INV;
1139 case SND_SOC_DAIFMT_I2S:
1140 case SND_SOC_DAIFMT_RIGHT_J:
1141 case SND_SOC_DAIFMT_LEFT_J:
1142 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1143 case SND_SOC_DAIFMT_NB_NF:
1145 case SND_SOC_DAIFMT_IB_IF:
1146 aif1 |= WM8993_AIF_BCLK_INV | WM8993_AIF_LRCLK_INV;
1148 case SND_SOC_DAIFMT_IB_NF:
1149 aif1 |= WM8993_AIF_BCLK_INV;
1151 case SND_SOC_DAIFMT_NB_IF:
1152 aif1 |= WM8993_AIF_LRCLK_INV;
1162 wm8993_write(codec, WM8993_AUDIO_INTERFACE_1, aif1);
1163 wm8993_write(codec, WM8993_AUDIO_INTERFACE_4, aif4);
1168 static int wm8993_hw_params(struct snd_pcm_substream *substream,
1169 struct snd_pcm_hw_params *params,
1170 struct snd_soc_dai *dai)
1172 struct snd_soc_codec *codec = dai->codec;
1173 struct wm8993_priv *wm8993 = codec->private_data;
1174 int ret, i, best, best_val, cur_val;
1175 unsigned int clocking1, clocking3, aif1, aif4;
1177 clocking1 = wm8993_read(codec, WM8993_CLOCKING_1);
1178 clocking1 &= ~WM8993_BCLK_DIV_MASK;
1180 clocking3 = wm8993_read(codec, WM8993_CLOCKING_3);
1181 clocking3 &= ~(WM8993_CLK_SYS_RATE_MASK | WM8993_SAMPLE_RATE_MASK);
1183 aif1 = wm8993_read(codec, WM8993_AUDIO_INTERFACE_1);
1184 aif1 &= ~WM8993_AIF_WL_MASK;
1186 aif4 = wm8993_read(codec, WM8993_AUDIO_INTERFACE_4);
1187 aif4 &= ~WM8993_LRCLK_RATE_MASK;
1189 /* What BCLK do we need? */
1190 wm8993->fs = params_rate(params);
1191 wm8993->bclk = 2 * wm8993->fs;
1192 if (wm8993->tdm_slots) {
1193 dev_dbg(codec->dev, "Configuring for %d %d bit TDM slots\n",
1194 wm8993->tdm_slots, wm8993->tdm_width);
1195 wm8993->bclk *= wm8993->tdm_width * wm8993->tdm_slots;
1197 switch (params_format(params)) {
1198 case SNDRV_PCM_FORMAT_S16_LE:
1201 case SNDRV_PCM_FORMAT_S20_3LE:
1205 case SNDRV_PCM_FORMAT_S24_LE:
1209 case SNDRV_PCM_FORMAT_S32_LE:
1218 dev_dbg(codec->dev, "Target BCLK is %dHz\n", wm8993->bclk);
1220 ret = configure_clock(codec);
1224 /* Select nearest CLK_SYS_RATE */
1226 best_val = abs((wm8993->sysclk_rate / clk_sys_rates[0].ratio)
1228 for (i = 1; i < ARRAY_SIZE(clk_sys_rates); i++) {
1229 cur_val = abs((wm8993->sysclk_rate /
1230 clk_sys_rates[i].ratio) - wm8993->fs);;
1231 if (cur_val < best_val) {
1236 dev_dbg(codec->dev, "Selected CLK_SYS_RATIO of %d\n",
1237 clk_sys_rates[best].ratio);
1238 clocking3 |= (clk_sys_rates[best].clk_sys_rate
1239 << WM8993_CLK_SYS_RATE_SHIFT);
1243 best_val = abs(wm8993->fs - sample_rates[0].rate);
1244 for (i = 1; i < ARRAY_SIZE(sample_rates); i++) {
1246 cur_val = abs(wm8993->fs - sample_rates[i].rate);
1247 if (cur_val < best_val) {
1252 dev_dbg(codec->dev, "Selected SAMPLE_RATE of %dHz\n",
1253 sample_rates[best].rate);
1254 clocking3 |= (sample_rates[best].sample_rate
1255 << WM8993_SAMPLE_RATE_SHIFT);
1260 for (i = 0; i < ARRAY_SIZE(bclk_divs); i++) {
1261 cur_val = ((wm8993->sysclk_rate * 10) / bclk_divs[i].div)
1263 if (cur_val < 0) /* Table is sorted */
1265 if (cur_val < best_val) {
1270 wm8993->bclk = (wm8993->sysclk_rate * 10) / bclk_divs[best].div;
1271 dev_dbg(codec->dev, "Selected BCLK_DIV of %d for %dHz BCLK\n",
1272 bclk_divs[best].div, wm8993->bclk);
1273 clocking1 |= bclk_divs[best].bclk_div << WM8993_BCLK_DIV_SHIFT;
1275 /* LRCLK is a simple fraction of BCLK */
1276 dev_dbg(codec->dev, "LRCLK_RATE is %d\n", wm8993->bclk / wm8993->fs);
1277 aif4 |= wm8993->bclk / wm8993->fs;
1279 wm8993_write(codec, WM8993_CLOCKING_1, clocking1);
1280 wm8993_write(codec, WM8993_CLOCKING_3, clocking3);
1281 wm8993_write(codec, WM8993_AUDIO_INTERFACE_1, aif1);
1282 wm8993_write(codec, WM8993_AUDIO_INTERFACE_4, aif4);
1284 /* ReTune Mobile? */
1285 if (wm8993->pdata.num_retune_configs) {
1286 u16 eq1 = wm8993_read(codec, WM8993_EQ1);
1287 struct wm8993_retune_mobile_setting *s;
1290 best_val = abs(wm8993->pdata.retune_configs[0].rate
1292 for (i = 0; i < wm8993->pdata.num_retune_configs; i++) {
1293 cur_val = abs(wm8993->pdata.retune_configs[i].rate
1295 if (cur_val < best_val) {
1300 s = &wm8993->pdata.retune_configs[best];
1302 dev_dbg(codec->dev, "ReTune Mobile %s tuned for %dHz\n",
1305 /* Disable EQ while we reconfigure */
1306 snd_soc_update_bits(codec, WM8993_EQ1, WM8993_EQ_ENA, 0);
1308 for (i = 1; i < ARRAY_SIZE(s->config); i++)
1309 wm8993_write(codec, WM8993_EQ1 + i, s->config[i]);
1311 snd_soc_update_bits(codec, WM8993_EQ1, WM8993_EQ_ENA, eq1);
1317 static int wm8993_digital_mute(struct snd_soc_dai *codec_dai, int mute)
1319 struct snd_soc_codec *codec = codec_dai->codec;
1322 reg = wm8993_read(codec, WM8993_DAC_CTRL);
1325 reg |= WM8993_DAC_MUTE;
1327 reg &= ~WM8993_DAC_MUTE;
1329 wm8993_write(codec, WM8993_DAC_CTRL, reg);
1334 static int wm8993_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
1335 unsigned int rx_mask, int slots, int slot_width)
1337 struct snd_soc_codec *codec = dai->codec;
1338 struct wm8993_priv *wm8993 = codec->private_data;
1342 /* Don't need to validate anything if we're turning off TDM */
1344 wm8993->tdm_slots = 0;
1348 /* Note that we allow configurations we can't handle ourselves -
1349 * for example, we can generate clocks for slots 2 and up even if
1350 * we can't use those slots ourselves.
1352 aif1 |= WM8993_AIFADC_TDM;
1353 aif2 |= WM8993_AIFDAC_TDM;
1359 aif1 |= WM8993_AIFADC_TDM_CHAN;
1370 aif2 |= WM8993_AIFDAC_TDM_CHAN;
1377 wm8993->tdm_width = slot_width;
1378 wm8993->tdm_slots = slots / 2;
1380 snd_soc_update_bits(codec, WM8993_AUDIO_INTERFACE_1,
1381 WM8993_AIFADC_TDM | WM8993_AIFADC_TDM_CHAN, aif1);
1382 snd_soc_update_bits(codec, WM8993_AUDIO_INTERFACE_2,
1383 WM8993_AIFDAC_TDM | WM8993_AIFDAC_TDM_CHAN, aif2);
1388 static struct snd_soc_dai_ops wm8993_ops = {
1389 .set_sysclk = wm8993_set_sysclk,
1390 .set_fmt = wm8993_set_dai_fmt,
1391 .hw_params = wm8993_hw_params,
1392 .digital_mute = wm8993_digital_mute,
1393 .set_pll = wm8993_set_fll,
1394 .set_tdm_slot = wm8993_set_tdm_slot,
1397 #define WM8993_RATES SNDRV_PCM_RATE_8000_48000
1399 #define WM8993_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
1400 SNDRV_PCM_FMTBIT_S20_3LE |\
1401 SNDRV_PCM_FMTBIT_S24_LE |\
1402 SNDRV_PCM_FMTBIT_S32_LE)
1404 struct snd_soc_dai wm8993_dai = {
1407 .stream_name = "Playback",
1410 .rates = WM8993_RATES,
1411 .formats = WM8993_FORMATS,
1414 .stream_name = "Capture",
1417 .rates = WM8993_RATES,
1418 .formats = WM8993_FORMATS,
1421 .symmetric_rates = 1,
1423 EXPORT_SYMBOL_GPL(wm8993_dai);
1425 static struct snd_soc_codec *wm8993_codec;
1427 static int wm8993_probe(struct platform_device *pdev)
1429 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
1430 struct snd_soc_codec *codec;
1431 struct wm8993_priv *wm8993;
1434 if (!wm8993_codec) {
1435 dev_err(&pdev->dev, "I2C device not yet probed\n");
1439 socdev->card->codec = wm8993_codec;
1440 codec = wm8993_codec;
1441 wm8993 = codec->private_data;
1443 ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
1445 dev_err(codec->dev, "failed to create pcms\n");
1449 snd_soc_add_controls(codec, wm8993_snd_controls,
1450 ARRAY_SIZE(wm8993_snd_controls));
1451 if (wm8993->pdata.num_retune_configs != 0) {
1452 dev_dbg(codec->dev, "Using ReTune Mobile\n");
1454 dev_dbg(codec->dev, "No ReTune Mobile, using normal EQ\n");
1455 snd_soc_add_controls(codec, wm8993_eq_controls,
1456 ARRAY_SIZE(wm8993_eq_controls));
1459 snd_soc_dapm_new_controls(codec, wm8993_dapm_widgets,
1460 ARRAY_SIZE(wm8993_dapm_widgets));
1461 wm_hubs_add_analogue_controls(codec);
1463 snd_soc_dapm_add_routes(codec, routes, ARRAY_SIZE(routes));
1464 wm_hubs_add_analogue_routes(codec, wm8993->pdata.lineout1_diff,
1465 wm8993->pdata.lineout2_diff);
1467 snd_soc_dapm_new_widgets(codec);
1469 ret = snd_soc_init_card(socdev);
1471 dev_err(codec->dev, "failed to register card\n");
1478 snd_soc_free_pcms(socdev);
1479 snd_soc_dapm_free(socdev);
1484 static int wm8993_remove(struct platform_device *pdev)
1486 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
1488 snd_soc_free_pcms(socdev);
1489 snd_soc_dapm_free(socdev);
1494 struct snd_soc_codec_device soc_codec_dev_wm8993 = {
1495 .probe = wm8993_probe,
1496 .remove = wm8993_remove,
1498 EXPORT_SYMBOL_GPL(soc_codec_dev_wm8993);
1500 static int wm8993_i2c_probe(struct i2c_client *i2c,
1501 const struct i2c_device_id *id)
1503 struct wm8993_priv *wm8993;
1504 struct snd_soc_codec *codec;
1509 dev_err(&i2c->dev, "A WM8993 is already registered\n");
1513 wm8993 = kzalloc(sizeof(struct wm8993_priv), GFP_KERNEL);
1517 codec = &wm8993->codec;
1518 if (i2c->dev.platform_data)
1519 memcpy(&wm8993->pdata, i2c->dev.platform_data,
1520 sizeof(wm8993->pdata));
1522 mutex_init(&codec->mutex);
1523 INIT_LIST_HEAD(&codec->dapm_widgets);
1524 INIT_LIST_HEAD(&codec->dapm_paths);
1526 codec->name = "WM8993";
1527 codec->read = wm8993_read;
1528 codec->write = wm8993_write;
1529 codec->hw_write = (hw_write_t)i2c_master_send;
1530 codec->reg_cache = wm8993->reg_cache;
1531 codec->reg_cache_size = ARRAY_SIZE(wm8993->reg_cache);
1532 codec->bias_level = SND_SOC_BIAS_OFF;
1533 codec->set_bias_level = wm8993_set_bias_level;
1534 codec->dai = &wm8993_dai;
1536 codec->private_data = wm8993;
1538 memcpy(wm8993->reg_cache, wm8993_reg_defaults,
1539 sizeof(wm8993->reg_cache));
1541 i2c_set_clientdata(i2c, wm8993);
1542 codec->control_data = i2c;
1543 wm8993_codec = codec;
1545 codec->dev = &i2c->dev;
1547 val = wm8993_read_hw(codec, WM8993_SOFTWARE_RESET);
1548 if (val != wm8993_reg_defaults[WM8993_SOFTWARE_RESET]) {
1549 dev_err(codec->dev, "Invalid ID register value %x\n", val);
1554 ret = wm8993_write(codec, WM8993_SOFTWARE_RESET, 0xffff);
1558 /* By default we're using the output mixers */
1559 wm8993->class_w_users = 2;
1561 /* Latch volume update bits and default ZC on */
1562 snd_soc_update_bits(codec, WM8993_RIGHT_DAC_DIGITAL_VOLUME,
1563 WM8993_DAC_VU, WM8993_DAC_VU);
1564 snd_soc_update_bits(codec, WM8993_RIGHT_ADC_DIGITAL_VOLUME,
1565 WM8993_ADC_VU, WM8993_ADC_VU);
1567 /* Manualy manage the HPOUT sequencing for independent stereo
1569 snd_soc_update_bits(codec, WM8993_ANALOGUE_HP_0,
1570 WM8993_HPOUT1_AUTO_PU, 0);
1572 /* Use automatic clock configuration */
1573 snd_soc_update_bits(codec, WM8993_CLOCKING_4, WM8993_SR_MODE, 0);
1575 wm_hubs_handle_analogue_pdata(codec, wm8993->pdata.lineout1_diff,
1576 wm8993->pdata.lineout2_diff,
1577 wm8993->pdata.lineout1fb,
1578 wm8993->pdata.lineout2fb,
1579 wm8993->pdata.jd_scthr,
1580 wm8993->pdata.jd_thr,
1581 wm8993->pdata.micbias1_lvl,
1582 wm8993->pdata.micbias2_lvl);
1584 ret = wm8993_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1588 wm8993_dai.dev = codec->dev;
1590 ret = snd_soc_register_dai(&wm8993_dai);
1594 ret = snd_soc_register_codec(codec);
1599 wm8993_set_bias_level(codec, SND_SOC_BIAS_OFF);
1601 wm8993_codec = NULL;
1606 static int wm8993_i2c_remove(struct i2c_client *client)
1608 struct wm8993_priv *wm8993 = i2c_get_clientdata(client);
1610 snd_soc_unregister_codec(&wm8993->codec);
1611 snd_soc_unregister_dai(&wm8993_dai);
1613 wm8993_set_bias_level(&wm8993->codec, SND_SOC_BIAS_OFF);
1619 static const struct i2c_device_id wm8993_i2c_id[] = {
1623 MODULE_DEVICE_TABLE(i2c, wm8993_i2c_id);
1625 static struct i2c_driver wm8993_i2c_driver = {
1628 .owner = THIS_MODULE,
1630 .probe = wm8993_i2c_probe,
1631 .remove = wm8993_i2c_remove,
1632 .id_table = wm8993_i2c_id,
1636 static int __init wm8993_modinit(void)
1640 ret = i2c_add_driver(&wm8993_i2c_driver);
1642 pr_err("WM8993: Unable to register I2C driver: %d\n", ret);
1646 module_init(wm8993_modinit);
1648 static void __exit wm8993_exit(void)
1650 i2c_del_driver(&wm8993_i2c_driver);
1652 module_exit(wm8993_exit);
1655 MODULE_DESCRIPTION("ASoC WM8993 driver");
1656 MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
1657 MODULE_LICENSE("GPL");