sound/soc/fsl/imx-hdmi-dma.c

   1 /*
   2  * imx-hdmi-dma.c  --  HDMI DMA driver for ALSA Soc Audio Layer
   3  *
   4  * Copyright (C) 2011-2014 Freescale Semiconductor, Inc.
   5  *
   6  * based on imx-pcm-dma-mx2.c
   7  * Copyright 2009 Sascha Hauer <s.hauer@pengutronix.de>
   8  *
   9  * This code is based on code copyrighted by Freescale,
  10  * Liam Girdwood, Javier Martin and probably others.
  11  *
  12  *  This program is free software; you can redistribute  it and/or modify it
  13  *  under  the terms of  the GNU General  Public License as published by the
  14  *  Free Software Foundation;  either version 2 of the  License, or (at your
  15  *  option) any later version.
  16  */
  17
  18 #include <linux/module.h>
  19 #include <linux/delay.h>
  20 #include <linux/dma-mapping.h>
  21 #include <linux/mfd/mxc-hdmi-core.h>
  22 #include <linux/platform_data/dma-imx.h>
  23
  24 #include <video/mxc_hdmi.h>
  25
  26 #include "imx-hdmi.h"
  27
  28 #define HDMI_DMA_BURST_UNSPECIFIED_LEGNTH       0
  29 #define HDMI_DMA_BURST_INCR4                    1
  30 #define HDMI_DMA_BURST_INCR8                    2
  31 #define HDMI_DMA_BURST_INCR16                   3
  32
  33 #define HDMI_BASE_ADDR 0x00120000
  34
  35 struct hdmi_sdma_script {
  36         int control_reg_addr;
  37         int status_reg_addr;
  38         int dma_start_addr;
  39         u32 buffer[20];
  40 };
  41
  42 struct hdmi_dma_priv {
  43         struct snd_pcm_substream *substream;
  44         struct platform_device *pdev;
  45
  46         struct snd_dma_buffer hw_buffer;
  47         unsigned long buffer_bytes;
  48         unsigned long appl_bytes;
  49
  50         int periods;
  51         int period_time;
  52         int period_bytes;
  53         int dma_period_bytes;
  54         int buffer_ratio;
  55
  56         unsigned long offset;
  57
  58         snd_pcm_format_t format;
  59         int sample_align;
  60         int sample_bits;
  61         int channels;
  62         int rate;
  63
  64         int frame_idx;
  65
  66         bool tx_active;
  67         spinlock_t irq_lock;
  68
  69         /* SDMA part */
  70         dma_addr_t phy_hdmi_sdma_t;
  71         struct hdmi_sdma_script *hdmi_sdma_t;
  72         struct dma_chan *dma_channel;
  73         struct imx_dma_data dma_data;
  74         struct dma_async_tx_descriptor *desc;
  75         struct imx_hdmi_sdma_params sdma_params;
  76 };
  77
  78 /* bit 0:0:0:b:p(0):c:(u)0:(v)0 */
  79 /* max 8 channels supported; channels are interleaved */
  80 static u8 g_packet_head_table[48 * 8];
  81
  82 void hdmi_dma_copy_16_neon_lut(unsigned short *src, unsigned int *dst,
  83                 int samples, unsigned char *lookup_table);
  84 void hdmi_dma_copy_16_neon_fast(unsigned short *src, unsigned int *dst,
  85                 int samples);
  86 void hdmi_dma_copy_24_neon_lut(unsigned int *src, unsigned int *dst,
  87                 int samples, unsigned char *lookup_table);
  88 void hdmi_dma_copy_24_neon_fast(unsigned int *src, unsigned int *dst,
  89                 int samples);
  90 static void hdmi_dma_irq_enable(struct hdmi_dma_priv *priv);
  91 static void hdmi_dma_irq_disable(struct hdmi_dma_priv *priv);
  92
  93 union hdmi_audio_header_t iec_header;
  94 EXPORT_SYMBOL(iec_header);
  95
  96 /*
  97  * Note that the period size for DMA != period size for ALSA because the
  98  * driver adds iec frame info to the audio samples (in hdmi_dma_copy).
  99  *
 100  * Each 4 byte subframe = 1 byte of iec data + 3 byte audio sample.
 101  *
 102  * A 16 bit audio sample becomes 32 bits including the frame info. Ratio=2
 103  * A 24 bit audio sample becomes 32 bits including the frame info. Ratio=3:4
 104  * If the 24 bit raw audio is in 32 bit words, the
 105  *
 106  *  Original  Packed into  subframe  Ratio of size        Format
 107  *   sample    how many      size    of DMA buffer
 108  *   (bits)      bits                to ALSA buffer
 109  *  --------  -----------  --------  --------------  ------------------------
 110  *     16         16          32          2          SNDRV_PCM_FORMAT_S16_LE
 111  *     24         24          32          1.33       SNDRV_PCM_FORMAT_S24_3LE*
 112  *     24         32          32          1          SNDRV_PCM_FORMAT_S24_LE
 113  *
 114  * *so SNDRV_PCM_FORMAT_S24_3LE is not supported.
 115  */
 116
 117 /*
 118  * The minimum dma period is one IEC audio frame (192 * 4 * channels).
 119  * The maximum dma period for the HDMI DMA is 8K.
 120  *
 121  *   channels       minimum          maximum
 122  *                 dma period       dma period
 123  *   --------  ------------------   ----------
 124  *       2     192 * 4 * 2 = 1536   * 4 = 6144
 125  *       4     192 * 4 * 4 = 3072   * 2 = 6144
 126  *       6     192 * 4 * 6 = 4608   * 1 = 4608
 127  *       8     192 * 4 * 8 = 6144   * 1 = 6144
 128  *
 129  * Bottom line:
 130  * 1. Must keep the ratio of DMA buffer to ALSA buffer consistent.
 131  * 2. frame_idx is saved in the private data, so even if a frame cannot be
 132  *    transmitted in a period, it can be continued in the next period.  This
 133  *    is necessary for 6 ch.
 134  */
 135 #define HDMI_DMA_PERIOD_BYTES           (12288)
 136 #define HDMI_DMA_BUF_SIZE               (128 * 1024)
 137 #define HDMI_PCM_BUF_SIZE               (128 * 1024)
 138
 139 #define hdmi_audio_debug(dev, reg) \
 140         dev_dbg(dev, #reg ": 0x%02x\n", hdmi_readb(reg))
 141
 142 #ifdef DEBUG
 143 static void dumpregs(struct device *dev)
 144 {
 145         hdmi_audio_debug(dev, HDMI_AHB_DMA_CONF0);
 146         hdmi_audio_debug(dev, HDMI_AHB_DMA_START);
 147         hdmi_audio_debug(dev, HDMI_AHB_DMA_STOP);
 148         hdmi_audio_debug(dev, HDMI_AHB_DMA_THRSLD);
 149         hdmi_audio_debug(dev, HDMI_AHB_DMA_STRADDR0);
 150         hdmi_audio_debug(dev, HDMI_AHB_DMA_STPADDR0);
 151         hdmi_audio_debug(dev, HDMI_AHB_DMA_BSTADDR0);
 152         hdmi_audio_debug(dev, HDMI_AHB_DMA_MBLENGTH0);
 153         hdmi_audio_debug(dev, HDMI_AHB_DMA_MBLENGTH1);
 154         hdmi_audio_debug(dev, HDMI_AHB_DMA_STAT);
 155         hdmi_audio_debug(dev, HDMI_AHB_DMA_INT);
 156         hdmi_audio_debug(dev, HDMI_AHB_DMA_MASK);
 157         hdmi_audio_debug(dev, HDMI_AHB_DMA_POL);
 158         hdmi_audio_debug(dev, HDMI_AHB_DMA_CONF1);
 159         hdmi_audio_debug(dev, HDMI_AHB_DMA_BUFFSTAT);
 160         hdmi_audio_debug(dev, HDMI_AHB_DMA_BUFFINT);
 161         hdmi_audio_debug(dev, HDMI_AHB_DMA_BUFFMASK);
 162         hdmi_audio_debug(dev, HDMI_AHB_DMA_BUFFPOL);
 163         hdmi_audio_debug(dev, HDMI_IH_MUTE_AHBDMAAUD_STAT0);
 164         hdmi_audio_debug(dev, HDMI_IH_AHBDMAAUD_STAT0);
 165         hdmi_audio_debug(dev, HDMI_IH_MUTE);
 166 }
 167
 168 static void dumppriv(struct device *dev, struct hdmi_dma_priv *priv)
 169 {
 170         dev_dbg(dev, "channels         = %d\n", priv->channels);
 171         dev_dbg(dev, "periods          = %d\n", priv->periods);
 172         dev_dbg(dev, "period_bytes     = %d\n", priv->period_bytes);
 173         dev_dbg(dev, "dma period_bytes = %d\n", priv->dma_period_bytes);
 174         dev_dbg(dev, "buffer_ratio     = %d\n", priv->buffer_ratio);
 175         dev_dbg(dev, "hw dma buffer    = 0x%08x\n", (int)priv->hw_buffer.addr);
 176         dev_dbg(dev, "dma buf size     = %d\n", (int)priv->buffer_bytes);
 177         dev_dbg(dev, "sample_rate      = %d\n", (int)priv->rate);
 178 }
 179 #else
 180 static void dumpregs(struct device *dev) {}
 181 static void dumppriv(struct device *dev, struct hdmi_dma_priv *priv) {}
 182 #endif
 183
 184 /*
 185  * Conditions for DMA to work:
 186  * ((final_addr - initial_addr)>>2)+1) < 2k.  So max period is 8k.
 187  * (inital_addr & 0x3) == 0
 188  * (final_addr  & 0x3) == 0x3
 189  *
 190  * The DMA Period should be an integer multiple of the IEC 60958 audio
 191  * frame size, which is 768 bytes (192 * 4).
 192  */
 193 static void hdmi_dma_set_addr(int start_addr, int dma_period_bytes)
 194 {
 195         int final_addr = start_addr + dma_period_bytes - 1;
 196
 197         hdmi_write4(start_addr, HDMI_AHB_DMA_STRADDR0);
 198         hdmi_write4(final_addr, HDMI_AHB_DMA_STPADDR0);
 199 }
 200
 201 static void hdmi_dma_irq_set(bool set)
 202 {
 203         u8 val = hdmi_readb(HDMI_AHB_DMA_MASK);
 204
 205         if (set)
 206                 val |= HDMI_AHB_DMA_DONE;
 207         else
 208                 val &= (u8)~HDMI_AHB_DMA_DONE;
 209
 210         hdmi_writeb(val, HDMI_AHB_DMA_MASK);
 211 }
 212
 213 static void hdmi_mask(int mask)
 214 {
 215         u8 regval = hdmi_readb(HDMI_AHB_DMA_MASK);
 216
 217         if (mask)
 218                 regval |= HDMI_AHB_DMA_ERROR | HDMI_AHB_DMA_FIFO_EMPTY;
 219         else
 220                 regval &= (u8)~(HDMI_AHB_DMA_ERROR | HDMI_AHB_DMA_FIFO_EMPTY);
 221
 222         hdmi_writeb(regval, HDMI_AHB_DMA_MASK);
 223 }
 224
 225 int odd_ones(unsigned a)
 226 {
 227         a ^= a >> 8;
 228         a ^= a >> 4;
 229         a ^= a >> 2;
 230         a ^= a >> 1;
 231
 232         return a & 1;
 233 }
 234
 235 /* Add frame information for one pcm subframe */
 236 static u32 hdmi_dma_add_frame_info(struct hdmi_dma_priv *priv,
 237                                    u32 pcm_data, int subframe_idx)
 238 {
 239         union hdmi_audio_dma_data_t subframe;
 240
 241         subframe.U = 0;
 242         iec_header.B.channel = subframe_idx;
 243
 244         /* fill b (start-of-block) */
 245         subframe.B.b = (priv->frame_idx == 0) ? 1 : 0;
 246
 247         /* fill c (channel status) */
 248         if (priv->frame_idx < 42)
 249                 subframe.B.c = (iec_header.U >> priv->frame_idx) & 0x1;
 250         else
 251                 subframe.B.c = 0;
 252
 253         subframe.B.p = odd_ones(pcm_data);
 254         subframe.B.p ^= subframe.B.c;
 255         subframe.B.p ^= subframe.B.u;
 256         subframe.B.p ^= subframe.B.v;
 257
 258         /* fill data */
 259         if (priv->sample_bits == 16)
 260                 subframe.B.data = pcm_data << 8;
 261         else
 262                 subframe.B.data = pcm_data;
 263
 264         return subframe.U;
 265 }
 266
 267 static void init_table(int channels)
 268 {
 269         unsigned char *p = g_packet_head_table;
 270         int i, ch = 0;
 271
 272         for (i = 0; i < 48; i++) {
 273                 int b = 0;
 274                 if (i == 0)
 275                         b = 1;
 276
 277                 for (ch = 0; ch < channels; ch++) {
 278                         int c = 0;
 279                         if (i < 42) {
 280                                 iec_header.B.channel = ch+1;
 281                                 c = (iec_header.U >> i) & 0x1;
 282                         }
 283                         /* preset bit p as c */
 284                         *p++ = (b << 4) | (c << 2) | (c << 3);
 285                 }
 286         }
 287 }
 288
 289 #ifdef HDMI_DMA_NO_NEON
 290 /* Optimization for IEC head */
 291 static void hdmi_dma_copy_16_c_lut(u16 *src, u32 *dst, int samples,
 292                                 u8 *lookup_table)
 293 {
 294         u32 sample, head, p;
 295         int i;
 296
 297         for (i = 0; i < samples; i++) {
 298                 /* get source sample */
 299                 sample = *src++;
 300
 301                 /* xor every bit */
 302                 p = sample ^ (sample >> 8);
 303                 p ^= (p >> 4);
 304                 p ^= (p >> 2);
 305                 p ^= (p >> 1);
 306                 p &= 1; /* only want last bit */
 307                 p <<= 3; /* bit p */
 308
 309                 /* get packet header */
 310                 head = *lookup_table++;
 311
 312                 /* fix head */
 313                 head ^= p;
 314
 315                 /* store */
 316                 *dst++ = (head << 24) | (sample << 8);
 317         }
 318 }
 319
 320 static void hdmi_dma_copy_16_c_fast(u16 *src, u32 *dst, int samples)
 321 {
 322         u32 sample, p;
 323         int i;
 324
 325         for (i = 0; i < samples; i++) {
 326                 /* get source sample */
 327                 sample = *src++;
 328
 329                 /* xor every bit */
 330                 p = sample ^ (sample >> 8);
 331                 p ^= (p >> 4);
 332                 p ^= (p >> 2);
 333                 p ^= (p >> 1);
 334                 p &= 1; /* only want last bit */
 335                 p <<= 3; /* bit p */
 336
 337                 /* store */
 338                 *dst++ = (p << 24) | (sample << 8);
 339         }
 340 }
 341
 342 static void hdmi_dma_copy_16(u16 *src, u32 *dst, int framecnt, int channelcnt)
 343 {
 344         /* split input frames into 192-frame each */
 345         int count_in_192 = (framecnt + 191) / 192;
 346         int i;
 347
 348         for (i = 0; i < count_in_192; i++) {
 349                 int count, samples;
 350
 351                 /* handles frame index [0, 48) */
 352                 count = (framecnt < 48) ? framecnt : 48;
 353                 samples = count * channelcnt;
 354                 hdmi_dma_copy_16_c_lut(src, dst, samples, g_packet_head_table);
 355                 framecnt -= count;
 356                 if (framecnt == 0)
 357                         break;
 358
 359                 src  += samples;
 360                 dst += samples;
 361
 362                 /* handles frame index [48, 192) */
 363                 count = (framecnt < 192 - 48) ? framecnt : 192 - 48;
 364                 samples = count * channelcnt;
 365                 hdmi_dma_copy_16_c_fast(src, dst, samples);
 366                 framecnt -= count;
 367                 src  += samples;
 368                 dst += samples;
 369         }
 370 }
 371 #else
 372 /* NEON optimization for IEC head*/
 373
 374 /**
 375  * Convert pcm samples to iec samples suitable for HDMI transfer.
 376  * PCM sample is 16 bits length.
 377  * Frame index always starts from 0.
 378  * Channel count can be 1, 2, 4, 6, or 8
 379  * Sample count (frame_count * channel_count) is multipliable by 8.
 380  */
 381 static void hdmi_dma_copy_16(u16 *src, u32 *dst, int framecount, int channelcount)
 382 {
 383         /* split input frames into 192-frame each */
 384         int i, count_in_192 = (framecount + 191) / 192;
 385
 386         for (i = 0; i < count_in_192; i++) {
 387                 int count, samples;
 388
 389                 /* handles frame index [0, 48) */
 390                 count = (framecount < 48) ? framecount : 48;
 391                 samples = count * channelcount;
 392                 hdmi_dma_copy_16_neon_lut(src, dst, samples, g_packet_head_table);
 393                 framecount -= count;
 394                 if (framecount == 0)
 395                         break;
 396
 397                 src += samples;
 398                 dst += samples;
 399
 400                 /* handles frame index [48, 192) */
 401                 count = (framecount < 192 - 48) ? framecount : (192 - 48);
 402                 samples = count * channelcount;
 403                 hdmi_dma_copy_16_neon_fast(src, dst, samples);
 404                 framecount -= count;
 405                 src += samples;
 406                 dst += samples;
 407         }
 408 }
 409 #endif
 410
 411 static void hdmi_dma_mmap_copy(struct snd_pcm_substream *substream,
 412                                 int offset, int count)
 413 {
 414         struct snd_soc_pcm_runtime *rtd = substream->private_data;
 415         struct snd_pcm_runtime *runtime = substream->runtime;
 416         struct hdmi_dma_priv *priv = runtime->private_data;
 417         struct device *dev = rtd->platform->dev;
 418         u32 framecount, *dst;
 419         u16 *src16;
 420
 421         framecount = count / (priv->sample_align * priv->channels);
 422
 423         /* hw_buffer is the destination for pcm data plus frame info. */
 424         dst = (u32 *)(priv->hw_buffer.area + (offset * priv->buffer_ratio));
 425
 426         switch (priv->format) {
 427         case SNDRV_PCM_FORMAT_S16_LE:
 428                 /* dma_buffer is the mmapped buffer we are copying pcm from. */
 429                 src16 = (u16 *)(runtime->dma_area + offset);
 430                 hdmi_dma_copy_16(src16, dst, framecount, priv->channels);
 431                 break;
 432         default:
 433                 dev_err(dev, "unsupported sample format %s\n",
 434                                 snd_pcm_format_name(priv->format));
 435                 return;
 436         }
 437 }
 438
 439 static void hdmi_dma_data_copy(struct snd_pcm_substream *substream,
 440                                 struct hdmi_dma_priv *priv, char type)
 441 {
 442         struct snd_pcm_runtime *runtime = substream->runtime;
 443         unsigned long offset, count, appl_bytes, space_to_end;
 444
 445         if (runtime->access != SNDRV_PCM_ACCESS_MMAP_INTERLEAVED)
 446                 return;
 447
 448         appl_bytes = frames_to_bytes(runtime, runtime->status->hw_ptr);
 449         if (type == 'p')
 450                 appl_bytes += 2 * priv->period_bytes;
 451         offset = appl_bytes % priv->buffer_bytes;
 452
 453         switch (type) {
 454         case 'p':
 455                 count = priv->period_bytes;
 456                 space_to_end = priv->period_bytes;
 457                 break;
 458         case 'b':
 459                 count = priv->buffer_bytes;
 460                 space_to_end = priv->buffer_bytes - offset;
 461
 462                 break;
 463         default:
 464                 return;
 465         }
 466
 467         if (count <= space_to_end) {
 468                 hdmi_dma_mmap_copy(substream, offset, count);
 469         } else {
 470                 hdmi_dma_mmap_copy(substream, offset, space_to_end);
 471                 hdmi_dma_mmap_copy(substream, 0, count - space_to_end);
 472         }
 473 }
 474
 475 static void hdmi_sdma_callback(void *data)
 476 {
 477         struct hdmi_dma_priv *priv = (struct hdmi_dma_priv *)data;
 478         struct snd_pcm_substream *substream = priv->substream;
 479         struct snd_pcm_runtime *runtime = substream->runtime;
 480         unsigned long flags;
 481
 482         spin_lock_irqsave(&priv->irq_lock, flags);
 483
 484         if (runtime && runtime->dma_area && priv->tx_active) {
 485                 priv->offset += priv->period_bytes;
 486                 priv->offset %= priv->period_bytes * priv->periods;
 487
 488                 /* Copy data by period_bytes */
 489                 hdmi_dma_data_copy(substream, priv, 'p');
 490
 491                 snd_pcm_period_elapsed(substream);
 492         }
 493
 494         spin_unlock_irqrestore(&priv->irq_lock, flags);
 495
 496         return;
 497 }
 498
 499 static int hdmi_dma_set_thrsld_incrtype(struct device *dev, int channels)
 500 {
 501         u8 mask = HDMI_AHB_DMA_CONF0_BURST_MODE | HDMI_AHB_DMA_CONF0_INCR_TYPE_MASK;
 502         u8 val = hdmi_readb(HDMI_AHB_DMA_CONF0) & ~mask;
 503         int incr_type, threshold;
 504
 505         switch (hdmi_readb(HDMI_REVISION_ID)) {
 506         case 0x0a:
 507                 incr_type = HDMI_DMA_BURST_INCR4;
 508                 if (channels == 2)
 509                         threshold = 126;
 510                 else
 511                         threshold = 124;
 512                 break;
 513         case 0x1a:
 514                 incr_type = HDMI_DMA_BURST_INCR8;
 515                 threshold = 128;
 516                 break;
 517         default:
 518                 dev_err(dev, "unknown hdmi controller!\n");
 519                 return -ENODEV;
 520         }
 521
 522         hdmi_writeb(threshold, HDMI_AHB_DMA_THRSLD);
 523
 524         switch (incr_type) {
 525         case HDMI_DMA_BURST_UNSPECIFIED_LEGNTH:
 526                 break;
 527         case HDMI_DMA_BURST_INCR4:
 528                 val |= HDMI_AHB_DMA_CONF0_BURST_MODE;
 529                 break;
 530         case HDMI_DMA_BURST_INCR8:
 531                 val |= HDMI_AHB_DMA_CONF0_BURST_MODE |
 532                          HDMI_AHB_DMA_CONF0_INCR8;
 533                 break;
 534         case HDMI_DMA_BURST_INCR16:
 535                 val |= HDMI_AHB_DMA_CONF0_BURST_MODE |
 536                          HDMI_AHB_DMA_CONF0_INCR16;
 537                 break;
 538         default:
 539                 dev_err(dev, "invalid increment type: %d!", incr_type);
 540                 return -EINVAL;
 541         }
 542
 543         hdmi_writeb(val, HDMI_AHB_DMA_CONF0);
 544
 545         hdmi_audio_debug(dev, HDMI_AHB_DMA_THRSLD);
 546
 547         return 0;
 548 }
 549
 550 static int hdmi_dma_configure_dma(struct device *dev, int channels)
 551 {
 552         u8 i, val = 0;
 553         int ret;
 554
 555         if (channels <= 0 || channels > 8 || channels % 2 != 0) {
 556                 dev_err(dev, "unsupported channel number: %d\n", channels);
 557                 return -EINVAL;
 558         }
 559
 560         hdmi_audio_writeb(AHB_DMA_CONF0, EN_HLOCK, 0x1);
 561
 562         ret = hdmi_dma_set_thrsld_incrtype(dev, channels);
 563         if (ret)
 564                 return ret;
 565
 566         for (i = 0; i < channels; i += 2)
 567                 val |= 0x3 << i;
 568
 569         hdmi_writeb(val, HDMI_AHB_DMA_CONF1);
 570
 571         return 0;
 572 }
 573
 574 static void hdmi_dma_init_iec_header(void)
 575 {
 576         iec_header.U = 0;
 577
 578         iec_header.B.consumer = 0;              /* Consumer use */
 579         iec_header.B.linear_pcm = 0;            /* linear pcm audio */
 580         iec_header.B.copyright = 1;             /* no copyright */
 581         iec_header.B.pre_emphasis = 0;          /* 2 channels without pre-emphasis */
 582         iec_header.B.mode = 0;                  /* Mode 0 */
 583
 584         iec_header.B.category_code = 0;
 585
 586         iec_header.B.source = 2;                /* stereo */
 587         iec_header.B.channel = 0;
 588
 589         iec_header.B.sample_freq = 0x02;        /* 48 KHz */
 590         iec_header.B.clock_acc = 0;             /* Level II */
 591
 592         iec_header.B.word_length = 0x02;        /* 16 bits */
 593         iec_header.B.org_sample_freq = 0x0D;    /* 48 KHz */
 594
 595         iec_header.B.cgms_a = 0;                /* Copying is permitted without restriction */
 596 }
 597
 598 static int hdmi_dma_update_iec_header(struct snd_pcm_substream *substream)
 599 {
 600         struct snd_soc_pcm_runtime *rtd = substream->private_data;
 601         struct snd_pcm_runtime *runtime = substream->runtime;
 602         struct hdmi_dma_priv *priv = runtime->private_data;
 603         struct device *dev = rtd->platform->dev;
 604
 605         iec_header.B.source = priv->channels;
 606
 607         switch (priv->rate) {
 608         case 32000:
 609                 iec_header.B.sample_freq = 0x03;
 610                 iec_header.B.org_sample_freq = 0x0C;
 611                 break;
 612         case 44100:
 613                 iec_header.B.sample_freq = 0x00;
 614                 iec_header.B.org_sample_freq = 0x0F;
 615                 break;
 616         case 48000:
 617                 iec_header.B.sample_freq = 0x02;
 618                 iec_header.B.org_sample_freq = 0x0D;
 619                 break;
 620         case 88200:
 621                 iec_header.B.sample_freq = 0x08;
 622                 iec_header.B.org_sample_freq = 0x07;
 623                 break;
 624         case 96000:
 625                 iec_header.B.sample_freq = 0x0A;
 626                 iec_header.B.org_sample_freq = 0x05;
 627                 break;
 628         case 176400:
 629                 iec_header.B.sample_freq = 0x0C;
 630                 iec_header.B.org_sample_freq = 0x03;
 631                 break;
 632         case 192000:
 633                 iec_header.B.sample_freq = 0x0E;
 634                 iec_header.B.org_sample_freq = 0x01;
 635                 break;
 636         default:
 637                 dev_err(dev, "unsupported sample rate\n");
 638                 return -EFAULT;
 639         }
 640
 641         switch (priv->format) {
 642         case SNDRV_PCM_FORMAT_S16_LE:
 643                 iec_header.B.word_length = 0x02;
 644                 break;
 645         case SNDRV_PCM_FORMAT_S24_LE:
 646                 iec_header.B.word_length = 0x0b;
 647                 break;
 648         default:
 649                 return -EFAULT;
 650         }
 651
 652         return 0;
 653 }
 654
 655 /*
 656  * The HDMI block transmits the audio data without adding any of the audio
 657  * frame bits.  So we have to copy the raw dma data from the ALSA buffer
 658  * to the DMA buffer, adding the frame information.
 659  */
 660 static int hdmi_dma_copy(struct snd_pcm_substream *substream, int channel,
 661                         snd_pcm_uframes_t pos, void __user *buf,
 662                         snd_pcm_uframes_t frames)
 663 {
 664         struct snd_pcm_runtime *runtime = substream->runtime;
 665         struct hdmi_dma_priv *priv = runtime->private_data;
 666         unsigned int count = frames_to_bytes(runtime, frames);
 667         unsigned int pos_bytes = frames_to_bytes(runtime, pos);
 668         u32 *hw_buf;
 669         int subframe_idx;
 670         u32 pcm_data;
 671
 672         /* Adding frame info to pcm data from userspace and copy to hw_buffer */
 673         hw_buf = (u32 *)(priv->hw_buffer.area + (pos_bytes * priv->buffer_ratio));
 674
 675         while (count > 0) {
 676                 for (subframe_idx = 1 ; subframe_idx <= priv->channels ; subframe_idx++) {
 677                         if (copy_from_user(&pcm_data, buf, priv->sample_align))
 678                                 return -EFAULT;
 679
 680                         buf += priv->sample_align;
 681                         count -= priv->sample_align;
 682
 683                         /* Save the header info to the audio dma buffer */
 684                         *hw_buf++ = hdmi_dma_add_frame_info(priv, pcm_data, subframe_idx);
 685                 }
 686
 687                 priv->frame_idx++;
 688                 if (priv->frame_idx == 192)
 689                         priv->frame_idx = 0;
 690         }
 691
 692         return 0;
 693 }
 694
 695 static int hdmi_sdma_initbuf(struct device *dev, struct hdmi_dma_priv *priv)
 696 {
 697         struct hdmi_sdma_script *hdmi_sdma_t = priv->hdmi_sdma_t;
 698         u32 *head, *tail, i;
 699
 700         if (!hdmi_sdma_t) {
 701                 dev_err(dev, "hdmi private addr invalid!!!\n");
 702                 return -EINVAL;
 703         }
 704
 705         hdmi_sdma_t->control_reg_addr = HDMI_BASE_ADDR + HDMI_AHB_DMA_START;
 706         hdmi_sdma_t->status_reg_addr = HDMI_BASE_ADDR + HDMI_IH_AHBDMAAUD_STAT0;
 707         hdmi_sdma_t->dma_start_addr = HDMI_BASE_ADDR + HDMI_AHB_DMA_STRADDR0;
 708
 709         head = &hdmi_sdma_t->buffer[0];
 710         tail = &hdmi_sdma_t->buffer[1];
 711
 712         for (i = 0; i < priv->sdma_params.buffer_num; i++) {
 713                 *head = priv->hw_buffer.addr + i * priv->period_bytes * priv->buffer_ratio;
 714                 *tail = *head + priv->dma_period_bytes - 1;
 715                 head += 2;
 716                 tail += 2;
 717         }
 718
 719         return 0;
 720 }
 721
 722 static int hdmi_sdma_config(struct snd_pcm_substream *substream,
 723                         struct hdmi_dma_priv *priv)
 724 {
 725         struct snd_soc_pcm_runtime *rtd = substream->private_data;
 726         struct device *dai_dev = &priv->pdev->dev;
 727         struct device *dev = rtd->platform->dev;
 728         struct dma_slave_config slave_config;
 729         int ret;
 730
 731         priv->dma_channel = dma_request_slave_channel(dai_dev, "tx");
 732         if (priv->dma_channel == NULL) {
 733                 dev_err(dev, "failed to alloc dma channel\n");
 734                 return -EBUSY;
 735         }
 736
 737         priv->dma_data.data_addr1 = &priv->sdma_params.buffer_num;
 738         priv->dma_data.data_addr2 = &priv->sdma_params.phyaddr;
 739         priv->dma_channel->private = &priv->dma_data;
 740
 741         slave_config.direction = DMA_TRANS_NONE;
 742         slave_config.dma_request0 = 0;
 743         slave_config.dma_request1 = 0;
 744
 745         ret = dmaengine_slave_config(priv->dma_channel, &slave_config);
 746         if (ret) {
 747                 dev_err(dev, "failed to config slave dma\n");
 748                 return -EINVAL;
 749         }
 750
 751         return 0;
 752 }
 753
 754 static int hdmi_dma_hw_free(struct snd_pcm_substream *substream)
 755 {
 756         struct snd_pcm_runtime *runtime = substream->runtime;
 757         struct hdmi_dma_priv *priv = runtime->private_data;
 758
 759         if (priv->dma_channel) {
 760                 dma_release_channel(priv->dma_channel);
 761                 priv->dma_channel = NULL;
 762         }
 763
 764         return 0;
 765 }
 766
 767 static int hdmi_dma_hw_params(struct snd_pcm_substream *substream,
 768                                 struct snd_pcm_hw_params *params)
 769 {
 770         struct snd_pcm_runtime *runtime = substream->runtime;
 771         struct hdmi_dma_priv *priv = runtime->private_data;
 772         struct snd_soc_pcm_runtime *rtd = substream->private_data;
 773         struct device *dev = rtd->platform->dev;
 774         int ret;
 775
 776         priv->buffer_bytes = params_buffer_bytes(params);
 777         priv->periods = params_periods(params);
 778         priv->period_bytes = params_period_bytes(params);
 779         priv->channels = params_channels(params);
 780         priv->format = params_format(params);
 781         priv->rate = params_rate(params);
 782
 783         priv->offset = 0;
 784         priv->period_time = HZ / (priv->rate / params_period_size(params));
 785
 786         switch (priv->format) {
 787         case SNDRV_PCM_FORMAT_S16_LE:
 788                 priv->buffer_ratio = 2;
 789                 priv->sample_align = 2;
 790                 priv->sample_bits = 16;
 791                 break;
 792         case SNDRV_PCM_FORMAT_S24_LE:
 793                 /* 24 bit audio in 32 bit word */
 794                 priv->buffer_ratio = 1;
 795                 priv->sample_align = 4;
 796                 priv->sample_bits = 24;
 797                 break;
 798         default:
 799                 dev_err(dev, "unsupported sample format: %d\n", priv->format);
 800                 return -EINVAL;
 801         }
 802
 803         priv->dma_period_bytes = priv->period_bytes * priv->buffer_ratio;
 804         priv->sdma_params.buffer_num = priv->periods;
 805         priv->sdma_params.phyaddr = priv->phy_hdmi_sdma_t;
 806
 807         ret = hdmi_sdma_initbuf(dev, priv);
 808         if (ret)
 809                 return ret;
 810
 811         ret = hdmi_sdma_config(substream, priv);
 812         if (ret)
 813                 return ret;
 814
 815         snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer);
 816
 817         ret = hdmi_dma_configure_dma(dev, priv->channels);
 818         if (ret)
 819                 return ret;
 820
 821         hdmi_dma_set_addr(priv->hw_buffer.addr, priv->dma_period_bytes);
 822
 823         dumppriv(dev, priv);
 824
 825         hdmi_dma_update_iec_header(substream);
 826
 827         /* Init par for mmap optimizate */
 828         init_table(priv->channels);
 829
 830         priv->appl_bytes = 0;
 831
 832         return 0;
 833 }
 834
 835 static void hdmi_dma_trigger_init(struct snd_pcm_substream *substream,
 836                                 struct hdmi_dma_priv *priv)
 837 {
 838         unsigned long status;
 839
 840         priv->offset = 0;
 841         priv->frame_idx = 0;
 842
 843         /* Copy data by buffer_bytes */
 844         hdmi_dma_data_copy(substream, priv, 'b');
 845
 846         hdmi_audio_writeb(AHB_DMA_CONF0, SW_FIFO_RST, 0x1);
 847
 848         /* Delay after reset */
 849         udelay(1);
 850
 851         status = hdmi_readb(HDMI_IH_AHBDMAAUD_STAT0);
 852         hdmi_writeb(status, HDMI_IH_AHBDMAAUD_STAT0);
 853 }
 854
 855 static int hdmi_dma_prepare_and_submit(struct snd_pcm_substream *substream,
 856                                         struct hdmi_dma_priv *priv)
 857 {
 858         struct snd_soc_pcm_runtime *rtd = substream->private_data;
 859         struct device *dev = rtd->platform->dev;
 860
 861         priv->desc = dmaengine_prep_dma_cyclic(priv->dma_channel, 0, 0, 0,
 862                                                 DMA_TRANS_NONE, 0);
 863         if (!priv->desc) {
 864                 dev_err(dev, "failed to prepare slave dma\n");
 865                 return -EINVAL;
 866         }
 867
 868         priv->desc->callback = hdmi_sdma_callback;
 869         priv->desc->callback_param = (void *)priv;
 870         dmaengine_submit(priv->desc);
 871
 872         return 0;
 873 }
 874
 875 static int hdmi_dma_trigger(struct snd_pcm_substream *substream, int cmd)
 876 {
 877         struct snd_pcm_runtime *runtime = substream->runtime;
 878         struct snd_soc_pcm_runtime *rtd = substream->private_data;
 879         struct hdmi_dma_priv *priv = runtime->private_data;
 880         struct device *dev = rtd->platform->dev;
 881         int ret;
 882
 883         switch (cmd) {
 884         case SNDRV_PCM_TRIGGER_START:
 885         case SNDRV_PCM_TRIGGER_RESUME:
 886         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 887                 if (!check_hdmi_state())
 888                         return 0;
 889                 hdmi_dma_trigger_init(substream, priv);
 890
 891                 dumpregs(dev);
 892
 893                 priv->tx_active = true;
 894                 hdmi_audio_writeb(AHB_DMA_START, START, 0x1);
 895                 hdmi_dma_irq_set(false);
 896                 hdmi_set_dma_mode(1);
 897                 ret = hdmi_dma_prepare_and_submit(substream, priv);
 898                 if (ret)
 899                         return ret;
 900                 dma_async_issue_pending(priv->desc->chan);
 901                 break;
 902         case SNDRV_PCM_TRIGGER_STOP:
 903         case SNDRV_PCM_TRIGGER_SUSPEND:
 904         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 905                 dmaengine_terminate_all(priv->dma_channel);
 906                 hdmi_set_dma_mode(0);
 907                 hdmi_dma_irq_set(true);
 908                 hdmi_audio_writeb(AHB_DMA_STOP, STOP, 0x1);
 909                 priv->tx_active = false;
 910                 break;
 911         default:
 912                 return -EINVAL;
 913         }
 914
 915         return 0;
 916 }
 917
 918 static snd_pcm_uframes_t hdmi_dma_pointer(struct snd_pcm_substream *substream)
 919 {
 920         struct snd_pcm_runtime *runtime = substream->runtime;
 921         struct hdmi_dma_priv *priv = runtime->private_data;
 922
 923         return bytes_to_frames(runtime, priv->offset);
 924 }
 925
 926 static struct snd_pcm_hardware snd_imx_hardware = {
 927         .info = SNDRV_PCM_INFO_INTERLEAVED |
 928                 SNDRV_PCM_INFO_BLOCK_TRANSFER |
 929                 SNDRV_PCM_INFO_MMAP |
 930                 SNDRV_PCM_INFO_MMAP_VALID |
 931                 SNDRV_PCM_INFO_PAUSE |
 932                 SNDRV_PCM_INFO_RESUME,
 933         .formats = MXC_HDMI_FORMATS_PLAYBACK,
 934         .rate_min = 32000,
 935         .channels_min = 2,
 936         .channels_max = 8,
 937         .buffer_bytes_max = HDMI_PCM_BUF_SIZE,
 938         .period_bytes_min = HDMI_DMA_PERIOD_BYTES / 2,
 939         .period_bytes_max = HDMI_DMA_PERIOD_BYTES / 2,
 940         .periods_min = 8,
 941         .periods_max = 8,
 942         .fifo_size = 0,
 943 };
 944
 945 static void hdmi_dma_irq_enable(struct hdmi_dma_priv *priv)
 946 {
 947         unsigned long flags;
 948
 949         hdmi_writeb(0xff, HDMI_AHB_DMA_POL);
 950         hdmi_writeb(0xff, HDMI_AHB_DMA_BUFFPOL);
 951
 952         spin_lock_irqsave(&priv->irq_lock, flags);
 953
 954         hdmi_writeb(0xff, HDMI_IH_AHBDMAAUD_STAT0);
 955         hdmi_writeb(0xff, HDMI_IH_MUTE_AHBDMAAUD_STAT0);
 956         hdmi_dma_irq_set(false);
 957         hdmi_mask(0);
 958
 959         spin_unlock_irqrestore(&priv->irq_lock, flags);
 960 }
 961
 962 static void hdmi_dma_irq_disable(struct hdmi_dma_priv *priv)
 963 {
 964         unsigned long flags;
 965
 966         spin_lock_irqsave(&priv->irq_lock, flags);
 967
 968         hdmi_dma_irq_set(true);
 969         hdmi_writeb(0x0, HDMI_IH_MUTE_AHBDMAAUD_STAT0);
 970         hdmi_writeb(0xff, HDMI_IH_AHBDMAAUD_STAT0);
 971         hdmi_mask(1);
 972
 973         spin_unlock_irqrestore(&priv->irq_lock, flags);
 974 }
 975
 976 static int hdmi_dma_open(struct snd_pcm_substream *substream)
 977 {
 978         struct snd_pcm_runtime *runtime = substream->runtime;
 979         struct snd_soc_pcm_runtime *rtd = substream->private_data;
 980         struct device *dev = rtd->platform->dev;
 981         struct hdmi_dma_priv *priv = dev_get_drvdata(dev);
 982         int ret;
 983
 984         runtime->private_data = priv;
 985
 986         ret = mxc_hdmi_register_audio(substream);
 987         if (ret < 0) {
 988                 dev_err(dev, "HDMI Video is not ready!\n");
 989                 return ret;
 990         }
 991
 992         hdmi_audio_writeb(AHB_DMA_CONF0, SW_FIFO_RST, 0x1);
 993
 994         ret = snd_pcm_hw_constraint_integer(substream->runtime,
 995                         SNDRV_PCM_HW_PARAM_PERIODS);
 996         if (ret < 0)
 997                 return ret;
 998
 999         snd_soc_set_runtime_hwparams(substream, &snd_imx_hardware);
1000
1001         hdmi_dma_irq_enable(priv);
1002
1003         return 0;
1004 }
1005
1006 static int hdmi_dma_close(struct snd_pcm_substream *substream)
1007 {
1008         struct snd_pcm_runtime *runtime = substream->runtime;
1009         struct hdmi_dma_priv *priv = runtime->private_data;
1010
1011         hdmi_dma_irq_disable(priv);
1012         mxc_hdmi_unregister_audio(substream);
1013
1014         return 0;
1015 }
1016
1017 static struct snd_pcm_ops imx_hdmi_dma_pcm_ops = {
1018         .open           = hdmi_dma_open,
1019         .close          = hdmi_dma_close,
1020         .ioctl          = snd_pcm_lib_ioctl,
1021         .hw_params      = hdmi_dma_hw_params,
1022         .hw_free        = hdmi_dma_hw_free,
1023         .trigger        = hdmi_dma_trigger,
1024         .pointer        = hdmi_dma_pointer,
1025         .copy           = hdmi_dma_copy,
1026 };
1027
1028 static int imx_hdmi_dma_pcm_new(struct snd_soc_pcm_runtime *rtd)
1029 {
1030         struct hdmi_dma_priv *priv = dev_get_drvdata(rtd->platform->dev);
1031         struct snd_card *card = rtd->card->snd_card;
1032         struct snd_pcm_substream *substream;
1033         struct snd_pcm *pcm = rtd->pcm;
1034         u64 dma_mask = DMA_BIT_MASK(32);
1035         int ret = 0;
1036
1037         if (!card->dev->dma_mask)
1038                 card->dev->dma_mask = &dma_mask;
1039         if (!card->dev->coherent_dma_mask)
1040                 card->dev->coherent_dma_mask = DMA_BIT_MASK(32);
1041
1042         substream = pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream;
1043
1044         ret = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, pcm->card->dev,
1045                         HDMI_PCM_BUF_SIZE, &substream->dma_buffer);
1046         if (ret) {
1047                 dev_err(card->dev, "failed to alloc playback dma buffer\n");
1048                 return ret;
1049         }
1050
1051         priv->substream = substream;
1052
1053         /* Alloc the hw_buffer */
1054         ret = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, pcm->card->dev,
1055                         HDMI_DMA_BUF_SIZE, &priv->hw_buffer);
1056         if (ret) {
1057                 dev_err(card->dev, "failed to alloc hw dma buffer\n");
1058                 return ret;
1059         }
1060
1061         return ret;
1062 }
1063
1064 static void imx_hdmi_dma_pcm_free(struct snd_pcm *pcm)
1065 {
1066         int stream = SNDRV_PCM_STREAM_PLAYBACK;
1067         struct snd_pcm_substream *substream = pcm->streams[stream].substream;
1068         struct snd_soc_pcm_runtime *rtd = pcm->private_data;
1069         struct hdmi_dma_priv *priv = dev_get_drvdata(rtd->platform->dev);
1070
1071         if (substream) {
1072                 snd_dma_free_pages(&substream->dma_buffer);
1073                 substream->dma_buffer.area = NULL;
1074                 substream->dma_buffer.addr = 0;
1075         }
1076
1077         /* Free the hw_buffer */
1078         snd_dma_free_pages(&priv->hw_buffer);
1079         priv->hw_buffer.area = NULL;
1080         priv->hw_buffer.addr = 0;
1081 }
1082
1083 static struct snd_soc_platform_driver imx_hdmi_platform = {
1084         .ops            = &imx_hdmi_dma_pcm_ops,
1085         .pcm_new        = imx_hdmi_dma_pcm_new,
1086         .pcm_free       = imx_hdmi_dma_pcm_free,
1087 };
1088
1089 static int imx_soc_platform_probe(struct platform_device *pdev)
1090 {
1091         struct imx_hdmi *hdmi_drvdata = platform_get_drvdata(pdev);
1092         struct hdmi_dma_priv *priv;
1093         int ret = 0;
1094
1095         priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
1096         if (!priv) {
1097                 dev_err(&pdev->dev, "Failed to alloc hdmi_dma\n");
1098                 return -ENOMEM;
1099         }
1100
1101         priv->hdmi_sdma_t = dma_alloc_coherent(NULL,
1102                         sizeof(struct hdmi_sdma_script),
1103                         &priv->phy_hdmi_sdma_t, GFP_KERNEL);
1104         if (!priv->hdmi_sdma_t) {
1105                 dev_err(&pdev->dev, "Failed to alloc hdmi_sdma_t\n");
1106                 return -ENOMEM;
1107         }
1108
1109         priv->tx_active = false;
1110         spin_lock_init(&priv->irq_lock);
1111
1112         priv->pdev = hdmi_drvdata->pdev;
1113
1114         hdmi_dma_init_iec_header();
1115
1116         dev_set_drvdata(&pdev->dev, priv);
1117
1118         switch (hdmi_readb(HDMI_REVISION_ID)) {
1119         case 0x0a:
1120                 snd_imx_hardware.period_bytes_max = HDMI_DMA_PERIOD_BYTES / 4;
1121                 snd_imx_hardware.period_bytes_min = HDMI_DMA_PERIOD_BYTES / 4;
1122                 break;
1123         default:
1124                 break;
1125         }
1126
1127         ret = snd_soc_register_platform(&pdev->dev, &imx_hdmi_platform);
1128         if (ret)
1129                 goto err_plat;
1130
1131         return 0;
1132
1133 err_plat:
1134         dma_free_coherent(NULL, sizeof(struct hdmi_sdma_script),
1135                         priv->hdmi_sdma_t, priv->phy_hdmi_sdma_t);
1136
1137         return ret;
1138 }
1139
1140 static int imx_soc_platform_remove(struct platform_device *pdev)
1141 {
1142         struct hdmi_dma_priv *priv = dev_get_drvdata(&pdev->dev);
1143
1144         dma_free_coherent(NULL, sizeof(struct hdmi_sdma_script),
1145                         priv->hdmi_sdma_t, priv->phy_hdmi_sdma_t);
1146
1147         snd_soc_unregister_platform(&pdev->dev);
1148
1149         return 0;
1150 }
1151
1152 static struct platform_driver imx_hdmi_dma_driver = {
1153         .driver = {
1154                 .name = "imx-hdmi-audio",
1155                 .owner = THIS_MODULE,
1156         },
1157         .probe = imx_soc_platform_probe,
1158         .remove = imx_soc_platform_remove,
1159 };
1160
1161 module_platform_driver(imx_hdmi_dma_driver);
1162
1163 MODULE_AUTHOR("Freescale Semiconductor, Inc.");
1164 MODULE_DESCRIPTION("i.MX HDMI audio DMA");
1165 MODULE_LICENSE("GPL");