2 * imx-ssi.c -- ALSA Soc Audio Layer
4 * Copyright 2009 Sascha Hauer <s.hauer@pengutronix.de>
6 * This code is based on code copyrighted by Freescale,
7 * Liam Girdwood, Javier Martin and probably others.
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
15 * The i.MX SSI core has some nasty limitations in AC97 mode. While most
16 * sane processor vendors have a FIFO per AC97 slot, the i.MX has only
17 * one FIFO which combines all valid receive slots. We cannot even select
18 * which slots we want to receive. The WM9712 with which this driver
19 * was developed with always sends GPIO status data in slot 12 which
20 * we receive in our (PCM-) data stream. The only chance we have is to
21 * manually skip this data in the FIQ handler. With sampling rates different
22 * from 48000Hz not every frame has valid receive data, so the ratio
23 * between pcm data and GPIO status data changes. Our FIQ handler is not
24 * able to handle this, hence this driver only works with 48000Hz sampling
26 * Reading and writing AC97 registers is another challenge. The core
27 * provides us status bits when the read register is updated with *another*
28 * value. When we read the same register two times (and the register still
29 * contains the same value) these status bits are not set. We work
30 * around this by not polling these bits but only wait a fixed delay.
34 #include <linux/clk.h>
35 #include <linux/delay.h>
36 #include <linux/device.h>
37 #include <linux/dma-mapping.h>
38 #include <linux/init.h>
39 #include <linux/interrupt.h>
40 #include <linux/module.h>
41 #include <linux/platform_device.h>
42 #include <linux/slab.h>
44 #include <sound/core.h>
45 #include <sound/initval.h>
46 #include <sound/pcm.h>
47 #include <sound/pcm_params.h>
48 #include <sound/soc.h>
50 #include <linux/platform_data/asoc-imx-ssi.h>
54 #define SSI_SACNT_DEFAULT (SSI_SACNT_AC97EN | SSI_SACNT_FV)
57 * SSI Network Mode or TDM slots configuration.
58 * Should only be called when port is inactive (i.e. SSIEN = 0).
60 static int imx_ssi_set_dai_tdm_slot(struct snd_soc_dai *cpu_dai,
61 unsigned int tx_mask, unsigned int rx_mask, int slots, int slot_width)
63 struct imx_ssi *ssi = snd_soc_dai_get_drvdata(cpu_dai);
66 sccr = readl(ssi->base + SSI_STCCR);
67 sccr &= ~SSI_STCCR_DC_MASK;
68 sccr |= SSI_STCCR_DC(slots - 1);
69 writel(sccr, ssi->base + SSI_STCCR);
71 sccr = readl(ssi->base + SSI_SRCCR);
72 sccr &= ~SSI_STCCR_DC_MASK;
73 sccr |= SSI_STCCR_DC(slots - 1);
74 writel(sccr, ssi->base + SSI_SRCCR);
76 writel(tx_mask, ssi->base + SSI_STMSK);
77 writel(rx_mask, ssi->base + SSI_SRMSK);
83 * SSI DAI format configuration.
84 * Should only be called when port is inactive (i.e. SSIEN = 0).
86 static int imx_ssi_set_dai_fmt(struct snd_soc_dai *cpu_dai, unsigned int fmt)
88 struct imx_ssi *ssi = snd_soc_dai_get_drvdata(cpu_dai);
91 scr = readl(ssi->base + SSI_SCR) & ~(SSI_SCR_SYN | SSI_SCR_NET);
94 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
95 case SND_SOC_DAIFMT_I2S:
96 /* data on rising edge of bclk, frame low 1clk before data */
97 strcr |= SSI_STCR_TFSI | SSI_STCR_TEFS | SSI_STCR_TXBIT0;
99 if (ssi->flags & IMX_SSI_USE_I2S_SLAVE) {
100 scr &= ~SSI_I2S_MODE_MASK;
101 scr |= SSI_SCR_I2S_MODE_SLAVE;
104 case SND_SOC_DAIFMT_LEFT_J:
105 /* data on rising edge of bclk, frame high with data */
106 strcr |= SSI_STCR_TXBIT0;
108 case SND_SOC_DAIFMT_DSP_B:
109 /* data on rising edge of bclk, frame high with data */
110 strcr |= SSI_STCR_TFSL | SSI_STCR_TXBIT0;
112 case SND_SOC_DAIFMT_DSP_A:
113 /* data on rising edge of bclk, frame high 1clk before data */
114 strcr |= SSI_STCR_TFSL | SSI_STCR_TXBIT0 | SSI_STCR_TEFS;
118 /* DAI clock inversion */
119 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
120 case SND_SOC_DAIFMT_IB_IF:
121 strcr |= SSI_STCR_TFSI;
122 strcr &= ~SSI_STCR_TSCKP;
124 case SND_SOC_DAIFMT_IB_NF:
125 strcr &= ~(SSI_STCR_TSCKP | SSI_STCR_TFSI);
127 case SND_SOC_DAIFMT_NB_IF:
128 strcr |= SSI_STCR_TFSI | SSI_STCR_TSCKP;
130 case SND_SOC_DAIFMT_NB_NF:
131 strcr &= ~SSI_STCR_TFSI;
132 strcr |= SSI_STCR_TSCKP;
136 /* DAI clock master masks */
137 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
138 case SND_SOC_DAIFMT_CBM_CFM:
141 /* Master mode not implemented, needs handling of clocks. */
145 strcr |= SSI_STCR_TFEN0;
147 if (ssi->flags & IMX_SSI_NET)
149 if (ssi->flags & IMX_SSI_SYN)
152 writel(strcr, ssi->base + SSI_STCR);
153 writel(strcr, ssi->base + SSI_SRCR);
154 writel(scr, ssi->base + SSI_SCR);
160 * SSI system clock configuration.
161 * Should only be called when port is inactive (i.e. SSIEN = 0).
163 static int imx_ssi_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
164 int clk_id, unsigned int freq, int dir)
166 struct imx_ssi *ssi = snd_soc_dai_get_drvdata(cpu_dai);
169 scr = readl(ssi->base + SSI_SCR);
172 case IMX_SSP_SYS_CLK:
173 if (dir == SND_SOC_CLOCK_OUT)
174 scr |= SSI_SCR_SYS_CLK_EN;
176 scr &= ~SSI_SCR_SYS_CLK_EN;
182 writel(scr, ssi->base + SSI_SCR);
189 * Should only be called when port is inactive (i.e. SSIEN = 0).
191 static int imx_ssi_set_dai_clkdiv(struct snd_soc_dai *cpu_dai,
194 struct imx_ssi *ssi = snd_soc_dai_get_drvdata(cpu_dai);
197 stccr = readl(ssi->base + SSI_STCCR);
198 srccr = readl(ssi->base + SSI_SRCCR);
201 case IMX_SSI_TX_DIV_2:
202 stccr &= ~SSI_STCCR_DIV2;
205 case IMX_SSI_TX_DIV_PSR:
206 stccr &= ~SSI_STCCR_PSR;
209 case IMX_SSI_TX_DIV_PM:
211 stccr |= SSI_STCCR_PM(div);
213 case IMX_SSI_RX_DIV_2:
214 stccr &= ~SSI_STCCR_DIV2;
217 case IMX_SSI_RX_DIV_PSR:
218 stccr &= ~SSI_STCCR_PSR;
221 case IMX_SSI_RX_DIV_PM:
223 stccr |= SSI_STCCR_PM(div);
229 writel(stccr, ssi->base + SSI_STCCR);
230 writel(srccr, ssi->base + SSI_SRCCR);
236 * Should only be called when port is inactive (i.e. SSIEN = 0),
237 * although can be called multiple times by upper layers.
239 static int imx_ssi_hw_params(struct snd_pcm_substream *substream,
240 struct snd_pcm_hw_params *params,
241 struct snd_soc_dai *cpu_dai)
243 struct imx_ssi *ssi = snd_soc_dai_get_drvdata(cpu_dai);
247 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
252 if (ssi->flags & IMX_SSI_SYN)
255 sccr = readl(ssi->base + reg) & ~SSI_STCCR_WL_MASK;
257 /* DAI data (word) size */
258 switch (params_format(params)) {
259 case SNDRV_PCM_FORMAT_S16_LE:
260 sccr |= SSI_SRCCR_WL(16);
262 case SNDRV_PCM_FORMAT_S20_3LE:
263 sccr |= SSI_SRCCR_WL(20);
265 case SNDRV_PCM_FORMAT_S24_LE:
266 sccr |= SSI_SRCCR_WL(24);
270 writel(sccr, ssi->base + reg);
275 static int imx_ssi_trigger(struct snd_pcm_substream *substream, int cmd,
276 struct snd_soc_dai *dai)
278 struct imx_ssi *ssi = snd_soc_dai_get_drvdata(dai);
279 unsigned int sier_bits, sier;
282 scr = readl(ssi->base + SSI_SCR);
283 sier = readl(ssi->base + SSI_SIER);
285 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
286 if (ssi->flags & IMX_SSI_DMA)
287 sier_bits = SSI_SIER_TDMAE;
289 sier_bits = SSI_SIER_TIE | SSI_SIER_TFE0_EN;
291 if (ssi->flags & IMX_SSI_DMA)
292 sier_bits = SSI_SIER_RDMAE;
294 sier_bits = SSI_SIER_RIE | SSI_SIER_RFF0_EN;
298 case SNDRV_PCM_TRIGGER_START:
299 case SNDRV_PCM_TRIGGER_RESUME:
300 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
301 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
307 if (++ssi->enabled == 1)
308 scr |= SSI_SCR_SSIEN;
312 case SNDRV_PCM_TRIGGER_STOP:
313 case SNDRV_PCM_TRIGGER_SUSPEND:
314 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
315 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
321 if (--ssi->enabled == 0)
322 scr &= ~SSI_SCR_SSIEN;
329 if (!(ssi->flags & IMX_SSI_USE_AC97))
330 /* rx/tx are always enabled to access ac97 registers */
331 writel(scr, ssi->base + SSI_SCR);
333 writel(sier, ssi->base + SSI_SIER);
338 static const struct snd_soc_dai_ops imx_ssi_pcm_dai_ops = {
339 .hw_params = imx_ssi_hw_params,
340 .set_fmt = imx_ssi_set_dai_fmt,
341 .set_clkdiv = imx_ssi_set_dai_clkdiv,
342 .set_sysclk = imx_ssi_set_dai_sysclk,
343 .set_tdm_slot = imx_ssi_set_dai_tdm_slot,
344 .trigger = imx_ssi_trigger,
347 static int imx_ssi_dai_probe(struct snd_soc_dai *dai)
349 struct imx_ssi *ssi = dev_get_drvdata(dai->dev);
352 snd_soc_dai_set_drvdata(dai, ssi);
354 val = SSI_SFCSR_TFWM0(ssi->dma_params_tx.maxburst) |
355 SSI_SFCSR_RFWM0(ssi->dma_params_rx.maxburst);
356 writel(val, ssi->base + SSI_SFCSR);
359 dai->playback_dma_data = &ssi->dma_params_tx;
360 dai->capture_dma_data = &ssi->dma_params_rx;
365 static struct snd_soc_dai_driver imx_ssi_dai = {
366 .probe = imx_ssi_dai_probe,
370 .rates = SNDRV_PCM_RATE_8000_96000,
371 .formats = SNDRV_PCM_FMTBIT_S16_LE,
376 .rates = SNDRV_PCM_RATE_8000_96000,
377 .formats = SNDRV_PCM_FMTBIT_S16_LE,
379 .ops = &imx_ssi_pcm_dai_ops,
382 static struct snd_soc_dai_driver imx_ac97_dai = {
383 .probe = imx_ssi_dai_probe,
386 .stream_name = "AC97 Playback",
389 .rates = SNDRV_PCM_RATE_8000_48000,
390 .formats = SNDRV_PCM_FMTBIT_S16_LE,
393 .stream_name = "AC97 Capture",
396 .rates = SNDRV_PCM_RATE_48000,
397 .formats = SNDRV_PCM_FMTBIT_S16_LE,
399 .ops = &imx_ssi_pcm_dai_ops,
402 static const struct snd_soc_component_driver imx_component = {
406 static void setup_channel_to_ac97(struct imx_ssi *imx_ssi)
408 void __iomem *base = imx_ssi->base;
410 writel(0x0, base + SSI_SCR);
411 writel(0x0, base + SSI_STCR);
412 writel(0x0, base + SSI_SRCR);
414 writel(SSI_SCR_SYN | SSI_SCR_NET, base + SSI_SCR);
416 writel(SSI_SFCSR_RFWM0(8) |
419 SSI_SFCSR_TFWM1(8), base + SSI_SFCSR);
421 writel(SSI_STCCR_WL(16) | SSI_STCCR_DC(12), base + SSI_STCCR);
422 writel(SSI_STCCR_WL(16) | SSI_STCCR_DC(12), base + SSI_SRCCR);
424 writel(SSI_SCR_SYN | SSI_SCR_NET | SSI_SCR_SSIEN, base + SSI_SCR);
425 writel(SSI_SOR_WAIT(3), base + SSI_SOR);
427 writel(SSI_SCR_SYN | SSI_SCR_NET | SSI_SCR_SSIEN |
428 SSI_SCR_TE | SSI_SCR_RE,
431 writel(SSI_SACNT_DEFAULT, base + SSI_SACNT);
432 writel(0xff, base + SSI_SACCDIS);
433 writel(0x300, base + SSI_SACCEN);
436 static struct imx_ssi *ac97_ssi;
438 static void imx_ssi_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
441 struct imx_ssi *imx_ssi = ac97_ssi;
442 void __iomem *base = imx_ssi->base;
449 pr_debug("%s: 0x%02x 0x%04x\n", __func__, reg, val);
452 writel(lreg, base + SSI_SACADD);
455 writel(lval , base + SSI_SACDAT);
457 writel(SSI_SACNT_DEFAULT | SSI_SACNT_WR, base + SSI_SACNT);
461 static unsigned short imx_ssi_ac97_read(struct snd_ac97 *ac97,
464 struct imx_ssi *imx_ssi = ac97_ssi;
465 void __iomem *base = imx_ssi->base;
467 unsigned short val = -1;
470 lreg = (reg & 0x7f) << 12 ;
471 writel(lreg, base + SSI_SACADD);
472 writel(SSI_SACNT_DEFAULT | SSI_SACNT_RD, base + SSI_SACNT);
476 val = (readl(base + SSI_SACDAT) >> 4) & 0xffff;
478 pr_debug("%s: 0x%02x 0x%04x\n", __func__, reg, val);
483 static void imx_ssi_ac97_reset(struct snd_ac97 *ac97)
485 struct imx_ssi *imx_ssi = ac97_ssi;
487 if (imx_ssi->ac97_reset)
488 imx_ssi->ac97_reset(ac97);
489 /* First read sometimes fails, do a dummy read */
490 imx_ssi_ac97_read(ac97, 0);
493 static void imx_ssi_ac97_warm_reset(struct snd_ac97 *ac97)
495 struct imx_ssi *imx_ssi = ac97_ssi;
497 if (imx_ssi->ac97_warm_reset)
498 imx_ssi->ac97_warm_reset(ac97);
500 /* First read sometimes fails, do a dummy read */
501 imx_ssi_ac97_read(ac97, 0);
504 struct snd_ac97_bus_ops soc_ac97_ops = {
505 .read = imx_ssi_ac97_read,
506 .write = imx_ssi_ac97_write,
507 .reset = imx_ssi_ac97_reset,
508 .warm_reset = imx_ssi_ac97_warm_reset
510 EXPORT_SYMBOL_GPL(soc_ac97_ops);
512 static int imx_ssi_probe(struct platform_device *pdev)
514 struct resource *res;
516 struct imx_ssi_platform_data *pdata = pdev->dev.platform_data;
518 struct snd_soc_dai_driver *dai;
520 ssi = devm_kzalloc(&pdev->dev, sizeof(*ssi), GFP_KERNEL);
523 dev_set_drvdata(&pdev->dev, ssi);
526 ssi->ac97_reset = pdata->ac97_reset;
527 ssi->ac97_warm_reset = pdata->ac97_warm_reset;
528 ssi->flags = pdata->flags;
531 ssi->irq = platform_get_irq(pdev, 0);
533 ssi->clk = devm_clk_get(&pdev->dev, NULL);
534 if (IS_ERR(ssi->clk)) {
535 ret = PTR_ERR(ssi->clk);
536 dev_err(&pdev->dev, "Cannot get the clock: %d\n",
540 clk_prepare_enable(ssi->clk);
542 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
543 ssi->base = devm_ioremap_resource(&pdev->dev, res);
544 if (IS_ERR(ssi->base)) {
545 ret = PTR_ERR(ssi->base);
546 goto failed_register;
549 if (ssi->flags & IMX_SSI_USE_AC97) {
551 dev_err(&pdev->dev, "AC'97 SSI already registered\n");
553 goto failed_register;
556 setup_channel_to_ac97(ssi);
561 writel(0x0, ssi->base + SSI_SIER);
563 ssi->dma_params_rx.addr = res->start + SSI_SRX0;
564 ssi->dma_params_tx.addr = res->start + SSI_STX0;
566 ssi->dma_params_tx.maxburst = 6;
567 ssi->dma_params_rx.maxburst = 4;
569 ssi->dma_params_tx.filter_data = &ssi->filter_data_tx;
570 ssi->dma_params_rx.filter_data = &ssi->filter_data_rx;
572 res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "tx0");
574 imx_pcm_dma_params_init_data(&ssi->filter_data_tx, res->start,
578 res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "rx0");
580 imx_pcm_dma_params_init_data(&ssi->filter_data_rx, res->start,
584 platform_set_drvdata(pdev, ssi);
586 ret = snd_soc_register_component(&pdev->dev, &imx_component,
589 dev_err(&pdev->dev, "register DAI failed\n");
590 goto failed_register;
593 ssi->soc_platform_pdev_fiq = platform_device_alloc("imx-fiq-pcm-audio", pdev->id);
594 if (!ssi->soc_platform_pdev_fiq) {
596 goto failed_pdev_fiq_alloc;
599 platform_set_drvdata(ssi->soc_platform_pdev_fiq, ssi);
600 ret = platform_device_add(ssi->soc_platform_pdev_fiq);
602 dev_err(&pdev->dev, "failed to add platform device\n");
603 goto failed_pdev_fiq_add;
606 ssi->soc_platform_pdev = platform_device_alloc("imx-pcm-audio", pdev->id);
607 if (!ssi->soc_platform_pdev) {
609 goto failed_pdev_alloc;
612 platform_set_drvdata(ssi->soc_platform_pdev, ssi);
613 ret = platform_device_add(ssi->soc_platform_pdev);
615 dev_err(&pdev->dev, "failed to add platform device\n");
616 goto failed_pdev_add;
622 platform_device_put(ssi->soc_platform_pdev);
624 platform_device_del(ssi->soc_platform_pdev_fiq);
626 platform_device_put(ssi->soc_platform_pdev_fiq);
627 failed_pdev_fiq_alloc:
628 snd_soc_unregister_component(&pdev->dev);
630 release_mem_region(res->start, resource_size(res));
631 clk_disable_unprepare(ssi->clk);
637 static int imx_ssi_remove(struct platform_device *pdev)
639 struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
640 struct imx_ssi *ssi = platform_get_drvdata(pdev);
642 platform_device_unregister(ssi->soc_platform_pdev);
643 platform_device_unregister(ssi->soc_platform_pdev_fiq);
645 snd_soc_unregister_component(&pdev->dev);
647 if (ssi->flags & IMX_SSI_USE_AC97)
650 release_mem_region(res->start, resource_size(res));
651 clk_disable_unprepare(ssi->clk);
656 static struct platform_driver imx_ssi_driver = {
657 .probe = imx_ssi_probe,
658 .remove = imx_ssi_remove,
662 .owner = THIS_MODULE,
666 module_platform_driver(imx_ssi_driver);
668 /* Module information */
669 MODULE_AUTHOR("Sascha Hauer, <s.hauer@pengutronix.de>");
670 MODULE_DESCRIPTION("i.MX I2S/ac97 SoC Interface");
671 MODULE_LICENSE("GPL");
672 MODULE_ALIAS("platform:imx-ssi");