2 * imx-ssi.c -- ALSA Soc Audio Layer
4 * Copyright 2009 Sascha Hauer <s.hauer@pengutronix.de>
6 * This code is based on code copyrighted by Freescale,
7 * Liam Girdwood, Javier Martin and probably others.
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
15 * The i.MX SSI core has some nasty limitations in AC97 mode. While most
16 * sane processor vendors have a FIFO per AC97 slot, the i.MX has only
17 * one FIFO which combines all valid receive slots. We cannot even select
18 * which slots we want to receive. The WM9712 with which this driver
19 * was developed with always sends GPIO status data in slot 12 which
20 * we receive in our (PCM-) data stream. The only chance we have is to
21 * manually skip this data in the FIQ handler. With sampling rates different
22 * from 48000Hz not every frame has valid receive data, so the ratio
23 * between pcm data and GPIO status data changes. Our FIQ handler is not
24 * able to handle this, hence this driver only works with 48000Hz sampling
26 * Reading and writing AC97 registers is another challenge. The core
27 * provides us status bits when the read register is updated with *another*
28 * value. When we read the same register two times (and the register still
29 * contains the same value) these status bits are not set. We work
30 * around this by not polling these bits but only wait a fixed delay.
34 #include <linux/clk.h>
35 #include <linux/delay.h>
36 #include <linux/device.h>
37 #include <linux/dma-mapping.h>
38 #include <linux/init.h>
39 #include <linux/interrupt.h>
40 #include <linux/module.h>
41 #include <linux/platform_device.h>
42 #include <linux/slab.h>
44 #include <sound/core.h>
45 #include <sound/initval.h>
46 #include <sound/pcm.h>
47 #include <sound/pcm_params.h>
48 #include <sound/soc.h>
51 #include <mach/hardware.h>
55 #define SSI_SACNT_DEFAULT (SSI_SACNT_AC97EN | SSI_SACNT_FV)
58 * SSI Network Mode or TDM slots configuration.
59 * Should only be called when port is inactive (i.e. SSIEN = 0).
61 static int imx_ssi_set_dai_tdm_slot(struct snd_soc_dai *cpu_dai,
62 unsigned int tx_mask, unsigned int rx_mask, int slots, int slot_width)
64 struct imx_ssi *ssi = snd_soc_dai_get_drvdata(cpu_dai);
67 sccr = readl(ssi->base + SSI_STCCR);
68 sccr &= ~SSI_STCCR_DC_MASK;
69 sccr |= SSI_STCCR_DC(slots - 1);
70 writel(sccr, ssi->base + SSI_STCCR);
72 sccr = readl(ssi->base + SSI_SRCCR);
73 sccr &= ~SSI_STCCR_DC_MASK;
74 sccr |= SSI_STCCR_DC(slots - 1);
75 writel(sccr, ssi->base + SSI_SRCCR);
77 writel(tx_mask, ssi->base + SSI_STMSK);
78 writel(rx_mask, ssi->base + SSI_SRMSK);
84 * SSI DAI format configuration.
85 * Should only be called when port is inactive (i.e. SSIEN = 0).
87 static int imx_ssi_set_dai_fmt(struct snd_soc_dai *cpu_dai, unsigned int fmt)
89 struct imx_ssi *ssi = snd_soc_dai_get_drvdata(cpu_dai);
92 scr = readl(ssi->base + SSI_SCR) & ~SSI_SCR_SYN;
95 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
96 case SND_SOC_DAIFMT_I2S:
97 /* data on rising edge of bclk, frame low 1clk before data */
98 strcr |= SSI_STCR_TFSI | SSI_STCR_TEFS | SSI_STCR_TXBIT0;
99 if (ssi->flags & IMX_SSI_USE_I2S_SLAVE) {
100 scr &= ~SSI_I2S_MODE_MASK;
101 scr |= SSI_SCR_I2S_MODE_SLAVE;
104 case SND_SOC_DAIFMT_LEFT_J:
105 /* data on rising edge of bclk, frame high with data */
106 strcr |= SSI_STCR_TXBIT0;
108 case SND_SOC_DAIFMT_DSP_B:
109 /* data on rising edge of bclk, frame high with data */
110 strcr |= SSI_STCR_TFSL | SSI_STCR_TXBIT0;
112 case SND_SOC_DAIFMT_DSP_A:
113 /* data on rising edge of bclk, frame high 1clk before data */
114 strcr |= SSI_STCR_TFSL | SSI_STCR_TXBIT0 | SSI_STCR_TEFS;
118 /* DAI clock inversion */
119 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
120 case SND_SOC_DAIFMT_IB_IF:
121 strcr |= SSI_STCR_TFSI;
122 strcr &= ~SSI_STCR_TSCKP;
124 case SND_SOC_DAIFMT_IB_NF:
125 strcr &= ~(SSI_STCR_TSCKP | SSI_STCR_TFSI);
127 case SND_SOC_DAIFMT_NB_IF:
128 strcr |= SSI_STCR_TFSI | SSI_STCR_TSCKP;
130 case SND_SOC_DAIFMT_NB_NF:
131 strcr &= ~SSI_STCR_TFSI;
132 strcr |= SSI_STCR_TSCKP;
136 /* DAI clock master masks */
137 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
138 case SND_SOC_DAIFMT_CBM_CFM:
141 /* Master mode not implemented, needs handling of clocks. */
145 strcr |= SSI_STCR_TFEN0;
147 if (ssi->flags & IMX_SSI_SYN)
150 writel(strcr, ssi->base + SSI_STCR);
151 writel(strcr, ssi->base + SSI_SRCR);
152 writel(scr, ssi->base + SSI_SCR);
158 * SSI system clock configuration.
159 * Should only be called when port is inactive (i.e. SSIEN = 0).
161 static int imx_ssi_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
162 int clk_id, unsigned int freq, int dir)
164 struct imx_ssi *ssi = snd_soc_dai_get_drvdata(cpu_dai);
167 scr = readl(ssi->base + SSI_SCR);
170 case IMX_SSP_SYS_CLK:
171 if (dir == SND_SOC_CLOCK_OUT)
172 scr |= SSI_SCR_SYS_CLK_EN;
174 scr &= ~SSI_SCR_SYS_CLK_EN;
180 writel(scr, ssi->base + SSI_SCR);
187 * Should only be called when port is inactive (i.e. SSIEN = 0).
189 static int imx_ssi_set_dai_clkdiv(struct snd_soc_dai *cpu_dai,
192 struct imx_ssi *ssi = snd_soc_dai_get_drvdata(cpu_dai);
195 stccr = readl(ssi->base + SSI_STCCR);
196 srccr = readl(ssi->base + SSI_SRCCR);
199 case IMX_SSI_TX_DIV_2:
200 stccr &= ~SSI_STCCR_DIV2;
203 case IMX_SSI_TX_DIV_PSR:
204 stccr &= ~SSI_STCCR_PSR;
207 case IMX_SSI_TX_DIV_PM:
209 stccr |= SSI_STCCR_PM(div);
211 case IMX_SSI_RX_DIV_2:
212 stccr &= ~SSI_STCCR_DIV2;
215 case IMX_SSI_RX_DIV_PSR:
216 stccr &= ~SSI_STCCR_PSR;
219 case IMX_SSI_RX_DIV_PM:
221 stccr |= SSI_STCCR_PM(div);
227 writel(stccr, ssi->base + SSI_STCCR);
228 writel(srccr, ssi->base + SSI_SRCCR);
234 * Should only be called when port is inactive (i.e. SSIEN = 0),
235 * although can be called multiple times by upper layers.
237 static int imx_ssi_hw_params(struct snd_pcm_substream *substream,
238 struct snd_pcm_hw_params *params,
239 struct snd_soc_dai *cpu_dai)
241 struct imx_ssi *ssi = snd_soc_dai_get_drvdata(cpu_dai);
242 struct imx_pcm_dma_params *dma_data;
244 unsigned int channels = params_channels(params);
247 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
249 dma_data = &ssi->dma_params_tx;
252 dma_data = &ssi->dma_params_rx;
255 if (ssi->flags & IMX_SSI_SYN)
258 snd_soc_dai_set_dma_data(cpu_dai, substream, dma_data);
260 sccr = readl(ssi->base + reg) & ~SSI_STCCR_WL_MASK;
262 /* DAI data (word) size */
263 switch (params_format(params)) {
264 case SNDRV_PCM_FORMAT_S16_LE:
265 sccr |= SSI_SRCCR_WL(16);
267 case SNDRV_PCM_FORMAT_S20_3LE:
268 sccr |= SSI_SRCCR_WL(20);
270 case SNDRV_PCM_FORMAT_S24_LE:
271 sccr |= SSI_SRCCR_WL(24);
275 writel(sccr, ssi->base + reg);
277 scr = readl(ssi->base + SSI_SCR);
284 writel(scr, ssi->base + SSI_SCR);
288 static int imx_ssi_trigger(struct snd_pcm_substream *substream, int cmd,
289 struct snd_soc_dai *dai)
291 struct imx_ssi *ssi = snd_soc_dai_get_drvdata(dai);
292 unsigned int sier_bits, sier;
295 scr = readl(ssi->base + SSI_SCR);
296 sier = readl(ssi->base + SSI_SIER);
298 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
299 if (ssi->flags & IMX_SSI_DMA)
300 sier_bits = SSI_SIER_TDMAE;
302 sier_bits = SSI_SIER_TIE | SSI_SIER_TFE0_EN;
304 if (ssi->flags & IMX_SSI_DMA)
305 sier_bits = SSI_SIER_RDMAE;
307 sier_bits = SSI_SIER_RIE | SSI_SIER_RFF0_EN;
311 case SNDRV_PCM_TRIGGER_START:
312 case SNDRV_PCM_TRIGGER_RESUME:
313 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
314 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
320 if (++ssi->enabled == 1)
321 scr |= SSI_SCR_SSIEN;
325 case SNDRV_PCM_TRIGGER_STOP:
326 case SNDRV_PCM_TRIGGER_SUSPEND:
327 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
328 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
334 if (--ssi->enabled == 0)
335 scr &= ~SSI_SCR_SSIEN;
342 if (!(ssi->flags & IMX_SSI_USE_AC97))
343 /* rx/tx are always enabled to access ac97 registers */
344 writel(scr, ssi->base + SSI_SCR);
346 writel(sier, ssi->base + SSI_SIER);
351 static struct snd_soc_dai_ops imx_ssi_pcm_dai_ops = {
352 .hw_params = imx_ssi_hw_params,
353 .set_fmt = imx_ssi_set_dai_fmt,
354 .set_clkdiv = imx_ssi_set_dai_clkdiv,
355 .set_sysclk = imx_ssi_set_dai_sysclk,
356 .set_tdm_slot = imx_ssi_set_dai_tdm_slot,
357 .trigger = imx_ssi_trigger,
360 int snd_imx_pcm_mmap(struct snd_pcm_substream *substream,
361 struct vm_area_struct *vma)
363 struct snd_pcm_runtime *runtime = substream->runtime;
366 ret = dma_mmap_coherent(NULL, vma, runtime->dma_area,
367 runtime->dma_addr, runtime->dma_bytes);
369 pr_debug("%s: ret: %d %p 0x%08x 0x%08x\n", __func__, ret,
375 EXPORT_SYMBOL_GPL(snd_imx_pcm_mmap);
377 static int imx_pcm_preallocate_dma_buffer(struct snd_pcm *pcm, int stream)
379 struct snd_pcm_substream *substream = pcm->streams[stream].substream;
380 struct snd_dma_buffer *buf = &substream->dma_buffer;
381 size_t size = IMX_SSI_DMABUF_SIZE;
383 buf->dev.type = SNDRV_DMA_TYPE_DEV;
384 buf->dev.dev = pcm->card->dev;
385 buf->private_data = NULL;
386 buf->area = dma_alloc_writecombine(pcm->card->dev, size,
387 &buf->addr, GFP_KERNEL);
395 static u64 imx_pcm_dmamask = DMA_BIT_MASK(32);
397 int imx_pcm_new(struct snd_card *card, struct snd_soc_dai *dai,
403 if (!card->dev->dma_mask)
404 card->dev->dma_mask = &imx_pcm_dmamask;
405 if (!card->dev->coherent_dma_mask)
406 card->dev->coherent_dma_mask = DMA_BIT_MASK(32);
407 if (dai->driver->playback.channels_min) {
408 ret = imx_pcm_preallocate_dma_buffer(pcm,
409 SNDRV_PCM_STREAM_PLAYBACK);
414 if (dai->driver->capture.channels_min) {
415 ret = imx_pcm_preallocate_dma_buffer(pcm,
416 SNDRV_PCM_STREAM_CAPTURE);
424 EXPORT_SYMBOL_GPL(imx_pcm_new);
426 void imx_pcm_free(struct snd_pcm *pcm)
428 struct snd_pcm_substream *substream;
429 struct snd_dma_buffer *buf;
432 for (stream = 0; stream < 2; stream++) {
433 substream = pcm->streams[stream].substream;
437 buf = &substream->dma_buffer;
441 dma_free_writecombine(pcm->card->dev, buf->bytes,
442 buf->area, buf->addr);
446 EXPORT_SYMBOL_GPL(imx_pcm_free);
448 static int imx_ssi_dai_probe(struct snd_soc_dai *dai)
450 struct imx_ssi *ssi = dev_get_drvdata(dai->dev);
453 snd_soc_dai_set_drvdata(dai, ssi);
455 val = SSI_SFCSR_TFWM0(ssi->dma_params_tx.burstsize) |
456 SSI_SFCSR_RFWM0(ssi->dma_params_rx.burstsize);
457 writel(val, ssi->base + SSI_SFCSR);
462 static struct snd_soc_dai_driver imx_ssi_dai = {
463 .probe = imx_ssi_dai_probe,
467 .rates = SNDRV_PCM_RATE_8000_96000,
468 .formats = SNDRV_PCM_FMTBIT_S16_LE,
473 .rates = SNDRV_PCM_RATE_8000_96000,
474 .formats = SNDRV_PCM_FMTBIT_S16_LE,
476 .ops = &imx_ssi_pcm_dai_ops,
479 static struct snd_soc_dai_driver imx_ac97_dai = {
480 .probe = imx_ssi_dai_probe,
483 .stream_name = "AC97 Playback",
486 .rates = SNDRV_PCM_RATE_48000,
487 .formats = SNDRV_PCM_FMTBIT_S16_LE,
490 .stream_name = "AC97 Capture",
493 .rates = SNDRV_PCM_RATE_48000,
494 .formats = SNDRV_PCM_FMTBIT_S16_LE,
496 .ops = &imx_ssi_pcm_dai_ops,
499 static void setup_channel_to_ac97(struct imx_ssi *imx_ssi)
501 void __iomem *base = imx_ssi->base;
503 writel(0x0, base + SSI_SCR);
504 writel(0x0, base + SSI_STCR);
505 writel(0x0, base + SSI_SRCR);
507 writel(SSI_SCR_SYN | SSI_SCR_NET, base + SSI_SCR);
509 writel(SSI_SFCSR_RFWM0(8) |
512 SSI_SFCSR_TFWM1(8), base + SSI_SFCSR);
514 writel(SSI_STCCR_WL(16) | SSI_STCCR_DC(12), base + SSI_STCCR);
515 writel(SSI_STCCR_WL(16) | SSI_STCCR_DC(12), base + SSI_SRCCR);
517 writel(SSI_SCR_SYN | SSI_SCR_NET | SSI_SCR_SSIEN, base + SSI_SCR);
518 writel(SSI_SOR_WAIT(3), base + SSI_SOR);
520 writel(SSI_SCR_SYN | SSI_SCR_NET | SSI_SCR_SSIEN |
521 SSI_SCR_TE | SSI_SCR_RE,
524 writel(SSI_SACNT_DEFAULT, base + SSI_SACNT);
525 writel(0xff, base + SSI_SACCDIS);
526 writel(0x300, base + SSI_SACCEN);
529 static struct imx_ssi *ac97_ssi;
531 static void imx_ssi_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
534 struct imx_ssi *imx_ssi = ac97_ssi;
535 void __iomem *base = imx_ssi->base;
542 pr_debug("%s: 0x%02x 0x%04x\n", __func__, reg, val);
545 writel(lreg, base + SSI_SACADD);
548 writel(lval , base + SSI_SACDAT);
550 writel(SSI_SACNT_DEFAULT | SSI_SACNT_WR, base + SSI_SACNT);
554 static unsigned short imx_ssi_ac97_read(struct snd_ac97 *ac97,
557 struct imx_ssi *imx_ssi = ac97_ssi;
558 void __iomem *base = imx_ssi->base;
560 unsigned short val = -1;
563 lreg = (reg & 0x7f) << 12 ;
564 writel(lreg, base + SSI_SACADD);
565 writel(SSI_SACNT_DEFAULT | SSI_SACNT_RD, base + SSI_SACNT);
569 val = (readl(base + SSI_SACDAT) >> 4) & 0xffff;
571 pr_debug("%s: 0x%02x 0x%04x\n", __func__, reg, val);
576 static void imx_ssi_ac97_reset(struct snd_ac97 *ac97)
578 struct imx_ssi *imx_ssi = ac97_ssi;
580 if (imx_ssi->ac97_reset)
581 imx_ssi->ac97_reset(ac97);
584 static void imx_ssi_ac97_warm_reset(struct snd_ac97 *ac97)
586 struct imx_ssi *imx_ssi = ac97_ssi;
588 if (imx_ssi->ac97_warm_reset)
589 imx_ssi->ac97_warm_reset(ac97);
592 struct snd_ac97_bus_ops soc_ac97_ops = {
593 .read = imx_ssi_ac97_read,
594 .write = imx_ssi_ac97_write,
595 .reset = imx_ssi_ac97_reset,
596 .warm_reset = imx_ssi_ac97_warm_reset
598 EXPORT_SYMBOL_GPL(soc_ac97_ops);
600 static int imx_ssi_probe(struct platform_device *pdev)
602 struct resource *res;
604 struct imx_ssi_platform_data *pdata = pdev->dev.platform_data;
606 struct snd_soc_dai_driver *dai;
608 ssi = kzalloc(sizeof(*ssi), GFP_KERNEL);
611 dev_set_drvdata(&pdev->dev, ssi);
614 ssi->ac97_reset = pdata->ac97_reset;
615 ssi->ac97_warm_reset = pdata->ac97_warm_reset;
616 ssi->flags = pdata->flags;
619 ssi->irq = platform_get_irq(pdev, 0);
621 ssi->clk = clk_get(&pdev->dev, NULL);
622 if (IS_ERR(ssi->clk)) {
623 ret = PTR_ERR(ssi->clk);
624 dev_err(&pdev->dev, "Cannot get the clock: %d\n",
628 clk_enable(ssi->clk);
630 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
633 goto failed_get_resource;
636 if (!request_mem_region(res->start, resource_size(res), DRV_NAME)) {
637 dev_err(&pdev->dev, "request_mem_region failed\n");
639 goto failed_get_resource;
642 ssi->base = ioremap(res->start, resource_size(res));
644 dev_err(&pdev->dev, "ioremap failed\n");
649 if (ssi->flags & IMX_SSI_USE_AC97) {
655 setup_channel_to_ac97(ssi);
660 writel(0x0, ssi->base + SSI_SIER);
662 ssi->dma_params_rx.dma_addr = res->start + SSI_SRX0;
663 ssi->dma_params_tx.dma_addr = res->start + SSI_STX0;
665 ssi->dma_params_tx.burstsize = 4;
666 ssi->dma_params_rx.burstsize = 4;
668 ssi->dma_params_tx.peripheral_type = IMX_DMATYPE_SSI_SP;
669 ssi->dma_params_rx.peripheral_type = IMX_DMATYPE_SSI_SP;
671 res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "tx0");
673 ssi->dma_params_tx.dma = res->start;
675 res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "rx0");
677 ssi->dma_params_rx.dma = res->start;
679 platform_set_drvdata(pdev, ssi);
681 ret = snd_soc_register_dai(&pdev->dev, dai);
683 dev_err(&pdev->dev, "register DAI failed\n");
684 goto failed_register;
687 ssi->soc_platform_pdev_fiq = platform_device_alloc("imx-fiq-pcm-audio", pdev->id);
688 if (!ssi->soc_platform_pdev_fiq) {
690 goto failed_pdev_fiq_alloc;
693 platform_set_drvdata(ssi->soc_platform_pdev_fiq, ssi);
694 ret = platform_device_add(ssi->soc_platform_pdev_fiq);
696 dev_err(&pdev->dev, "failed to add platform device\n");
697 goto failed_pdev_fiq_add;
700 ssi->soc_platform_pdev = platform_device_alloc("imx-pcm-audio", pdev->id);
701 if (!ssi->soc_platform_pdev) {
703 goto failed_pdev_alloc;
706 platform_set_drvdata(ssi->soc_platform_pdev, ssi);
707 ret = platform_device_add(ssi->soc_platform_pdev);
709 dev_err(&pdev->dev, "failed to add platform device\n");
710 goto failed_pdev_add;
716 platform_device_put(ssi->soc_platform_pdev);
718 platform_device_del(ssi->soc_platform_pdev_fiq);
720 platform_device_put(ssi->soc_platform_pdev_fiq);
721 failed_pdev_fiq_alloc:
722 snd_soc_unregister_dai(&pdev->dev);
727 release_mem_region(res->start, resource_size(res));
729 clk_disable(ssi->clk);
737 static int __devexit imx_ssi_remove(struct platform_device *pdev)
739 struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
740 struct imx_ssi *ssi = platform_get_drvdata(pdev);
742 platform_device_unregister(ssi->soc_platform_pdev);
743 platform_device_unregister(ssi->soc_platform_pdev_fiq);
745 snd_soc_unregister_dai(&pdev->dev);
747 if (ssi->flags & IMX_SSI_USE_AC97)
751 release_mem_region(res->start, resource_size(res));
752 clk_disable(ssi->clk);
759 static struct platform_driver imx_ssi_driver = {
760 .probe = imx_ssi_probe,
761 .remove = __devexit_p(imx_ssi_remove),
765 .owner = THIS_MODULE,
769 static int __init imx_ssi_init(void)
771 return platform_driver_register(&imx_ssi_driver);
774 static void __exit imx_ssi_exit(void)
776 platform_driver_unregister(&imx_ssi_driver);
779 module_init(imx_ssi_init);
780 module_exit(imx_ssi_exit);
782 /* Module information */
783 MODULE_AUTHOR("Sascha Hauer, <s.hauer@pengutronix.de>");
784 MODULE_DESCRIPTION("i.MX I2S/ac97 SoC Interface");
785 MODULE_LICENSE("GPL");
786 MODULE_ALIAS("platform:imx-ssi");