2 * skl_topology.h - Intel HDA Platform topology header file
4 * Copyright (C) 2014-15 Intel Corp
5 * Author: Jeeja KP <jeeja.kp@intel.com>
6 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
17 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
21 #ifndef __SKL_TOPOLOGY_H__
22 #define __SKL_TOPOLOGY_H__
24 #include <linux/types.h>
26 #include <sound/hdaudio_ext.h>
27 #include <sound/soc.h>
29 #include "skl-tplg-interface.h"
31 #define BITS_PER_BYTE 8
32 #define MAX_TS_GROUPS 8
33 #define MAX_DMIC_TS_GROUPS 4
34 #define MAX_FIXED_DMIC_PARAMS_SIZE 727
36 /* Maximum number of coefficients up down mixer module */
37 #define UP_DOWN_MIXER_MAX_COEFF 6
39 #define MODULE_MAX_IN_PINS 8
40 #define MODULE_MAX_OUT_PINS 8
42 enum skl_channel_index {
44 SKL_CHANNEL_RIGHT = 1,
45 SKL_CHANNEL_CENTER = 2,
46 SKL_CHANNEL_LEFT_SURROUND = 3,
47 SKL_CHANNEL_CENTER_SURROUND = 3,
48 SKL_CHANNEL_RIGHT_SURROUND = 4,
50 SKL_CHANNEL_INVALID = 0xF,
75 SKL_FS_128000 = 128000,
76 SKL_FS_176400 = 176400,
77 SKL_FS_192000 = 192000,
81 enum skl_widget_type {
82 SKL_WIDGET_VMIXER = 1,
88 struct skl_audio_data_format {
89 enum skl_s_freq s_freq;
90 enum skl_bitdepth bit_depth;
92 enum skl_ch_cfg ch_cfg;
93 enum skl_interleaving interleaving;
94 u8 number_of_channels;
100 struct skl_base_cfg {
105 struct skl_audio_data_format audio_fmt;
108 struct skl_cpr_gtw_cfg {
112 /* not mandatory; required only for DMIC/I2S */
117 struct skl_base_cfg base_cfg;
118 struct skl_audio_data_format out_fmt;
119 u32 cpr_feature_mask;
120 struct skl_cpr_gtw_cfg gtw_cfg;
124 struct skl_src_module_cfg {
125 struct skl_base_cfg base_cfg;
126 enum skl_s_freq src_cfg;
129 struct notification_mask {
134 struct skl_up_down_mixer_cfg {
135 struct skl_base_cfg base_cfg;
136 enum skl_ch_cfg out_ch_cfg;
137 /* This should be set to 1 if user coefficients are required */
139 /* Pass the user coeff in this array */
140 s32 coeff[UP_DOWN_MIXER_MAX_COEFF];
143 struct skl_algo_cfg {
144 struct skl_base_cfg base_cfg;
148 struct skl_base_outfmt_cfg {
149 struct skl_base_cfg base_cfg;
150 struct skl_audio_data_format out_fmt;
154 SKL_DMA_HDA_HOST_OUTPUT_CLASS = 0,
155 SKL_DMA_HDA_HOST_INPUT_CLASS = 1,
156 SKL_DMA_HDA_HOST_INOUT_CLASS = 2,
157 SKL_DMA_HDA_LINK_OUTPUT_CLASS = 8,
158 SKL_DMA_HDA_LINK_INPUT_CLASS = 9,
159 SKL_DMA_HDA_LINK_INOUT_CLASS = 0xA,
160 SKL_DMA_DMIC_LINK_INPUT_CLASS = 0xB,
161 SKL_DMA_I2S_LINK_OUTPUT_CLASS = 0xC,
162 SKL_DMA_I2S_LINK_INPUT_CLASS = 0xD,
165 union skl_ssp_dma_node {
168 u8 time_slot_index:4;
173 union skl_connector_node_id {
182 struct skl_module_fmt {
188 u32 interleaving_style;
193 struct skl_module_cfg;
195 struct skl_module_inst_id {
200 enum skl_module_pin_state {
202 SKL_PIN_BIND_DONE = 1,
205 struct skl_module_pin {
206 struct skl_module_inst_id id;
209 enum skl_module_pin_state pin_state;
210 struct skl_module_cfg *tgt_mcfg;
213 struct skl_specific_cfg {
220 enum skl_pipe_state {
221 SKL_PIPE_INVALID = 0,
222 SKL_PIPE_CREATED = 1,
227 struct skl_pipe_module {
228 struct snd_soc_dapm_widget *w;
229 struct list_head node;
232 struct skl_pipe_params {
247 struct skl_pipe_params *p_params;
248 enum skl_pipe_state state;
249 struct list_head w_list;
252 enum skl_module_state {
253 SKL_MODULE_UNINIT = 0,
254 SKL_MODULE_INIT_DONE = 1,
255 SKL_MODULE_LOADED = 2,
256 SKL_MODULE_UNLOADED = 3,
257 SKL_MODULE_BIND_DONE = 4
260 struct skl_module_cfg {
261 char guid[SKL_UUID_STR_SZ];
262 struct skl_module_inst_id id;
264 bool homogenous_inputs;
265 bool homogenous_outputs;
266 struct skl_module_fmt in_fmt[MODULE_MAX_IN_PINS];
267 struct skl_module_fmt out_fmt[MODULE_MAX_OUT_PINS];
286 struct skl_module_pin *m_in_pin;
287 struct skl_module_pin *m_out_pin;
288 enum skl_module_type m_type;
289 enum skl_hw_conn_type hw_conn_type;
290 enum skl_module_state m_state;
291 struct skl_pipe *pipe;
292 struct skl_specific_cfg formats_config;
295 struct skl_algo_data {
302 struct skl_pipeline {
303 struct skl_pipe *pipe;
304 struct list_head node;
307 static inline struct skl *get_skl_ctx(struct device *dev)
309 struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
311 return ebus_to_skl(ebus);
314 int skl_tplg_be_update_params(struct snd_soc_dai *dai,
315 struct skl_pipe_params *params);
316 void skl_tplg_set_be_dmic_config(struct snd_soc_dai *dai,
317 struct skl_pipe_params *params, int stream);
318 int skl_tplg_init(struct snd_soc_platform *platform,
319 struct hdac_ext_bus *ebus);
320 struct skl_module_cfg *skl_tplg_fe_get_cpr_module(
321 struct snd_soc_dai *dai, int stream);
322 int skl_tplg_update_pipe_params(struct device *dev,
323 struct skl_module_cfg *mconfig, struct skl_pipe_params *params);
325 int skl_create_pipeline(struct skl_sst *ctx, struct skl_pipe *pipe);
327 int skl_run_pipe(struct skl_sst *ctx, struct skl_pipe *pipe);
329 int skl_pause_pipe(struct skl_sst *ctx, struct skl_pipe *pipe);
331 int skl_delete_pipe(struct skl_sst *ctx, struct skl_pipe *pipe);
333 int skl_stop_pipe(struct skl_sst *ctx, struct skl_pipe *pipe);
335 int skl_init_module(struct skl_sst *ctx, struct skl_module_cfg *module_config);
337 int skl_bind_modules(struct skl_sst *ctx, struct skl_module_cfg
338 *src_module, struct skl_module_cfg *dst_module);
340 int skl_unbind_modules(struct skl_sst *ctx, struct skl_module_cfg
341 *src_module, struct skl_module_cfg *dst_module);
343 int skl_set_module_params(struct skl_sst *ctx, u32 *params, int size,
344 u32 param_id, struct skl_module_cfg *mcfg);
345 int skl_get_module_params(struct skl_sst *ctx, u32 *params, int size,
346 u32 param_id, struct skl_module_cfg *mcfg);
348 enum skl_bitdepth skl_get_bit_depth(int params);