2 * pxa-ssp.c -- ALSA Soc Audio Layer
4 * Copyright 2005,2008 Wolfson Microelectronics PLC.
5 * Author: Liam Girdwood
6 * Mark Brown <broonie@opensource.wolfsonmicro.com>
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
14 * o Test network mode for > 16bit sample size
17 #include <linux/init.h>
18 #include <linux/module.h>
19 #include <linux/platform_device.h>
20 #include <linux/clk.h>
25 #include <sound/core.h>
26 #include <sound/pcm.h>
27 #include <sound/initval.h>
28 #include <sound/pcm_params.h>
29 #include <sound/soc.h>
30 #include <sound/pxa2xx-lib.h>
32 #include <mach/hardware.h>
34 #include <mach/regs-ssp.h>
35 #include <mach/audio.h>
38 #include "pxa2xx-pcm.h"
42 * SSP audio private data
45 struct ssp_device *ssp;
56 static void dump_registers(struct ssp_device *ssp)
58 dev_dbg(&ssp->pdev->dev, "SSCR0 0x%08x SSCR1 0x%08x SSTO 0x%08x\n",
59 ssp_read_reg(ssp, SSCR0), ssp_read_reg(ssp, SSCR1),
60 ssp_read_reg(ssp, SSTO));
62 dev_dbg(&ssp->pdev->dev, "SSPSP 0x%08x SSSR 0x%08x SSACD 0x%08x\n",
63 ssp_read_reg(ssp, SSPSP), ssp_read_reg(ssp, SSSR),
64 ssp_read_reg(ssp, SSACD));
67 static void ssp_enable(struct ssp_device *ssp)
71 sscr0 = __raw_readl(ssp->mmio_base + SSCR0) | SSCR0_SSE;
72 __raw_writel(sscr0, ssp->mmio_base + SSCR0);
75 static void ssp_disable(struct ssp_device *ssp)
79 sscr0 = __raw_readl(ssp->mmio_base + SSCR0) & ~SSCR0_SSE;
80 __raw_writel(sscr0, ssp->mmio_base + SSCR0);
83 struct pxa2xx_pcm_dma_data {
84 struct pxa2xx_pcm_dma_params params;
88 static struct pxa2xx_pcm_dma_params *
89 ssp_get_dma_params(struct ssp_device *ssp, int width4, int out)
91 struct pxa2xx_pcm_dma_data *dma;
93 dma = kzalloc(sizeof(struct pxa2xx_pcm_dma_data), GFP_KERNEL);
97 snprintf(dma->name, 20, "SSP%d PCM %s %s", ssp->port_id,
98 width4 ? "32-bit" : "16-bit", out ? "out" : "in");
100 dma->params.name = dma->name;
101 dma->params.drcmr = &DRCMR(out ? ssp->drcmr_tx : ssp->drcmr_rx);
102 dma->params.dcmd = (out ? (DCMD_INCSRCADDR | DCMD_FLOWTRG) :
103 (DCMD_INCTRGADDR | DCMD_FLOWSRC)) |
104 (width4 ? DCMD_WIDTH4 : DCMD_WIDTH2) | DCMD_BURST16;
105 dma->params.dev_addr = ssp->phys_base + SSDR;
110 static int pxa_ssp_startup(struct snd_pcm_substream *substream,
111 struct snd_soc_dai *dai)
113 struct snd_soc_pcm_runtime *rtd = substream->private_data;
114 struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
115 struct ssp_priv *priv = cpu_dai->private_data;
116 struct ssp_device *ssp = priv->ssp;
119 if (!cpu_dai->active) {
120 clk_enable(ssp->clk);
124 if (cpu_dai->dma_data) {
125 kfree(cpu_dai->dma_data);
126 cpu_dai->dma_data = NULL;
131 static void pxa_ssp_shutdown(struct snd_pcm_substream *substream,
132 struct snd_soc_dai *dai)
134 struct snd_soc_pcm_runtime *rtd = substream->private_data;
135 struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
136 struct ssp_priv *priv = cpu_dai->private_data;
137 struct ssp_device *ssp = priv->ssp;
139 if (!cpu_dai->active) {
141 clk_disable(ssp->clk);
144 if (cpu_dai->dma_data) {
145 kfree(cpu_dai->dma_data);
146 cpu_dai->dma_data = NULL;
152 static int pxa_ssp_suspend(struct snd_soc_dai *cpu_dai)
154 struct ssp_priv *priv = cpu_dai->private_data;
155 struct ssp_device *ssp = priv->ssp;
157 if (!cpu_dai->active)
158 clk_enable(ssp->clk);
160 priv->cr0 = __raw_readl(ssp->mmio_base + SSCR0);
161 priv->cr1 = __raw_readl(ssp->mmio_base + SSCR1);
162 priv->to = __raw_readl(ssp->mmio_base + SSTO);
163 priv->psp = __raw_readl(ssp->mmio_base + SSPSP);
166 clk_disable(ssp->clk);
170 static int pxa_ssp_resume(struct snd_soc_dai *cpu_dai)
172 struct ssp_priv *priv = cpu_dai->private_data;
173 struct ssp_device *ssp = priv->ssp;
174 uint32_t sssr = SSSR_ROR | SSSR_TUR | SSSR_BCE;
176 clk_enable(ssp->clk);
178 __raw_writel(sssr, ssp->mmio_base + SSSR);
179 __raw_writel(priv->cr0 & ~SSCR0_SSE, ssp->mmio_base + SSCR0);
180 __raw_writel(priv->cr1, ssp->mmio_base + SSCR1);
181 __raw_writel(priv->to, ssp->mmio_base + SSTO);
182 __raw_writel(priv->psp, ssp->mmio_base + SSPSP);
187 clk_disable(ssp->clk);
193 #define pxa_ssp_suspend NULL
194 #define pxa_ssp_resume NULL
198 * ssp_set_clkdiv - set SSP clock divider
199 * @div: serial clock rate divider
201 static void ssp_set_scr(struct ssp_device *ssp, u32 div)
203 u32 sscr0 = ssp_read_reg(ssp, SSCR0);
205 if (cpu_is_pxa25x() && ssp->type == PXA25x_SSP) {
206 sscr0 &= ~0x0000ff00;
207 sscr0 |= ((div - 2)/2) << 8; /* 2..512 */
209 sscr0 &= ~0x000fff00;
210 sscr0 |= (div - 1) << 8; /* 1..4096 */
212 ssp_write_reg(ssp, SSCR0, sscr0);
216 * ssp_get_clkdiv - get SSP clock divider
218 static u32 ssp_get_scr(struct ssp_device *ssp)
220 u32 sscr0 = ssp_read_reg(ssp, SSCR0);
223 if (cpu_is_pxa25x() && ssp->type == PXA25x_SSP)
224 div = ((sscr0 >> 8) & 0xff) * 2 + 2;
226 div = ((sscr0 >> 8) & 0xfff) + 1;
231 * Set the SSP ports SYSCLK.
233 static int pxa_ssp_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
234 int clk_id, unsigned int freq, int dir)
236 struct ssp_priv *priv = cpu_dai->private_data;
237 struct ssp_device *ssp = priv->ssp;
240 u32 sscr0 = ssp_read_reg(ssp, SSCR0) &
241 ~(SSCR0_ECS | SSCR0_NCS | SSCR0_MOD | SSCR0_ACS);
243 dev_dbg(&ssp->pdev->dev,
244 "pxa_ssp_set_dai_sysclk id: %d, clk_id %d, freq %u\n",
245 cpu_dai->id, clk_id, freq);
248 case PXA_SSP_CLK_NET_PLL:
251 case PXA_SSP_CLK_PLL:
252 /* Internal PLL is fixed */
254 priv->sysclk = 1843200;
256 priv->sysclk = 13000000;
258 case PXA_SSP_CLK_EXT:
262 case PXA_SSP_CLK_NET:
264 sscr0 |= SSCR0_NCS | SSCR0_MOD;
266 case PXA_SSP_CLK_AUDIO:
275 /* The SSP clock must be disabled when changing SSP clock mode
276 * on PXA2xx. On PXA3xx it must be enabled when doing so. */
277 if (!cpu_is_pxa3xx())
278 clk_disable(ssp->clk);
279 val = ssp_read_reg(ssp, SSCR0) | sscr0;
280 ssp_write_reg(ssp, SSCR0, val);
281 if (!cpu_is_pxa3xx())
282 clk_enable(ssp->clk);
288 * Set the SSP clock dividers.
290 static int pxa_ssp_set_dai_clkdiv(struct snd_soc_dai *cpu_dai,
293 struct ssp_priv *priv = cpu_dai->private_data;
294 struct ssp_device *ssp = priv->ssp;
298 case PXA_SSP_AUDIO_DIV_ACDS:
299 val = (ssp_read_reg(ssp, SSACD) & ~0x7) | SSACD_ACDS(div);
300 ssp_write_reg(ssp, SSACD, val);
302 case PXA_SSP_AUDIO_DIV_SCDB:
303 val = ssp_read_reg(ssp, SSACD);
305 #if defined(CONFIG_PXA3xx)
310 case PXA_SSP_CLK_SCDB_1:
313 case PXA_SSP_CLK_SCDB_4:
315 #if defined(CONFIG_PXA3xx)
316 case PXA_SSP_CLK_SCDB_8:
326 ssp_write_reg(ssp, SSACD, val);
328 case PXA_SSP_DIV_SCR:
329 ssp_set_scr(ssp, div);
339 * Configure the PLL frequency pxa27x and (afaik - pxa320 only)
341 static int pxa_ssp_set_dai_pll(struct snd_soc_dai *cpu_dai, int pll_id,
342 int source, unsigned int freq_in, unsigned int freq_out)
344 struct ssp_priv *priv = cpu_dai->private_data;
345 struct ssp_device *ssp = priv->ssp;
346 u32 ssacd = ssp_read_reg(ssp, SSACD) & ~0x70;
348 #if defined(CONFIG_PXA3xx)
350 ssp_write_reg(ssp, SSACDD, 0);
377 /* PXA3xx has a clock ditherer which can be used to generate
378 * a wider range of frequencies - calculate a value for it.
380 if (cpu_is_pxa3xx()) {
384 do_div(tmp, freq_out);
387 val = (val << 16) | 64;
388 ssp_write_reg(ssp, SSACDD, val);
392 dev_dbg(&ssp->pdev->dev,
393 "Using SSACDD %x to supply %uHz\n",
402 ssp_write_reg(ssp, SSACD, ssacd);
408 * Set the active slots in TDM/Network mode
410 static int pxa_ssp_set_dai_tdm_slot(struct snd_soc_dai *cpu_dai,
411 unsigned int tx_mask, unsigned int rx_mask, int slots, int slot_width)
413 struct ssp_priv *priv = cpu_dai->private_data;
414 struct ssp_device *ssp = priv->ssp;
417 sscr0 = ssp_read_reg(ssp, SSCR0);
418 sscr0 &= ~(SSCR0_MOD | SSCR0_SlotsPerFrm(8) | SSCR0_EDSS | SSCR0_DSS);
422 sscr0 |= SSCR0_EDSS | SSCR0_DataSize(slot_width - 16);
424 sscr0 |= SSCR0_DataSize(slot_width);
427 /* enable network mode */
430 /* set number of active slots */
431 sscr0 |= SSCR0_SlotsPerFrm(slots);
433 /* set active slot mask */
434 ssp_write_reg(ssp, SSTSA, tx_mask);
435 ssp_write_reg(ssp, SSRSA, rx_mask);
437 ssp_write_reg(ssp, SSCR0, sscr0);
443 * Tristate the SSP DAI lines
445 static int pxa_ssp_set_dai_tristate(struct snd_soc_dai *cpu_dai,
448 struct ssp_priv *priv = cpu_dai->private_data;
449 struct ssp_device *ssp = priv->ssp;
452 sscr1 = ssp_read_reg(ssp, SSCR1);
457 ssp_write_reg(ssp, SSCR1, sscr1);
463 * Set up the SSP DAI format.
464 * The SSP Port must be inactive before calling this function as the
465 * physical interface format is changed.
467 static int pxa_ssp_set_dai_fmt(struct snd_soc_dai *cpu_dai,
470 struct ssp_priv *priv = cpu_dai->private_data;
471 struct ssp_device *ssp = priv->ssp;
476 /* check if we need to change anything at all */
477 if (priv->dai_fmt == fmt)
480 /* we can only change the settings if the port is not in use */
481 if (ssp_read_reg(ssp, SSCR0) & SSCR0_SSE) {
482 dev_err(&ssp->pdev->dev,
483 "can't change hardware dai format: stream is in use");
487 /* reset port settings */
488 sscr0 = ssp_read_reg(ssp, SSCR0) &
489 (SSCR0_ECS | SSCR0_NCS | SSCR0_MOD | SSCR0_ACS);
490 sscr1 = SSCR1_RxTresh(8) | SSCR1_TxTresh(7);
493 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
494 case SND_SOC_DAIFMT_CBM_CFM:
495 sscr1 |= SSCR1_SCLKDIR | SSCR1_SFRMDIR;
497 case SND_SOC_DAIFMT_CBM_CFS:
498 sscr1 |= SSCR1_SCLKDIR;
500 case SND_SOC_DAIFMT_CBS_CFS:
506 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
507 case SND_SOC_DAIFMT_NB_NF:
508 sspsp |= SSPSP_SFRMP;
510 case SND_SOC_DAIFMT_NB_IF:
512 case SND_SOC_DAIFMT_IB_IF:
513 sspsp |= SSPSP_SCMODE(2);
515 case SND_SOC_DAIFMT_IB_NF:
516 sspsp |= SSPSP_SCMODE(2) | SSPSP_SFRMP;
522 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
523 case SND_SOC_DAIFMT_I2S:
525 sscr1 |= SSCR1_RWOT | SSCR1_TRAIL;
526 /* See hw_params() */
529 case SND_SOC_DAIFMT_DSP_A:
531 case SND_SOC_DAIFMT_DSP_B:
532 sscr0 |= SSCR0_MOD | SSCR0_PSP;
533 sscr1 |= SSCR1_TRAIL | SSCR1_RWOT;
540 ssp_write_reg(ssp, SSCR0, sscr0);
541 ssp_write_reg(ssp, SSCR1, sscr1);
542 ssp_write_reg(ssp, SSPSP, sspsp);
546 /* Since we are configuring the timings for the format by hand
547 * we have to defer some things until hw_params() where we
548 * know parameters like the sample size.
556 * Set the SSP audio DMA parameters and sample size.
557 * Can be called multiple times by oss emulation.
559 static int pxa_ssp_hw_params(struct snd_pcm_substream *substream,
560 struct snd_pcm_hw_params *params,
561 struct snd_soc_dai *dai)
563 struct snd_soc_pcm_runtime *rtd = substream->private_data;
564 struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
565 struct ssp_priv *priv = cpu_dai->private_data;
566 struct ssp_device *ssp = priv->ssp;
567 int chn = params_channels(params);
570 int width = snd_pcm_format_physical_width(params_format(params));
571 int ttsa = ssp_read_reg(ssp, SSTSA) & 0xf;
573 /* generate correct DMA params */
574 if (cpu_dai->dma_data)
575 kfree(cpu_dai->dma_data);
577 /* Network mode with one active slot (ttsa == 1) can be used
578 * to force 16-bit frame width on the wire (for S16_LE), even
579 * with two channels. Use 16-bit DMA transfers for this case.
581 cpu_dai->dma_data = ssp_get_dma_params(ssp,
582 ((chn == 2) && (ttsa != 1)) || (width == 32),
583 substream->stream == SNDRV_PCM_STREAM_PLAYBACK);
585 /* we can only change the settings if the port is not in use */
586 if (ssp_read_reg(ssp, SSCR0) & SSCR0_SSE)
589 /* clear selected SSP bits */
590 sscr0 = ssp_read_reg(ssp, SSCR0) & ~(SSCR0_DSS | SSCR0_EDSS);
591 ssp_write_reg(ssp, SSCR0, sscr0);
594 sscr0 = ssp_read_reg(ssp, SSCR0);
595 switch (params_format(params)) {
596 case SNDRV_PCM_FORMAT_S16_LE:
599 sscr0 |= SSCR0_FPCKE;
601 sscr0 |= SSCR0_DataSize(16);
603 case SNDRV_PCM_FORMAT_S24_LE:
604 sscr0 |= (SSCR0_EDSS | SSCR0_DataSize(8));
606 case SNDRV_PCM_FORMAT_S32_LE:
607 sscr0 |= (SSCR0_EDSS | SSCR0_DataSize(16));
610 ssp_write_reg(ssp, SSCR0, sscr0);
612 switch (priv->dai_fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
613 case SND_SOC_DAIFMT_I2S:
614 sspsp = ssp_read_reg(ssp, SSPSP);
616 if ((ssp_get_scr(ssp) == 4) && (width == 16)) {
617 /* This is a special case where the bitclk is 64fs
618 * and we're not dealing with 2*32 bits of audio
621 * The SSP values used for that are all found out by
622 * trying and failing a lot; some of the registers
623 * needed for that mode are only available on PXA3xx.
627 if (!cpu_is_pxa3xx())
630 sspsp |= SSPSP_SFRMWDTH(width * 2);
631 sspsp |= SSPSP_SFRMDLY(width * 4);
632 sspsp |= SSPSP_EDMYSTOP(3);
633 sspsp |= SSPSP_DMYSTOP(3);
634 sspsp |= SSPSP_DMYSTRT(1);
639 /* The frame width is the width the LRCLK is
640 * asserted for; the delay is expressed in
641 * half cycle units. We need the extra cycle
642 * because the data starts clocking out one BCLK
643 * after LRCLK changes polarity.
645 sspsp |= SSPSP_SFRMWDTH(width + 1);
646 sspsp |= SSPSP_SFRMDLY((width + 1) * 2);
647 sspsp |= SSPSP_DMYSTRT(1);
650 ssp_write_reg(ssp, SSPSP, sspsp);
656 /* When we use a network mode, we always require TDM slots
657 * - complain loudly and fail if they've not been set up yet.
659 if ((sscr0 & SSCR0_MOD) && !ttsa) {
660 dev_err(&ssp->pdev->dev, "No TDM timeslot configured\n");
669 static int pxa_ssp_trigger(struct snd_pcm_substream *substream, int cmd,
670 struct snd_soc_dai *dai)
672 struct snd_soc_pcm_runtime *rtd = substream->private_data;
673 struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
675 struct ssp_priv *priv = cpu_dai->private_data;
676 struct ssp_device *ssp = priv->ssp;
680 case SNDRV_PCM_TRIGGER_RESUME:
683 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
684 val = ssp_read_reg(ssp, SSCR1);
685 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
689 ssp_write_reg(ssp, SSCR1, val);
690 val = ssp_read_reg(ssp, SSSR);
691 ssp_write_reg(ssp, SSSR, val);
693 case SNDRV_PCM_TRIGGER_START:
694 val = ssp_read_reg(ssp, SSCR1);
695 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
699 ssp_write_reg(ssp, SSCR1, val);
702 case SNDRV_PCM_TRIGGER_STOP:
703 val = ssp_read_reg(ssp, SSCR1);
704 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
708 ssp_write_reg(ssp, SSCR1, val);
710 case SNDRV_PCM_TRIGGER_SUSPEND:
713 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
714 val = ssp_read_reg(ssp, SSCR1);
715 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
719 ssp_write_reg(ssp, SSCR1, val);
731 static int pxa_ssp_probe(struct platform_device *pdev,
732 struct snd_soc_dai *dai)
734 struct ssp_priv *priv;
737 priv = kzalloc(sizeof(struct ssp_priv), GFP_KERNEL);
741 priv->ssp = ssp_request(dai->id + 1, "SoC audio");
742 if (priv->ssp == NULL) {
747 priv->dai_fmt = (unsigned int) -1;
748 dai->private_data = priv;
757 static void pxa_ssp_remove(struct platform_device *pdev,
758 struct snd_soc_dai *dai)
760 struct ssp_priv *priv = dai->private_data;
764 #define PXA_SSP_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
765 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | \
766 SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 | \
767 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
769 #define PXA_SSP_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
770 SNDRV_PCM_FMTBIT_S24_LE | \
771 SNDRV_PCM_FMTBIT_S32_LE)
773 static struct snd_soc_dai_ops pxa_ssp_dai_ops = {
774 .startup = pxa_ssp_startup,
775 .shutdown = pxa_ssp_shutdown,
776 .trigger = pxa_ssp_trigger,
777 .hw_params = pxa_ssp_hw_params,
778 .set_sysclk = pxa_ssp_set_dai_sysclk,
779 .set_clkdiv = pxa_ssp_set_dai_clkdiv,
780 .set_pll = pxa_ssp_set_dai_pll,
781 .set_fmt = pxa_ssp_set_dai_fmt,
782 .set_tdm_slot = pxa_ssp_set_dai_tdm_slot,
783 .set_tristate = pxa_ssp_set_dai_tristate,
786 struct snd_soc_dai pxa_ssp_dai[] = {
788 .name = "pxa2xx-ssp1",
790 .probe = pxa_ssp_probe,
791 .remove = pxa_ssp_remove,
792 .suspend = pxa_ssp_suspend,
793 .resume = pxa_ssp_resume,
797 .rates = PXA_SSP_RATES,
798 .formats = PXA_SSP_FORMATS,
803 .rates = PXA_SSP_RATES,
804 .formats = PXA_SSP_FORMATS,
806 .ops = &pxa_ssp_dai_ops,
808 { .name = "pxa2xx-ssp2",
810 .probe = pxa_ssp_probe,
811 .remove = pxa_ssp_remove,
812 .suspend = pxa_ssp_suspend,
813 .resume = pxa_ssp_resume,
817 .rates = PXA_SSP_RATES,
818 .formats = PXA_SSP_FORMATS,
823 .rates = PXA_SSP_RATES,
824 .formats = PXA_SSP_FORMATS,
826 .ops = &pxa_ssp_dai_ops,
829 .name = "pxa2xx-ssp3",
831 .probe = pxa_ssp_probe,
832 .remove = pxa_ssp_remove,
833 .suspend = pxa_ssp_suspend,
834 .resume = pxa_ssp_resume,
838 .rates = PXA_SSP_RATES,
839 .formats = PXA_SSP_FORMATS,
844 .rates = PXA_SSP_RATES,
845 .formats = PXA_SSP_FORMATS,
847 .ops = &pxa_ssp_dai_ops,
850 .name = "pxa2xx-ssp4",
852 .probe = pxa_ssp_probe,
853 .remove = pxa_ssp_remove,
854 .suspend = pxa_ssp_suspend,
855 .resume = pxa_ssp_resume,
859 .rates = PXA_SSP_RATES,
860 .formats = PXA_SSP_FORMATS,
865 .rates = PXA_SSP_RATES,
866 .formats = PXA_SSP_FORMATS,
868 .ops = &pxa_ssp_dai_ops,
871 EXPORT_SYMBOL_GPL(pxa_ssp_dai);
873 static int __init pxa_ssp_init(void)
875 return snd_soc_register_dais(pxa_ssp_dai, ARRAY_SIZE(pxa_ssp_dai));
877 module_init(pxa_ssp_init);
879 static void __exit pxa_ssp_exit(void)
881 snd_soc_unregister_dais(pxa_ssp_dai, ARRAY_SIZE(pxa_ssp_dai));
883 module_exit(pxa_ssp_exit);
885 /* Module information */
886 MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
887 MODULE_DESCRIPTION("PXA SSP/PCM SoC Interface");
888 MODULE_LICENSE("GPL");