2 * pxa-ssp.c -- ALSA Soc Audio Layer
4 * Copyright 2005,2008 Wolfson Microelectronics PLC.
5 * Author: Liam Girdwood
6 * Mark Brown <broonie@opensource.wolfsonmicro.com>
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
14 * o Test network mode for > 16bit sample size
17 #include <linux/init.h>
18 #include <linux/module.h>
19 #include <linux/slab.h>
20 #include <linux/platform_device.h>
21 #include <linux/clk.h>
23 #include <linux/pxa2xx_ssp.h>
27 #include <sound/core.h>
28 #include <sound/pcm.h>
29 #include <sound/initval.h>
30 #include <sound/pcm_params.h>
31 #include <sound/soc.h>
32 #include <sound/pxa2xx-lib.h>
34 #include <mach/hardware.h>
37 #include "../../arm/pxa2xx-pcm.h"
41 * SSP audio private data
44 struct ssp_device *ssp;
55 static void dump_registers(struct ssp_device *ssp)
57 dev_dbg(&ssp->pdev->dev, "SSCR0 0x%08x SSCR1 0x%08x SSTO 0x%08x\n",
58 pxa_ssp_read_reg(ssp, SSCR0), pxa_ssp_read_reg(ssp, SSCR1),
59 pxa_ssp_read_reg(ssp, SSTO));
61 dev_dbg(&ssp->pdev->dev, "SSPSP 0x%08x SSSR 0x%08x SSACD 0x%08x\n",
62 pxa_ssp_read_reg(ssp, SSPSP), pxa_ssp_read_reg(ssp, SSSR),
63 pxa_ssp_read_reg(ssp, SSACD));
66 static void pxa_ssp_enable(struct ssp_device *ssp)
70 sscr0 = __raw_readl(ssp->mmio_base + SSCR0) | SSCR0_SSE;
71 __raw_writel(sscr0, ssp->mmio_base + SSCR0);
74 static void pxa_ssp_disable(struct ssp_device *ssp)
78 sscr0 = __raw_readl(ssp->mmio_base + SSCR0) & ~SSCR0_SSE;
79 __raw_writel(sscr0, ssp->mmio_base + SSCR0);
82 struct pxa2xx_pcm_dma_data {
83 struct pxa2xx_pcm_dma_params params;
87 static void pxa_ssp_set_dma_params(struct ssp_device *ssp, int width4,
88 int out, struct pxa2xx_pcm_dma_params *dma_data)
90 struct pxa2xx_pcm_dma_data *dma;
92 dma = container_of(dma_data, struct pxa2xx_pcm_dma_data, params);
94 snprintf(dma->name, 20, "SSP%d PCM %s %s", ssp->port_id,
95 width4 ? "32-bit" : "16-bit", out ? "out" : "in");
97 dma->params.name = dma->name;
98 dma->params.drcmr = &DRCMR(out ? ssp->drcmr_tx : ssp->drcmr_rx);
99 dma->params.dcmd = (out ? (DCMD_INCSRCADDR | DCMD_FLOWTRG) :
100 (DCMD_INCTRGADDR | DCMD_FLOWSRC)) |
101 (width4 ? DCMD_WIDTH4 : DCMD_WIDTH2) | DCMD_BURST16;
102 dma->params.dev_addr = ssp->phys_base + SSDR;
105 static int pxa_ssp_startup(struct snd_pcm_substream *substream,
106 struct snd_soc_dai *cpu_dai)
108 struct ssp_priv *priv = snd_soc_dai_get_drvdata(cpu_dai);
109 struct ssp_device *ssp = priv->ssp;
110 struct pxa2xx_pcm_dma_data *dma;
113 if (!cpu_dai->active) {
114 clk_enable(ssp->clk);
115 pxa_ssp_disable(ssp);
118 dma = kzalloc(sizeof(struct pxa2xx_pcm_dma_data), GFP_KERNEL);
121 snd_soc_dai_set_dma_data(cpu_dai, substream, &dma->params);
126 static void pxa_ssp_shutdown(struct snd_pcm_substream *substream,
127 struct snd_soc_dai *cpu_dai)
129 struct ssp_priv *priv = snd_soc_dai_get_drvdata(cpu_dai);
130 struct ssp_device *ssp = priv->ssp;
132 if (!cpu_dai->active) {
133 pxa_ssp_disable(ssp);
134 clk_disable(ssp->clk);
137 kfree(snd_soc_dai_get_dma_data(cpu_dai, substream));
138 snd_soc_dai_set_dma_data(cpu_dai, substream, NULL);
143 static int pxa_ssp_suspend(struct snd_soc_dai *cpu_dai)
145 struct ssp_priv *priv = snd_soc_dai_get_drvdata(cpu_dai);
146 struct ssp_device *ssp = priv->ssp;
148 if (!cpu_dai->active)
149 clk_enable(ssp->clk);
151 priv->cr0 = __raw_readl(ssp->mmio_base + SSCR0);
152 priv->cr1 = __raw_readl(ssp->mmio_base + SSCR1);
153 priv->to = __raw_readl(ssp->mmio_base + SSTO);
154 priv->psp = __raw_readl(ssp->mmio_base + SSPSP);
156 pxa_ssp_disable(ssp);
157 clk_disable(ssp->clk);
161 static int pxa_ssp_resume(struct snd_soc_dai *cpu_dai)
163 struct ssp_priv *priv = snd_soc_dai_get_drvdata(cpu_dai);
164 struct ssp_device *ssp = priv->ssp;
165 uint32_t sssr = SSSR_ROR | SSSR_TUR | SSSR_BCE;
167 clk_enable(ssp->clk);
169 __raw_writel(sssr, ssp->mmio_base + SSSR);
170 __raw_writel(priv->cr0 & ~SSCR0_SSE, ssp->mmio_base + SSCR0);
171 __raw_writel(priv->cr1, ssp->mmio_base + SSCR1);
172 __raw_writel(priv->to, ssp->mmio_base + SSTO);
173 __raw_writel(priv->psp, ssp->mmio_base + SSPSP);
178 clk_disable(ssp->clk);
184 #define pxa_ssp_suspend NULL
185 #define pxa_ssp_resume NULL
189 * ssp_set_clkdiv - set SSP clock divider
190 * @div: serial clock rate divider
192 static void pxa_ssp_set_scr(struct ssp_device *ssp, u32 div)
194 u32 sscr0 = pxa_ssp_read_reg(ssp, SSCR0);
196 if (ssp->type == PXA25x_SSP) {
197 sscr0 &= ~0x0000ff00;
198 sscr0 |= ((div - 2)/2) << 8; /* 2..512 */
200 sscr0 &= ~0x000fff00;
201 sscr0 |= (div - 1) << 8; /* 1..4096 */
203 pxa_ssp_write_reg(ssp, SSCR0, sscr0);
207 * pxa_ssp_get_clkdiv - get SSP clock divider
209 static u32 pxa_ssp_get_scr(struct ssp_device *ssp)
211 u32 sscr0 = pxa_ssp_read_reg(ssp, SSCR0);
214 if (ssp->type == PXA25x_SSP)
215 div = ((sscr0 >> 8) & 0xff) * 2 + 2;
217 div = ((sscr0 >> 8) & 0xfff) + 1;
222 * Set the SSP ports SYSCLK.
224 static int pxa_ssp_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
225 int clk_id, unsigned int freq, int dir)
227 struct ssp_priv *priv = snd_soc_dai_get_drvdata(cpu_dai);
228 struct ssp_device *ssp = priv->ssp;
231 u32 sscr0 = pxa_ssp_read_reg(ssp, SSCR0) &
232 ~(SSCR0_ECS | SSCR0_NCS | SSCR0_MOD | SSCR0_ACS);
234 dev_dbg(&ssp->pdev->dev,
235 "pxa_ssp_set_dai_sysclk id: %d, clk_id %d, freq %u\n",
236 cpu_dai->id, clk_id, freq);
239 case PXA_SSP_CLK_NET_PLL:
242 case PXA_SSP_CLK_PLL:
243 /* Internal PLL is fixed */
244 if (ssp->type == PXA25x_SSP)
245 priv->sysclk = 1843200;
247 priv->sysclk = 13000000;
249 case PXA_SSP_CLK_EXT:
253 case PXA_SSP_CLK_NET:
255 sscr0 |= SSCR0_NCS | SSCR0_MOD;
257 case PXA_SSP_CLK_AUDIO:
259 pxa_ssp_set_scr(ssp, 1);
266 /* The SSP clock must be disabled when changing SSP clock mode
267 * on PXA2xx. On PXA3xx it must be enabled when doing so. */
268 if (ssp->type != PXA3xx_SSP)
269 clk_disable(ssp->clk);
270 val = pxa_ssp_read_reg(ssp, SSCR0) | sscr0;
271 pxa_ssp_write_reg(ssp, SSCR0, val);
272 if (ssp->type != PXA3xx_SSP)
273 clk_enable(ssp->clk);
279 * Set the SSP clock dividers.
281 static int pxa_ssp_set_dai_clkdiv(struct snd_soc_dai *cpu_dai,
284 struct ssp_priv *priv = snd_soc_dai_get_drvdata(cpu_dai);
285 struct ssp_device *ssp = priv->ssp;
289 case PXA_SSP_AUDIO_DIV_ACDS:
290 val = (pxa_ssp_read_reg(ssp, SSACD) & ~0x7) | SSACD_ACDS(div);
291 pxa_ssp_write_reg(ssp, SSACD, val);
293 case PXA_SSP_AUDIO_DIV_SCDB:
294 val = pxa_ssp_read_reg(ssp, SSACD);
296 if (ssp->type == PXA3xx_SSP)
299 case PXA_SSP_CLK_SCDB_1:
302 case PXA_SSP_CLK_SCDB_4:
304 case PXA_SSP_CLK_SCDB_8:
305 if (ssp->type == PXA3xx_SSP)
313 pxa_ssp_write_reg(ssp, SSACD, val);
315 case PXA_SSP_DIV_SCR:
316 pxa_ssp_set_scr(ssp, div);
326 * Configure the PLL frequency pxa27x and (afaik - pxa320 only)
328 static int pxa_ssp_set_dai_pll(struct snd_soc_dai *cpu_dai, int pll_id,
329 int source, unsigned int freq_in, unsigned int freq_out)
331 struct ssp_priv *priv = snd_soc_dai_get_drvdata(cpu_dai);
332 struct ssp_device *ssp = priv->ssp;
333 u32 ssacd = pxa_ssp_read_reg(ssp, SSACD) & ~0x70;
335 if (ssp->type == PXA3xx_SSP)
336 pxa_ssp_write_reg(ssp, SSACDD, 0);
361 /* PXA3xx has a clock ditherer which can be used to generate
362 * a wider range of frequencies - calculate a value for it.
364 if (ssp->type == PXA3xx_SSP) {
368 do_div(tmp, freq_out);
371 val = (val << 16) | 64;
372 pxa_ssp_write_reg(ssp, SSACDD, val);
376 dev_dbg(&ssp->pdev->dev,
377 "Using SSACDD %x to supply %uHz\n",
385 pxa_ssp_write_reg(ssp, SSACD, ssacd);
391 * Set the active slots in TDM/Network mode
393 static int pxa_ssp_set_dai_tdm_slot(struct snd_soc_dai *cpu_dai,
394 unsigned int tx_mask, unsigned int rx_mask, int slots, int slot_width)
396 struct ssp_priv *priv = snd_soc_dai_get_drvdata(cpu_dai);
397 struct ssp_device *ssp = priv->ssp;
400 sscr0 = pxa_ssp_read_reg(ssp, SSCR0);
401 sscr0 &= ~(SSCR0_MOD | SSCR0_SlotsPerFrm(8) | SSCR0_EDSS | SSCR0_DSS);
405 sscr0 |= SSCR0_EDSS | SSCR0_DataSize(slot_width - 16);
407 sscr0 |= SSCR0_DataSize(slot_width);
410 /* enable network mode */
413 /* set number of active slots */
414 sscr0 |= SSCR0_SlotsPerFrm(slots);
416 /* set active slot mask */
417 pxa_ssp_write_reg(ssp, SSTSA, tx_mask);
418 pxa_ssp_write_reg(ssp, SSRSA, rx_mask);
420 pxa_ssp_write_reg(ssp, SSCR0, sscr0);
426 * Tristate the SSP DAI lines
428 static int pxa_ssp_set_dai_tristate(struct snd_soc_dai *cpu_dai,
431 struct ssp_priv *priv = snd_soc_dai_get_drvdata(cpu_dai);
432 struct ssp_device *ssp = priv->ssp;
435 sscr1 = pxa_ssp_read_reg(ssp, SSCR1);
440 pxa_ssp_write_reg(ssp, SSCR1, sscr1);
446 * Set up the SSP DAI format.
447 * The SSP Port must be inactive before calling this function as the
448 * physical interface format is changed.
450 static int pxa_ssp_set_dai_fmt(struct snd_soc_dai *cpu_dai,
453 struct ssp_priv *priv = snd_soc_dai_get_drvdata(cpu_dai);
454 struct ssp_device *ssp = priv->ssp;
455 u32 sscr0, sscr1, sspsp, scfr;
457 /* check if we need to change anything at all */
458 if (priv->dai_fmt == fmt)
461 /* we can only change the settings if the port is not in use */
462 if (pxa_ssp_read_reg(ssp, SSCR0) & SSCR0_SSE) {
463 dev_err(&ssp->pdev->dev,
464 "can't change hardware dai format: stream is in use");
468 /* reset port settings */
469 sscr0 = pxa_ssp_read_reg(ssp, SSCR0) &
470 ~(SSCR0_ECS | SSCR0_NCS | SSCR0_MOD | SSCR0_ACS);
471 sscr1 = SSCR1_RxTresh(8) | SSCR1_TxTresh(7);
474 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
475 case SND_SOC_DAIFMT_CBM_CFM:
476 sscr1 |= SSCR1_SCLKDIR | SSCR1_SFRMDIR | SSCR1_SCFR;
478 case SND_SOC_DAIFMT_CBM_CFS:
479 sscr1 |= SSCR1_SCLKDIR | SSCR1_SCFR;
481 case SND_SOC_DAIFMT_CBS_CFS:
487 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
488 case SND_SOC_DAIFMT_NB_NF:
489 sspsp |= SSPSP_SFRMP;
491 case SND_SOC_DAIFMT_NB_IF:
493 case SND_SOC_DAIFMT_IB_IF:
494 sspsp |= SSPSP_SCMODE(2);
496 case SND_SOC_DAIFMT_IB_NF:
497 sspsp |= SSPSP_SCMODE(2) | SSPSP_SFRMP;
503 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
504 case SND_SOC_DAIFMT_I2S:
506 sscr1 |= SSCR1_RWOT | SSCR1_TRAIL;
507 /* See hw_params() */
510 case SND_SOC_DAIFMT_DSP_A:
512 case SND_SOC_DAIFMT_DSP_B:
513 sscr0 |= SSCR0_MOD | SSCR0_PSP;
514 sscr1 |= SSCR1_TRAIL | SSCR1_RWOT;
521 pxa_ssp_write_reg(ssp, SSCR0, sscr0);
522 pxa_ssp_write_reg(ssp, SSCR1, sscr1);
523 pxa_ssp_write_reg(ssp, SSPSP, sspsp);
525 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
526 case SND_SOC_DAIFMT_CBM_CFM:
527 case SND_SOC_DAIFMT_CBM_CFS:
528 scfr = pxa_ssp_read_reg(ssp, SSCR1) | SSCR1_SCFR;
529 pxa_ssp_write_reg(ssp, SSCR1, scfr);
531 while (pxa_ssp_read_reg(ssp, SSSR) & SSSR_BSY)
538 /* Since we are configuring the timings for the format by hand
539 * we have to defer some things until hw_params() where we
540 * know parameters like the sample size.
548 * Set the SSP audio DMA parameters and sample size.
549 * Can be called multiple times by oss emulation.
551 static int pxa_ssp_hw_params(struct snd_pcm_substream *substream,
552 struct snd_pcm_hw_params *params,
553 struct snd_soc_dai *cpu_dai)
555 struct ssp_priv *priv = snd_soc_dai_get_drvdata(cpu_dai);
556 struct ssp_device *ssp = priv->ssp;
557 int chn = params_channels(params);
560 int width = snd_pcm_format_physical_width(params_format(params));
561 int ttsa = pxa_ssp_read_reg(ssp, SSTSA) & 0xf;
562 struct pxa2xx_pcm_dma_params *dma_data;
564 dma_data = snd_soc_dai_get_dma_data(cpu_dai, substream);
566 /* Network mode with one active slot (ttsa == 1) can be used
567 * to force 16-bit frame width on the wire (for S16_LE), even
568 * with two channels. Use 16-bit DMA transfers for this case.
570 pxa_ssp_set_dma_params(ssp,
571 ((chn == 2) && (ttsa != 1)) || (width == 32),
572 substream->stream == SNDRV_PCM_STREAM_PLAYBACK, dma_data);
574 /* we can only change the settings if the port is not in use */
575 if (pxa_ssp_read_reg(ssp, SSCR0) & SSCR0_SSE)
578 /* clear selected SSP bits */
579 sscr0 = pxa_ssp_read_reg(ssp, SSCR0) & ~(SSCR0_DSS | SSCR0_EDSS);
582 switch (params_format(params)) {
583 case SNDRV_PCM_FORMAT_S16_LE:
584 if (ssp->type == PXA3xx_SSP)
585 sscr0 |= SSCR0_FPCKE;
586 sscr0 |= SSCR0_DataSize(16);
588 case SNDRV_PCM_FORMAT_S24_LE:
589 sscr0 |= (SSCR0_EDSS | SSCR0_DataSize(8));
591 case SNDRV_PCM_FORMAT_S32_LE:
592 sscr0 |= (SSCR0_EDSS | SSCR0_DataSize(16));
595 pxa_ssp_write_reg(ssp, SSCR0, sscr0);
597 switch (priv->dai_fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
598 case SND_SOC_DAIFMT_I2S:
599 sspsp = pxa_ssp_read_reg(ssp, SSPSP);
601 if ((pxa_ssp_get_scr(ssp) == 4) && (width == 16)) {
602 /* This is a special case where the bitclk is 64fs
603 * and we're not dealing with 2*32 bits of audio
606 * The SSP values used for that are all found out by
607 * trying and failing a lot; some of the registers
608 * needed for that mode are only available on PXA3xx.
610 if (ssp->type != PXA3xx_SSP)
613 sspsp |= SSPSP_SFRMWDTH(width * 2);
614 sspsp |= SSPSP_SFRMDLY(width * 4);
615 sspsp |= SSPSP_EDMYSTOP(3);
616 sspsp |= SSPSP_DMYSTOP(3);
617 sspsp |= SSPSP_DMYSTRT(1);
619 /* The frame width is the width the LRCLK is
620 * asserted for; the delay is expressed in
621 * half cycle units. We need the extra cycle
622 * because the data starts clocking out one BCLK
623 * after LRCLK changes polarity.
625 sspsp |= SSPSP_SFRMWDTH(width + 1);
626 sspsp |= SSPSP_SFRMDLY((width + 1) * 2);
627 sspsp |= SSPSP_DMYSTRT(1);
630 pxa_ssp_write_reg(ssp, SSPSP, sspsp);
636 /* When we use a network mode, we always require TDM slots
637 * - complain loudly and fail if they've not been set up yet.
639 if ((sscr0 & SSCR0_MOD) && !ttsa) {
640 dev_err(&ssp->pdev->dev, "No TDM timeslot configured\n");
649 static void pxa_ssp_set_running_bit(struct snd_pcm_substream *substream,
650 struct ssp_device *ssp, int value)
652 uint32_t sscr0 = pxa_ssp_read_reg(ssp, SSCR0);
653 uint32_t sscr1 = pxa_ssp_read_reg(ssp, SSCR1);
654 uint32_t sspsp = pxa_ssp_read_reg(ssp, SSPSP);
655 uint32_t sssr = pxa_ssp_read_reg(ssp, SSSR);
657 if (value && (sscr0 & SSCR0_SSE))
658 pxa_ssp_write_reg(ssp, SSCR0, sscr0 & ~SSCR0_SSE);
660 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
664 sscr1 &= ~SSCR1_TSRE;
669 sscr1 &= ~SSCR1_RSRE;
672 pxa_ssp_write_reg(ssp, SSCR1, sscr1);
675 pxa_ssp_write_reg(ssp, SSSR, sssr);
676 pxa_ssp_write_reg(ssp, SSPSP, sspsp);
677 pxa_ssp_write_reg(ssp, SSCR0, sscr0 | SSCR0_SSE);
681 static int pxa_ssp_trigger(struct snd_pcm_substream *substream, int cmd,
682 struct snd_soc_dai *cpu_dai)
685 struct ssp_priv *priv = snd_soc_dai_get_drvdata(cpu_dai);
686 struct ssp_device *ssp = priv->ssp;
690 case SNDRV_PCM_TRIGGER_RESUME:
693 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
694 pxa_ssp_set_running_bit(substream, ssp, 1);
695 val = pxa_ssp_read_reg(ssp, SSSR);
696 pxa_ssp_write_reg(ssp, SSSR, val);
698 case SNDRV_PCM_TRIGGER_START:
699 pxa_ssp_set_running_bit(substream, ssp, 1);
701 case SNDRV_PCM_TRIGGER_STOP:
702 pxa_ssp_set_running_bit(substream, ssp, 0);
704 case SNDRV_PCM_TRIGGER_SUSPEND:
705 pxa_ssp_disable(ssp);
707 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
708 pxa_ssp_set_running_bit(substream, ssp, 0);
720 static int pxa_ssp_probe(struct snd_soc_dai *dai)
722 struct ssp_priv *priv;
725 priv = kzalloc(sizeof(struct ssp_priv), GFP_KERNEL);
729 priv->ssp = pxa_ssp_request(dai->id + 1, "SoC audio");
730 if (priv->ssp == NULL) {
735 priv->dai_fmt = (unsigned int) -1;
736 snd_soc_dai_set_drvdata(dai, priv);
745 static int pxa_ssp_remove(struct snd_soc_dai *dai)
747 struct ssp_priv *priv = snd_soc_dai_get_drvdata(dai);
749 pxa_ssp_free(priv->ssp);
754 #define PXA_SSP_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
755 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | \
756 SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \
757 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_64000 | \
758 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
760 #define PXA_SSP_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
761 SNDRV_PCM_FMTBIT_S24_LE | \
762 SNDRV_PCM_FMTBIT_S32_LE)
764 static const struct snd_soc_dai_ops pxa_ssp_dai_ops = {
765 .startup = pxa_ssp_startup,
766 .shutdown = pxa_ssp_shutdown,
767 .trigger = pxa_ssp_trigger,
768 .hw_params = pxa_ssp_hw_params,
769 .set_sysclk = pxa_ssp_set_dai_sysclk,
770 .set_clkdiv = pxa_ssp_set_dai_clkdiv,
771 .set_pll = pxa_ssp_set_dai_pll,
772 .set_fmt = pxa_ssp_set_dai_fmt,
773 .set_tdm_slot = pxa_ssp_set_dai_tdm_slot,
774 .set_tristate = pxa_ssp_set_dai_tristate,
777 static struct snd_soc_dai_driver pxa_ssp_dai = {
778 .probe = pxa_ssp_probe,
779 .remove = pxa_ssp_remove,
780 .suspend = pxa_ssp_suspend,
781 .resume = pxa_ssp_resume,
785 .rates = PXA_SSP_RATES,
786 .formats = PXA_SSP_FORMATS,
791 .rates = PXA_SSP_RATES,
792 .formats = PXA_SSP_FORMATS,
794 .ops = &pxa_ssp_dai_ops,
797 static int asoc_ssp_probe(struct platform_device *pdev)
799 return snd_soc_register_dai(&pdev->dev, &pxa_ssp_dai);
802 static int asoc_ssp_remove(struct platform_device *pdev)
804 snd_soc_unregister_dai(&pdev->dev);
808 static struct platform_driver asoc_ssp_driver = {
810 .name = "pxa-ssp-dai",
811 .owner = THIS_MODULE,
814 .probe = asoc_ssp_probe,
815 .remove = asoc_ssp_remove,
818 module_platform_driver(asoc_ssp_driver);
820 /* Module information */
821 MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
822 MODULE_DESCRIPTION("PXA SSP/PCM SoC Interface");
823 MODULE_LICENSE("GPL");