2 * Fifo-attached Serial Interface (FSI) support for SH7724
4 * Copyright (C) 2009 Renesas Solutions Corp.
5 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
8 * Copyright (c) 2007 Manuel Lauss <mano@roarinelk.homelinux.net>
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
15 #include <linux/delay.h>
16 #include <linux/dma-mapping.h>
17 #include <linux/pm_runtime.h>
20 #include <linux/of_device.h>
21 #include <linux/scatterlist.h>
22 #include <linux/sh_dma.h>
23 #include <linux/slab.h>
24 #include <linux/module.h>
25 #include <linux/workqueue.h>
26 #include <sound/soc.h>
27 #include <sound/pcm_params.h>
28 #include <sound/sh_fsi.h>
30 /* PortA/PortB register */
31 #define REG_DO_FMT 0x0000
32 #define REG_DOFF_CTL 0x0004
33 #define REG_DOFF_ST 0x0008
34 #define REG_DI_FMT 0x000C
35 #define REG_DIFF_CTL 0x0010
36 #define REG_DIFF_ST 0x0014
37 #define REG_CKG1 0x0018
38 #define REG_CKG2 0x001C
39 #define REG_DIDT 0x0020
40 #define REG_DODT 0x0024
41 #define REG_MUTE_ST 0x0028
42 #define REG_OUT_DMAC 0x002C
43 #define REG_OUT_SEL 0x0030
44 #define REG_IN_DMAC 0x0038
47 #define MST_CLK_RST 0x0210
48 #define MST_SOFT_RST 0x0214
49 #define MST_FIFO_SZ 0x0218
51 /* core register (depend on FSI version) */
52 #define A_MST_CTLR 0x0180
53 #define B_MST_CTLR 0x01A0
54 #define CPU_INT_ST 0x01F4
55 #define CPU_IEMSK 0x01F8
56 #define CPU_IMSK 0x01FC
63 #define CR_BWS_MASK (0x3 << 20) /* FSI2 */
64 #define CR_BWS_24 (0x0 << 20) /* FSI2 */
65 #define CR_BWS_16 (0x1 << 20) /* FSI2 */
66 #define CR_BWS_20 (0x2 << 20) /* FSI2 */
68 #define CR_DTMD_PCM (0x0 << 8) /* FSI2 */
69 #define CR_DTMD_SPDIF_PCM (0x1 << 8) /* FSI2 */
70 #define CR_DTMD_SPDIF_STREAM (0x2 << 8) /* FSI2 */
72 #define CR_MONO (0x0 << 4)
73 #define CR_MONO_D (0x1 << 4)
74 #define CR_PCM (0x2 << 4)
75 #define CR_I2S (0x3 << 4)
76 #define CR_TDM (0x4 << 4)
77 #define CR_TDM_D (0x5 << 4)
81 #define VDMD_MASK (0x3 << 4)
82 #define VDMD_FRONT (0x0 << 4) /* Package in front */
83 #define VDMD_BACK (0x1 << 4) /* Package in back */
84 #define VDMD_STREAM (0x2 << 4) /* Stream mode(16bit * 2) */
86 #define DMA_ON (0x1 << 0)
90 #define IRQ_HALF 0x00100000
91 #define FIFO_CLR 0x00000001
94 #define ERR_OVER 0x00000010
95 #define ERR_UNDER 0x00000001
96 #define ST_ERR (ERR_OVER | ERR_UNDER)
99 #define ACKMD_MASK 0x00007000
100 #define BPFMD_MASK 0x00000700
101 #define DIMD (1 << 4)
102 #define DOMD (1 << 0)
105 #define BP (1 << 4) /* Fix the signal of Biphase output */
106 #define SE (1 << 0) /* Fix the master clock */
112 /* IO SHIFT / MACRO */
117 #define AB_IO(param, shift) (param << shift)
120 #define PBSR (1 << 12) /* Port B Software Reset */
121 #define PASR (1 << 8) /* Port A Software Reset */
122 #define IR (1 << 4) /* Interrupt Reset */
123 #define FSISR (1 << 0) /* Software Reset */
126 #define DMMD (1 << 4) /* SPDIF output timing 0: Biphase only */
127 /* 1: Biphase and serial */
130 #define FIFO_SZ_MASK 0x7
132 #define FSI_RATES SNDRV_PCM_RATE_8000_96000
134 #define FSI_FMTS (SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S16_LE)
141 * A : sample widtht 16bit setting
142 * B : sample widtht 24bit setting
145 #define SHIFT_16DATA 0
146 #define SHIFT_24DATA 4
148 #define PACKAGE_24BITBUS_BACK 0
149 #define PACKAGE_24BITBUS_FRONT 1
150 #define PACKAGE_16BITBUS_STREAM 2
152 #define BUSOP_SET(s, a) ((a) << SHIFT_ ## s ## DATA)
153 #define BUSOP_GET(s, a) (((a) >> SHIFT_ ## s ## DATA) & 0xF)
156 * FSI driver use below type name for variable
158 * xxx_num : number of data
159 * xxx_pos : position of data
160 * xxx_capa : capacity of data
164 * period/frame/sample image
168 * period pos period pos
170 * |<-------------------- period--------------------->|
171 * ==|============================================ ... =|==
173 * ||<----- frame ----->|<------ frame ----->| ... |
174 * |+--------------------+--------------------+- ... |
175 * ||[ sample ][ sample ]|[ sample ][ sample ]| ... |
176 * |+--------------------+--------------------+- ... |
177 * ==|============================================ ... =|==
195 * FSIxCLK [CPG] (ick) -------> |
196 * |-> FSI_DIV (div)-> FSI2
197 * FSIxCK [external] (xck) ---> |
204 struct fsi_stream_handler;
208 * these are initialized by fsi_stream_init()
210 struct snd_pcm_substream *substream;
211 int fifo_sample_capa; /* sample capacity of FSI FIFO */
212 int buff_sample_capa; /* sample capacity of ALSA buffer */
213 int buff_sample_pos; /* sample position of ALSA buffer */
214 int period_samples; /* sample number / 1 period */
215 int period_pos; /* current period position */
216 int sample_width; /* sample width */
226 * thse are initialized by fsi_handler_init()
228 struct fsi_stream_handler *handler;
229 struct fsi_priv *priv;
232 * these are for DMAEngine
234 struct dma_chan *chan;
235 struct sh_dmae_slave slave; /* see fsi_handler_init() */
236 struct work_struct work;
241 /* see [FSI clock] */
246 int (*set_rate)(struct device *dev,
247 struct fsi_priv *fsi);
255 struct fsi_master *master;
257 struct fsi_stream playback;
258 struct fsi_stream capture;
260 struct fsi_clk clock;
273 struct fsi_stream_handler {
274 int (*init)(struct fsi_priv *fsi, struct fsi_stream *io);
275 int (*quit)(struct fsi_priv *fsi, struct fsi_stream *io);
276 int (*probe)(struct fsi_priv *fsi, struct fsi_stream *io, struct device *dev);
277 int (*transfer)(struct fsi_priv *fsi, struct fsi_stream *io);
278 int (*remove)(struct fsi_priv *fsi, struct fsi_stream *io);
279 int (*start_stop)(struct fsi_priv *fsi, struct fsi_stream *io,
282 #define fsi_stream_handler_call(io, func, args...) \
284 !((io)->handler->func) ? 0 : \
285 (io)->handler->func(args))
299 struct fsi_priv fsia;
300 struct fsi_priv fsib;
301 const struct fsi_core *core;
305 static int fsi_stream_is_play(struct fsi_priv *fsi, struct fsi_stream *io);
308 * basic read write function
311 static void __fsi_reg_write(u32 __iomem *reg, u32 data)
313 /* valid data area is 24bit */
316 __raw_writel(data, reg);
319 static u32 __fsi_reg_read(u32 __iomem *reg)
321 return __raw_readl(reg);
324 static void __fsi_reg_mask_set(u32 __iomem *reg, u32 mask, u32 data)
326 u32 val = __fsi_reg_read(reg);
331 __fsi_reg_write(reg, val);
334 #define fsi_reg_write(p, r, d)\
335 __fsi_reg_write((p->base + REG_##r), d)
337 #define fsi_reg_read(p, r)\
338 __fsi_reg_read((p->base + REG_##r))
340 #define fsi_reg_mask_set(p, r, m, d)\
341 __fsi_reg_mask_set((p->base + REG_##r), m, d)
343 #define fsi_master_read(p, r) _fsi_master_read(p, MST_##r)
344 #define fsi_core_read(p, r) _fsi_master_read(p, p->core->r)
345 static u32 _fsi_master_read(struct fsi_master *master, u32 reg)
350 spin_lock_irqsave(&master->lock, flags);
351 ret = __fsi_reg_read(master->base + reg);
352 spin_unlock_irqrestore(&master->lock, flags);
357 #define fsi_master_mask_set(p, r, m, d) _fsi_master_mask_set(p, MST_##r, m, d)
358 #define fsi_core_mask_set(p, r, m, d) _fsi_master_mask_set(p, p->core->r, m, d)
359 static void _fsi_master_mask_set(struct fsi_master *master,
360 u32 reg, u32 mask, u32 data)
364 spin_lock_irqsave(&master->lock, flags);
365 __fsi_reg_mask_set(master->base + reg, mask, data);
366 spin_unlock_irqrestore(&master->lock, flags);
372 static int fsi_version(struct fsi_master *master)
374 return master->core->ver;
377 static struct fsi_master *fsi_get_master(struct fsi_priv *fsi)
382 static int fsi_is_clk_master(struct fsi_priv *fsi)
384 return fsi->clk_master;
387 static int fsi_is_port_a(struct fsi_priv *fsi)
389 return fsi->master->base == fsi->base;
392 static int fsi_is_spdif(struct fsi_priv *fsi)
397 static int fsi_is_enable_stream(struct fsi_priv *fsi)
399 return fsi->enable_stream;
402 static int fsi_is_play(struct snd_pcm_substream *substream)
404 return substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
407 static struct snd_soc_dai *fsi_get_dai(struct snd_pcm_substream *substream)
409 struct snd_soc_pcm_runtime *rtd = substream->private_data;
414 static struct fsi_priv *fsi_get_priv_frm_dai(struct snd_soc_dai *dai)
416 struct fsi_master *master = snd_soc_dai_get_drvdata(dai);
419 return &master->fsia;
421 return &master->fsib;
424 static struct fsi_priv *fsi_get_priv(struct snd_pcm_substream *substream)
426 return fsi_get_priv_frm_dai(fsi_get_dai(substream));
429 static u32 fsi_get_port_shift(struct fsi_priv *fsi, struct fsi_stream *io)
431 int is_play = fsi_stream_is_play(fsi, io);
432 int is_porta = fsi_is_port_a(fsi);
436 shift = is_play ? AO_SHIFT : AI_SHIFT;
438 shift = is_play ? BO_SHIFT : BI_SHIFT;
443 static int fsi_frame2sample(struct fsi_priv *fsi, int frames)
445 return frames * fsi->chan_num;
448 static int fsi_sample2frame(struct fsi_priv *fsi, int samples)
450 return samples / fsi->chan_num;
453 static int fsi_get_current_fifo_samples(struct fsi_priv *fsi,
454 struct fsi_stream *io)
456 int is_play = fsi_stream_is_play(fsi, io);
461 fsi_reg_read(fsi, DOFF_ST) :
462 fsi_reg_read(fsi, DIFF_ST);
464 frames = 0x1ff & (status >> 8);
466 return fsi_frame2sample(fsi, frames);
469 static void fsi_count_fifo_err(struct fsi_priv *fsi)
471 u32 ostatus = fsi_reg_read(fsi, DOFF_ST);
472 u32 istatus = fsi_reg_read(fsi, DIFF_ST);
474 if (ostatus & ERR_OVER)
475 fsi->playback.oerr_num++;
477 if (ostatus & ERR_UNDER)
478 fsi->playback.uerr_num++;
480 if (istatus & ERR_OVER)
481 fsi->capture.oerr_num++;
483 if (istatus & ERR_UNDER)
484 fsi->capture.uerr_num++;
486 fsi_reg_write(fsi, DOFF_ST, 0);
487 fsi_reg_write(fsi, DIFF_ST, 0);
491 * fsi_stream_xx() function
493 static inline int fsi_stream_is_play(struct fsi_priv *fsi,
494 struct fsi_stream *io)
496 return &fsi->playback == io;
499 static inline struct fsi_stream *fsi_stream_get(struct fsi_priv *fsi,
500 struct snd_pcm_substream *substream)
502 return fsi_is_play(substream) ? &fsi->playback : &fsi->capture;
505 static int fsi_stream_is_working(struct fsi_priv *fsi,
506 struct fsi_stream *io)
508 struct fsi_master *master = fsi_get_master(fsi);
512 spin_lock_irqsave(&master->lock, flags);
513 ret = !!(io->substream && io->substream->runtime);
514 spin_unlock_irqrestore(&master->lock, flags);
519 static struct fsi_priv *fsi_stream_to_priv(struct fsi_stream *io)
524 static void fsi_stream_init(struct fsi_priv *fsi,
525 struct fsi_stream *io,
526 struct snd_pcm_substream *substream)
528 struct snd_pcm_runtime *runtime = substream->runtime;
529 struct fsi_master *master = fsi_get_master(fsi);
532 spin_lock_irqsave(&master->lock, flags);
533 io->substream = substream;
534 io->buff_sample_capa = fsi_frame2sample(fsi, runtime->buffer_size);
535 io->buff_sample_pos = 0;
536 io->period_samples = fsi_frame2sample(fsi, runtime->period_size);
538 io->sample_width = samples_to_bytes(runtime, 1);
540 io->oerr_num = -1; /* ignore 1st err */
541 io->uerr_num = -1; /* ignore 1st err */
542 fsi_stream_handler_call(io, init, fsi, io);
543 spin_unlock_irqrestore(&master->lock, flags);
546 static void fsi_stream_quit(struct fsi_priv *fsi, struct fsi_stream *io)
548 struct snd_soc_dai *dai = fsi_get_dai(io->substream);
549 struct fsi_master *master = fsi_get_master(fsi);
552 spin_lock_irqsave(&master->lock, flags);
554 if (io->oerr_num > 0)
555 dev_err(dai->dev, "over_run = %d\n", io->oerr_num);
557 if (io->uerr_num > 0)
558 dev_err(dai->dev, "under_run = %d\n", io->uerr_num);
560 fsi_stream_handler_call(io, quit, fsi, io);
561 io->substream = NULL;
562 io->buff_sample_capa = 0;
563 io->buff_sample_pos = 0;
564 io->period_samples = 0;
566 io->sample_width = 0;
570 spin_unlock_irqrestore(&master->lock, flags);
573 static int fsi_stream_transfer(struct fsi_stream *io)
575 struct fsi_priv *fsi = fsi_stream_to_priv(io);
579 return fsi_stream_handler_call(io, transfer, fsi, io);
582 #define fsi_stream_start(fsi, io)\
583 fsi_stream_handler_call(io, start_stop, fsi, io, 1)
585 #define fsi_stream_stop(fsi, io)\
586 fsi_stream_handler_call(io, start_stop, fsi, io, 0)
588 static int fsi_stream_probe(struct fsi_priv *fsi, struct device *dev)
590 struct fsi_stream *io;
594 ret1 = fsi_stream_handler_call(io, probe, fsi, io, dev);
597 ret2 = fsi_stream_handler_call(io, probe, fsi, io, dev);
607 static int fsi_stream_remove(struct fsi_priv *fsi)
609 struct fsi_stream *io;
613 ret1 = fsi_stream_handler_call(io, remove, fsi, io);
616 ret2 = fsi_stream_handler_call(io, remove, fsi, io);
627 * format/bus/dma setting
629 static void fsi_format_bus_setup(struct fsi_priv *fsi, struct fsi_stream *io,
630 u32 bus, struct device *dev)
632 struct fsi_master *master = fsi_get_master(fsi);
633 int is_play = fsi_stream_is_play(fsi, io);
636 if (fsi_version(master) >= 2) {
640 * FSI2 needs DMA/Bus setting
643 case PACKAGE_24BITBUS_FRONT:
646 dev_dbg(dev, "24bit bus / package in front\n");
648 case PACKAGE_16BITBUS_STREAM:
651 dev_dbg(dev, "16bit bus / stream mode\n");
653 case PACKAGE_24BITBUS_BACK:
657 dev_dbg(dev, "24bit bus / package in back\n");
662 fsi_reg_write(fsi, OUT_DMAC, dma);
664 fsi_reg_write(fsi, IN_DMAC, dma);
668 fsi_reg_write(fsi, DO_FMT, fmt);
670 fsi_reg_write(fsi, DI_FMT, fmt);
677 static void fsi_irq_enable(struct fsi_priv *fsi, struct fsi_stream *io)
679 u32 data = AB_IO(1, fsi_get_port_shift(fsi, io));
680 struct fsi_master *master = fsi_get_master(fsi);
682 fsi_core_mask_set(master, imsk, data, data);
683 fsi_core_mask_set(master, iemsk, data, data);
686 static void fsi_irq_disable(struct fsi_priv *fsi, struct fsi_stream *io)
688 u32 data = AB_IO(1, fsi_get_port_shift(fsi, io));
689 struct fsi_master *master = fsi_get_master(fsi);
691 fsi_core_mask_set(master, imsk, data, 0);
692 fsi_core_mask_set(master, iemsk, data, 0);
695 static u32 fsi_irq_get_status(struct fsi_master *master)
697 return fsi_core_read(master, int_st);
700 static void fsi_irq_clear_status(struct fsi_priv *fsi)
703 struct fsi_master *master = fsi_get_master(fsi);
705 data |= AB_IO(1, fsi_get_port_shift(fsi, &fsi->playback));
706 data |= AB_IO(1, fsi_get_port_shift(fsi, &fsi->capture));
708 /* clear interrupt factor */
709 fsi_core_mask_set(master, int_st, data, 0);
713 * SPDIF master clock function
715 * These functions are used later FSI2
717 static void fsi_spdif_clk_ctrl(struct fsi_priv *fsi, int enable)
719 struct fsi_master *master = fsi_get_master(fsi);
723 val = enable ? mask : 0;
726 fsi_core_mask_set(master, a_mclk, mask, val) :
727 fsi_core_mask_set(master, b_mclk, mask, val);
733 static int fsi_clk_init(struct device *dev,
734 struct fsi_priv *fsi,
738 int (*set_rate)(struct device *dev,
739 struct fsi_priv *fsi))
741 struct fsi_clk *clock = &fsi->clock;
742 int is_porta = fsi_is_port_a(fsi);
749 clock->set_rate = set_rate;
751 clock->own = devm_clk_get(dev, NULL);
752 if (IS_ERR(clock->own))
757 clock->xck = devm_clk_get(dev, is_porta ? "xcka" : "xckb");
758 if (IS_ERR(clock->xck)) {
759 dev_err(dev, "can't get xck clock\n");
762 if (clock->xck == clock->own) {
763 dev_err(dev, "cpu doesn't support xck clock\n");
768 /* FSIACLK/FSIBCLK */
770 clock->ick = devm_clk_get(dev, is_porta ? "icka" : "ickb");
771 if (IS_ERR(clock->ick)) {
772 dev_err(dev, "can't get ick clock\n");
775 if (clock->ick == clock->own) {
776 dev_err(dev, "cpu doesn't support ick clock\n");
783 clock->div = devm_clk_get(dev, is_porta ? "diva" : "divb");
784 if (IS_ERR(clock->div)) {
785 dev_err(dev, "can't get div clock\n");
788 if (clock->div == clock->own) {
789 dev_err(dev, "cpu doens't support div clock\n");
797 #define fsi_clk_invalid(fsi) fsi_clk_valid(fsi, 0)
798 static void fsi_clk_valid(struct fsi_priv *fsi, unsigned long rate)
800 fsi->clock.rate = rate;
803 static int fsi_clk_is_valid(struct fsi_priv *fsi)
805 return fsi->clock.set_rate &&
809 static int fsi_clk_enable(struct device *dev,
810 struct fsi_priv *fsi)
812 struct fsi_clk *clock = &fsi->clock;
815 if (!fsi_clk_is_valid(fsi))
818 if (0 == clock->count) {
819 ret = clock->set_rate(dev, fsi);
821 fsi_clk_invalid(fsi);
826 clk_enable(clock->xck);
828 clk_enable(clock->ick);
830 clk_enable(clock->div);
838 static int fsi_clk_disable(struct device *dev,
839 struct fsi_priv *fsi)
841 struct fsi_clk *clock = &fsi->clock;
843 if (!fsi_clk_is_valid(fsi))
846 if (1 == clock->count--) {
848 clk_disable(clock->xck);
850 clk_disable(clock->ick);
852 clk_disable(clock->div);
858 static int fsi_clk_set_ackbpf(struct device *dev,
859 struct fsi_priv *fsi,
860 int ackmd, int bpfmd)
864 /* check ackmd/bpfmd relationship */
866 dev_err(dev, "unsupported rate (%d/%d)\n", ackmd, bpfmd);
888 dev_err(dev, "unsupported ackmd (%d)\n", ackmd);
913 dev_err(dev, "unsupported bpfmd (%d)\n", bpfmd);
917 dev_dbg(dev, "ACKMD/BPFMD = %d/%d\n", ackmd, bpfmd);
919 fsi_reg_mask_set(fsi, CKG1, (ACKMD_MASK | BPFMD_MASK) , data);
925 static int fsi_clk_set_rate_external(struct device *dev,
926 struct fsi_priv *fsi)
928 struct clk *xck = fsi->clock.xck;
929 struct clk *ick = fsi->clock.ick;
930 unsigned long rate = fsi->clock.rate;
935 /* check clock rate */
936 xrate = clk_get_rate(xck);
938 dev_err(dev, "unsupported clock rate\n");
942 clk_set_parent(ick, xck);
943 clk_set_rate(ick, xrate);
945 bpfmd = fsi->chan_num * 32;
946 ackmd = xrate / rate;
948 dev_dbg(dev, "external/rate = %ld/%ld\n", xrate, rate);
950 ret = fsi_clk_set_ackbpf(dev, fsi, ackmd, bpfmd);
952 dev_err(dev, "%s failed", __func__);
957 static int fsi_clk_set_rate_cpg(struct device *dev,
958 struct fsi_priv *fsi)
960 struct clk *ick = fsi->clock.ick;
961 struct clk *div = fsi->clock.div;
962 unsigned long rate = fsi->clock.rate;
963 unsigned long target = 0; /* 12288000 or 11289600 */
964 unsigned long actual, cout;
965 unsigned long diff, min;
966 unsigned long best_cout, best_act;
971 if (!(12288000 % rate))
973 if (!(11289600 % rate))
976 dev_err(dev, "unsupported rate\n");
980 bpfmd = fsi->chan_num * 32;
981 ackmd = target / rate;
982 ret = fsi_clk_set_ackbpf(dev, fsi, ackmd, bpfmd);
984 dev_err(dev, "%s failed", __func__);
991 * [CPG] = cout => [FSI_DIV] = audio => [FSI] => [codec]
993 * But, it needs to find best match of CPG and FSI_DIV
994 * combination, since it is difficult to generate correct
995 * frequency of audio clock from ick clock only.
996 * Because ick is created from its parent clock.
998 * target = rate x [512/256/128/64]fs
999 * cout = round(target x adjustment)
1000 * actual = cout / adjustment (by FSI-DIV) ~= target
1006 for (adj = 1; adj < 0xffff; adj++) {
1008 cout = target * adj;
1009 if (cout > 100000000) /* max clock = 100MHz */
1012 /* cout/actual audio clock */
1013 cout = clk_round_rate(ick, cout);
1014 actual = cout / adj;
1016 /* find best frequency */
1017 diff = abs(actual - target);
1025 ret = clk_set_rate(ick, best_cout);
1027 dev_err(dev, "ick clock failed\n");
1031 ret = clk_set_rate(div, clk_round_rate(div, best_act));
1033 dev_err(dev, "div clock failed\n");
1037 dev_dbg(dev, "ick/div = %ld/%ld\n",
1038 clk_get_rate(ick), clk_get_rate(div));
1044 * pio data transfer handler
1046 static void fsi_pio_push16(struct fsi_priv *fsi, u8 *_buf, int samples)
1050 if (fsi_is_enable_stream(fsi)) {
1054 * fsi_pio_push_init()
1056 u32 *buf = (u32 *)_buf;
1058 for (i = 0; i < samples / 2; i++)
1059 fsi_reg_write(fsi, DODT, buf[i]);
1062 u16 *buf = (u16 *)_buf;
1064 for (i = 0; i < samples; i++)
1065 fsi_reg_write(fsi, DODT, ((u32)*(buf + i) << 8));
1069 static void fsi_pio_pop16(struct fsi_priv *fsi, u8 *_buf, int samples)
1071 u16 *buf = (u16 *)_buf;
1074 for (i = 0; i < samples; i++)
1075 *(buf + i) = (u16)(fsi_reg_read(fsi, DIDT) >> 8);
1078 static void fsi_pio_push32(struct fsi_priv *fsi, u8 *_buf, int samples)
1080 u32 *buf = (u32 *)_buf;
1083 for (i = 0; i < samples; i++)
1084 fsi_reg_write(fsi, DODT, *(buf + i));
1087 static void fsi_pio_pop32(struct fsi_priv *fsi, u8 *_buf, int samples)
1089 u32 *buf = (u32 *)_buf;
1092 for (i = 0; i < samples; i++)
1093 *(buf + i) = fsi_reg_read(fsi, DIDT);
1096 static u8 *fsi_pio_get_area(struct fsi_priv *fsi, struct fsi_stream *io)
1098 struct snd_pcm_runtime *runtime = io->substream->runtime;
1100 return runtime->dma_area +
1101 samples_to_bytes(runtime, io->buff_sample_pos);
1104 static int fsi_pio_transfer(struct fsi_priv *fsi, struct fsi_stream *io,
1105 void (*run16)(struct fsi_priv *fsi, u8 *buf, int samples),
1106 void (*run32)(struct fsi_priv *fsi, u8 *buf, int samples),
1109 struct snd_pcm_runtime *runtime;
1110 struct snd_pcm_substream *substream;
1114 if (!fsi_stream_is_working(fsi, io))
1118 substream = io->substream;
1119 runtime = substream->runtime;
1121 /* FSI FIFO has limit.
1122 * So, this driver can not send periods data at a time
1124 if (io->buff_sample_pos >=
1125 io->period_samples * (io->period_pos + 1)) {
1128 io->period_pos = (io->period_pos + 1) % runtime->periods;
1130 if (0 == io->period_pos)
1131 io->buff_sample_pos = 0;
1134 buf = fsi_pio_get_area(fsi, io);
1136 switch (io->sample_width) {
1138 run16(fsi, buf, samples);
1141 run32(fsi, buf, samples);
1147 /* update buff_sample_pos */
1148 io->buff_sample_pos += samples;
1151 snd_pcm_period_elapsed(substream);
1156 static int fsi_pio_pop(struct fsi_priv *fsi, struct fsi_stream *io)
1158 int sample_residues; /* samples in FSI fifo */
1159 int sample_space; /* ALSA free samples space */
1162 sample_residues = fsi_get_current_fifo_samples(fsi, io);
1163 sample_space = io->buff_sample_capa - io->buff_sample_pos;
1165 samples = min(sample_residues, sample_space);
1167 return fsi_pio_transfer(fsi, io,
1173 static int fsi_pio_push(struct fsi_priv *fsi, struct fsi_stream *io)
1175 int sample_residues; /* ALSA residue samples */
1176 int sample_space; /* FSI fifo free samples space */
1179 sample_residues = io->buff_sample_capa - io->buff_sample_pos;
1180 sample_space = io->fifo_sample_capa -
1181 fsi_get_current_fifo_samples(fsi, io);
1183 samples = min(sample_residues, sample_space);
1185 return fsi_pio_transfer(fsi, io,
1191 static int fsi_pio_start_stop(struct fsi_priv *fsi, struct fsi_stream *io,
1194 struct fsi_master *master = fsi_get_master(fsi);
1195 u32 clk = fsi_is_port_a(fsi) ? CRA : CRB;
1198 fsi_irq_enable(fsi, io);
1200 fsi_irq_disable(fsi, io);
1202 if (fsi_is_clk_master(fsi))
1203 fsi_master_mask_set(master, CLK_RST, clk, (enable) ? clk : 0);
1208 static int fsi_pio_push_init(struct fsi_priv *fsi, struct fsi_stream *io)
1211 * we can use 16bit stream mode
1212 * when "playback" and "16bit data"
1213 * and platform allows "stream mode"
1217 if (fsi_is_enable_stream(fsi))
1218 io->bus_option = BUSOP_SET(24, PACKAGE_24BITBUS_BACK) |
1219 BUSOP_SET(16, PACKAGE_16BITBUS_STREAM);
1221 io->bus_option = BUSOP_SET(24, PACKAGE_24BITBUS_BACK) |
1222 BUSOP_SET(16, PACKAGE_24BITBUS_BACK);
1226 static int fsi_pio_pop_init(struct fsi_priv *fsi, struct fsi_stream *io)
1229 * always 24bit bus, package back when "capture"
1231 io->bus_option = BUSOP_SET(24, PACKAGE_24BITBUS_BACK) |
1232 BUSOP_SET(16, PACKAGE_24BITBUS_BACK);
1236 static struct fsi_stream_handler fsi_pio_push_handler = {
1237 .init = fsi_pio_push_init,
1238 .transfer = fsi_pio_push,
1239 .start_stop = fsi_pio_start_stop,
1242 static struct fsi_stream_handler fsi_pio_pop_handler = {
1243 .init = fsi_pio_pop_init,
1244 .transfer = fsi_pio_pop,
1245 .start_stop = fsi_pio_start_stop,
1248 static irqreturn_t fsi_interrupt(int irq, void *data)
1250 struct fsi_master *master = data;
1251 u32 int_st = fsi_irq_get_status(master);
1253 /* clear irq status */
1254 fsi_master_mask_set(master, SOFT_RST, IR, 0);
1255 fsi_master_mask_set(master, SOFT_RST, IR, IR);
1257 if (int_st & AB_IO(1, AO_SHIFT))
1258 fsi_stream_transfer(&master->fsia.playback);
1259 if (int_st & AB_IO(1, BO_SHIFT))
1260 fsi_stream_transfer(&master->fsib.playback);
1261 if (int_st & AB_IO(1, AI_SHIFT))
1262 fsi_stream_transfer(&master->fsia.capture);
1263 if (int_st & AB_IO(1, BI_SHIFT))
1264 fsi_stream_transfer(&master->fsib.capture);
1266 fsi_count_fifo_err(&master->fsia);
1267 fsi_count_fifo_err(&master->fsib);
1269 fsi_irq_clear_status(&master->fsia);
1270 fsi_irq_clear_status(&master->fsib);
1276 * dma data transfer handler
1278 static int fsi_dma_init(struct fsi_priv *fsi, struct fsi_stream *io)
1280 struct snd_pcm_runtime *runtime = io->substream->runtime;
1281 struct snd_soc_dai *dai = fsi_get_dai(io->substream);
1282 enum dma_data_direction dir = fsi_stream_is_play(fsi, io) ?
1283 DMA_TO_DEVICE : DMA_FROM_DEVICE;
1286 * 24bit data : 24bit bus / package in back
1287 * 16bit data : 16bit bus / stream mode
1289 io->bus_option = BUSOP_SET(24, PACKAGE_24BITBUS_BACK) |
1290 BUSOP_SET(16, PACKAGE_16BITBUS_STREAM);
1292 io->dma = dma_map_single(dai->dev, runtime->dma_area,
1293 snd_pcm_lib_buffer_bytes(io->substream), dir);
1297 static int fsi_dma_quit(struct fsi_priv *fsi, struct fsi_stream *io)
1299 struct snd_soc_dai *dai = fsi_get_dai(io->substream);
1300 enum dma_data_direction dir = fsi_stream_is_play(fsi, io) ?
1301 DMA_TO_DEVICE : DMA_FROM_DEVICE;
1303 dma_unmap_single(dai->dev, io->dma,
1304 snd_pcm_lib_buffer_bytes(io->substream), dir);
1308 static dma_addr_t fsi_dma_get_area(struct fsi_stream *io)
1310 struct snd_pcm_runtime *runtime = io->substream->runtime;
1312 return io->dma + samples_to_bytes(runtime, io->buff_sample_pos);
1315 static void fsi_dma_complete(void *data)
1317 struct fsi_stream *io = (struct fsi_stream *)data;
1318 struct fsi_priv *fsi = fsi_stream_to_priv(io);
1319 struct snd_pcm_runtime *runtime = io->substream->runtime;
1320 struct snd_soc_dai *dai = fsi_get_dai(io->substream);
1321 enum dma_data_direction dir = fsi_stream_is_play(fsi, io) ?
1322 DMA_TO_DEVICE : DMA_FROM_DEVICE;
1324 dma_sync_single_for_cpu(dai->dev, fsi_dma_get_area(io),
1325 samples_to_bytes(runtime, io->period_samples), dir);
1327 io->buff_sample_pos += io->period_samples;
1330 if (io->period_pos >= runtime->periods) {
1332 io->buff_sample_pos = 0;
1335 fsi_count_fifo_err(fsi);
1336 fsi_stream_transfer(io);
1338 snd_pcm_period_elapsed(io->substream);
1341 static void fsi_dma_do_work(struct work_struct *work)
1343 struct fsi_stream *io = container_of(work, struct fsi_stream, work);
1344 struct fsi_priv *fsi = fsi_stream_to_priv(io);
1345 struct snd_soc_dai *dai;
1346 struct dma_async_tx_descriptor *desc;
1347 struct snd_pcm_runtime *runtime;
1348 enum dma_data_direction dir;
1349 int is_play = fsi_stream_is_play(fsi, io);
1353 if (!fsi_stream_is_working(fsi, io))
1356 dai = fsi_get_dai(io->substream);
1357 runtime = io->substream->runtime;
1358 dir = is_play ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
1359 len = samples_to_bytes(runtime, io->period_samples);
1360 buf = fsi_dma_get_area(io);
1362 dma_sync_single_for_device(dai->dev, buf, len, dir);
1364 desc = dmaengine_prep_slave_single(io->chan, buf, len, dir,
1365 DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
1367 dev_err(dai->dev, "dmaengine_prep_slave_sg() fail\n");
1371 desc->callback = fsi_dma_complete;
1372 desc->callback_param = io;
1374 if (dmaengine_submit(desc) < 0) {
1375 dev_err(dai->dev, "tx_submit() fail\n");
1379 dma_async_issue_pending(io->chan);
1384 * In DMAEngine case, codec and FSI cannot be started simultaneously
1385 * since FSI is using the scheduler work queue.
1386 * Therefore, in capture case, probably FSI FIFO will have got
1387 * overflow error in this point.
1388 * in that case, DMA cannot start transfer until error was cleared.
1391 if (ERR_OVER & fsi_reg_read(fsi, DIFF_ST)) {
1392 fsi_reg_mask_set(fsi, DIFF_CTL, FIFO_CLR, FIFO_CLR);
1393 fsi_reg_write(fsi, DIFF_ST, 0);
1398 static bool fsi_dma_filter(struct dma_chan *chan, void *param)
1400 struct sh_dmae_slave *slave = param;
1402 chan->private = slave;
1407 static int fsi_dma_transfer(struct fsi_priv *fsi, struct fsi_stream *io)
1409 schedule_work(&io->work);
1414 static int fsi_dma_push_start_stop(struct fsi_priv *fsi, struct fsi_stream *io,
1417 struct fsi_master *master = fsi_get_master(fsi);
1418 u32 clk = fsi_is_port_a(fsi) ? CRA : CRB;
1419 u32 enable = start ? DMA_ON : 0;
1421 fsi_reg_mask_set(fsi, OUT_DMAC, DMA_ON, enable);
1423 dmaengine_terminate_all(io->chan);
1425 if (fsi_is_clk_master(fsi))
1426 fsi_master_mask_set(master, CLK_RST, clk, (enable) ? clk : 0);
1431 static int fsi_dma_probe(struct fsi_priv *fsi, struct fsi_stream *io, struct device *dev)
1433 dma_cap_mask_t mask;
1436 dma_cap_set(DMA_SLAVE, mask);
1438 io->chan = dma_request_channel(mask, fsi_dma_filter, &io->slave);
1441 /* switch to PIO handler */
1442 if (fsi_stream_is_play(fsi, io))
1443 fsi->playback.handler = &fsi_pio_push_handler;
1445 fsi->capture.handler = &fsi_pio_pop_handler;
1447 dev_info(dev, "switch handler (dma => pio)\n");
1450 return fsi_stream_probe(fsi, dev);
1453 INIT_WORK(&io->work, fsi_dma_do_work);
1458 static int fsi_dma_remove(struct fsi_priv *fsi, struct fsi_stream *io)
1460 cancel_work_sync(&io->work);
1462 fsi_stream_stop(fsi, io);
1465 dma_release_channel(io->chan);
1471 static struct fsi_stream_handler fsi_dma_push_handler = {
1472 .init = fsi_dma_init,
1473 .quit = fsi_dma_quit,
1474 .probe = fsi_dma_probe,
1475 .transfer = fsi_dma_transfer,
1476 .remove = fsi_dma_remove,
1477 .start_stop = fsi_dma_push_start_stop,
1483 static void fsi_fifo_init(struct fsi_priv *fsi,
1484 struct fsi_stream *io,
1487 struct fsi_master *master = fsi_get_master(fsi);
1488 int is_play = fsi_stream_is_play(fsi, io);
1492 /* get on-chip RAM capacity */
1493 shift = fsi_master_read(master, FIFO_SZ);
1494 shift >>= fsi_get_port_shift(fsi, io);
1495 shift &= FIFO_SZ_MASK;
1496 frame_capa = 256 << shift;
1497 dev_dbg(dev, "fifo = %d words\n", frame_capa);
1500 * The maximum number of sample data varies depending
1501 * on the number of channels selected for the format.
1503 * FIFOs are used in 4-channel units in 3-channel mode
1504 * and in 8-channel units in 5- to 7-channel mode
1505 * meaning that more FIFOs than the required size of DPRAM
1508 * ex) if 256 words of DP-RAM is connected
1509 * 1 channel: 256 (256 x 1 = 256)
1510 * 2 channels: 128 (128 x 2 = 256)
1511 * 3 channels: 64 ( 64 x 3 = 192)
1512 * 4 channels: 64 ( 64 x 4 = 256)
1513 * 5 channels: 32 ( 32 x 5 = 160)
1514 * 6 channels: 32 ( 32 x 6 = 192)
1515 * 7 channels: 32 ( 32 x 7 = 224)
1516 * 8 channels: 32 ( 32 x 8 = 256)
1518 for (i = 1; i < fsi->chan_num; i <<= 1)
1520 dev_dbg(dev, "%d channel %d store\n",
1521 fsi->chan_num, frame_capa);
1523 io->fifo_sample_capa = fsi_frame2sample(fsi, frame_capa);
1526 * set interrupt generation factor
1530 fsi_reg_write(fsi, DOFF_CTL, IRQ_HALF);
1531 fsi_reg_mask_set(fsi, DOFF_CTL, FIFO_CLR, FIFO_CLR);
1533 fsi_reg_write(fsi, DIFF_CTL, IRQ_HALF);
1534 fsi_reg_mask_set(fsi, DIFF_CTL, FIFO_CLR, FIFO_CLR);
1538 static int fsi_hw_startup(struct fsi_priv *fsi,
1539 struct fsi_stream *io,
1545 if (fsi_is_clk_master(fsi))
1548 fsi_reg_mask_set(fsi, CKG1, (DIMD | DOMD), data);
1550 /* clock inversion (CKG2) */
1552 if (fsi->bit_clk_inv)
1554 if (fsi->lr_clk_inv)
1556 if (fsi_is_clk_master(fsi))
1558 fsi_reg_write(fsi, CKG2, data);
1561 if (fsi_is_spdif(fsi)) {
1562 fsi_spdif_clk_ctrl(fsi, 1);
1563 fsi_reg_mask_set(fsi, OUT_SEL, DMMD, DMMD);
1570 switch (io->sample_width) {
1572 data = BUSOP_GET(16, io->bus_option);
1575 data = BUSOP_GET(24, io->bus_option);
1578 fsi_format_bus_setup(fsi, io, data, dev);
1581 fsi_irq_disable(fsi, io);
1582 fsi_irq_clear_status(fsi);
1585 fsi_fifo_init(fsi, io, dev);
1587 /* start master clock */
1588 if (fsi_is_clk_master(fsi))
1589 return fsi_clk_enable(dev, fsi);
1594 static int fsi_hw_shutdown(struct fsi_priv *fsi,
1597 /* stop master clock */
1598 if (fsi_is_clk_master(fsi))
1599 return fsi_clk_disable(dev, fsi);
1604 static int fsi_dai_startup(struct snd_pcm_substream *substream,
1605 struct snd_soc_dai *dai)
1607 struct fsi_priv *fsi = fsi_get_priv(substream);
1609 fsi_clk_invalid(fsi);
1614 static void fsi_dai_shutdown(struct snd_pcm_substream *substream,
1615 struct snd_soc_dai *dai)
1617 struct fsi_priv *fsi = fsi_get_priv(substream);
1619 fsi_clk_invalid(fsi);
1622 static int fsi_dai_trigger(struct snd_pcm_substream *substream, int cmd,
1623 struct snd_soc_dai *dai)
1625 struct fsi_priv *fsi = fsi_get_priv(substream);
1626 struct fsi_stream *io = fsi_stream_get(fsi, substream);
1630 case SNDRV_PCM_TRIGGER_START:
1631 fsi_stream_init(fsi, io, substream);
1633 ret = fsi_hw_startup(fsi, io, dai->dev);
1635 ret = fsi_stream_transfer(io);
1637 fsi_stream_start(fsi, io);
1639 case SNDRV_PCM_TRIGGER_STOP:
1641 ret = fsi_hw_shutdown(fsi, dai->dev);
1642 fsi_stream_stop(fsi, io);
1643 fsi_stream_quit(fsi, io);
1650 static int fsi_set_fmt_dai(struct fsi_priv *fsi, unsigned int fmt)
1652 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1653 case SND_SOC_DAIFMT_I2S:
1657 case SND_SOC_DAIFMT_LEFT_J:
1668 static int fsi_set_fmt_spdif(struct fsi_priv *fsi)
1670 struct fsi_master *master = fsi_get_master(fsi);
1672 if (fsi_version(master) < 2)
1675 fsi->fmt = CR_DTMD_SPDIF_PCM | CR_PCM;
1681 static int fsi_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
1683 struct fsi_priv *fsi = fsi_get_priv_frm_dai(dai);
1686 /* set master/slave audio interface */
1687 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1688 case SND_SOC_DAIFMT_CBM_CFM:
1689 fsi->clk_master = 1;
1691 case SND_SOC_DAIFMT_CBS_CFS:
1697 /* set clock inversion */
1698 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1699 case SND_SOC_DAIFMT_NB_IF:
1700 fsi->bit_clk_inv = 0;
1701 fsi->lr_clk_inv = 1;
1703 case SND_SOC_DAIFMT_IB_NF:
1704 fsi->bit_clk_inv = 1;
1705 fsi->lr_clk_inv = 0;
1707 case SND_SOC_DAIFMT_IB_IF:
1708 fsi->bit_clk_inv = 1;
1709 fsi->lr_clk_inv = 1;
1711 case SND_SOC_DAIFMT_NB_NF:
1713 fsi->bit_clk_inv = 0;
1714 fsi->lr_clk_inv = 0;
1718 if (fsi_is_clk_master(fsi)) {
1720 fsi_clk_init(dai->dev, fsi, 0, 1, 1,
1721 fsi_clk_set_rate_cpg);
1723 fsi_clk_init(dai->dev, fsi, 1, 1, 0,
1724 fsi_clk_set_rate_external);
1728 if (fsi_is_spdif(fsi))
1729 ret = fsi_set_fmt_spdif(fsi);
1731 ret = fsi_set_fmt_dai(fsi, fmt & SND_SOC_DAIFMT_FORMAT_MASK);
1736 static int fsi_dai_hw_params(struct snd_pcm_substream *substream,
1737 struct snd_pcm_hw_params *params,
1738 struct snd_soc_dai *dai)
1740 struct fsi_priv *fsi = fsi_get_priv(substream);
1742 if (fsi_is_clk_master(fsi))
1743 fsi_clk_valid(fsi, params_rate(params));
1748 static const struct snd_soc_dai_ops fsi_dai_ops = {
1749 .startup = fsi_dai_startup,
1750 .shutdown = fsi_dai_shutdown,
1751 .trigger = fsi_dai_trigger,
1752 .set_fmt = fsi_dai_set_fmt,
1753 .hw_params = fsi_dai_hw_params,
1760 static struct snd_pcm_hardware fsi_pcm_hardware = {
1761 .info = SNDRV_PCM_INFO_INTERLEAVED |
1762 SNDRV_PCM_INFO_MMAP |
1763 SNDRV_PCM_INFO_MMAP_VALID |
1764 SNDRV_PCM_INFO_PAUSE,
1765 .formats = FSI_FMTS,
1771 .buffer_bytes_max = 64 * 1024,
1772 .period_bytes_min = 32,
1773 .period_bytes_max = 8192,
1779 static int fsi_pcm_open(struct snd_pcm_substream *substream)
1781 struct snd_pcm_runtime *runtime = substream->runtime;
1784 snd_soc_set_runtime_hwparams(substream, &fsi_pcm_hardware);
1786 ret = snd_pcm_hw_constraint_integer(runtime,
1787 SNDRV_PCM_HW_PARAM_PERIODS);
1792 static int fsi_hw_params(struct snd_pcm_substream *substream,
1793 struct snd_pcm_hw_params *hw_params)
1795 return snd_pcm_lib_malloc_pages(substream,
1796 params_buffer_bytes(hw_params));
1799 static int fsi_hw_free(struct snd_pcm_substream *substream)
1801 return snd_pcm_lib_free_pages(substream);
1804 static snd_pcm_uframes_t fsi_pointer(struct snd_pcm_substream *substream)
1806 struct fsi_priv *fsi = fsi_get_priv(substream);
1807 struct fsi_stream *io = fsi_stream_get(fsi, substream);
1809 return fsi_sample2frame(fsi, io->buff_sample_pos);
1812 static struct snd_pcm_ops fsi_pcm_ops = {
1813 .open = fsi_pcm_open,
1814 .ioctl = snd_pcm_lib_ioctl,
1815 .hw_params = fsi_hw_params,
1816 .hw_free = fsi_hw_free,
1817 .pointer = fsi_pointer,
1824 #define PREALLOC_BUFFER (32 * 1024)
1825 #define PREALLOC_BUFFER_MAX (32 * 1024)
1827 static void fsi_pcm_free(struct snd_pcm *pcm)
1829 snd_pcm_lib_preallocate_free_for_all(pcm);
1832 static int fsi_pcm_new(struct snd_soc_pcm_runtime *rtd)
1834 struct snd_pcm *pcm = rtd->pcm;
1837 * dont use SNDRV_DMA_TYPE_DEV, since it will oops the SH kernel
1838 * in MMAP mode (i.e. aplay -M)
1840 return snd_pcm_lib_preallocate_pages_for_all(
1842 SNDRV_DMA_TYPE_CONTINUOUS,
1843 snd_dma_continuous_data(GFP_KERNEL),
1844 PREALLOC_BUFFER, PREALLOC_BUFFER_MAX);
1851 static struct snd_soc_dai_driver fsi_soc_dai[] = {
1856 .formats = FSI_FMTS,
1862 .formats = FSI_FMTS,
1866 .ops = &fsi_dai_ops,
1872 .formats = FSI_FMTS,
1878 .formats = FSI_FMTS,
1882 .ops = &fsi_dai_ops,
1886 static struct snd_soc_platform_driver fsi_soc_platform = {
1887 .ops = &fsi_pcm_ops,
1888 .pcm_new = fsi_pcm_new,
1889 .pcm_free = fsi_pcm_free,
1892 static const struct snd_soc_component_driver fsi_soc_component = {
1899 static void fsi_of_parse(char *name,
1900 struct device_node *np,
1901 struct sh_fsi_port_info *info,
1906 unsigned long flags = 0;
1910 } of_parse_property[] = {
1911 { "spdif-connection", SH_FSI_FMT_SPDIF },
1912 { "stream-mode-support", SH_FSI_ENABLE_STREAM_MODE },
1913 { "use-internal-clock", SH_FSI_CLK_CPG },
1916 for (i = 0; i < ARRAY_SIZE(of_parse_property); i++) {
1917 sprintf(prop, "%s,%s", name, of_parse_property[i].name);
1918 if (of_get_property(np, prop, NULL))
1919 flags |= of_parse_property[i].val;
1921 info->flags = flags;
1923 dev_dbg(dev, "%s flags : %lx\n", name, info->flags);
1926 static void fsi_port_info_init(struct fsi_priv *fsi,
1927 struct sh_fsi_port_info *info)
1929 if (info->flags & SH_FSI_FMT_SPDIF)
1932 if (info->flags & SH_FSI_CLK_CPG)
1935 if (info->flags & SH_FSI_ENABLE_STREAM_MODE)
1936 fsi->enable_stream = 1;
1939 static void fsi_handler_init(struct fsi_priv *fsi,
1940 struct sh_fsi_port_info *info)
1942 fsi->playback.handler = &fsi_pio_push_handler; /* default PIO */
1943 fsi->playback.priv = fsi;
1944 fsi->capture.handler = &fsi_pio_pop_handler; /* default PIO */
1945 fsi->capture.priv = fsi;
1948 fsi->playback.slave.shdma_slave.slave_id = info->tx_id;
1949 fsi->playback.handler = &fsi_dma_push_handler;
1953 static struct of_device_id fsi_of_match[];
1954 static int fsi_probe(struct platform_device *pdev)
1956 struct fsi_master *master;
1957 struct device_node *np = pdev->dev.of_node;
1958 struct sh_fsi_platform_info info;
1959 const struct fsi_core *core;
1960 struct fsi_priv *fsi;
1961 struct resource *res;
1965 memset(&info, 0, sizeof(info));
1969 const struct of_device_id *of_id;
1971 of_id = of_match_device(fsi_of_match, &pdev->dev);
1974 fsi_of_parse("fsia", np, &info.port_a, &pdev->dev);
1975 fsi_of_parse("fsib", np, &info.port_b, &pdev->dev);
1978 const struct platform_device_id *id_entry = pdev->id_entry;
1980 core = (struct fsi_core *)id_entry->driver_data;
1982 if (pdev->dev.platform_data)
1983 memcpy(&info, pdev->dev.platform_data, sizeof(info));
1987 dev_err(&pdev->dev, "unknown fsi device\n");
1991 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1992 irq = platform_get_irq(pdev, 0);
1993 if (!res || (int)irq <= 0) {
1994 dev_err(&pdev->dev, "Not enough FSI platform resources.\n");
1998 master = devm_kzalloc(&pdev->dev, sizeof(*master), GFP_KERNEL);
2000 dev_err(&pdev->dev, "Could not allocate master\n");
2004 master->base = devm_ioremap_nocache(&pdev->dev,
2005 res->start, resource_size(res));
2006 if (!master->base) {
2007 dev_err(&pdev->dev, "Unable to ioremap FSI registers.\n");
2011 /* master setting */
2012 master->core = core;
2013 spin_lock_init(&master->lock);
2016 fsi = &master->fsia;
2017 fsi->base = master->base;
2018 fsi->master = master;
2019 fsi_port_info_init(fsi, &info.port_a);
2020 fsi_handler_init(fsi, &info.port_a);
2021 ret = fsi_stream_probe(fsi, &pdev->dev);
2023 dev_err(&pdev->dev, "FSIA stream probe failed\n");
2028 fsi = &master->fsib;
2029 fsi->base = master->base + 0x40;
2030 fsi->master = master;
2031 fsi_port_info_init(fsi, &info.port_b);
2032 fsi_handler_init(fsi, &info.port_b);
2033 ret = fsi_stream_probe(fsi, &pdev->dev);
2035 dev_err(&pdev->dev, "FSIB stream probe failed\n");
2039 pm_runtime_enable(&pdev->dev);
2040 dev_set_drvdata(&pdev->dev, master);
2042 ret = devm_request_irq(&pdev->dev, irq, &fsi_interrupt, 0,
2043 dev_name(&pdev->dev), master);
2045 dev_err(&pdev->dev, "irq request err\n");
2049 ret = snd_soc_register_platform(&pdev->dev, &fsi_soc_platform);
2051 dev_err(&pdev->dev, "cannot snd soc register\n");
2055 ret = snd_soc_register_component(&pdev->dev, &fsi_soc_component,
2056 fsi_soc_dai, ARRAY_SIZE(fsi_soc_dai));
2058 dev_err(&pdev->dev, "cannot snd component register\n");
2065 snd_soc_unregister_platform(&pdev->dev);
2067 pm_runtime_disable(&pdev->dev);
2068 fsi_stream_remove(&master->fsib);
2070 fsi_stream_remove(&master->fsia);
2075 static int fsi_remove(struct platform_device *pdev)
2077 struct fsi_master *master;
2079 master = dev_get_drvdata(&pdev->dev);
2081 pm_runtime_disable(&pdev->dev);
2083 snd_soc_unregister_component(&pdev->dev);
2084 snd_soc_unregister_platform(&pdev->dev);
2086 fsi_stream_remove(&master->fsia);
2087 fsi_stream_remove(&master->fsib);
2092 static void __fsi_suspend(struct fsi_priv *fsi,
2093 struct fsi_stream *io,
2096 if (!fsi_stream_is_working(fsi, io))
2099 fsi_stream_stop(fsi, io);
2100 fsi_hw_shutdown(fsi, dev);
2103 static void __fsi_resume(struct fsi_priv *fsi,
2104 struct fsi_stream *io,
2107 if (!fsi_stream_is_working(fsi, io))
2110 fsi_hw_startup(fsi, io, dev);
2111 fsi_stream_start(fsi, io);
2114 static int fsi_suspend(struct device *dev)
2116 struct fsi_master *master = dev_get_drvdata(dev);
2117 struct fsi_priv *fsia = &master->fsia;
2118 struct fsi_priv *fsib = &master->fsib;
2120 __fsi_suspend(fsia, &fsia->playback, dev);
2121 __fsi_suspend(fsia, &fsia->capture, dev);
2123 __fsi_suspend(fsib, &fsib->playback, dev);
2124 __fsi_suspend(fsib, &fsib->capture, dev);
2129 static int fsi_resume(struct device *dev)
2131 struct fsi_master *master = dev_get_drvdata(dev);
2132 struct fsi_priv *fsia = &master->fsia;
2133 struct fsi_priv *fsib = &master->fsib;
2135 __fsi_resume(fsia, &fsia->playback, dev);
2136 __fsi_resume(fsia, &fsia->capture, dev);
2138 __fsi_resume(fsib, &fsib->playback, dev);
2139 __fsi_resume(fsib, &fsib->capture, dev);
2144 static struct dev_pm_ops fsi_pm_ops = {
2145 .suspend = fsi_suspend,
2146 .resume = fsi_resume,
2149 static struct fsi_core fsi1_core = {
2158 static struct fsi_core fsi2_core = {
2162 .int_st = CPU_INT_ST,
2165 .a_mclk = A_MST_CTLR,
2166 .b_mclk = B_MST_CTLR,
2169 static struct of_device_id fsi_of_match[] = {
2170 { .compatible = "renesas,sh_fsi", .data = &fsi1_core},
2171 { .compatible = "renesas,sh_fsi2", .data = &fsi2_core},
2174 MODULE_DEVICE_TABLE(of, fsi_of_match);
2176 static struct platform_device_id fsi_id_table[] = {
2177 { "sh_fsi", (kernel_ulong_t)&fsi1_core },
2178 { "sh_fsi2", (kernel_ulong_t)&fsi2_core },
2181 MODULE_DEVICE_TABLE(platform, fsi_id_table);
2183 static struct platform_driver fsi_driver = {
2185 .name = "fsi-pcm-audio",
2187 .of_match_table = fsi_of_match,
2190 .remove = fsi_remove,
2191 .id_table = fsi_id_table,
2194 module_platform_driver(fsi_driver);
2196 MODULE_LICENSE("GPL");
2197 MODULE_DESCRIPTION("SuperH onchip FSI audio driver");
2198 MODULE_AUTHOR("Kuninori Morimoto <morimoto.kuninori@renesas.com>");
2199 MODULE_ALIAS("platform:fsi-pcm-audio");