2 * Fifo-attached Serial Interface (FSI) support for SH7724
4 * Copyright (C) 2009 Renesas Solutions Corp.
5 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
8 * Copyright (c) 2007 Manuel Lauss <mano@roarinelk.homelinux.net>
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
15 #include <linux/delay.h>
16 #include <linux/pm_runtime.h>
18 #include <linux/slab.h>
19 #include <sound/soc.h>
20 #include <sound/sh_fsi.h>
23 #define DOFF_CTL 0x0004
24 #define DOFF_ST 0x0008
26 #define DIFF_CTL 0x0010
27 #define DIFF_ST 0x0014
32 #define MUTE_ST 0x0028
33 #define OUT_SEL 0x0030
34 #define REG_END OUT_SEL
36 #define A_MST_CTLR 0x0180
37 #define B_MST_CTLR 0x01A0
38 #define CPU_INT_ST 0x01F4
39 #define CPU_IEMSK 0x01F8
40 #define CPU_IMSK 0x01FC
45 #define CLK_RST 0x0210
46 #define SOFT_RST 0x0214
47 #define FIFO_SZ 0x0218
48 #define MREG_START A_MST_CTLR
49 #define MREG_END FIFO_SZ
53 #define CR_BWS_24 (0x0 << 20) /* FSI2 */
54 #define CR_BWS_16 (0x1 << 20) /* FSI2 */
55 #define CR_BWS_20 (0x2 << 20) /* FSI2 */
57 #define CR_DTMD_PCM (0x0 << 8) /* FSI2 */
58 #define CR_DTMD_SPDIF_PCM (0x1 << 8) /* FSI2 */
59 #define CR_DTMD_SPDIF_STREAM (0x2 << 8) /* FSI2 */
61 #define CR_MONO (0x0 << 4)
62 #define CR_MONO_D (0x1 << 4)
63 #define CR_PCM (0x2 << 4)
64 #define CR_I2S (0x3 << 4)
65 #define CR_TDM (0x4 << 4)
66 #define CR_TDM_D (0x5 << 4)
70 #define IRQ_HALF 0x00100000
71 #define FIFO_CLR 0x00000001
74 #define ERR_OVER 0x00000010
75 #define ERR_UNDER 0x00000001
76 #define ST_ERR (ERR_OVER | ERR_UNDER)
79 #define ACKMD_MASK 0x00007000
80 #define BPFMD_MASK 0x00000700
83 #define BP (1 << 4) /* Fix the signal of Biphase output */
84 #define SE (1 << 0) /* Fix the master clock */
87 #define B_CLK 0x00000010
88 #define A_CLK 0x00000001
90 /* IO SHIFT / MACRO */
95 #define AB_IO(param, shift) (param << shift)
98 #define PBSR (1 << 12) /* Port B Software Reset */
99 #define PASR (1 << 8) /* Port A Software Reset */
100 #define IR (1 << 4) /* Interrupt Reset */
101 #define FSISR (1 << 0) /* Software Reset */
104 #define DMMD (1 << 4) /* SPDIF output timing 0: Biphase only */
105 /* 1: Biphase and serial */
108 #define FIFO_SZ_MASK 0x7
110 #define FSI_RATES SNDRV_PCM_RATE_8000_96000
112 #define FSI_FMTS (SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S16_LE)
115 * FSI driver use below type name for variable
117 * xxx_len : data length
118 * xxx_width : data width
119 * xxx_offset : data offset
120 * xxx_num : number of data
128 struct snd_pcm_substream *substream;
141 struct fsi_master *master;
143 struct fsi_stream playback;
144 struct fsi_stream capture;
160 struct fsi_priv fsia;
161 struct fsi_priv fsib;
162 struct fsi_core *core;
163 struct sh_fsi_platform_info *info;
168 * basic read write function
171 static void __fsi_reg_write(u32 reg, u32 data)
173 /* valid data area is 24bit */
176 __raw_writel(data, reg);
179 static u32 __fsi_reg_read(u32 reg)
181 return __raw_readl(reg);
184 static void __fsi_reg_mask_set(u32 reg, u32 mask, u32 data)
186 u32 val = __fsi_reg_read(reg);
191 __fsi_reg_write(reg, val);
194 static void fsi_reg_write(struct fsi_priv *fsi, u32 reg, u32 data)
197 pr_err("fsi: register access err (%s)\n", __func__);
201 __fsi_reg_write((u32)(fsi->base + reg), data);
204 static u32 fsi_reg_read(struct fsi_priv *fsi, u32 reg)
207 pr_err("fsi: register access err (%s)\n", __func__);
211 return __fsi_reg_read((u32)(fsi->base + reg));
214 static void fsi_reg_mask_set(struct fsi_priv *fsi, u32 reg, u32 mask, u32 data)
217 pr_err("fsi: register access err (%s)\n", __func__);
221 __fsi_reg_mask_set((u32)(fsi->base + reg), mask, data);
224 static u32 fsi_master_read(struct fsi_master *master, u32 reg)
229 if ((reg < MREG_START) ||
231 pr_err("fsi: register access err (%s)\n", __func__);
235 spin_lock_irqsave(&master->lock, flags);
236 ret = __fsi_reg_read((u32)(master->base + reg));
237 spin_unlock_irqrestore(&master->lock, flags);
242 static void fsi_master_mask_set(struct fsi_master *master,
243 u32 reg, u32 mask, u32 data)
247 if ((reg < MREG_START) ||
249 pr_err("fsi: register access err (%s)\n", __func__);
253 spin_lock_irqsave(&master->lock, flags);
254 __fsi_reg_mask_set((u32)(master->base + reg), mask, data);
255 spin_unlock_irqrestore(&master->lock, flags);
262 static struct fsi_master *fsi_get_master(struct fsi_priv *fsi)
267 static int fsi_is_port_a(struct fsi_priv *fsi)
269 return fsi->master->base == fsi->base;
272 static struct snd_soc_dai *fsi_get_dai(struct snd_pcm_substream *substream)
274 struct snd_soc_pcm_runtime *rtd = substream->private_data;
279 static struct fsi_priv *fsi_get_priv(struct snd_pcm_substream *substream)
281 struct snd_soc_dai *dai = fsi_get_dai(substream);
282 struct fsi_master *master = snd_soc_dai_get_drvdata(dai);
285 return &master->fsia;
287 return &master->fsib;
290 static u32 fsi_get_info_flags(struct fsi_priv *fsi)
292 int is_porta = fsi_is_port_a(fsi);
293 struct fsi_master *master = fsi_get_master(fsi);
295 return is_porta ? master->info->porta_flags :
296 master->info->portb_flags;
299 static inline int fsi_stream_is_play(int stream)
301 return stream == SNDRV_PCM_STREAM_PLAYBACK;
304 static inline int fsi_is_play(struct snd_pcm_substream *substream)
306 return fsi_stream_is_play(substream->stream);
309 static inline struct fsi_stream *fsi_get_stream(struct fsi_priv *fsi,
312 return is_play ? &fsi->playback : &fsi->capture;
315 static int fsi_is_master_mode(struct fsi_priv *fsi, int is_play)
318 u32 flags = fsi_get_info_flags(fsi);
320 mode = is_play ? SH_FSI_OUT_SLAVE_MODE : SH_FSI_IN_SLAVE_MODE;
327 return (mode & flags) != mode;
330 static u32 fsi_get_port_shift(struct fsi_priv *fsi, int is_play)
332 int is_porta = fsi_is_port_a(fsi);
336 shift = is_play ? AO_SHIFT : AI_SHIFT;
338 shift = is_play ? BO_SHIFT : BI_SHIFT;
343 static void fsi_stream_push(struct fsi_priv *fsi,
345 struct snd_pcm_substream *substream,
349 struct fsi_stream *io = fsi_get_stream(fsi, is_play);
351 io->substream = substream;
352 io->buff_len = buffer_len;
354 io->period_len = period_len;
358 static void fsi_stream_pop(struct fsi_priv *fsi, int is_play)
360 struct fsi_stream *io = fsi_get_stream(fsi, is_play);
362 io->substream = NULL;
369 static int fsi_get_fifo_data_num(struct fsi_priv *fsi, int is_play)
372 u32 reg = is_play ? DOFF_ST : DIFF_ST;
373 struct fsi_stream *io = fsi_get_stream(fsi, is_play);
376 status = fsi_reg_read(fsi, reg);
377 data_num = 0x1ff & (status >> 8);
378 data_num *= io->chan_num;
383 static int fsi_len2num(int len, int width)
388 #define fsi_num2offset(a, b) fsi_num2len(a, b)
389 static int fsi_num2len(int num, int width)
394 static int fsi_get_frame_width(struct fsi_priv *fsi, int is_play)
396 struct fsi_stream *io = fsi_get_stream(fsi, is_play);
397 struct snd_pcm_substream *substream = io->substream;
398 struct snd_pcm_runtime *runtime = substream->runtime;
400 return frames_to_bytes(runtime, 1) / io->chan_num;
407 static u8 *fsi_dma_get_area(struct fsi_priv *fsi, int stream)
409 int is_play = fsi_stream_is_play(stream);
410 struct fsi_stream *io = fsi_get_stream(fsi, is_play);
412 return io->substream->runtime->dma_area + io->buff_offset;
415 static void fsi_dma_soft_push16(struct fsi_priv *fsi, int num)
420 start = (u16 *)fsi_dma_get_area(fsi, SNDRV_PCM_STREAM_PLAYBACK);
422 for (i = 0; i < num; i++)
423 fsi_reg_write(fsi, DODT, ((u32)*(start + i) << 8));
426 static void fsi_dma_soft_pop16(struct fsi_priv *fsi, int num)
431 start = (u16 *)fsi_dma_get_area(fsi, SNDRV_PCM_STREAM_CAPTURE);
434 for (i = 0; i < num; i++)
435 *(start + i) = (u16)(fsi_reg_read(fsi, DIDT) >> 8);
438 static void fsi_dma_soft_push32(struct fsi_priv *fsi, int num)
443 start = (u32 *)fsi_dma_get_area(fsi, SNDRV_PCM_STREAM_PLAYBACK);
446 for (i = 0; i < num; i++)
447 fsi_reg_write(fsi, DODT, *(start + i));
450 static void fsi_dma_soft_pop32(struct fsi_priv *fsi, int num)
455 start = (u32 *)fsi_dma_get_area(fsi, SNDRV_PCM_STREAM_CAPTURE);
457 for (i = 0; i < num; i++)
458 *(start + i) = fsi_reg_read(fsi, DIDT);
465 static void fsi_irq_enable(struct fsi_priv *fsi, int is_play)
467 u32 data = AB_IO(1, fsi_get_port_shift(fsi, is_play));
468 struct fsi_master *master = fsi_get_master(fsi);
470 fsi_master_mask_set(master, master->core->imsk, data, data);
471 fsi_master_mask_set(master, master->core->iemsk, data, data);
474 static void fsi_irq_disable(struct fsi_priv *fsi, int is_play)
476 u32 data = AB_IO(1, fsi_get_port_shift(fsi, is_play));
477 struct fsi_master *master = fsi_get_master(fsi);
479 fsi_master_mask_set(master, master->core->imsk, data, 0);
480 fsi_master_mask_set(master, master->core->iemsk, data, 0);
483 static u32 fsi_irq_get_status(struct fsi_master *master)
485 return fsi_master_read(master, master->core->int_st);
488 static void fsi_irq_clear_status(struct fsi_priv *fsi)
491 struct fsi_master *master = fsi_get_master(fsi);
493 data |= AB_IO(1, fsi_get_port_shift(fsi, 0));
494 data |= AB_IO(1, fsi_get_port_shift(fsi, 1));
496 /* clear interrupt factor */
497 fsi_master_mask_set(master, master->core->int_st, data, 0);
501 * SPDIF master clock function
503 * These functions are used later FSI2
505 static void fsi_spdif_clk_ctrl(struct fsi_priv *fsi, int enable)
507 struct fsi_master *master = fsi_get_master(fsi);
510 if (master->core->ver < 2) {
511 pr_err("fsi: register access err (%s)\n", __func__);
516 val = enable ? mask : 0;
519 fsi_master_mask_set(master, master->core->a_mclk, mask, val) :
520 fsi_master_mask_set(master, master->core->b_mclk, mask, val);
527 static void fsi_clk_ctrl(struct fsi_priv *fsi, int enable)
529 u32 val = fsi_is_port_a(fsi) ? (1 << 0) : (1 << 4);
530 struct fsi_master *master = fsi_get_master(fsi);
533 fsi_master_mask_set(master, CLK_RST, val, val);
535 fsi_master_mask_set(master, CLK_RST, val, 0);
538 static void fsi_fifo_init(struct fsi_priv *fsi,
540 struct snd_soc_dai *dai)
542 struct fsi_master *master = fsi_get_master(fsi);
543 struct fsi_stream *io = fsi_get_stream(fsi, is_play);
546 /* get on-chip RAM capacity */
547 shift = fsi_master_read(master, FIFO_SZ);
548 shift >>= fsi_get_port_shift(fsi, is_play);
549 shift &= FIFO_SZ_MASK;
550 io->fifo_max_num = 256 << shift;
551 dev_dbg(dai->dev, "fifo = %d words\n", io->fifo_max_num);
554 * The maximum number of sample data varies depending
555 * on the number of channels selected for the format.
557 * FIFOs are used in 4-channel units in 3-channel mode
558 * and in 8-channel units in 5- to 7-channel mode
559 * meaning that more FIFOs than the required size of DPRAM
562 * ex) if 256 words of DP-RAM is connected
563 * 1 channel: 256 (256 x 1 = 256)
564 * 2 channels: 128 (128 x 2 = 256)
565 * 3 channels: 64 ( 64 x 3 = 192)
566 * 4 channels: 64 ( 64 x 4 = 256)
567 * 5 channels: 32 ( 32 x 5 = 160)
568 * 6 channels: 32 ( 32 x 6 = 192)
569 * 7 channels: 32 ( 32 x 7 = 224)
570 * 8 channels: 32 ( 32 x 8 = 256)
572 for (i = 1; i < io->chan_num; i <<= 1)
573 io->fifo_max_num >>= 1;
574 dev_dbg(dai->dev, "%d channel %d store\n",
575 io->chan_num, io->fifo_max_num);
577 ctrl = is_play ? DOFF_CTL : DIFF_CTL;
579 /* set interrupt generation factor */
580 fsi_reg_write(fsi, ctrl, IRQ_HALF);
583 fsi_reg_mask_set(fsi, ctrl, FIFO_CLR, FIFO_CLR);
586 static void fsi_soft_all_reset(struct fsi_master *master)
589 fsi_master_mask_set(master, SOFT_RST, PASR | PBSR, 0);
593 fsi_master_mask_set(master, SOFT_RST, FSISR, 0);
594 fsi_master_mask_set(master, SOFT_RST, FSISR, FSISR);
598 static int fsi_fifo_data_ctrl(struct fsi_priv *fsi, int startup, int stream)
600 struct snd_pcm_runtime *runtime;
601 struct snd_pcm_substream *substream = NULL;
602 int is_play = fsi_stream_is_play(stream);
603 struct fsi_stream *io = fsi_get_stream(fsi, is_play);
604 u32 status_reg = is_play ? DOFF_ST : DIFF_ST;
605 int data_residue_num;
610 void (*fn)(struct fsi_priv *fsi, int size);
614 !io->substream->runtime)
618 substream = io->substream;
619 runtime = substream->runtime;
621 /* FSI FIFO has limit.
622 * So, this driver can not send periods data at a time
624 if (io->buff_offset >=
625 fsi_num2offset(io->period_num + 1, io->period_len)) {
628 io->period_num = (io->period_num + 1) % runtime->periods;
630 if (0 == io->period_num)
634 /* get 1 channel data width */
635 ch_width = fsi_get_frame_width(fsi, is_play);
637 /* get residue data number of alsa */
638 data_residue_num = fsi_len2num(io->buff_len - io->buff_offset,
645 * data_num_max : number of FSI fifo free space
646 * data_num : number of ALSA residue data
648 data_num_max = io->fifo_max_num * io->chan_num;
649 data_num_max -= fsi_get_fifo_data_num(fsi, is_play);
651 data_num = data_residue_num;
655 fn = fsi_dma_soft_push16;
658 fn = fsi_dma_soft_push32;
667 * data_num_max : number of ALSA free space
668 * data_num : number of data in FSI fifo
670 data_num_max = data_residue_num;
671 data_num = fsi_get_fifo_data_num(fsi, is_play);
675 fn = fsi_dma_soft_pop16;
678 fn = fsi_dma_soft_pop32;
685 data_num = min(data_num, data_num_max);
689 /* update buff_offset */
690 io->buff_offset += fsi_num2offset(data_num, ch_width);
692 /* check fifo status */
694 struct snd_soc_dai *dai = fsi_get_dai(substream);
695 u32 status = fsi_reg_read(fsi, status_reg);
697 if (status & ERR_OVER)
698 dev_err(dai->dev, "over run\n");
699 if (status & ERR_UNDER)
700 dev_err(dai->dev, "under run\n");
702 fsi_reg_write(fsi, status_reg, 0);
705 fsi_irq_enable(fsi, is_play);
708 snd_pcm_period_elapsed(substream);
713 static int fsi_data_pop(struct fsi_priv *fsi, int startup)
715 return fsi_fifo_data_ctrl(fsi, startup, SNDRV_PCM_STREAM_CAPTURE);
718 static int fsi_data_push(struct fsi_priv *fsi, int startup)
720 return fsi_fifo_data_ctrl(fsi, startup, SNDRV_PCM_STREAM_PLAYBACK);
723 static irqreturn_t fsi_interrupt(int irq, void *data)
725 struct fsi_master *master = data;
726 u32 int_st = fsi_irq_get_status(master);
728 /* clear irq status */
729 fsi_master_mask_set(master, SOFT_RST, IR, 0);
730 fsi_master_mask_set(master, SOFT_RST, IR, IR);
732 if (int_st & AB_IO(1, AO_SHIFT))
733 fsi_data_push(&master->fsia, 0);
734 if (int_st & AB_IO(1, BO_SHIFT))
735 fsi_data_push(&master->fsib, 0);
736 if (int_st & AB_IO(1, AI_SHIFT))
737 fsi_data_pop(&master->fsia, 0);
738 if (int_st & AB_IO(1, BI_SHIFT))
739 fsi_data_pop(&master->fsib, 0);
741 fsi_irq_clear_status(&master->fsia);
742 fsi_irq_clear_status(&master->fsib);
751 static int fsi_dai_startup(struct snd_pcm_substream *substream,
752 struct snd_soc_dai *dai)
754 struct fsi_priv *fsi = fsi_get_priv(substream);
755 struct fsi_master *master = fsi_get_master(fsi);
756 struct fsi_stream *io;
757 u32 flags = fsi_get_info_flags(fsi);
761 int is_play = fsi_is_play(substream);
764 io = fsi_get_stream(fsi, is_play);
766 pm_runtime_get_sync(dai->dev);
769 data = is_play ? (1 << 0) : (1 << 4);
770 is_master = fsi_is_master_mode(fsi, is_play);
772 fsi_reg_mask_set(fsi, CKG1, data, data);
774 fsi_reg_mask_set(fsi, CKG1, data, 0);
776 /* clock inversion (CKG2) */
778 if (SH_FSI_LRM_INV & flags)
780 if (SH_FSI_BRM_INV & flags)
782 if (SH_FSI_LRS_INV & flags)
784 if (SH_FSI_BRS_INV & flags)
787 fsi_reg_write(fsi, CKG2, data);
791 reg = is_play ? DO_FMT : DI_FMT;
792 fmt = is_play ? SH_FSI_GET_OFMT(flags) : SH_FSI_GET_IFMT(flags);
794 case SH_FSI_FMT_MONO:
798 case SH_FSI_FMT_MONO_DELAY:
811 io->chan_num = is_play ?
812 SH_FSI_GET_CH_O(flags) : SH_FSI_GET_CH_I(flags);
813 data = CR_TDM | (io->chan_num - 1);
815 case SH_FSI_FMT_TDM_DELAY:
816 io->chan_num = is_play ?
817 SH_FSI_GET_CH_O(flags) : SH_FSI_GET_CH_I(flags);
818 data = CR_TDM_D | (io->chan_num - 1);
820 case SH_FSI_FMT_SPDIF:
821 if (master->core->ver < 2) {
822 dev_err(dai->dev, "This FSI can not use SPDIF\n");
825 data = CR_BWS_16 | CR_DTMD_SPDIF_PCM | CR_PCM;
827 fsi_spdif_clk_ctrl(fsi, 1);
828 fsi_reg_mask_set(fsi, OUT_SEL, DMMD, DMMD);
831 dev_err(dai->dev, "unknown format.\n");
834 fsi_reg_write(fsi, reg, data);
837 fsi_irq_disable(fsi, is_play);
838 fsi_irq_clear_status(fsi);
841 fsi_fifo_init(fsi, is_play, dai);
846 static void fsi_dai_shutdown(struct snd_pcm_substream *substream,
847 struct snd_soc_dai *dai)
849 struct fsi_priv *fsi = fsi_get_priv(substream);
850 int is_play = fsi_is_play(substream);
852 fsi_irq_disable(fsi, is_play);
853 fsi_clk_ctrl(fsi, 0);
855 pm_runtime_put_sync(dai->dev);
858 static int fsi_dai_trigger(struct snd_pcm_substream *substream, int cmd,
859 struct snd_soc_dai *dai)
861 struct fsi_priv *fsi = fsi_get_priv(substream);
862 struct snd_pcm_runtime *runtime = substream->runtime;
863 int is_play = fsi_is_play(substream);
867 case SNDRV_PCM_TRIGGER_START:
868 fsi_stream_push(fsi, is_play, substream,
869 frames_to_bytes(runtime, runtime->buffer_size),
870 frames_to_bytes(runtime, runtime->period_size));
871 ret = is_play ? fsi_data_push(fsi, 1) : fsi_data_pop(fsi, 1);
873 case SNDRV_PCM_TRIGGER_STOP:
874 fsi_irq_disable(fsi, is_play);
875 fsi_stream_pop(fsi, is_play);
882 static int fsi_dai_hw_params(struct snd_pcm_substream *substream,
883 struct snd_pcm_hw_params *params,
884 struct snd_soc_dai *dai)
886 struct fsi_priv *fsi = fsi_get_priv(substream);
887 struct fsi_master *master = fsi_get_master(fsi);
888 int (*set_rate)(int is_porta, int rate) = master->info->set_rate;
889 int fsi_ver = master->core->ver;
890 int is_play = fsi_is_play(substream);
893 /* if slave mode, set_rate is not needed */
894 if (!fsi_is_master_mode(fsi, is_play))
897 /* it is error if no set_rate */
901 ret = set_rate(fsi_is_port_a(fsi), params_rate(params));
905 switch (ret & SH_FSI_ACKMD_MASK) {
908 case SH_FSI_ACKMD_512:
911 case SH_FSI_ACKMD_256:
914 case SH_FSI_ACKMD_128:
917 case SH_FSI_ACKMD_64:
920 case SH_FSI_ACKMD_32:
922 dev_err(dai->dev, "unsupported ACKMD\n");
928 switch (ret & SH_FSI_BPFMD_MASK) {
931 case SH_FSI_BPFMD_32:
934 case SH_FSI_BPFMD_64:
937 case SH_FSI_BPFMD_128:
940 case SH_FSI_BPFMD_256:
943 case SH_FSI_BPFMD_512:
946 case SH_FSI_BPFMD_16:
948 dev_err(dai->dev, "unsupported ACKMD\n");
954 fsi_reg_mask_set(fsi, CKG1, (ACKMD_MASK | BPFMD_MASK) , data);
956 fsi_clk_ctrl(fsi, 1);
964 static struct snd_soc_dai_ops fsi_dai_ops = {
965 .startup = fsi_dai_startup,
966 .shutdown = fsi_dai_shutdown,
967 .trigger = fsi_dai_trigger,
968 .hw_params = fsi_dai_hw_params,
975 static struct snd_pcm_hardware fsi_pcm_hardware = {
976 .info = SNDRV_PCM_INFO_INTERLEAVED |
977 SNDRV_PCM_INFO_MMAP |
978 SNDRV_PCM_INFO_MMAP_VALID |
979 SNDRV_PCM_INFO_PAUSE,
986 .buffer_bytes_max = 64 * 1024,
987 .period_bytes_min = 32,
988 .period_bytes_max = 8192,
994 static int fsi_pcm_open(struct snd_pcm_substream *substream)
996 struct snd_pcm_runtime *runtime = substream->runtime;
999 snd_soc_set_runtime_hwparams(substream, &fsi_pcm_hardware);
1001 ret = snd_pcm_hw_constraint_integer(runtime,
1002 SNDRV_PCM_HW_PARAM_PERIODS);
1007 static int fsi_hw_params(struct snd_pcm_substream *substream,
1008 struct snd_pcm_hw_params *hw_params)
1010 return snd_pcm_lib_malloc_pages(substream,
1011 params_buffer_bytes(hw_params));
1014 static int fsi_hw_free(struct snd_pcm_substream *substream)
1016 return snd_pcm_lib_free_pages(substream);
1019 static snd_pcm_uframes_t fsi_pointer(struct snd_pcm_substream *substream)
1021 struct snd_pcm_runtime *runtime = substream->runtime;
1022 struct fsi_priv *fsi = fsi_get_priv(substream);
1023 struct fsi_stream *io = fsi_get_stream(fsi, fsi_is_play(substream));
1026 location = (io->buff_offset - 1);
1030 return bytes_to_frames(runtime, location);
1033 static struct snd_pcm_ops fsi_pcm_ops = {
1034 .open = fsi_pcm_open,
1035 .ioctl = snd_pcm_lib_ioctl,
1036 .hw_params = fsi_hw_params,
1037 .hw_free = fsi_hw_free,
1038 .pointer = fsi_pointer,
1045 #define PREALLOC_BUFFER (32 * 1024)
1046 #define PREALLOC_BUFFER_MAX (32 * 1024)
1048 static void fsi_pcm_free(struct snd_pcm *pcm)
1050 snd_pcm_lib_preallocate_free_for_all(pcm);
1053 static int fsi_pcm_new(struct snd_card *card,
1054 struct snd_soc_dai *dai,
1055 struct snd_pcm *pcm)
1058 * dont use SNDRV_DMA_TYPE_DEV, since it will oops the SH kernel
1059 * in MMAP mode (i.e. aplay -M)
1061 return snd_pcm_lib_preallocate_pages_for_all(
1063 SNDRV_DMA_TYPE_CONTINUOUS,
1064 snd_dma_continuous_data(GFP_KERNEL),
1065 PREALLOC_BUFFER, PREALLOC_BUFFER_MAX);
1072 static struct snd_soc_dai_driver fsi_soc_dai[] = {
1077 .formats = FSI_FMTS,
1083 .formats = FSI_FMTS,
1087 .ops = &fsi_dai_ops,
1093 .formats = FSI_FMTS,
1099 .formats = FSI_FMTS,
1103 .ops = &fsi_dai_ops,
1107 static struct snd_soc_platform_driver fsi_soc_platform = {
1108 .ops = &fsi_pcm_ops,
1109 .pcm_new = fsi_pcm_new,
1110 .pcm_free = fsi_pcm_free,
1117 static int fsi_probe(struct platform_device *pdev)
1119 struct fsi_master *master;
1120 const struct platform_device_id *id_entry;
1121 struct resource *res;
1125 id_entry = pdev->id_entry;
1127 dev_err(&pdev->dev, "unknown fsi device\n");
1131 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1132 irq = platform_get_irq(pdev, 0);
1133 if (!res || (int)irq <= 0) {
1134 dev_err(&pdev->dev, "Not enough FSI platform resources.\n");
1139 master = kzalloc(sizeof(*master), GFP_KERNEL);
1141 dev_err(&pdev->dev, "Could not allocate master\n");
1146 master->base = ioremap_nocache(res->start, resource_size(res));
1147 if (!master->base) {
1149 dev_err(&pdev->dev, "Unable to ioremap FSI registers.\n");
1153 /* master setting */
1155 master->info = pdev->dev.platform_data;
1156 master->core = (struct fsi_core *)id_entry->driver_data;
1157 spin_lock_init(&master->lock);
1160 master->fsia.base = master->base;
1161 master->fsia.master = master;
1164 master->fsib.base = master->base + 0x40;
1165 master->fsib.master = master;
1167 pm_runtime_enable(&pdev->dev);
1168 pm_runtime_resume(&pdev->dev);
1169 dev_set_drvdata(&pdev->dev, master);
1171 fsi_soft_all_reset(master);
1173 ret = request_irq(irq, &fsi_interrupt, IRQF_DISABLED,
1174 id_entry->name, master);
1176 dev_err(&pdev->dev, "irq request err\n");
1180 ret = snd_soc_register_platform(&pdev->dev, &fsi_soc_platform);
1182 dev_err(&pdev->dev, "cannot snd soc register\n");
1186 return snd_soc_register_dais(&pdev->dev, fsi_soc_dai, ARRAY_SIZE(fsi_soc_dai));
1189 free_irq(irq, master);
1191 iounmap(master->base);
1192 pm_runtime_disable(&pdev->dev);
1200 static int fsi_remove(struct platform_device *pdev)
1202 struct fsi_master *master;
1204 master = dev_get_drvdata(&pdev->dev);
1206 snd_soc_unregister_dais(&pdev->dev, ARRAY_SIZE(fsi_soc_dai));
1207 snd_soc_unregister_platform(&pdev->dev);
1209 pm_runtime_disable(&pdev->dev);
1211 free_irq(master->irq, master);
1213 iounmap(master->base);
1219 static int fsi_runtime_nop(struct device *dev)
1221 /* Runtime PM callback shared between ->runtime_suspend()
1222 * and ->runtime_resume(). Simply returns success.
1224 * This driver re-initializes all registers after
1225 * pm_runtime_get_sync() anyway so there is no need
1226 * to save and restore registers here.
1231 static struct dev_pm_ops fsi_pm_ops = {
1232 .runtime_suspend = fsi_runtime_nop,
1233 .runtime_resume = fsi_runtime_nop,
1236 static struct fsi_core fsi1_core = {
1245 static struct fsi_core fsi2_core = {
1249 .int_st = CPU_INT_ST,
1252 .a_mclk = A_MST_CTLR,
1253 .b_mclk = B_MST_CTLR,
1256 static struct platform_device_id fsi_id_table[] = {
1257 { "sh_fsi", (kernel_ulong_t)&fsi1_core },
1258 { "sh_fsi2", (kernel_ulong_t)&fsi2_core },
1261 MODULE_DEVICE_TABLE(platform, fsi_id_table);
1263 static struct platform_driver fsi_driver = {
1265 .name = "fsi-pcm-audio",
1269 .remove = fsi_remove,
1270 .id_table = fsi_id_table,
1273 static int __init fsi_mobile_init(void)
1275 return platform_driver_register(&fsi_driver);
1278 static void __exit fsi_mobile_exit(void)
1280 platform_driver_unregister(&fsi_driver);
1283 module_init(fsi_mobile_init);
1284 module_exit(fsi_mobile_exit);
1286 MODULE_LICENSE("GPL");
1287 MODULE_DESCRIPTION("SuperH onchip FSI audio driver");
1288 MODULE_AUTHOR("Kuninori Morimoto <morimoto.kuninori@renesas.com>");