2 * Fifo-attached Serial Interface (FSI) support for SH7724
4 * Copyright (C) 2009 Renesas Solutions Corp.
5 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
8 * Copyright (c) 2007 Manuel Lauss <mano@roarinelk.homelinux.net>
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
15 #include <linux/delay.h>
16 #include <linux/dma-mapping.h>
17 #include <linux/pm_runtime.h>
19 #include <linux/scatterlist.h>
20 #include <linux/sh_dma.h>
21 #include <linux/slab.h>
22 #include <linux/module.h>
23 #include <linux/workqueue.h>
24 #include <sound/soc.h>
25 #include <sound/pcm_params.h>
26 #include <sound/sh_fsi.h>
28 /* PortA/PortB register */
29 #define REG_DO_FMT 0x0000
30 #define REG_DOFF_CTL 0x0004
31 #define REG_DOFF_ST 0x0008
32 #define REG_DI_FMT 0x000C
33 #define REG_DIFF_CTL 0x0010
34 #define REG_DIFF_ST 0x0014
35 #define REG_CKG1 0x0018
36 #define REG_CKG2 0x001C
37 #define REG_DIDT 0x0020
38 #define REG_DODT 0x0024
39 #define REG_MUTE_ST 0x0028
40 #define REG_OUT_DMAC 0x002C
41 #define REG_OUT_SEL 0x0030
42 #define REG_IN_DMAC 0x0038
45 #define MST_CLK_RST 0x0210
46 #define MST_SOFT_RST 0x0214
47 #define MST_FIFO_SZ 0x0218
49 /* core register (depend on FSI version) */
50 #define A_MST_CTLR 0x0180
51 #define B_MST_CTLR 0x01A0
52 #define CPU_INT_ST 0x01F4
53 #define CPU_IEMSK 0x01F8
54 #define CPU_IMSK 0x01FC
61 #define CR_BWS_MASK (0x3 << 20) /* FSI2 */
62 #define CR_BWS_24 (0x0 << 20) /* FSI2 */
63 #define CR_BWS_16 (0x1 << 20) /* FSI2 */
64 #define CR_BWS_20 (0x2 << 20) /* FSI2 */
66 #define CR_DTMD_PCM (0x0 << 8) /* FSI2 */
67 #define CR_DTMD_SPDIF_PCM (0x1 << 8) /* FSI2 */
68 #define CR_DTMD_SPDIF_STREAM (0x2 << 8) /* FSI2 */
70 #define CR_MONO (0x0 << 4)
71 #define CR_MONO_D (0x1 << 4)
72 #define CR_PCM (0x2 << 4)
73 #define CR_I2S (0x3 << 4)
74 #define CR_TDM (0x4 << 4)
75 #define CR_TDM_D (0x5 << 4)
79 #define VDMD_MASK (0x3 << 4)
80 #define VDMD_FRONT (0x0 << 4) /* Package in front */
81 #define VDMD_BACK (0x1 << 4) /* Package in back */
82 #define VDMD_STREAM (0x2 << 4) /* Stream mode(16bit * 2) */
84 #define DMA_ON (0x1 << 0)
88 #define IRQ_HALF 0x00100000
89 #define FIFO_CLR 0x00000001
92 #define ERR_OVER 0x00000010
93 #define ERR_UNDER 0x00000001
94 #define ST_ERR (ERR_OVER | ERR_UNDER)
97 #define ACKMD_MASK 0x00007000
98 #define BPFMD_MASK 0x00000700
100 #define DOMD (1 << 0)
103 #define BP (1 << 4) /* Fix the signal of Biphase output */
104 #define SE (1 << 0) /* Fix the master clock */
110 /* IO SHIFT / MACRO */
115 #define AB_IO(param, shift) (param << shift)
118 #define PBSR (1 << 12) /* Port B Software Reset */
119 #define PASR (1 << 8) /* Port A Software Reset */
120 #define IR (1 << 4) /* Interrupt Reset */
121 #define FSISR (1 << 0) /* Software Reset */
124 #define DMMD (1 << 4) /* SPDIF output timing 0: Biphase only */
125 /* 1: Biphase and serial */
128 #define FIFO_SZ_MASK 0x7
130 #define FSI_RATES SNDRV_PCM_RATE_8000_96000
132 #define FSI_FMTS (SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S16_LE)
134 typedef int (*set_rate_func)(struct device *dev, int rate, int enable);
141 * A : sample widtht 16bit setting
142 * B : sample widtht 24bit setting
145 #define SHIFT_16DATA 0
146 #define SHIFT_24DATA 4
148 #define PACKAGE_24BITBUS_BACK 0
149 #define PACKAGE_24BITBUS_FRONT 1
150 #define PACKAGE_16BITBUS_STREAM 2
152 #define BUSOP_SET(s, a) ((a) << SHIFT_ ## s ## DATA)
153 #define BUSOP_GET(s, a) (((a) >> SHIFT_ ## s ## DATA) & 0xF)
156 * FSI driver use below type name for variable
158 * xxx_num : number of data
159 * xxx_pos : position of data
160 * xxx_capa : capacity of data
164 * period/frame/sample image
168 * period pos period pos
170 * |<-------------------- period--------------------->|
171 * ==|============================================ ... =|==
173 * ||<----- frame ----->|<------ frame ----->| ... |
174 * |+--------------------+--------------------+- ... |
175 * ||[ sample ][ sample ]|[ sample ][ sample ]| ... |
176 * |+--------------------+--------------------+- ... |
177 * ==|============================================ ... =|==
195 * FSIxCLK [CPG] (ick) -------> |
196 * |-> FSI_DIV (div)-> FSI2
197 * FSIxCK [external] (xck) ---> |
204 struct fsi_stream_handler;
208 * these are initialized by fsi_stream_init()
210 struct snd_pcm_substream *substream;
211 int fifo_sample_capa; /* sample capacity of FSI FIFO */
212 int buff_sample_capa; /* sample capacity of ALSA buffer */
213 int buff_sample_pos; /* sample position of ALSA buffer */
214 int period_samples; /* sample number / 1 period */
215 int period_pos; /* current period position */
216 int sample_width; /* sample width */
226 * thse are initialized by fsi_handler_init()
228 struct fsi_stream_handler *handler;
229 struct fsi_priv *priv;
232 * these are for DMAEngine
234 struct dma_chan *chan;
235 struct sh_dmae_slave slave; /* see fsi_handler_init() */
236 struct work_struct work;
241 /* see [FSI clock] */
246 int (*set_rate)(struct device *dev,
247 struct fsi_priv *fsi,
256 struct fsi_master *master;
257 struct sh_fsi_port_info *info;
259 struct fsi_stream playback;
260 struct fsi_stream capture;
262 struct fsi_clk clock;
273 struct fsi_stream_handler {
274 int (*init)(struct fsi_priv *fsi, struct fsi_stream *io);
275 int (*quit)(struct fsi_priv *fsi, struct fsi_stream *io);
276 int (*probe)(struct fsi_priv *fsi, struct fsi_stream *io, struct device *dev);
277 int (*transfer)(struct fsi_priv *fsi, struct fsi_stream *io);
278 int (*remove)(struct fsi_priv *fsi, struct fsi_stream *io);
279 void (*start_stop)(struct fsi_priv *fsi, struct fsi_stream *io,
282 #define fsi_stream_handler_call(io, func, args...) \
284 !((io)->handler->func) ? 0 : \
285 (io)->handler->func(args))
300 struct fsi_priv fsia;
301 struct fsi_priv fsib;
302 struct fsi_core *core;
306 static int fsi_stream_is_play(struct fsi_priv *fsi, struct fsi_stream *io);
309 * basic read write function
312 static void __fsi_reg_write(u32 __iomem *reg, u32 data)
314 /* valid data area is 24bit */
317 __raw_writel(data, reg);
320 static u32 __fsi_reg_read(u32 __iomem *reg)
322 return __raw_readl(reg);
325 static void __fsi_reg_mask_set(u32 __iomem *reg, u32 mask, u32 data)
327 u32 val = __fsi_reg_read(reg);
332 __fsi_reg_write(reg, val);
335 #define fsi_reg_write(p, r, d)\
336 __fsi_reg_write((p->base + REG_##r), d)
338 #define fsi_reg_read(p, r)\
339 __fsi_reg_read((p->base + REG_##r))
341 #define fsi_reg_mask_set(p, r, m, d)\
342 __fsi_reg_mask_set((p->base + REG_##r), m, d)
344 #define fsi_master_read(p, r) _fsi_master_read(p, MST_##r)
345 #define fsi_core_read(p, r) _fsi_master_read(p, p->core->r)
346 static u32 _fsi_master_read(struct fsi_master *master, u32 reg)
351 spin_lock_irqsave(&master->lock, flags);
352 ret = __fsi_reg_read(master->base + reg);
353 spin_unlock_irqrestore(&master->lock, flags);
358 #define fsi_master_mask_set(p, r, m, d) _fsi_master_mask_set(p, MST_##r, m, d)
359 #define fsi_core_mask_set(p, r, m, d) _fsi_master_mask_set(p, p->core->r, m, d)
360 static void _fsi_master_mask_set(struct fsi_master *master,
361 u32 reg, u32 mask, u32 data)
365 spin_lock_irqsave(&master->lock, flags);
366 __fsi_reg_mask_set(master->base + reg, mask, data);
367 spin_unlock_irqrestore(&master->lock, flags);
373 static int fsi_version(struct fsi_master *master)
375 return master->core->ver;
378 static struct fsi_master *fsi_get_master(struct fsi_priv *fsi)
383 static int fsi_is_clk_master(struct fsi_priv *fsi)
385 return fsi->clk_master;
388 static int fsi_is_port_a(struct fsi_priv *fsi)
390 return fsi->master->base == fsi->base;
393 static int fsi_is_spdif(struct fsi_priv *fsi)
398 static int fsi_is_play(struct snd_pcm_substream *substream)
400 return substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
403 static struct snd_soc_dai *fsi_get_dai(struct snd_pcm_substream *substream)
405 struct snd_soc_pcm_runtime *rtd = substream->private_data;
410 static struct fsi_priv *fsi_get_priv_frm_dai(struct snd_soc_dai *dai)
412 struct fsi_master *master = snd_soc_dai_get_drvdata(dai);
415 return &master->fsia;
417 return &master->fsib;
420 static struct fsi_priv *fsi_get_priv(struct snd_pcm_substream *substream)
422 return fsi_get_priv_frm_dai(fsi_get_dai(substream));
425 static set_rate_func fsi_get_info_set_rate(struct fsi_priv *fsi)
430 return fsi->info->set_rate;
433 static u32 fsi_get_info_flags(struct fsi_priv *fsi)
438 return fsi->info->flags;
441 static u32 fsi_get_port_shift(struct fsi_priv *fsi, struct fsi_stream *io)
443 int is_play = fsi_stream_is_play(fsi, io);
444 int is_porta = fsi_is_port_a(fsi);
448 shift = is_play ? AO_SHIFT : AI_SHIFT;
450 shift = is_play ? BO_SHIFT : BI_SHIFT;
455 static int fsi_frame2sample(struct fsi_priv *fsi, int frames)
457 return frames * fsi->chan_num;
460 static int fsi_sample2frame(struct fsi_priv *fsi, int samples)
462 return samples / fsi->chan_num;
465 static int fsi_get_current_fifo_samples(struct fsi_priv *fsi,
466 struct fsi_stream *io)
468 int is_play = fsi_stream_is_play(fsi, io);
473 fsi_reg_read(fsi, DOFF_ST) :
474 fsi_reg_read(fsi, DIFF_ST);
476 frames = 0x1ff & (status >> 8);
478 return fsi_frame2sample(fsi, frames);
481 static void fsi_count_fifo_err(struct fsi_priv *fsi)
483 u32 ostatus = fsi_reg_read(fsi, DOFF_ST);
484 u32 istatus = fsi_reg_read(fsi, DIFF_ST);
486 if (ostatus & ERR_OVER)
487 fsi->playback.oerr_num++;
489 if (ostatus & ERR_UNDER)
490 fsi->playback.uerr_num++;
492 if (istatus & ERR_OVER)
493 fsi->capture.oerr_num++;
495 if (istatus & ERR_UNDER)
496 fsi->capture.uerr_num++;
498 fsi_reg_write(fsi, DOFF_ST, 0);
499 fsi_reg_write(fsi, DIFF_ST, 0);
503 * fsi_stream_xx() function
505 static inline int fsi_stream_is_play(struct fsi_priv *fsi,
506 struct fsi_stream *io)
508 return &fsi->playback == io;
511 static inline struct fsi_stream *fsi_stream_get(struct fsi_priv *fsi,
512 struct snd_pcm_substream *substream)
514 return fsi_is_play(substream) ? &fsi->playback : &fsi->capture;
517 static int fsi_stream_is_working(struct fsi_priv *fsi,
518 struct fsi_stream *io)
520 struct fsi_master *master = fsi_get_master(fsi);
524 spin_lock_irqsave(&master->lock, flags);
525 ret = !!(io->substream && io->substream->runtime);
526 spin_unlock_irqrestore(&master->lock, flags);
531 static struct fsi_priv *fsi_stream_to_priv(struct fsi_stream *io)
536 static void fsi_stream_init(struct fsi_priv *fsi,
537 struct fsi_stream *io,
538 struct snd_pcm_substream *substream)
540 struct snd_pcm_runtime *runtime = substream->runtime;
541 struct fsi_master *master = fsi_get_master(fsi);
544 spin_lock_irqsave(&master->lock, flags);
545 io->substream = substream;
546 io->buff_sample_capa = fsi_frame2sample(fsi, runtime->buffer_size);
547 io->buff_sample_pos = 0;
548 io->period_samples = fsi_frame2sample(fsi, runtime->period_size);
550 io->sample_width = samples_to_bytes(runtime, 1);
552 io->oerr_num = -1; /* ignore 1st err */
553 io->uerr_num = -1; /* ignore 1st err */
554 fsi_stream_handler_call(io, init, fsi, io);
555 spin_unlock_irqrestore(&master->lock, flags);
558 static void fsi_stream_quit(struct fsi_priv *fsi, struct fsi_stream *io)
560 struct snd_soc_dai *dai = fsi_get_dai(io->substream);
561 struct fsi_master *master = fsi_get_master(fsi);
564 spin_lock_irqsave(&master->lock, flags);
566 if (io->oerr_num > 0)
567 dev_err(dai->dev, "over_run = %d\n", io->oerr_num);
569 if (io->uerr_num > 0)
570 dev_err(dai->dev, "under_run = %d\n", io->uerr_num);
572 fsi_stream_handler_call(io, quit, fsi, io);
573 io->substream = NULL;
574 io->buff_sample_capa = 0;
575 io->buff_sample_pos = 0;
576 io->period_samples = 0;
578 io->sample_width = 0;
582 spin_unlock_irqrestore(&master->lock, flags);
585 static int fsi_stream_transfer(struct fsi_stream *io)
587 struct fsi_priv *fsi = fsi_stream_to_priv(io);
591 return fsi_stream_handler_call(io, transfer, fsi, io);
594 #define fsi_stream_start(fsi, io)\
595 fsi_stream_handler_call(io, start_stop, fsi, io, 1)
597 #define fsi_stream_stop(fsi, io)\
598 fsi_stream_handler_call(io, start_stop, fsi, io, 0)
600 static int fsi_stream_probe(struct fsi_priv *fsi, struct device *dev)
602 struct fsi_stream *io;
606 ret1 = fsi_stream_handler_call(io, probe, fsi, io, dev);
609 ret2 = fsi_stream_handler_call(io, probe, fsi, io, dev);
619 static int fsi_stream_remove(struct fsi_priv *fsi)
621 struct fsi_stream *io;
625 ret1 = fsi_stream_handler_call(io, remove, fsi, io);
628 ret2 = fsi_stream_handler_call(io, remove, fsi, io);
639 * format/bus/dma setting
641 static void fsi_format_bus_setup(struct fsi_priv *fsi, struct fsi_stream *io,
642 u32 bus, struct device *dev)
644 struct fsi_master *master = fsi_get_master(fsi);
645 int is_play = fsi_stream_is_play(fsi, io);
648 if (fsi_version(master) >= 2) {
652 * FSI2 needs DMA/Bus setting
655 case PACKAGE_24BITBUS_FRONT:
658 dev_dbg(dev, "24bit bus / package in front\n");
660 case PACKAGE_16BITBUS_STREAM:
663 dev_dbg(dev, "16bit bus / stream mode\n");
665 case PACKAGE_24BITBUS_BACK:
669 dev_dbg(dev, "24bit bus / package in back\n");
674 fsi_reg_write(fsi, OUT_DMAC, dma);
676 fsi_reg_write(fsi, IN_DMAC, dma);
680 fsi_reg_write(fsi, DO_FMT, fmt);
682 fsi_reg_write(fsi, DI_FMT, fmt);
689 static void fsi_irq_enable(struct fsi_priv *fsi, struct fsi_stream *io)
691 u32 data = AB_IO(1, fsi_get_port_shift(fsi, io));
692 struct fsi_master *master = fsi_get_master(fsi);
694 fsi_core_mask_set(master, imsk, data, data);
695 fsi_core_mask_set(master, iemsk, data, data);
698 static void fsi_irq_disable(struct fsi_priv *fsi, struct fsi_stream *io)
700 u32 data = AB_IO(1, fsi_get_port_shift(fsi, io));
701 struct fsi_master *master = fsi_get_master(fsi);
703 fsi_core_mask_set(master, imsk, data, 0);
704 fsi_core_mask_set(master, iemsk, data, 0);
707 static u32 fsi_irq_get_status(struct fsi_master *master)
709 return fsi_core_read(master, int_st);
712 static void fsi_irq_clear_status(struct fsi_priv *fsi)
715 struct fsi_master *master = fsi_get_master(fsi);
717 data |= AB_IO(1, fsi_get_port_shift(fsi, &fsi->playback));
718 data |= AB_IO(1, fsi_get_port_shift(fsi, &fsi->capture));
720 /* clear interrupt factor */
721 fsi_core_mask_set(master, int_st, data, 0);
725 * SPDIF master clock function
727 * These functions are used later FSI2
729 static void fsi_spdif_clk_ctrl(struct fsi_priv *fsi, int enable)
731 struct fsi_master *master = fsi_get_master(fsi);
735 val = enable ? mask : 0;
738 fsi_core_mask_set(master, a_mclk, mask, val) :
739 fsi_core_mask_set(master, b_mclk, mask, val);
745 static int fsi_clk_init(struct device *dev,
746 struct fsi_priv *fsi,
750 int (*set_rate)(struct device *dev,
751 struct fsi_priv *fsi,
754 struct fsi_clk *clock = &fsi->clock;
755 int is_porta = fsi_is_port_a(fsi);
762 clock->set_rate = set_rate;
764 clock->own = devm_clk_get(dev, NULL);
765 if (IS_ERR(clock->own))
770 clock->xck = devm_clk_get(dev, is_porta ? "xcka" : "xckb");
771 if (IS_ERR(clock->xck)) {
772 dev_err(dev, "can't get xck clock\n");
775 if (clock->xck == clock->own) {
776 dev_err(dev, "cpu doesn't support xck clock\n");
781 /* FSIACLK/FSIBCLK */
783 clock->ick = devm_clk_get(dev, is_porta ? "icka" : "ickb");
784 if (IS_ERR(clock->ick)) {
785 dev_err(dev, "can't get ick clock\n");
788 if (clock->ick == clock->own) {
789 dev_err(dev, "cpu doesn't support ick clock\n");
796 clock->div = devm_clk_get(dev, is_porta ? "diva" : "divb");
797 if (IS_ERR(clock->div)) {
798 dev_err(dev, "can't get div clock\n");
801 if (clock->div == clock->own) {
802 dev_err(dev, "cpu doens't support div clock\n");
810 #define fsi_clk_invalid(fsi) fsi_clk_valid(fsi, 0)
811 static void fsi_clk_valid(struct fsi_priv *fsi, unsigned long rate)
813 fsi->clock.rate = rate;
816 static int fsi_clk_is_valid(struct fsi_priv *fsi)
818 return fsi->clock.set_rate &&
822 static int fsi_clk_enable(struct device *dev,
823 struct fsi_priv *fsi,
826 struct fsi_clk *clock = &fsi->clock;
829 if (!fsi_clk_is_valid(fsi))
832 if (0 == clock->count) {
833 ret = clock->set_rate(dev, fsi, rate);
835 fsi_clk_invalid(fsi);
840 clk_enable(clock->xck);
842 clk_enable(clock->ick);
844 clk_enable(clock->div);
852 static int fsi_clk_disable(struct device *dev,
853 struct fsi_priv *fsi)
855 struct fsi_clk *clock = &fsi->clock;
857 if (!fsi_clk_is_valid(fsi))
860 if (1 == clock->count--) {
862 clk_disable(clock->xck);
864 clk_disable(clock->ick);
866 clk_disable(clock->div);
872 static int fsi_clk_set_ackbpf(struct device *dev,
873 struct fsi_priv *fsi,
874 int ackmd, int bpfmd)
878 /* check ackmd/bpfmd relationship */
880 dev_err(dev, "unsupported rate (%d/%d)\n", ackmd, bpfmd);
902 dev_err(dev, "unsupported ackmd (%d)\n", ackmd);
927 dev_err(dev, "unsupported bpfmd (%d)\n", bpfmd);
931 dev_dbg(dev, "ACKMD/BPFMD = %d/%d\n", ackmd, bpfmd);
933 fsi_reg_mask_set(fsi, CKG1, (ACKMD_MASK | BPFMD_MASK) , data);
939 static int fsi_clk_set_rate_external(struct device *dev,
940 struct fsi_priv *fsi,
943 struct clk *xck = fsi->clock.xck;
944 struct clk *ick = fsi->clock.ick;
949 /* check clock rate */
950 xrate = clk_get_rate(xck);
952 dev_err(dev, "unsupported clock rate\n");
956 clk_set_parent(ick, xck);
957 clk_set_rate(ick, xrate);
959 bpfmd = fsi->chan_num * 32;
960 ackmd = xrate / rate;
962 dev_dbg(dev, "external/rate = %ld/%ld\n", xrate, rate);
964 ret = fsi_clk_set_ackbpf(dev, fsi, ackmd, bpfmd);
966 dev_err(dev, "%s failed", __func__);
971 static int fsi_clk_set_rate_cpg(struct device *dev,
972 struct fsi_priv *fsi,
975 struct clk *ick = fsi->clock.ick;
976 struct clk *div = fsi->clock.div;
977 unsigned long target = 0; /* 12288000 or 11289600 */
978 unsigned long actual, cout;
979 unsigned long diff, min;
980 unsigned long best_cout, best_act;
985 if (!(12288000 % rate))
987 if (!(11289600 % rate))
990 dev_err(dev, "unsupported rate\n");
994 bpfmd = fsi->chan_num * 32;
995 ackmd = target / rate;
996 ret = fsi_clk_set_ackbpf(dev, fsi, ackmd, bpfmd);
998 dev_err(dev, "%s failed", __func__);
1005 * [CPG] = cout => [FSI_DIV] = audio => [FSI] => [codec]
1007 * But, it needs to find best match of CPG and FSI_DIV
1008 * combination, since it is difficult to generate correct
1009 * frequency of audio clock from ick clock only.
1010 * Because ick is created from its parent clock.
1012 * target = rate x [512/256/128/64]fs
1013 * cout = round(target x adjustment)
1014 * actual = cout / adjustment (by FSI-DIV) ~= target
1020 for (adj = 1; adj < 0xffff; adj++) {
1022 cout = target * adj;
1023 if (cout > 100000000) /* max clock = 100MHz */
1026 /* cout/actual audio clock */
1027 cout = clk_round_rate(ick, cout);
1028 actual = cout / adj;
1030 /* find best frequency */
1031 diff = abs(actual - target);
1039 ret = clk_set_rate(ick, best_cout);
1041 dev_err(dev, "ick clock failed\n");
1045 ret = clk_set_rate(div, clk_round_rate(div, best_act));
1047 dev_err(dev, "div clock failed\n");
1051 dev_dbg(dev, "ick/div = %ld/%ld\n",
1052 clk_get_rate(ick), clk_get_rate(div));
1057 static int fsi_set_master_clk(struct device *dev, struct fsi_priv *fsi,
1058 long rate, int enable)
1060 set_rate_func set_rate = fsi_get_info_set_rate(fsi);
1066 * set_rate will be deleted
1070 return fsi_clk_enable(dev, fsi, rate);
1072 return fsi_clk_disable(dev, fsi);
1075 ret = set_rate(dev, rate, enable);
1076 if (ret < 0) /* error */
1085 switch (ret & SH_FSI_ACKMD_MASK) {
1088 case SH_FSI_ACKMD_512:
1089 data |= (0x0 << 12);
1091 case SH_FSI_ACKMD_256:
1092 data |= (0x1 << 12);
1094 case SH_FSI_ACKMD_128:
1095 data |= (0x2 << 12);
1097 case SH_FSI_ACKMD_64:
1098 data |= (0x3 << 12);
1100 case SH_FSI_ACKMD_32:
1101 data |= (0x4 << 12);
1105 switch (ret & SH_FSI_BPFMD_MASK) {
1108 case SH_FSI_BPFMD_32:
1111 case SH_FSI_BPFMD_64:
1114 case SH_FSI_BPFMD_128:
1117 case SH_FSI_BPFMD_256:
1120 case SH_FSI_BPFMD_512:
1123 case SH_FSI_BPFMD_16:
1128 fsi_reg_mask_set(fsi, CKG1, (ACKMD_MASK | BPFMD_MASK) , data);
1137 * pio data transfer handler
1139 static void fsi_pio_push16(struct fsi_priv *fsi, u8 *_buf, int samples)
1141 u32 enable_stream = fsi_get_info_flags(fsi) & SH_FSI_ENABLE_STREAM_MODE;
1144 if (enable_stream) {
1148 * fsi_pio_push_init()
1150 u32 *buf = (u32 *)_buf;
1152 for (i = 0; i < samples / 2; i++)
1153 fsi_reg_write(fsi, DODT, buf[i]);
1156 u16 *buf = (u16 *)_buf;
1158 for (i = 0; i < samples; i++)
1159 fsi_reg_write(fsi, DODT, ((u32)*(buf + i) << 8));
1163 static void fsi_pio_pop16(struct fsi_priv *fsi, u8 *_buf, int samples)
1165 u16 *buf = (u16 *)_buf;
1168 for (i = 0; i < samples; i++)
1169 *(buf + i) = (u16)(fsi_reg_read(fsi, DIDT) >> 8);
1172 static void fsi_pio_push32(struct fsi_priv *fsi, u8 *_buf, int samples)
1174 u32 *buf = (u32 *)_buf;
1177 for (i = 0; i < samples; i++)
1178 fsi_reg_write(fsi, DODT, *(buf + i));
1181 static void fsi_pio_pop32(struct fsi_priv *fsi, u8 *_buf, int samples)
1183 u32 *buf = (u32 *)_buf;
1186 for (i = 0; i < samples; i++)
1187 *(buf + i) = fsi_reg_read(fsi, DIDT);
1190 static u8 *fsi_pio_get_area(struct fsi_priv *fsi, struct fsi_stream *io)
1192 struct snd_pcm_runtime *runtime = io->substream->runtime;
1194 return runtime->dma_area +
1195 samples_to_bytes(runtime, io->buff_sample_pos);
1198 static int fsi_pio_transfer(struct fsi_priv *fsi, struct fsi_stream *io,
1199 void (*run16)(struct fsi_priv *fsi, u8 *buf, int samples),
1200 void (*run32)(struct fsi_priv *fsi, u8 *buf, int samples),
1203 struct snd_pcm_runtime *runtime;
1204 struct snd_pcm_substream *substream;
1208 if (!fsi_stream_is_working(fsi, io))
1212 substream = io->substream;
1213 runtime = substream->runtime;
1215 /* FSI FIFO has limit.
1216 * So, this driver can not send periods data at a time
1218 if (io->buff_sample_pos >=
1219 io->period_samples * (io->period_pos + 1)) {
1222 io->period_pos = (io->period_pos + 1) % runtime->periods;
1224 if (0 == io->period_pos)
1225 io->buff_sample_pos = 0;
1228 buf = fsi_pio_get_area(fsi, io);
1230 switch (io->sample_width) {
1232 run16(fsi, buf, samples);
1235 run32(fsi, buf, samples);
1241 /* update buff_sample_pos */
1242 io->buff_sample_pos += samples;
1245 snd_pcm_period_elapsed(substream);
1250 static int fsi_pio_pop(struct fsi_priv *fsi, struct fsi_stream *io)
1252 int sample_residues; /* samples in FSI fifo */
1253 int sample_space; /* ALSA free samples space */
1256 sample_residues = fsi_get_current_fifo_samples(fsi, io);
1257 sample_space = io->buff_sample_capa - io->buff_sample_pos;
1259 samples = min(sample_residues, sample_space);
1261 return fsi_pio_transfer(fsi, io,
1267 static int fsi_pio_push(struct fsi_priv *fsi, struct fsi_stream *io)
1269 int sample_residues; /* ALSA residue samples */
1270 int sample_space; /* FSI fifo free samples space */
1273 sample_residues = io->buff_sample_capa - io->buff_sample_pos;
1274 sample_space = io->fifo_sample_capa -
1275 fsi_get_current_fifo_samples(fsi, io);
1277 samples = min(sample_residues, sample_space);
1279 return fsi_pio_transfer(fsi, io,
1285 static void fsi_pio_start_stop(struct fsi_priv *fsi, struct fsi_stream *io,
1288 struct fsi_master *master = fsi_get_master(fsi);
1289 u32 clk = fsi_is_port_a(fsi) ? CRA : CRB;
1292 fsi_irq_enable(fsi, io);
1294 fsi_irq_disable(fsi, io);
1296 if (fsi_is_clk_master(fsi))
1297 fsi_master_mask_set(master, CLK_RST, clk, (enable) ? clk : 0);
1300 static int fsi_pio_push_init(struct fsi_priv *fsi, struct fsi_stream *io)
1302 u32 enable_stream = fsi_get_info_flags(fsi) & SH_FSI_ENABLE_STREAM_MODE;
1305 * we can use 16bit stream mode
1306 * when "playback" and "16bit data"
1307 * and platform allows "stream mode"
1312 io->bus_option = BUSOP_SET(24, PACKAGE_24BITBUS_BACK) |
1313 BUSOP_SET(16, PACKAGE_16BITBUS_STREAM);
1315 io->bus_option = BUSOP_SET(24, PACKAGE_24BITBUS_BACK) |
1316 BUSOP_SET(16, PACKAGE_24BITBUS_BACK);
1320 static int fsi_pio_pop_init(struct fsi_priv *fsi, struct fsi_stream *io)
1323 * always 24bit bus, package back when "capture"
1325 io->bus_option = BUSOP_SET(24, PACKAGE_24BITBUS_BACK) |
1326 BUSOP_SET(16, PACKAGE_24BITBUS_BACK);
1330 static struct fsi_stream_handler fsi_pio_push_handler = {
1331 .init = fsi_pio_push_init,
1332 .transfer = fsi_pio_push,
1333 .start_stop = fsi_pio_start_stop,
1336 static struct fsi_stream_handler fsi_pio_pop_handler = {
1337 .init = fsi_pio_pop_init,
1338 .transfer = fsi_pio_pop,
1339 .start_stop = fsi_pio_start_stop,
1342 static irqreturn_t fsi_interrupt(int irq, void *data)
1344 struct fsi_master *master = data;
1345 u32 int_st = fsi_irq_get_status(master);
1347 /* clear irq status */
1348 fsi_master_mask_set(master, SOFT_RST, IR, 0);
1349 fsi_master_mask_set(master, SOFT_RST, IR, IR);
1351 if (int_st & AB_IO(1, AO_SHIFT))
1352 fsi_stream_transfer(&master->fsia.playback);
1353 if (int_st & AB_IO(1, BO_SHIFT))
1354 fsi_stream_transfer(&master->fsib.playback);
1355 if (int_st & AB_IO(1, AI_SHIFT))
1356 fsi_stream_transfer(&master->fsia.capture);
1357 if (int_st & AB_IO(1, BI_SHIFT))
1358 fsi_stream_transfer(&master->fsib.capture);
1360 fsi_count_fifo_err(&master->fsia);
1361 fsi_count_fifo_err(&master->fsib);
1363 fsi_irq_clear_status(&master->fsia);
1364 fsi_irq_clear_status(&master->fsib);
1370 * dma data transfer handler
1372 static int fsi_dma_init(struct fsi_priv *fsi, struct fsi_stream *io)
1374 struct snd_pcm_runtime *runtime = io->substream->runtime;
1375 struct snd_soc_dai *dai = fsi_get_dai(io->substream);
1376 enum dma_data_direction dir = fsi_stream_is_play(fsi, io) ?
1377 DMA_TO_DEVICE : DMA_FROM_DEVICE;
1380 * 24bit data : 24bit bus / package in back
1381 * 16bit data : 16bit bus / stream mode
1383 io->bus_option = BUSOP_SET(24, PACKAGE_24BITBUS_BACK) |
1384 BUSOP_SET(16, PACKAGE_16BITBUS_STREAM);
1386 io->dma = dma_map_single(dai->dev, runtime->dma_area,
1387 snd_pcm_lib_buffer_bytes(io->substream), dir);
1391 static int fsi_dma_quit(struct fsi_priv *fsi, struct fsi_stream *io)
1393 struct snd_soc_dai *dai = fsi_get_dai(io->substream);
1394 enum dma_data_direction dir = fsi_stream_is_play(fsi, io) ?
1395 DMA_TO_DEVICE : DMA_FROM_DEVICE;
1397 dma_unmap_single(dai->dev, io->dma,
1398 snd_pcm_lib_buffer_bytes(io->substream), dir);
1402 static dma_addr_t fsi_dma_get_area(struct fsi_stream *io)
1404 struct snd_pcm_runtime *runtime = io->substream->runtime;
1406 return io->dma + samples_to_bytes(runtime, io->buff_sample_pos);
1409 static void fsi_dma_complete(void *data)
1411 struct fsi_stream *io = (struct fsi_stream *)data;
1412 struct fsi_priv *fsi = fsi_stream_to_priv(io);
1413 struct snd_pcm_runtime *runtime = io->substream->runtime;
1414 struct snd_soc_dai *dai = fsi_get_dai(io->substream);
1415 enum dma_data_direction dir = fsi_stream_is_play(fsi, io) ?
1416 DMA_TO_DEVICE : DMA_FROM_DEVICE;
1418 dma_sync_single_for_cpu(dai->dev, fsi_dma_get_area(io),
1419 samples_to_bytes(runtime, io->period_samples), dir);
1421 io->buff_sample_pos += io->period_samples;
1424 if (io->period_pos >= runtime->periods) {
1426 io->buff_sample_pos = 0;
1429 fsi_count_fifo_err(fsi);
1430 fsi_stream_transfer(io);
1432 snd_pcm_period_elapsed(io->substream);
1435 static void fsi_dma_do_work(struct work_struct *work)
1437 struct fsi_stream *io = container_of(work, struct fsi_stream, work);
1438 struct fsi_priv *fsi = fsi_stream_to_priv(io);
1439 struct snd_soc_dai *dai;
1440 struct dma_async_tx_descriptor *desc;
1441 struct snd_pcm_runtime *runtime;
1442 enum dma_data_direction dir;
1443 int is_play = fsi_stream_is_play(fsi, io);
1447 if (!fsi_stream_is_working(fsi, io))
1450 dai = fsi_get_dai(io->substream);
1451 runtime = io->substream->runtime;
1452 dir = is_play ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
1453 len = samples_to_bytes(runtime, io->period_samples);
1454 buf = fsi_dma_get_area(io);
1456 dma_sync_single_for_device(dai->dev, buf, len, dir);
1458 desc = dmaengine_prep_slave_single(io->chan, buf, len, dir,
1459 DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
1461 dev_err(dai->dev, "dmaengine_prep_slave_sg() fail\n");
1465 desc->callback = fsi_dma_complete;
1466 desc->callback_param = io;
1468 if (dmaengine_submit(desc) < 0) {
1469 dev_err(dai->dev, "tx_submit() fail\n");
1473 dma_async_issue_pending(io->chan);
1478 * In DMAEngine case, codec and FSI cannot be started simultaneously
1479 * since FSI is using the scheduler work queue.
1480 * Therefore, in capture case, probably FSI FIFO will have got
1481 * overflow error in this point.
1482 * in that case, DMA cannot start transfer until error was cleared.
1485 if (ERR_OVER & fsi_reg_read(fsi, DIFF_ST)) {
1486 fsi_reg_mask_set(fsi, DIFF_CTL, FIFO_CLR, FIFO_CLR);
1487 fsi_reg_write(fsi, DIFF_ST, 0);
1492 static bool fsi_dma_filter(struct dma_chan *chan, void *param)
1494 struct sh_dmae_slave *slave = param;
1496 chan->private = slave;
1501 static int fsi_dma_transfer(struct fsi_priv *fsi, struct fsi_stream *io)
1503 schedule_work(&io->work);
1508 static void fsi_dma_push_start_stop(struct fsi_priv *fsi, struct fsi_stream *io,
1511 struct fsi_master *master = fsi_get_master(fsi);
1512 u32 clk = fsi_is_port_a(fsi) ? CRA : CRB;
1513 u32 enable = start ? DMA_ON : 0;
1515 fsi_reg_mask_set(fsi, OUT_DMAC, DMA_ON, enable);
1517 dmaengine_terminate_all(io->chan);
1519 if (fsi_is_clk_master(fsi))
1520 fsi_master_mask_set(master, CLK_RST, clk, (enable) ? clk : 0);
1523 static int fsi_dma_probe(struct fsi_priv *fsi, struct fsi_stream *io, struct device *dev)
1525 dma_cap_mask_t mask;
1528 dma_cap_set(DMA_SLAVE, mask);
1530 io->chan = dma_request_channel(mask, fsi_dma_filter, &io->slave);
1533 /* switch to PIO handler */
1534 if (fsi_stream_is_play(fsi, io))
1535 fsi->playback.handler = &fsi_pio_push_handler;
1537 fsi->capture.handler = &fsi_pio_pop_handler;
1539 dev_info(dev, "switch handler (dma => pio)\n");
1542 return fsi_stream_probe(fsi, dev);
1545 INIT_WORK(&io->work, fsi_dma_do_work);
1550 static int fsi_dma_remove(struct fsi_priv *fsi, struct fsi_stream *io)
1552 cancel_work_sync(&io->work);
1554 fsi_stream_stop(fsi, io);
1557 dma_release_channel(io->chan);
1563 static struct fsi_stream_handler fsi_dma_push_handler = {
1564 .init = fsi_dma_init,
1565 .quit = fsi_dma_quit,
1566 .probe = fsi_dma_probe,
1567 .transfer = fsi_dma_transfer,
1568 .remove = fsi_dma_remove,
1569 .start_stop = fsi_dma_push_start_stop,
1575 static void fsi_fifo_init(struct fsi_priv *fsi,
1576 struct fsi_stream *io,
1579 struct fsi_master *master = fsi_get_master(fsi);
1580 int is_play = fsi_stream_is_play(fsi, io);
1584 /* get on-chip RAM capacity */
1585 shift = fsi_master_read(master, FIFO_SZ);
1586 shift >>= fsi_get_port_shift(fsi, io);
1587 shift &= FIFO_SZ_MASK;
1588 frame_capa = 256 << shift;
1589 dev_dbg(dev, "fifo = %d words\n", frame_capa);
1592 * The maximum number of sample data varies depending
1593 * on the number of channels selected for the format.
1595 * FIFOs are used in 4-channel units in 3-channel mode
1596 * and in 8-channel units in 5- to 7-channel mode
1597 * meaning that more FIFOs than the required size of DPRAM
1600 * ex) if 256 words of DP-RAM is connected
1601 * 1 channel: 256 (256 x 1 = 256)
1602 * 2 channels: 128 (128 x 2 = 256)
1603 * 3 channels: 64 ( 64 x 3 = 192)
1604 * 4 channels: 64 ( 64 x 4 = 256)
1605 * 5 channels: 32 ( 32 x 5 = 160)
1606 * 6 channels: 32 ( 32 x 6 = 192)
1607 * 7 channels: 32 ( 32 x 7 = 224)
1608 * 8 channels: 32 ( 32 x 8 = 256)
1610 for (i = 1; i < fsi->chan_num; i <<= 1)
1612 dev_dbg(dev, "%d channel %d store\n",
1613 fsi->chan_num, frame_capa);
1615 io->fifo_sample_capa = fsi_frame2sample(fsi, frame_capa);
1618 * set interrupt generation factor
1622 fsi_reg_write(fsi, DOFF_CTL, IRQ_HALF);
1623 fsi_reg_mask_set(fsi, DOFF_CTL, FIFO_CLR, FIFO_CLR);
1625 fsi_reg_write(fsi, DIFF_CTL, IRQ_HALF);
1626 fsi_reg_mask_set(fsi, DIFF_CTL, FIFO_CLR, FIFO_CLR);
1630 static int fsi_hw_startup(struct fsi_priv *fsi,
1631 struct fsi_stream *io,
1634 u32 flags = fsi_get_info_flags(fsi);
1638 if (fsi_is_clk_master(fsi))
1641 fsi_reg_mask_set(fsi, CKG1, (DIMD | DOMD), data);
1643 /* clock inversion (CKG2) */
1645 if (SH_FSI_LRM_INV & flags)
1647 if (SH_FSI_BRM_INV & flags)
1649 if (SH_FSI_LRS_INV & flags)
1651 if (SH_FSI_BRS_INV & flags)
1654 fsi_reg_write(fsi, CKG2, data);
1657 if (fsi_is_spdif(fsi)) {
1658 fsi_spdif_clk_ctrl(fsi, 1);
1659 fsi_reg_mask_set(fsi, OUT_SEL, DMMD, DMMD);
1666 switch (io->sample_width) {
1668 data = BUSOP_GET(16, io->bus_option);
1671 data = BUSOP_GET(24, io->bus_option);
1674 fsi_format_bus_setup(fsi, io, data, dev);
1677 fsi_irq_disable(fsi, io);
1678 fsi_irq_clear_status(fsi);
1681 fsi_fifo_init(fsi, io, dev);
1683 /* start master clock */
1684 if (fsi_is_clk_master(fsi))
1685 return fsi_set_master_clk(dev, fsi, fsi->rate, 1);
1690 static int fsi_hw_shutdown(struct fsi_priv *fsi,
1693 /* stop master clock */
1694 if (fsi_is_clk_master(fsi))
1695 return fsi_set_master_clk(dev, fsi, fsi->rate, 0);
1700 static int fsi_dai_startup(struct snd_pcm_substream *substream,
1701 struct snd_soc_dai *dai)
1703 struct fsi_priv *fsi = fsi_get_priv(substream);
1705 fsi_clk_invalid(fsi);
1711 static void fsi_dai_shutdown(struct snd_pcm_substream *substream,
1712 struct snd_soc_dai *dai)
1714 struct fsi_priv *fsi = fsi_get_priv(substream);
1716 fsi_clk_invalid(fsi);
1720 static int fsi_dai_trigger(struct snd_pcm_substream *substream, int cmd,
1721 struct snd_soc_dai *dai)
1723 struct fsi_priv *fsi = fsi_get_priv(substream);
1724 struct fsi_stream *io = fsi_stream_get(fsi, substream);
1728 case SNDRV_PCM_TRIGGER_START:
1729 fsi_stream_init(fsi, io, substream);
1731 ret = fsi_hw_startup(fsi, io, dai->dev);
1733 ret = fsi_stream_transfer(io);
1735 fsi_stream_start(fsi, io);
1737 case SNDRV_PCM_TRIGGER_STOP:
1739 ret = fsi_hw_shutdown(fsi, dai->dev);
1740 fsi_stream_stop(fsi, io);
1741 fsi_stream_quit(fsi, io);
1748 static int fsi_set_fmt_dai(struct fsi_priv *fsi, unsigned int fmt)
1750 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1751 case SND_SOC_DAIFMT_I2S:
1755 case SND_SOC_DAIFMT_LEFT_J:
1766 static int fsi_set_fmt_spdif(struct fsi_priv *fsi)
1768 struct fsi_master *master = fsi_get_master(fsi);
1770 if (fsi_version(master) < 2)
1773 fsi->fmt = CR_DTMD_SPDIF_PCM | CR_PCM;
1780 static int fsi_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
1782 struct fsi_priv *fsi = fsi_get_priv_frm_dai(dai);
1783 set_rate_func set_rate = fsi_get_info_set_rate(fsi);
1784 u32 flags = fsi_get_info_flags(fsi);
1787 /* set master/slave audio interface */
1788 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1789 case SND_SOC_DAIFMT_CBM_CFM:
1790 fsi->clk_master = 1;
1792 case SND_SOC_DAIFMT_CBS_CFS:
1798 if (fsi_is_clk_master(fsi)) {
1802 * set_rate will be deleted
1805 dev_warn(dai->dev, "set_rate will be removed soon\n");
1807 switch (flags & SH_FSI_CLK_MASK) {
1808 case SH_FSI_CLK_EXTERNAL:
1809 fsi_clk_init(dai->dev, fsi, 1, 1, 0,
1810 fsi_clk_set_rate_external);
1812 case SH_FSI_CLK_CPG:
1813 fsi_clk_init(dai->dev, fsi, 0, 1, 1,
1814 fsi_clk_set_rate_cpg);
1820 switch (flags & SH_FSI_FMT_MASK) {
1821 case SH_FSI_FMT_DAI:
1822 ret = fsi_set_fmt_dai(fsi, fmt & SND_SOC_DAIFMT_FORMAT_MASK);
1824 case SH_FSI_FMT_SPDIF:
1825 ret = fsi_set_fmt_spdif(fsi);
1834 static int fsi_dai_hw_params(struct snd_pcm_substream *substream,
1835 struct snd_pcm_hw_params *params,
1836 struct snd_soc_dai *dai)
1838 struct fsi_priv *fsi = fsi_get_priv(substream);
1840 if (fsi_is_clk_master(fsi)) {
1841 fsi->rate = params_rate(params);
1842 fsi_clk_valid(fsi, fsi->rate);
1848 static const struct snd_soc_dai_ops fsi_dai_ops = {
1849 .startup = fsi_dai_startup,
1850 .shutdown = fsi_dai_shutdown,
1851 .trigger = fsi_dai_trigger,
1852 .set_fmt = fsi_dai_set_fmt,
1853 .hw_params = fsi_dai_hw_params,
1860 static struct snd_pcm_hardware fsi_pcm_hardware = {
1861 .info = SNDRV_PCM_INFO_INTERLEAVED |
1862 SNDRV_PCM_INFO_MMAP |
1863 SNDRV_PCM_INFO_MMAP_VALID |
1864 SNDRV_PCM_INFO_PAUSE,
1865 .formats = FSI_FMTS,
1871 .buffer_bytes_max = 64 * 1024,
1872 .period_bytes_min = 32,
1873 .period_bytes_max = 8192,
1879 static int fsi_pcm_open(struct snd_pcm_substream *substream)
1881 struct snd_pcm_runtime *runtime = substream->runtime;
1884 snd_soc_set_runtime_hwparams(substream, &fsi_pcm_hardware);
1886 ret = snd_pcm_hw_constraint_integer(runtime,
1887 SNDRV_PCM_HW_PARAM_PERIODS);
1892 static int fsi_hw_params(struct snd_pcm_substream *substream,
1893 struct snd_pcm_hw_params *hw_params)
1895 return snd_pcm_lib_malloc_pages(substream,
1896 params_buffer_bytes(hw_params));
1899 static int fsi_hw_free(struct snd_pcm_substream *substream)
1901 return snd_pcm_lib_free_pages(substream);
1904 static snd_pcm_uframes_t fsi_pointer(struct snd_pcm_substream *substream)
1906 struct fsi_priv *fsi = fsi_get_priv(substream);
1907 struct fsi_stream *io = fsi_stream_get(fsi, substream);
1909 return fsi_sample2frame(fsi, io->buff_sample_pos);
1912 static struct snd_pcm_ops fsi_pcm_ops = {
1913 .open = fsi_pcm_open,
1914 .ioctl = snd_pcm_lib_ioctl,
1915 .hw_params = fsi_hw_params,
1916 .hw_free = fsi_hw_free,
1917 .pointer = fsi_pointer,
1924 #define PREALLOC_BUFFER (32 * 1024)
1925 #define PREALLOC_BUFFER_MAX (32 * 1024)
1927 static void fsi_pcm_free(struct snd_pcm *pcm)
1929 snd_pcm_lib_preallocate_free_for_all(pcm);
1932 static int fsi_pcm_new(struct snd_soc_pcm_runtime *rtd)
1934 struct snd_pcm *pcm = rtd->pcm;
1937 * dont use SNDRV_DMA_TYPE_DEV, since it will oops the SH kernel
1938 * in MMAP mode (i.e. aplay -M)
1940 return snd_pcm_lib_preallocate_pages_for_all(
1942 SNDRV_DMA_TYPE_CONTINUOUS,
1943 snd_dma_continuous_data(GFP_KERNEL),
1944 PREALLOC_BUFFER, PREALLOC_BUFFER_MAX);
1951 static struct snd_soc_dai_driver fsi_soc_dai[] = {
1956 .formats = FSI_FMTS,
1962 .formats = FSI_FMTS,
1966 .ops = &fsi_dai_ops,
1972 .formats = FSI_FMTS,
1978 .formats = FSI_FMTS,
1982 .ops = &fsi_dai_ops,
1986 static struct snd_soc_platform_driver fsi_soc_platform = {
1987 .ops = &fsi_pcm_ops,
1988 .pcm_new = fsi_pcm_new,
1989 .pcm_free = fsi_pcm_free,
1995 static void fsi_handler_init(struct fsi_priv *fsi)
1997 fsi->playback.handler = &fsi_pio_push_handler; /* default PIO */
1998 fsi->playback.priv = fsi;
1999 fsi->capture.handler = &fsi_pio_pop_handler; /* default PIO */
2000 fsi->capture.priv = fsi;
2002 if (fsi->info->tx_id) {
2003 fsi->playback.slave.shdma_slave.slave_id = fsi->info->tx_id;
2004 fsi->playback.handler = &fsi_dma_push_handler;
2008 static int fsi_probe(struct platform_device *pdev)
2010 struct fsi_master *master;
2011 const struct platform_device_id *id_entry;
2012 struct sh_fsi_platform_info *info = pdev->dev.platform_data;
2013 struct resource *res;
2017 id_entry = pdev->id_entry;
2019 dev_err(&pdev->dev, "unknown fsi device\n");
2023 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2024 irq = platform_get_irq(pdev, 0);
2025 if (!res || (int)irq <= 0) {
2026 dev_err(&pdev->dev, "Not enough FSI platform resources.\n");
2030 master = devm_kzalloc(&pdev->dev, sizeof(*master), GFP_KERNEL);
2032 dev_err(&pdev->dev, "Could not allocate master\n");
2036 master->base = devm_ioremap_nocache(&pdev->dev,
2037 res->start, resource_size(res));
2038 if (!master->base) {
2039 dev_err(&pdev->dev, "Unable to ioremap FSI registers.\n");
2043 /* master setting */
2045 master->core = (struct fsi_core *)id_entry->driver_data;
2046 spin_lock_init(&master->lock);
2049 master->fsia.base = master->base;
2050 master->fsia.master = master;
2051 master->fsia.info = &info->port_a;
2052 fsi_handler_init(&master->fsia);
2053 ret = fsi_stream_probe(&master->fsia, &pdev->dev);
2055 dev_err(&pdev->dev, "FSIA stream probe failed\n");
2060 master->fsib.base = master->base + 0x40;
2061 master->fsib.master = master;
2062 master->fsib.info = &info->port_b;
2063 fsi_handler_init(&master->fsib);
2064 ret = fsi_stream_probe(&master->fsib, &pdev->dev);
2066 dev_err(&pdev->dev, "FSIB stream probe failed\n");
2070 pm_runtime_enable(&pdev->dev);
2071 dev_set_drvdata(&pdev->dev, master);
2073 ret = devm_request_irq(&pdev->dev, irq, &fsi_interrupt, 0,
2074 id_entry->name, master);
2076 dev_err(&pdev->dev, "irq request err\n");
2080 ret = snd_soc_register_platform(&pdev->dev, &fsi_soc_platform);
2082 dev_err(&pdev->dev, "cannot snd soc register\n");
2086 ret = snd_soc_register_dais(&pdev->dev, fsi_soc_dai,
2087 ARRAY_SIZE(fsi_soc_dai));
2089 dev_err(&pdev->dev, "cannot snd dai register\n");
2096 snd_soc_unregister_platform(&pdev->dev);
2098 pm_runtime_disable(&pdev->dev);
2099 fsi_stream_remove(&master->fsib);
2101 fsi_stream_remove(&master->fsia);
2106 static int fsi_remove(struct platform_device *pdev)
2108 struct fsi_master *master;
2110 master = dev_get_drvdata(&pdev->dev);
2112 pm_runtime_disable(&pdev->dev);
2114 snd_soc_unregister_dais(&pdev->dev, ARRAY_SIZE(fsi_soc_dai));
2115 snd_soc_unregister_platform(&pdev->dev);
2117 fsi_stream_remove(&master->fsia);
2118 fsi_stream_remove(&master->fsib);
2123 static void __fsi_suspend(struct fsi_priv *fsi,
2124 struct fsi_stream *io,
2127 if (!fsi_stream_is_working(fsi, io))
2130 fsi_stream_stop(fsi, io);
2131 fsi_hw_shutdown(fsi, dev);
2134 static void __fsi_resume(struct fsi_priv *fsi,
2135 struct fsi_stream *io,
2138 if (!fsi_stream_is_working(fsi, io))
2141 fsi_hw_startup(fsi, io, dev);
2142 fsi_stream_start(fsi, io);
2145 static int fsi_suspend(struct device *dev)
2147 struct fsi_master *master = dev_get_drvdata(dev);
2148 struct fsi_priv *fsia = &master->fsia;
2149 struct fsi_priv *fsib = &master->fsib;
2151 __fsi_suspend(fsia, &fsia->playback, dev);
2152 __fsi_suspend(fsia, &fsia->capture, dev);
2154 __fsi_suspend(fsib, &fsib->playback, dev);
2155 __fsi_suspend(fsib, &fsib->capture, dev);
2160 static int fsi_resume(struct device *dev)
2162 struct fsi_master *master = dev_get_drvdata(dev);
2163 struct fsi_priv *fsia = &master->fsia;
2164 struct fsi_priv *fsib = &master->fsib;
2166 __fsi_resume(fsia, &fsia->playback, dev);
2167 __fsi_resume(fsia, &fsia->capture, dev);
2169 __fsi_resume(fsib, &fsib->playback, dev);
2170 __fsi_resume(fsib, &fsib->capture, dev);
2175 static struct dev_pm_ops fsi_pm_ops = {
2176 .suspend = fsi_suspend,
2177 .resume = fsi_resume,
2180 static struct fsi_core fsi1_core = {
2189 static struct fsi_core fsi2_core = {
2193 .int_st = CPU_INT_ST,
2196 .a_mclk = A_MST_CTLR,
2197 .b_mclk = B_MST_CTLR,
2200 static struct platform_device_id fsi_id_table[] = {
2201 { "sh_fsi", (kernel_ulong_t)&fsi1_core },
2202 { "sh_fsi2", (kernel_ulong_t)&fsi2_core },
2205 MODULE_DEVICE_TABLE(platform, fsi_id_table);
2207 static struct platform_driver fsi_driver = {
2209 .name = "fsi-pcm-audio",
2213 .remove = fsi_remove,
2214 .id_table = fsi_id_table,
2217 module_platform_driver(fsi_driver);
2219 MODULE_LICENSE("GPL");
2220 MODULE_DESCRIPTION("SuperH onchip FSI audio driver");
2221 MODULE_AUTHOR("Kuninori Morimoto <morimoto.kuninori@renesas.com>");
2222 MODULE_ALIAS("platform:fsi-pcm-audio");