2 * Fifo-attached Serial Interface (FSI) support for SH7724
4 * Copyright (C) 2009 Renesas Solutions Corp.
5 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
8 * Copyright (c) 2007 Manuel Lauss <mano@roarinelk.homelinux.net>
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
15 #include <linux/delay.h>
16 #include <linux/pm_runtime.h>
18 #include <linux/slab.h>
19 #include <sound/soc.h>
20 #include <sound/sh_fsi.h>
22 /* PortA/PortB register */
23 #define REG_DO_FMT 0x0000
24 #define REG_DOFF_CTL 0x0004
25 #define REG_DOFF_ST 0x0008
26 #define REG_DI_FMT 0x000C
27 #define REG_DIFF_CTL 0x0010
28 #define REG_DIFF_ST 0x0014
29 #define REG_CKG1 0x0018
30 #define REG_CKG2 0x001C
31 #define REG_DIDT 0x0020
32 #define REG_DODT 0x0024
33 #define REG_MUTE_ST 0x0028
34 #define REG_OUT_SEL 0x0030
37 #define MST_CLK_RST 0x0210
38 #define MST_SOFT_RST 0x0214
39 #define MST_FIFO_SZ 0x0218
41 /* core register (depend on FSI version) */
42 #define A_MST_CTLR 0x0180
43 #define B_MST_CTLR 0x01A0
44 #define CPU_INT_ST 0x01F4
45 #define CPU_IEMSK 0x01F8
46 #define CPU_IMSK 0x01FC
53 #define CR_BWS_24 (0x0 << 20) /* FSI2 */
54 #define CR_BWS_16 (0x1 << 20) /* FSI2 */
55 #define CR_BWS_20 (0x2 << 20) /* FSI2 */
57 #define CR_DTMD_PCM (0x0 << 8) /* FSI2 */
58 #define CR_DTMD_SPDIF_PCM (0x1 << 8) /* FSI2 */
59 #define CR_DTMD_SPDIF_STREAM (0x2 << 8) /* FSI2 */
61 #define CR_MONO (0x0 << 4)
62 #define CR_MONO_D (0x1 << 4)
63 #define CR_PCM (0x2 << 4)
64 #define CR_I2S (0x3 << 4)
65 #define CR_TDM (0x4 << 4)
66 #define CR_TDM_D (0x5 << 4)
70 #define IRQ_HALF 0x00100000
71 #define FIFO_CLR 0x00000001
74 #define ERR_OVER 0x00000010
75 #define ERR_UNDER 0x00000001
76 #define ST_ERR (ERR_OVER | ERR_UNDER)
79 #define ACKMD_MASK 0x00007000
80 #define BPFMD_MASK 0x00000700
85 #define BP (1 << 4) /* Fix the signal of Biphase output */
86 #define SE (1 << 0) /* Fix the master clock */
92 /* IO SHIFT / MACRO */
97 #define AB_IO(param, shift) (param << shift)
100 #define PBSR (1 << 12) /* Port B Software Reset */
101 #define PASR (1 << 8) /* Port A Software Reset */
102 #define IR (1 << 4) /* Interrupt Reset */
103 #define FSISR (1 << 0) /* Software Reset */
106 #define DMMD (1 << 4) /* SPDIF output timing 0: Biphase only */
107 /* 1: Biphase and serial */
110 #define FIFO_SZ_MASK 0x7
112 #define FSI_RATES SNDRV_PCM_RATE_8000_96000
114 #define FSI_FMTS (SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S16_LE)
116 typedef int (*set_rate_func)(struct device *dev, int is_porta, int rate, int enable);
119 * FSI driver use below type name for variable
121 * xxx_num : number of data
122 * xxx_pos : position of data
123 * xxx_capa : capacity of data
127 * period/frame/sample image
131 * period pos period pos
133 * |<-------------------- period--------------------->|
134 * ==|============================================ ... =|==
136 * ||<----- frame ----->|<------ frame ----->| ... |
137 * |+--------------------+--------------------+- ... |
138 * ||[ sample ][ sample ]|[ sample ][ sample ]| ... |
139 * |+--------------------+--------------------+- ... |
140 * ==|============================================ ... =|==
160 struct snd_pcm_substream *substream;
162 int fifo_sample_capa; /* sample capacity of FSI FIFO */
163 int buff_sample_capa; /* sample capacity of ALSA buffer */
164 int buff_sample_pos; /* sample position of ALSA buffer */
165 int period_samples; /* sample number / 1 period */
166 int period_pos; /* current period position */
174 struct fsi_master *master;
176 struct fsi_stream playback;
177 struct fsi_stream capture;
188 /* for suspend/resume */
209 struct fsi_priv fsia;
210 struct fsi_priv fsib;
211 struct fsi_core *core;
212 struct sh_fsi_platform_info *info;
215 /* for suspend/resume */
225 * basic read write function
228 static void __fsi_reg_write(u32 reg, u32 data)
230 /* valid data area is 24bit */
233 __raw_writel(data, reg);
236 static u32 __fsi_reg_read(u32 reg)
238 return __raw_readl(reg);
241 static void __fsi_reg_mask_set(u32 reg, u32 mask, u32 data)
243 u32 val = __fsi_reg_read(reg);
248 __fsi_reg_write(reg, val);
251 #define fsi_reg_write(p, r, d)\
252 __fsi_reg_write((u32)(p->base + REG_##r), d)
254 #define fsi_reg_read(p, r)\
255 __fsi_reg_read((u32)(p->base + REG_##r))
257 #define fsi_reg_mask_set(p, r, m, d)\
258 __fsi_reg_mask_set((u32)(p->base + REG_##r), m, d)
260 #define fsi_master_read(p, r) _fsi_master_read(p, MST_##r)
261 #define fsi_core_read(p, r) _fsi_master_read(p, p->core->r)
262 static u32 _fsi_master_read(struct fsi_master *master, u32 reg)
267 spin_lock_irqsave(&master->lock, flags);
268 ret = __fsi_reg_read((u32)(master->base + reg));
269 spin_unlock_irqrestore(&master->lock, flags);
274 #define fsi_master_mask_set(p, r, m, d) _fsi_master_mask_set(p, MST_##r, m, d)
275 #define fsi_core_mask_set(p, r, m, d) _fsi_master_mask_set(p, p->core->r, m, d)
276 static void _fsi_master_mask_set(struct fsi_master *master,
277 u32 reg, u32 mask, u32 data)
281 spin_lock_irqsave(&master->lock, flags);
282 __fsi_reg_mask_set((u32)(master->base + reg), mask, data);
283 spin_unlock_irqrestore(&master->lock, flags);
290 static struct fsi_master *fsi_get_master(struct fsi_priv *fsi)
295 static int fsi_is_clk_master(struct fsi_priv *fsi)
297 return fsi->clk_master;
300 static int fsi_is_port_a(struct fsi_priv *fsi)
302 return fsi->master->base == fsi->base;
305 static int fsi_is_spdif(struct fsi_priv *fsi)
310 static struct snd_soc_dai *fsi_get_dai(struct snd_pcm_substream *substream)
312 struct snd_soc_pcm_runtime *rtd = substream->private_data;
317 static struct fsi_priv *fsi_get_priv_frm_dai(struct snd_soc_dai *dai)
319 struct fsi_master *master = snd_soc_dai_get_drvdata(dai);
322 return &master->fsia;
324 return &master->fsib;
327 static struct fsi_priv *fsi_get_priv(struct snd_pcm_substream *substream)
329 return fsi_get_priv_frm_dai(fsi_get_dai(substream));
332 static set_rate_func fsi_get_info_set_rate(struct fsi_master *master)
337 return master->info->set_rate;
340 static u32 fsi_get_info_flags(struct fsi_priv *fsi)
342 int is_porta = fsi_is_port_a(fsi);
343 struct fsi_master *master = fsi_get_master(fsi);
348 return is_porta ? master->info->porta_flags :
349 master->info->portb_flags;
352 static inline int fsi_stream_is_play(int stream)
354 return stream == SNDRV_PCM_STREAM_PLAYBACK;
357 static inline int fsi_is_play(struct snd_pcm_substream *substream)
359 return fsi_stream_is_play(substream->stream);
362 static inline struct fsi_stream *fsi_get_stream(struct fsi_priv *fsi,
365 return is_play ? &fsi->playback : &fsi->capture;
368 static u32 fsi_get_port_shift(struct fsi_priv *fsi, int is_play)
370 int is_porta = fsi_is_port_a(fsi);
374 shift = is_play ? AO_SHIFT : AI_SHIFT;
376 shift = is_play ? BO_SHIFT : BI_SHIFT;
381 static int fsi_frame2sample(struct fsi_priv *fsi, int frames)
383 return frames * fsi->chan_num;
386 static int fsi_sample2frame(struct fsi_priv *fsi, int samples)
388 return samples / fsi->chan_num;
391 static void fsi_stream_push(struct fsi_priv *fsi,
393 struct snd_pcm_substream *substream)
395 struct fsi_stream *io = fsi_get_stream(fsi, is_play);
396 struct snd_pcm_runtime *runtime = substream->runtime;
397 struct fsi_master *master = fsi_get_master(fsi);
400 spin_lock_irqsave(&master->lock, flags);
401 io->substream = substream;
402 io->buff_sample_capa = fsi_frame2sample(fsi, runtime->buffer_size);
403 io->buff_sample_pos = 0;
404 io->period_samples = fsi_frame2sample(fsi, runtime->period_size);
406 io->oerr_num = -1; /* ignore 1st err */
407 io->uerr_num = -1; /* ignore 1st err */
408 spin_unlock_irqrestore(&master->lock, flags);
411 static void fsi_stream_pop(struct fsi_priv *fsi, int is_play)
413 struct fsi_stream *io = fsi_get_stream(fsi, is_play);
414 struct snd_soc_dai *dai = fsi_get_dai(io->substream);
415 struct fsi_master *master = fsi_get_master(fsi);
418 spin_lock_irqsave(&master->lock, flags);
420 if (io->oerr_num > 0)
421 dev_err(dai->dev, "over_run = %d\n", io->oerr_num);
423 if (io->uerr_num > 0)
424 dev_err(dai->dev, "under_run = %d\n", io->uerr_num);
426 io->substream = NULL;
427 io->buff_sample_capa = 0;
428 io->buff_sample_pos = 0;
429 io->period_samples = 0;
433 spin_unlock_irqrestore(&master->lock, flags);
436 static int fsi_get_current_fifo_samples(struct fsi_priv *fsi, int is_play)
442 fsi_reg_read(fsi, DOFF_ST) :
443 fsi_reg_read(fsi, DIFF_ST);
445 frames = 0x1ff & (status >> 8);
447 return fsi_frame2sample(fsi, frames);
450 static void fsi_count_fifo_err(struct fsi_priv *fsi)
452 u32 ostatus = fsi_reg_read(fsi, DOFF_ST);
453 u32 istatus = fsi_reg_read(fsi, DIFF_ST);
455 if (ostatus & ERR_OVER)
456 fsi->playback.oerr_num++;
458 if (ostatus & ERR_UNDER)
459 fsi->playback.uerr_num++;
461 if (istatus & ERR_OVER)
462 fsi->capture.oerr_num++;
464 if (istatus & ERR_UNDER)
465 fsi->capture.uerr_num++;
467 fsi_reg_write(fsi, DOFF_ST, 0);
468 fsi_reg_write(fsi, DIFF_ST, 0);
475 static u8 *fsi_dma_get_area(struct fsi_priv *fsi, int stream)
477 int is_play = fsi_stream_is_play(stream);
478 struct fsi_stream *io = fsi_get_stream(fsi, is_play);
479 struct snd_pcm_runtime *runtime = io->substream->runtime;
481 return runtime->dma_area +
482 samples_to_bytes(runtime, io->buff_sample_pos);
485 static void fsi_dma_soft_push16(struct fsi_priv *fsi, int num)
490 start = (u16 *)fsi_dma_get_area(fsi, SNDRV_PCM_STREAM_PLAYBACK);
492 for (i = 0; i < num; i++)
493 fsi_reg_write(fsi, DODT, ((u32)*(start + i) << 8));
496 static void fsi_dma_soft_pop16(struct fsi_priv *fsi, int num)
501 start = (u16 *)fsi_dma_get_area(fsi, SNDRV_PCM_STREAM_CAPTURE);
504 for (i = 0; i < num; i++)
505 *(start + i) = (u16)(fsi_reg_read(fsi, DIDT) >> 8);
508 static void fsi_dma_soft_push32(struct fsi_priv *fsi, int num)
513 start = (u32 *)fsi_dma_get_area(fsi, SNDRV_PCM_STREAM_PLAYBACK);
516 for (i = 0; i < num; i++)
517 fsi_reg_write(fsi, DODT, *(start + i));
520 static void fsi_dma_soft_pop32(struct fsi_priv *fsi, int num)
525 start = (u32 *)fsi_dma_get_area(fsi, SNDRV_PCM_STREAM_CAPTURE);
527 for (i = 0; i < num; i++)
528 *(start + i) = fsi_reg_read(fsi, DIDT);
535 static void fsi_irq_enable(struct fsi_priv *fsi, int is_play)
537 u32 data = AB_IO(1, fsi_get_port_shift(fsi, is_play));
538 struct fsi_master *master = fsi_get_master(fsi);
540 fsi_core_mask_set(master, imsk, data, data);
541 fsi_core_mask_set(master, iemsk, data, data);
544 static void fsi_irq_disable(struct fsi_priv *fsi, int is_play)
546 u32 data = AB_IO(1, fsi_get_port_shift(fsi, is_play));
547 struct fsi_master *master = fsi_get_master(fsi);
549 fsi_core_mask_set(master, imsk, data, 0);
550 fsi_core_mask_set(master, iemsk, data, 0);
553 static u32 fsi_irq_get_status(struct fsi_master *master)
555 return fsi_core_read(master, int_st);
558 static void fsi_irq_clear_status(struct fsi_priv *fsi)
561 struct fsi_master *master = fsi_get_master(fsi);
563 data |= AB_IO(1, fsi_get_port_shift(fsi, 0));
564 data |= AB_IO(1, fsi_get_port_shift(fsi, 1));
566 /* clear interrupt factor */
567 fsi_core_mask_set(master, int_st, data, 0);
571 * SPDIF master clock function
573 * These functions are used later FSI2
575 static void fsi_spdif_clk_ctrl(struct fsi_priv *fsi, int enable)
577 struct fsi_master *master = fsi_get_master(fsi);
580 if (master->core->ver < 2) {
581 pr_err("fsi: register access err (%s)\n", __func__);
586 val = enable ? mask : 0;
589 fsi_core_mask_set(master, a_mclk, mask, val) :
590 fsi_core_mask_set(master, b_mclk, mask, val);
596 static int fsi_set_master_clk(struct device *dev, struct fsi_priv *fsi,
597 long rate, int enable)
599 struct fsi_master *master = fsi_get_master(fsi);
600 set_rate_func set_rate = fsi_get_info_set_rate(master);
601 int fsi_ver = master->core->ver;
604 ret = set_rate(dev, fsi_is_port_a(fsi), rate, enable);
605 if (ret < 0) /* error */
614 switch (ret & SH_FSI_ACKMD_MASK) {
617 case SH_FSI_ACKMD_512:
620 case SH_FSI_ACKMD_256:
623 case SH_FSI_ACKMD_128:
626 case SH_FSI_ACKMD_64:
629 case SH_FSI_ACKMD_32:
631 dev_err(dev, "unsupported ACKMD\n");
637 switch (ret & SH_FSI_BPFMD_MASK) {
640 case SH_FSI_BPFMD_32:
643 case SH_FSI_BPFMD_64:
646 case SH_FSI_BPFMD_128:
649 case SH_FSI_BPFMD_256:
652 case SH_FSI_BPFMD_512:
655 case SH_FSI_BPFMD_16:
657 dev_err(dev, "unsupported ACKMD\n");
663 fsi_reg_mask_set(fsi, CKG1, (ACKMD_MASK | BPFMD_MASK) , data);
672 #define fsi_module_init(m, d) __fsi_module_clk_ctrl(m, d, 1)
673 #define fsi_module_kill(m, d) __fsi_module_clk_ctrl(m, d, 0)
674 static void __fsi_module_clk_ctrl(struct fsi_master *master,
678 pm_runtime_get_sync(dev);
682 fsi_master_mask_set(master, SOFT_RST, FSISR, FSISR);
683 fsi_master_mask_set(master, SOFT_RST, PASR | PBSR, 0);
685 /* clear all registers */
686 fsi_master_mask_set(master, SOFT_RST, FSISR, 0);
689 pm_runtime_put_sync(dev);
692 #define fsi_port_start(f, i) __fsi_port_clk_ctrl(f, i, 1)
693 #define fsi_port_stop(f, i) __fsi_port_clk_ctrl(f, i, 0)
694 static void __fsi_port_clk_ctrl(struct fsi_priv *fsi, int is_play, int enable)
696 struct fsi_master *master = fsi_get_master(fsi);
697 u32 soft = fsi_is_port_a(fsi) ? PASR : PBSR;
698 u32 clk = fsi_is_port_a(fsi) ? CRA : CRB;
699 int is_master = fsi_is_clk_master(fsi);
702 fsi_irq_enable(fsi, is_play);
704 fsi_irq_disable(fsi, is_play);
706 fsi_master_mask_set(master, SOFT_RST, soft, (enable) ? soft : 0);
708 fsi_master_mask_set(master, CLK_RST, clk, (enable) ? clk : 0);
714 static void fsi_fifo_init(struct fsi_priv *fsi,
716 struct snd_soc_dai *dai)
718 struct fsi_master *master = fsi_get_master(fsi);
719 struct fsi_stream *io = fsi_get_stream(fsi, is_play);
723 /* get on-chip RAM capacity */
724 shift = fsi_master_read(master, FIFO_SZ);
725 shift >>= fsi_get_port_shift(fsi, is_play);
726 shift &= FIFO_SZ_MASK;
727 frame_capa = 256 << shift;
728 dev_dbg(dai->dev, "fifo = %d words\n", frame_capa);
731 * The maximum number of sample data varies depending
732 * on the number of channels selected for the format.
734 * FIFOs are used in 4-channel units in 3-channel mode
735 * and in 8-channel units in 5- to 7-channel mode
736 * meaning that more FIFOs than the required size of DPRAM
739 * ex) if 256 words of DP-RAM is connected
740 * 1 channel: 256 (256 x 1 = 256)
741 * 2 channels: 128 (128 x 2 = 256)
742 * 3 channels: 64 ( 64 x 3 = 192)
743 * 4 channels: 64 ( 64 x 4 = 256)
744 * 5 channels: 32 ( 32 x 5 = 160)
745 * 6 channels: 32 ( 32 x 6 = 192)
746 * 7 channels: 32 ( 32 x 7 = 224)
747 * 8 channels: 32 ( 32 x 8 = 256)
749 for (i = 1; i < fsi->chan_num; i <<= 1)
751 dev_dbg(dai->dev, "%d channel %d store\n",
752 fsi->chan_num, frame_capa);
754 io->fifo_sample_capa = fsi_frame2sample(fsi, frame_capa);
757 * set interrupt generation factor
761 fsi_reg_write(fsi, DOFF_CTL, IRQ_HALF);
762 fsi_reg_mask_set(fsi, DOFF_CTL, FIFO_CLR, FIFO_CLR);
764 fsi_reg_write(fsi, DIFF_CTL, IRQ_HALF);
765 fsi_reg_mask_set(fsi, DIFF_CTL, FIFO_CLR, FIFO_CLR);
769 static int fsi_fifo_data_ctrl(struct fsi_priv *fsi, int stream)
771 struct snd_pcm_runtime *runtime;
772 struct snd_pcm_substream *substream = NULL;
773 int is_play = fsi_stream_is_play(stream);
774 struct fsi_stream *io = fsi_get_stream(fsi, is_play);
780 void (*fn)(struct fsi_priv *fsi, int size);
784 !io->substream->runtime)
788 substream = io->substream;
789 runtime = substream->runtime;
791 /* FSI FIFO has limit.
792 * So, this driver can not send periods data at a time
794 if (io->buff_sample_pos >=
795 io->period_samples * (io->period_pos + 1)) {
798 io->period_pos = (io->period_pos + 1) % runtime->periods;
800 if (0 == io->period_pos)
801 io->buff_sample_pos = 0;
804 /* get 1 sample data width */
805 sample_width = samples_to_bytes(runtime, 1);
807 /* get number of residue samples */
808 sample_residues = io->buff_sample_capa - io->buff_sample_pos;
814 * samples_max : number of FSI fifo free samples space
815 * samples : number of ALSA residue samples
817 samples_max = io->fifo_sample_capa;
818 samples_max -= fsi_get_current_fifo_samples(fsi, is_play);
820 samples = sample_residues;
822 switch (sample_width) {
824 fn = fsi_dma_soft_push16;
827 fn = fsi_dma_soft_push32;
836 * samples_max : number of ALSA free samples space
837 * samples : number of samples in FSI fifo
839 samples_max = sample_residues;
840 samples = fsi_get_current_fifo_samples(fsi, is_play);
842 switch (sample_width) {
844 fn = fsi_dma_soft_pop16;
847 fn = fsi_dma_soft_pop32;
854 samples = min(samples, samples_max);
858 /* update buff_sample_pos */
859 io->buff_sample_pos += samples;
862 snd_pcm_period_elapsed(substream);
867 static int fsi_data_pop(struct fsi_priv *fsi)
869 return fsi_fifo_data_ctrl(fsi, SNDRV_PCM_STREAM_CAPTURE);
872 static int fsi_data_push(struct fsi_priv *fsi)
874 return fsi_fifo_data_ctrl(fsi, SNDRV_PCM_STREAM_PLAYBACK);
877 static irqreturn_t fsi_interrupt(int irq, void *data)
879 struct fsi_master *master = data;
880 u32 int_st = fsi_irq_get_status(master);
882 /* clear irq status */
883 fsi_master_mask_set(master, SOFT_RST, IR, 0);
884 fsi_master_mask_set(master, SOFT_RST, IR, IR);
886 if (int_st & AB_IO(1, AO_SHIFT))
887 fsi_data_push(&master->fsia);
888 if (int_st & AB_IO(1, BO_SHIFT))
889 fsi_data_push(&master->fsib);
890 if (int_st & AB_IO(1, AI_SHIFT))
891 fsi_data_pop(&master->fsia);
892 if (int_st & AB_IO(1, BI_SHIFT))
893 fsi_data_pop(&master->fsib);
895 fsi_count_fifo_err(&master->fsia);
896 fsi_count_fifo_err(&master->fsib);
898 fsi_irq_clear_status(&master->fsia);
899 fsi_irq_clear_status(&master->fsib);
908 static int fsi_dai_startup(struct snd_pcm_substream *substream,
909 struct snd_soc_dai *dai)
911 struct fsi_priv *fsi = fsi_get_priv(substream);
912 u32 flags = fsi_get_info_flags(fsi);
914 int is_play = fsi_is_play(substream);
916 pm_runtime_get_sync(dai->dev);
919 if (fsi_is_clk_master(fsi))
922 fsi_reg_mask_set(fsi, CKG1, (DIMD | DOMD), data);
924 /* clock inversion (CKG2) */
926 if (SH_FSI_LRM_INV & flags)
928 if (SH_FSI_BRM_INV & flags)
930 if (SH_FSI_LRS_INV & flags)
932 if (SH_FSI_BRS_INV & flags)
935 fsi_reg_write(fsi, CKG2, data);
938 fsi_reg_write(fsi, DO_FMT, fsi->do_fmt);
939 fsi_reg_write(fsi, DI_FMT, fsi->di_fmt);
942 if (fsi_is_spdif(fsi)) {
943 fsi_spdif_clk_ctrl(fsi, 1);
944 fsi_reg_mask_set(fsi, OUT_SEL, DMMD, DMMD);
948 fsi_irq_disable(fsi, is_play);
949 fsi_irq_clear_status(fsi);
952 fsi_fifo_init(fsi, is_play, dai);
957 static void fsi_dai_shutdown(struct snd_pcm_substream *substream,
958 struct snd_soc_dai *dai)
960 struct fsi_priv *fsi = fsi_get_priv(substream);
962 if (fsi_is_clk_master(fsi))
963 fsi_set_master_clk(dai->dev, fsi, fsi->rate, 0);
967 pm_runtime_put_sync(dai->dev);
970 static int fsi_dai_trigger(struct snd_pcm_substream *substream, int cmd,
971 struct snd_soc_dai *dai)
973 struct fsi_priv *fsi = fsi_get_priv(substream);
974 int is_play = fsi_is_play(substream);
978 case SNDRV_PCM_TRIGGER_START:
979 fsi_stream_push(fsi, is_play, substream);
980 ret = is_play ? fsi_data_push(fsi) : fsi_data_pop(fsi);
981 fsi_port_start(fsi, is_play);
983 case SNDRV_PCM_TRIGGER_STOP:
984 fsi_port_stop(fsi, is_play);
985 fsi_stream_pop(fsi, is_play);
992 static int fsi_set_fmt_dai(struct fsi_priv *fsi, unsigned int fmt)
996 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
997 case SND_SOC_DAIFMT_I2S:
1001 case SND_SOC_DAIFMT_LEFT_J:
1015 static int fsi_set_fmt_spdif(struct fsi_priv *fsi)
1017 struct fsi_master *master = fsi_get_master(fsi);
1020 if (master->core->ver < 2)
1023 data = CR_BWS_16 | CR_DTMD_SPDIF_PCM | CR_PCM;
1033 static int fsi_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
1035 struct fsi_priv *fsi = fsi_get_priv_frm_dai(dai);
1036 struct fsi_master *master = fsi_get_master(fsi);
1037 set_rate_func set_rate = fsi_get_info_set_rate(master);
1038 u32 flags = fsi_get_info_flags(fsi);
1041 /* set master/slave audio interface */
1042 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1043 case SND_SOC_DAIFMT_CBM_CFM:
1044 fsi->clk_master = 1;
1046 case SND_SOC_DAIFMT_CBS_CFS:
1052 if (fsi_is_clk_master(fsi) && !set_rate) {
1053 dev_err(dai->dev, "platform doesn't have set_rate\n");
1058 switch (flags & SH_FSI_FMT_MASK) {
1059 case SH_FSI_FMT_DAI:
1060 ret = fsi_set_fmt_dai(fsi, fmt & SND_SOC_DAIFMT_FORMAT_MASK);
1062 case SH_FSI_FMT_SPDIF:
1063 ret = fsi_set_fmt_spdif(fsi);
1072 static int fsi_dai_hw_params(struct snd_pcm_substream *substream,
1073 struct snd_pcm_hw_params *params,
1074 struct snd_soc_dai *dai)
1076 struct fsi_priv *fsi = fsi_get_priv(substream);
1077 long rate = params_rate(params);
1080 if (!fsi_is_clk_master(fsi))
1083 ret = fsi_set_master_clk(dai->dev, fsi, rate, 1);
1092 static struct snd_soc_dai_ops fsi_dai_ops = {
1093 .startup = fsi_dai_startup,
1094 .shutdown = fsi_dai_shutdown,
1095 .trigger = fsi_dai_trigger,
1096 .set_fmt = fsi_dai_set_fmt,
1097 .hw_params = fsi_dai_hw_params,
1104 static struct snd_pcm_hardware fsi_pcm_hardware = {
1105 .info = SNDRV_PCM_INFO_INTERLEAVED |
1106 SNDRV_PCM_INFO_MMAP |
1107 SNDRV_PCM_INFO_MMAP_VALID |
1108 SNDRV_PCM_INFO_PAUSE,
1109 .formats = FSI_FMTS,
1115 .buffer_bytes_max = 64 * 1024,
1116 .period_bytes_min = 32,
1117 .period_bytes_max = 8192,
1123 static int fsi_pcm_open(struct snd_pcm_substream *substream)
1125 struct snd_pcm_runtime *runtime = substream->runtime;
1128 snd_soc_set_runtime_hwparams(substream, &fsi_pcm_hardware);
1130 ret = snd_pcm_hw_constraint_integer(runtime,
1131 SNDRV_PCM_HW_PARAM_PERIODS);
1136 static int fsi_hw_params(struct snd_pcm_substream *substream,
1137 struct snd_pcm_hw_params *hw_params)
1139 return snd_pcm_lib_malloc_pages(substream,
1140 params_buffer_bytes(hw_params));
1143 static int fsi_hw_free(struct snd_pcm_substream *substream)
1145 return snd_pcm_lib_free_pages(substream);
1148 static snd_pcm_uframes_t fsi_pointer(struct snd_pcm_substream *substream)
1150 struct fsi_priv *fsi = fsi_get_priv(substream);
1151 struct fsi_stream *io = fsi_get_stream(fsi, fsi_is_play(substream));
1152 int samples_pos = io->buff_sample_pos - 1;
1154 if (samples_pos < 0)
1157 return fsi_sample2frame(fsi, samples_pos);
1160 static struct snd_pcm_ops fsi_pcm_ops = {
1161 .open = fsi_pcm_open,
1162 .ioctl = snd_pcm_lib_ioctl,
1163 .hw_params = fsi_hw_params,
1164 .hw_free = fsi_hw_free,
1165 .pointer = fsi_pointer,
1172 #define PREALLOC_BUFFER (32 * 1024)
1173 #define PREALLOC_BUFFER_MAX (32 * 1024)
1175 static void fsi_pcm_free(struct snd_pcm *pcm)
1177 snd_pcm_lib_preallocate_free_for_all(pcm);
1180 static int fsi_pcm_new(struct snd_card *card,
1181 struct snd_soc_dai *dai,
1182 struct snd_pcm *pcm)
1185 * dont use SNDRV_DMA_TYPE_DEV, since it will oops the SH kernel
1186 * in MMAP mode (i.e. aplay -M)
1188 return snd_pcm_lib_preallocate_pages_for_all(
1190 SNDRV_DMA_TYPE_CONTINUOUS,
1191 snd_dma_continuous_data(GFP_KERNEL),
1192 PREALLOC_BUFFER, PREALLOC_BUFFER_MAX);
1199 static struct snd_soc_dai_driver fsi_soc_dai[] = {
1204 .formats = FSI_FMTS,
1210 .formats = FSI_FMTS,
1214 .ops = &fsi_dai_ops,
1220 .formats = FSI_FMTS,
1226 .formats = FSI_FMTS,
1230 .ops = &fsi_dai_ops,
1234 static struct snd_soc_platform_driver fsi_soc_platform = {
1235 .ops = &fsi_pcm_ops,
1236 .pcm_new = fsi_pcm_new,
1237 .pcm_free = fsi_pcm_free,
1244 static int fsi_probe(struct platform_device *pdev)
1246 struct fsi_master *master;
1247 const struct platform_device_id *id_entry;
1248 struct resource *res;
1252 id_entry = pdev->id_entry;
1254 dev_err(&pdev->dev, "unknown fsi device\n");
1258 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1259 irq = platform_get_irq(pdev, 0);
1260 if (!res || (int)irq <= 0) {
1261 dev_err(&pdev->dev, "Not enough FSI platform resources.\n");
1266 master = kzalloc(sizeof(*master), GFP_KERNEL);
1268 dev_err(&pdev->dev, "Could not allocate master\n");
1273 master->base = ioremap_nocache(res->start, resource_size(res));
1274 if (!master->base) {
1276 dev_err(&pdev->dev, "Unable to ioremap FSI registers.\n");
1280 /* master setting */
1282 master->info = pdev->dev.platform_data;
1283 master->core = (struct fsi_core *)id_entry->driver_data;
1284 spin_lock_init(&master->lock);
1287 master->fsia.base = master->base;
1288 master->fsia.master = master;
1291 master->fsib.base = master->base + 0x40;
1292 master->fsib.master = master;
1294 pm_runtime_enable(&pdev->dev);
1295 dev_set_drvdata(&pdev->dev, master);
1297 fsi_module_init(master, &pdev->dev);
1299 ret = request_irq(irq, &fsi_interrupt, IRQF_DISABLED,
1300 id_entry->name, master);
1302 dev_err(&pdev->dev, "irq request err\n");
1306 ret = snd_soc_register_platform(&pdev->dev, &fsi_soc_platform);
1308 dev_err(&pdev->dev, "cannot snd soc register\n");
1312 ret = snd_soc_register_dais(&pdev->dev, fsi_soc_dai,
1313 ARRAY_SIZE(fsi_soc_dai));
1315 dev_err(&pdev->dev, "cannot snd dai register\n");
1322 snd_soc_unregister_platform(&pdev->dev);
1324 free_irq(irq, master);
1326 iounmap(master->base);
1327 pm_runtime_disable(&pdev->dev);
1335 static int fsi_remove(struct platform_device *pdev)
1337 struct fsi_master *master;
1339 master = dev_get_drvdata(&pdev->dev);
1341 fsi_module_kill(master, &pdev->dev);
1343 free_irq(master->irq, master);
1344 pm_runtime_disable(&pdev->dev);
1346 snd_soc_unregister_dais(&pdev->dev, ARRAY_SIZE(fsi_soc_dai));
1347 snd_soc_unregister_platform(&pdev->dev);
1349 iounmap(master->base);
1355 static void __fsi_suspend(struct fsi_priv *fsi,
1358 fsi->saved_do_fmt = fsi_reg_read(fsi, DO_FMT);
1359 fsi->saved_di_fmt = fsi_reg_read(fsi, DI_FMT);
1360 fsi->saved_ckg1 = fsi_reg_read(fsi, CKG1);
1361 fsi->saved_ckg2 = fsi_reg_read(fsi, CKG2);
1362 fsi->saved_out_sel = fsi_reg_read(fsi, OUT_SEL);
1364 if (fsi_is_clk_master(fsi))
1365 fsi_set_master_clk(dev, fsi, fsi->rate, 0);
1368 static void __fsi_resume(struct fsi_priv *fsi,
1371 fsi_reg_write(fsi, DO_FMT, fsi->saved_do_fmt);
1372 fsi_reg_write(fsi, DI_FMT, fsi->saved_di_fmt);
1373 fsi_reg_write(fsi, CKG1, fsi->saved_ckg1);
1374 fsi_reg_write(fsi, CKG2, fsi->saved_ckg2);
1375 fsi_reg_write(fsi, OUT_SEL, fsi->saved_out_sel);
1377 if (fsi_is_clk_master(fsi))
1378 fsi_set_master_clk(dev, fsi, fsi->rate, 1);
1381 static int fsi_suspend(struct device *dev)
1383 struct fsi_master *master = dev_get_drvdata(dev);
1385 pm_runtime_get_sync(dev);
1387 __fsi_suspend(&master->fsia, dev);
1388 __fsi_suspend(&master->fsib, dev);
1390 master->saved_a_mclk = fsi_core_read(master, a_mclk);
1391 master->saved_b_mclk = fsi_core_read(master, b_mclk);
1392 master->saved_iemsk = fsi_core_read(master, iemsk);
1393 master->saved_imsk = fsi_core_read(master, imsk);
1394 master->saved_clk_rst = fsi_master_read(master, CLK_RST);
1395 master->saved_soft_rst = fsi_master_read(master, SOFT_RST);
1397 fsi_module_kill(master, dev);
1399 pm_runtime_put_sync(dev);
1404 static int fsi_resume(struct device *dev)
1406 struct fsi_master *master = dev_get_drvdata(dev);
1408 pm_runtime_get_sync(dev);
1410 fsi_module_init(master, dev);
1412 fsi_master_mask_set(master, SOFT_RST, 0xffff, master->saved_soft_rst);
1413 fsi_master_mask_set(master, CLK_RST, 0xffff, master->saved_clk_rst);
1414 fsi_core_mask_set(master, a_mclk, 0xffff, master->saved_a_mclk);
1415 fsi_core_mask_set(master, b_mclk, 0xffff, master->saved_b_mclk);
1416 fsi_core_mask_set(master, iemsk, 0xffff, master->saved_iemsk);
1417 fsi_core_mask_set(master, imsk, 0xffff, master->saved_imsk);
1419 __fsi_resume(&master->fsia, dev);
1420 __fsi_resume(&master->fsib, dev);
1422 pm_runtime_put_sync(dev);
1427 static int fsi_runtime_nop(struct device *dev)
1429 /* Runtime PM callback shared between ->runtime_suspend()
1430 * and ->runtime_resume(). Simply returns success.
1432 * This driver re-initializes all registers after
1433 * pm_runtime_get_sync() anyway so there is no need
1434 * to save and restore registers here.
1439 static struct dev_pm_ops fsi_pm_ops = {
1440 .suspend = fsi_suspend,
1441 .resume = fsi_resume,
1442 .runtime_suspend = fsi_runtime_nop,
1443 .runtime_resume = fsi_runtime_nop,
1446 static struct fsi_core fsi1_core = {
1455 static struct fsi_core fsi2_core = {
1459 .int_st = CPU_INT_ST,
1462 .a_mclk = A_MST_CTLR,
1463 .b_mclk = B_MST_CTLR,
1466 static struct platform_device_id fsi_id_table[] = {
1467 { "sh_fsi", (kernel_ulong_t)&fsi1_core },
1468 { "sh_fsi2", (kernel_ulong_t)&fsi2_core },
1471 MODULE_DEVICE_TABLE(platform, fsi_id_table);
1473 static struct platform_driver fsi_driver = {
1475 .name = "fsi-pcm-audio",
1479 .remove = fsi_remove,
1480 .id_table = fsi_id_table,
1483 static int __init fsi_mobile_init(void)
1485 return platform_driver_register(&fsi_driver);
1488 static void __exit fsi_mobile_exit(void)
1490 platform_driver_unregister(&fsi_driver);
1493 module_init(fsi_mobile_init);
1494 module_exit(fsi_mobile_exit);
1496 MODULE_LICENSE("GPL");
1497 MODULE_DESCRIPTION("SuperH onchip FSI audio driver");
1498 MODULE_AUTHOR("Kuninori Morimoto <morimoto.kuninori@renesas.com>");
1499 MODULE_ALIAS("platform:fsi-pcm-audio");