2 * Fifo-attached Serial Interface (FSI) support for SH7724
4 * Copyright (C) 2009 Renesas Solutions Corp.
5 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
8 * Copyright (c) 2007 Manuel Lauss <mano@roarinelk.homelinux.net>
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
15 #include <linux/init.h>
16 #include <linux/module.h>
17 #include <linux/platform_device.h>
18 #include <linux/delay.h>
19 #include <linux/list.h>
20 #include <linux/clk.h>
22 #include <sound/core.h>
23 #include <sound/pcm.h>
24 #include <sound/initval.h>
25 #include <sound/soc.h>
26 #include <sound/pcm_params.h>
27 #include <sound/sh_fsi.h>
28 #include <asm/atomic.h>
31 #define DOFF_CTL 0x0004
32 #define DOFF_ST 0x0008
34 #define DIFF_CTL 0x0010
35 #define DIFF_ST 0x0014
40 #define MUTE_ST 0x0028
41 #define REG_END MUTE_ST
47 #define CLK_RST 0x0210
48 #define SOFT_RST 0x0214
49 #define MREG_START INT_ST
50 #define MREG_END SOFT_RST
54 #define CR_FMT(param) ((param) << 4)
56 # define CR_MONO_D 0x1
64 #define IRQ_HALF 0x00100000
65 #define FIFO_CLR 0x00000001
68 #define ERR_OVER 0x00000010
69 #define ERR_UNDER 0x00000001
72 #define B_CLK 0x00000010
73 #define A_CLK 0x00000001
76 #define INT_B_IN (1 << 12)
77 #define INT_B_OUT (1 << 8)
78 #define INT_A_IN (1 << 4)
79 #define INT_A_OUT (1 << 0)
81 #define FSI_RATES SNDRV_PCM_RATE_8000_96000
83 #define FSI_FMTS (SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S16_LE)
85 /************************************************************************
91 ************************************************************************/
94 struct snd_pcm_substream *substream;
109 struct fsi_priv fsia;
110 struct fsi_priv fsib;
111 struct sh_fsi_platform_info *info;
114 static struct fsi_master *master;
116 /************************************************************************
119 basic read write function
122 ************************************************************************/
123 static int __fsi_reg_write(u32 reg, u32 data)
125 /* valid data area is 24bit */
128 return ctrl_outl(data, reg);
131 static u32 __fsi_reg_read(u32 reg)
133 return ctrl_inl(reg);
136 static int __fsi_reg_mask_set(u32 reg, u32 mask, u32 data)
138 u32 val = __fsi_reg_read(reg);
143 return __fsi_reg_write(reg, val);
146 static int fsi_reg_write(struct fsi_priv *fsi, u32 reg, u32 data)
151 return __fsi_reg_write((u32)(fsi->base + reg), data);
154 static u32 fsi_reg_read(struct fsi_priv *fsi, u32 reg)
159 return __fsi_reg_read((u32)(fsi->base + reg));
162 static int fsi_reg_mask_set(struct fsi_priv *fsi, u32 reg, u32 mask, u32 data)
167 return __fsi_reg_mask_set((u32)(fsi->base + reg), mask, data);
170 static int fsi_master_write(u32 reg, u32 data)
172 if ((reg < MREG_START) ||
176 return __fsi_reg_write((u32)(master->base + reg), data);
179 static u32 fsi_master_read(u32 reg)
181 if ((reg < MREG_START) ||
185 return __fsi_reg_read((u32)(master->base + reg));
188 static int fsi_master_mask_set(u32 reg, u32 mask, u32 data)
190 if ((reg < MREG_START) ||
194 return __fsi_reg_mask_set((u32)(master->base + reg), mask, data);
197 /************************************************************************
203 ************************************************************************/
204 static struct fsi_priv *fsi_get(struct snd_pcm_substream *substream)
206 struct snd_soc_pcm_runtime *rtd;
207 struct fsi_priv *fsi = NULL;
209 if (!substream || !master)
212 rtd = substream->private_data;
213 switch (rtd->dai->cpu_dai->id) {
225 static int fsi_is_port_a(struct fsi_priv *fsi)
232 if (fsi == &master->fsia)
238 static u32 fsi_get_info_flags(struct fsi_priv *fsi)
240 int is_porta = fsi_is_port_a(fsi);
242 return is_porta ? master->info->porta_flags :
243 master->info->portb_flags;
246 static int fsi_is_master_mode(struct fsi_priv *fsi, int is_play)
249 u32 flags = fsi_get_info_flags(fsi);
251 mode = is_play ? SH_FSI_OUT_SLAVE_MODE : SH_FSI_IN_SLAVE_MODE;
258 return (mode & flags) != mode;
261 static u32 fsi_port_ab_io_bit(struct fsi_priv *fsi, int is_play)
263 int is_porta = fsi_is_port_a(fsi);
267 data = is_play ? (1 << 0) : (1 << 4);
269 data = is_play ? (1 << 8) : (1 << 12);
274 static void fsi_stream_push(struct fsi_priv *fsi,
275 struct snd_pcm_substream *substream,
279 fsi->substream = substream;
280 fsi->buffer_len = buffer_len;
281 fsi->period_len = period_len;
282 fsi->byte_offset = 0;
286 static void fsi_stream_pop(struct fsi_priv *fsi)
288 fsi->substream = NULL;
291 fsi->byte_offset = 0;
295 static int fsi_get_fifo_residue(struct fsi_priv *fsi, int is_play)
298 u32 reg = is_play ? DOFF_ST : DIFF_ST;
301 status = fsi_reg_read(fsi, reg);
302 residue = 0x1ff & (status >> 8);
303 residue *= fsi->chan;
308 /************************************************************************
314 ************************************************************************/
315 static void fsi_irq_enable(struct fsi_priv *fsi, int is_play)
317 u32 data = fsi_port_ab_io_bit(fsi, is_play);
319 fsi_master_mask_set(IMSK, data, data);
320 fsi_master_mask_set(IEMSK, data, data);
323 static void fsi_irq_disable(struct fsi_priv *fsi, int is_play)
325 u32 data = fsi_port_ab_io_bit(fsi, is_play);
327 fsi_master_mask_set(IMSK, data, 0);
328 fsi_master_mask_set(IEMSK, data, 0);
331 static void fsi_clk_ctrl(struct fsi_priv *fsi, int enable)
333 u32 val = fsi_is_port_a(fsi) ? (1 << 0) : (1 << 4);
336 fsi_master_mask_set(CLK_RST, val, val);
338 fsi_master_mask_set(CLK_RST, val, 0);
341 static void fsi_irq_init(struct fsi_priv *fsi, int is_play)
346 data = fsi_port_ab_io_bit(fsi, is_play);
347 ctrl = is_play ? DOFF_CTL : DIFF_CTL;
350 fsi_irq_disable(fsi, is_play);
352 /* set interrupt generation factor */
353 fsi_reg_write(fsi, ctrl, IRQ_HALF);
356 fsi_reg_mask_set(fsi, ctrl, FIFO_CLR, FIFO_CLR);
358 /* clear interrupt factor */
359 fsi_master_mask_set(INT_ST, data, 0);
362 static void fsi_soft_all_reset(void)
364 u32 status = fsi_master_read(SOFT_RST);
367 status &= 0x000000ff;
368 fsi_master_write(SOFT_RST, status);
372 status &= 0x000000f0;
373 fsi_master_write(SOFT_RST, status);
374 status |= 0x00000001;
375 fsi_master_write(SOFT_RST, status);
379 /* playback interrupt */
380 static int fsi_data_push(struct fsi_priv *fsi)
382 struct snd_pcm_runtime *runtime;
383 struct snd_pcm_substream *substream = NULL;
392 !fsi->substream->runtime)
395 runtime = fsi->substream->runtime;
397 /* FSI FIFO has limit.
398 * So, this driver can not send periods data at a time
400 if (fsi->byte_offset >=
401 fsi->period_len * (fsi->periods + 1)) {
403 substream = fsi->substream;
404 fsi->periods = (fsi->periods + 1) % runtime->periods;
406 if (0 == fsi->periods)
407 fsi->byte_offset = 0;
410 /* get 1 channel data width */
411 width = frames_to_bytes(runtime, 1) / fsi->chan;
413 /* get send size for alsa */
414 send = (fsi->buffer_len - fsi->byte_offset) / width;
416 /* get FIFO free size */
417 fifo_free = (fsi->fifo_max * fsi->chan) - fsi_get_fifo_residue(fsi, 1);
420 if (fifo_free < send)
423 start = runtime->dma_area;
424 start += fsi->byte_offset;
428 for (i = 0; i < send; i++)
429 fsi_reg_write(fsi, DODT,
430 ((u32)*((u16 *)start + i) << 8));
433 for (i = 0; i < send; i++)
434 fsi_reg_write(fsi, DODT, *((u32 *)start + i));
440 fsi->byte_offset += send * width;
442 fsi_irq_enable(fsi, 1);
445 snd_pcm_period_elapsed(substream);
450 static int fsi_data_pop(struct fsi_priv *fsi)
452 struct snd_pcm_runtime *runtime;
453 struct snd_pcm_substream *substream = NULL;
462 !fsi->substream->runtime)
465 runtime = fsi->substream->runtime;
467 /* FSI FIFO has limit.
468 * So, this driver can not send periods data at a time
470 if (fsi->byte_offset >=
471 fsi->period_len * (fsi->periods + 1)) {
473 substream = fsi->substream;
474 fsi->periods = (fsi->periods + 1) % runtime->periods;
476 if (0 == fsi->periods)
477 fsi->byte_offset = 0;
480 /* get 1 channel data width */
481 width = frames_to_bytes(runtime, 1) / fsi->chan;
483 /* get free space for alsa */
484 free = (fsi->buffer_len - fsi->byte_offset) / width;
487 fifo_fill = fsi_get_fifo_residue(fsi, 0);
489 if (free < fifo_fill)
492 start = runtime->dma_area;
493 start += fsi->byte_offset;
497 for (i = 0; i < fifo_fill; i++)
498 *((u16 *)start + i) =
499 (u16)(fsi_reg_read(fsi, DIDT) >> 8);
502 for (i = 0; i < fifo_fill; i++)
503 *((u32 *)start + i) = fsi_reg_read(fsi, DIDT);
509 fsi->byte_offset += fifo_fill * width;
511 fsi_irq_enable(fsi, 0);
514 snd_pcm_period_elapsed(substream);
519 static irqreturn_t fsi_interrupt(int irq, void *data)
521 u32 status = fsi_master_read(SOFT_RST) & ~0x00000010;
522 u32 int_st = fsi_master_read(INT_ST);
524 /* clear irq status */
525 fsi_master_write(SOFT_RST, status);
526 fsi_master_write(SOFT_RST, status | 0x00000010);
528 if (int_st & INT_A_OUT)
529 fsi_data_push(&master->fsia);
530 if (int_st & INT_B_OUT)
531 fsi_data_push(&master->fsib);
532 if (int_st & INT_A_IN)
533 fsi_data_pop(&master->fsia);
534 if (int_st & INT_B_IN)
535 fsi_data_pop(&master->fsib);
537 fsi_master_write(INT_ST, 0x0000000);
542 /************************************************************************
548 ************************************************************************/
549 static int fsi_dai_startup(struct snd_pcm_substream *substream,
550 struct snd_soc_dai *dai)
552 struct fsi_priv *fsi = fsi_get(substream);
554 u32 flags = fsi_get_info_flags(fsi);
558 int is_play = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK);
562 clk_enable(master->clk);
565 data = is_play ? (1 << 0) : (1 << 4);
566 is_master = fsi_is_master_mode(fsi, is_play);
568 fsi_reg_mask_set(fsi, CKG1, data, data);
570 fsi_reg_mask_set(fsi, CKG1, data, 0);
572 /* clock inversion (CKG2) */
574 switch (SH_FSI_INVERSION_MASK & flags) {
588 fsi_reg_write(fsi, CKG2, data);
592 reg = is_play ? DO_FMT : DI_FMT;
593 fmt = is_play ? SH_FSI_GET_OFMT(flags) : SH_FSI_GET_IFMT(flags);
595 case SH_FSI_FMT_MONO:
597 data = CR_FMT(CR_MONO);
600 case SH_FSI_FMT_MONO_DELAY:
602 data = CR_FMT(CR_MONO_D);
607 data = CR_FMT(CR_PCM);
612 data = CR_FMT(CR_I2S);
617 data = CR_FMT(CR_TDM) | (fsi->chan - 1);
618 fsi->chan = is_play ?
619 SH_FSI_GET_CH_O(flags) : SH_FSI_GET_CH_I(flags);
621 case SH_FSI_FMT_TDM_DELAY:
623 data = CR_FMT(CR_TDM_D) | (fsi->chan - 1);
624 fsi->chan = is_play ?
625 SH_FSI_GET_CH_O(flags) : SH_FSI_GET_CH_I(flags);
628 dev_err(dai->dev, "unknown format.\n");
650 dev_err(dai->dev, "channel size error.\n");
654 fsi_reg_write(fsi, reg, data);
657 * clear clk reset if master mode
660 fsi_clk_ctrl(fsi, 1);
663 fsi_irq_init(fsi, is_play);
668 static void fsi_dai_shutdown(struct snd_pcm_substream *substream,
669 struct snd_soc_dai *dai)
671 struct fsi_priv *fsi = fsi_get(substream);
672 int is_play = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
674 fsi_irq_disable(fsi, is_play);
675 fsi_clk_ctrl(fsi, 0);
677 clk_disable(master->clk);
680 static int fsi_dai_trigger(struct snd_pcm_substream *substream, int cmd,
681 struct snd_soc_dai *dai)
683 struct fsi_priv *fsi = fsi_get(substream);
684 struct snd_pcm_runtime *runtime = substream->runtime;
685 int is_play = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
689 case SNDRV_PCM_TRIGGER_START:
690 fsi_stream_push(fsi, substream,
691 frames_to_bytes(runtime, runtime->buffer_size),
692 frames_to_bytes(runtime, runtime->period_size));
693 ret = is_play ? fsi_data_push(fsi) : fsi_data_pop(fsi);
695 case SNDRV_PCM_TRIGGER_STOP:
696 fsi_irq_disable(fsi, is_play);
704 static struct snd_soc_dai_ops fsi_dai_ops = {
705 .startup = fsi_dai_startup,
706 .shutdown = fsi_dai_shutdown,
707 .trigger = fsi_dai_trigger,
710 /************************************************************************
716 ************************************************************************/
717 static struct snd_pcm_hardware fsi_pcm_hardware = {
718 .info = SNDRV_PCM_INFO_INTERLEAVED |
719 SNDRV_PCM_INFO_MMAP |
720 SNDRV_PCM_INFO_MMAP_VALID |
721 SNDRV_PCM_INFO_PAUSE,
728 .buffer_bytes_max = 64 * 1024,
729 .period_bytes_min = 32,
730 .period_bytes_max = 8192,
736 static int fsi_pcm_open(struct snd_pcm_substream *substream)
738 struct snd_pcm_runtime *runtime = substream->runtime;
741 snd_soc_set_runtime_hwparams(substream, &fsi_pcm_hardware);
743 ret = snd_pcm_hw_constraint_integer(runtime,
744 SNDRV_PCM_HW_PARAM_PERIODS);
749 static int fsi_hw_params(struct snd_pcm_substream *substream,
750 struct snd_pcm_hw_params *hw_params)
752 return snd_pcm_lib_malloc_pages(substream,
753 params_buffer_bytes(hw_params));
756 static int fsi_hw_free(struct snd_pcm_substream *substream)
758 return snd_pcm_lib_free_pages(substream);
761 static snd_pcm_uframes_t fsi_pointer(struct snd_pcm_substream *substream)
763 struct snd_pcm_runtime *runtime = substream->runtime;
764 struct fsi_priv *fsi = fsi_get(substream);
767 location = (fsi->byte_offset - 1);
771 return bytes_to_frames(runtime, location);
774 static struct snd_pcm_ops fsi_pcm_ops = {
775 .open = fsi_pcm_open,
776 .ioctl = snd_pcm_lib_ioctl,
777 .hw_params = fsi_hw_params,
778 .hw_free = fsi_hw_free,
779 .pointer = fsi_pointer,
782 /************************************************************************
788 ************************************************************************/
789 #define PREALLOC_BUFFER (32 * 1024)
790 #define PREALLOC_BUFFER_MAX (32 * 1024)
792 static void fsi_pcm_free(struct snd_pcm *pcm)
794 snd_pcm_lib_preallocate_free_for_all(pcm);
797 static int fsi_pcm_new(struct snd_card *card,
798 struct snd_soc_dai *dai,
802 * dont use SNDRV_DMA_TYPE_DEV, since it will oops the SH kernel
803 * in MMAP mode (i.e. aplay -M)
805 return snd_pcm_lib_preallocate_pages_for_all(
807 SNDRV_DMA_TYPE_CONTINUOUS,
808 snd_dma_continuous_data(GFP_KERNEL),
809 PREALLOC_BUFFER, PREALLOC_BUFFER_MAX);
812 /************************************************************************
818 ************************************************************************/
819 struct snd_soc_dai fsi_soc_dai[] = {
855 EXPORT_SYMBOL_GPL(fsi_soc_dai);
857 struct snd_soc_platform fsi_soc_platform = {
859 .pcm_ops = &fsi_pcm_ops,
860 .pcm_new = fsi_pcm_new,
861 .pcm_free = fsi_pcm_free,
863 EXPORT_SYMBOL_GPL(fsi_soc_platform);
865 /************************************************************************
871 ************************************************************************/
872 static int fsi_probe(struct platform_device *pdev)
874 struct resource *res;
879 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
880 irq = platform_get_irq(pdev, 0);
882 dev_err(&pdev->dev, "Not enough FSI platform resources.\n");
887 master = kzalloc(sizeof(*master), GFP_KERNEL);
889 dev_err(&pdev->dev, "Could not allocate master\n");
894 master->base = ioremap_nocache(res->start, resource_size(res));
897 dev_err(&pdev->dev, "Unable to ioremap FSI registers.\n");
902 master->info = pdev->dev.platform_data;
903 master->fsia.base = master->base;
904 master->fsib.base = master->base + 0x40;
906 /* FSI is based on SPU mstp */
907 snprintf(clk_name, sizeof(clk_name), "spu%d", pdev->id);
908 master->clk = clk_get(NULL, clk_name);
909 if (IS_ERR(master->clk)) {
910 dev_err(&pdev->dev, "cannot get %s mstp\n", clk_name);
915 fsi_soc_dai[0].dev = &pdev->dev;
916 fsi_soc_dai[1].dev = &pdev->dev;
918 fsi_soft_all_reset();
920 ret = request_irq(irq, &fsi_interrupt, IRQF_DISABLED, "fsi", master);
922 dev_err(&pdev->dev, "irq request err\n");
926 ret = snd_soc_register_platform(&fsi_soc_platform);
928 dev_err(&pdev->dev, "cannot snd soc register\n");
932 return snd_soc_register_dais(fsi_soc_dai, ARRAY_SIZE(fsi_soc_dai));
935 free_irq(irq, master);
937 iounmap(master->base);
945 static int fsi_remove(struct platform_device *pdev)
947 snd_soc_unregister_dais(fsi_soc_dai, ARRAY_SIZE(fsi_soc_dai));
948 snd_soc_unregister_platform(&fsi_soc_platform);
950 clk_put(master->clk);
952 free_irq(master->irq, master);
954 iounmap(master->base);
960 static struct platform_driver fsi_driver = {
965 .remove = fsi_remove,
968 static int __init fsi_mobile_init(void)
970 return platform_driver_register(&fsi_driver);
973 static void __exit fsi_mobile_exit(void)
975 platform_driver_unregister(&fsi_driver);
977 module_init(fsi_mobile_init);
978 module_exit(fsi_mobile_exit);
980 MODULE_LICENSE("GPL");
981 MODULE_DESCRIPTION("SuperH onchip FSI audio driver");
982 MODULE_AUTHOR("Kuninori Morimoto <morimoto.kuninori@renesas.com>");