2 * soc-cache.c -- ASoC register cache helpers
4 * Copyright 2009 Wolfson Microelectronics PLC.
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
14 #include <linux/i2c.h>
15 #include <linux/spi/spi.h>
16 #include <sound/soc.h>
18 static unsigned int snd_soc_4_12_read(struct snd_soc_codec *codec,
21 u16 *cache = codec->reg_cache;
22 if (reg >= codec->reg_cache_size)
27 static int snd_soc_4_12_write(struct snd_soc_codec *codec, unsigned int reg,
30 u16 *cache = codec->reg_cache;
34 BUG_ON(codec->volatile_register);
36 data[0] = (reg << 4) | ((value >> 8) & 0x000f);
37 data[1] = value & 0x00ff;
39 if (reg < codec->reg_cache_size)
41 ret = codec->hw_write(codec->control_data, data, 2);
50 #if defined(CONFIG_SPI_MASTER)
51 static int snd_soc_4_12_spi_write(void *control_data, const char *data,
54 struct spi_device *spi = control_data;
55 struct spi_transfer t;
66 memset(&t, 0, (sizeof t));
71 spi_message_add_tail(&t, &m);
77 #define snd_soc_4_12_spi_write NULL
80 static unsigned int snd_soc_7_9_read(struct snd_soc_codec *codec,
83 u16 *cache = codec->reg_cache;
84 if (reg >= codec->reg_cache_size)
89 static int snd_soc_7_9_write(struct snd_soc_codec *codec, unsigned int reg,
92 u16 *cache = codec->reg_cache;
96 BUG_ON(codec->volatile_register);
98 data[0] = (reg << 1) | ((value >> 8) & 0x0001);
99 data[1] = value & 0x00ff;
101 if (reg < codec->reg_cache_size)
103 ret = codec->hw_write(codec->control_data, data, 2);
112 #if defined(CONFIG_SPI_MASTER)
113 static int snd_soc_7_9_spi_write(void *control_data, const char *data,
116 struct spi_device *spi = control_data;
117 struct spi_transfer t;
118 struct spi_message m;
127 spi_message_init(&m);
128 memset(&t, 0, (sizeof t));
133 spi_message_add_tail(&t, &m);
139 #define snd_soc_7_9_spi_write NULL
142 static int snd_soc_8_8_write(struct snd_soc_codec *codec, unsigned int reg,
145 u8 *cache = codec->reg_cache;
148 BUG_ON(codec->volatile_register);
150 data[0] = reg & 0xff;
151 data[1] = value & 0xff;
153 if (reg < codec->reg_cache_size)
156 if (codec->hw_write(codec->control_data, data, 2) == 2)
162 static unsigned int snd_soc_8_8_read(struct snd_soc_codec *codec,
165 u8 *cache = codec->reg_cache;
166 if (reg >= codec->reg_cache_size)
171 static int snd_soc_8_16_write(struct snd_soc_codec *codec, unsigned int reg,
174 u16 *reg_cache = codec->reg_cache;
178 data[1] = (value >> 8) & 0xff;
179 data[2] = value & 0xff;
181 if (!snd_soc_codec_volatile_register(codec, reg))
182 reg_cache[reg] = value;
184 if (codec->hw_write(codec->control_data, data, 3) == 3)
190 static unsigned int snd_soc_8_16_read(struct snd_soc_codec *codec,
193 u16 *cache = codec->reg_cache;
195 if (reg >= codec->reg_cache_size ||
196 snd_soc_codec_volatile_register(codec, reg))
197 return codec->hw_read(codec, reg);
202 #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
203 static unsigned int snd_soc_8_16_read_i2c(struct snd_soc_codec *codec,
206 struct i2c_msg xfer[2];
210 struct i2c_client *client = codec->control_data;
213 xfer[0].addr = client->addr;
219 xfer[1].addr = client->addr;
220 xfer[1].flags = I2C_M_RD;
222 xfer[1].buf = (u8 *)&data;
224 ret = i2c_transfer(client->adapter, xfer, 2);
226 dev_err(&client->dev, "i2c_transfer() returned %d\n", ret);
230 return (data >> 8) | ((data & 0xff) << 8);
233 #define snd_soc_8_16_read_i2c NULL
236 #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
237 static unsigned int snd_soc_16_8_read_i2c(struct snd_soc_codec *codec,
240 struct i2c_msg xfer[2];
244 struct i2c_client *client = codec->control_data;
247 xfer[0].addr = client->addr;
250 xfer[0].buf = (u8 *)®
253 xfer[1].addr = client->addr;
254 xfer[1].flags = I2C_M_RD;
258 ret = i2c_transfer(client->adapter, xfer, 2);
260 dev_err(&client->dev, "i2c_transfer() returned %d\n", ret);
267 #define snd_soc_16_8_read_i2c NULL
270 static unsigned int snd_soc_16_8_read(struct snd_soc_codec *codec,
273 u16 *cache = codec->reg_cache;
276 if (reg >= codec->reg_cache_size)
281 static int snd_soc_16_8_write(struct snd_soc_codec *codec, unsigned int reg,
284 u16 *cache = codec->reg_cache;
288 BUG_ON(codec->volatile_register);
290 data[0] = (reg >> 8) & 0xff;
291 data[1] = reg & 0xff;
295 if (reg < codec->reg_cache_size)
297 ret = codec->hw_write(codec->control_data, data, 3);
306 #if defined(CONFIG_SPI_MASTER)
307 static int snd_soc_16_8_spi_write(void *control_data, const char *data,
310 struct spi_device *spi = control_data;
311 struct spi_transfer t;
312 struct spi_message m;
322 spi_message_init(&m);
323 memset(&t, 0, (sizeof t));
328 spi_message_add_tail(&t, &m);
334 #define snd_soc_16_8_spi_write NULL
341 int (*write)(struct snd_soc_codec *codec, unsigned int, unsigned int);
342 int (*spi_write)(void *, const char *, int);
343 unsigned int (*read)(struct snd_soc_codec *, unsigned int);
344 unsigned int (*i2c_read)(struct snd_soc_codec *, unsigned int);
347 .addr_bits = 4, .data_bits = 12,
348 .write = snd_soc_4_12_write, .read = snd_soc_4_12_read,
349 .spi_write = snd_soc_4_12_spi_write,
352 .addr_bits = 7, .data_bits = 9,
353 .write = snd_soc_7_9_write, .read = snd_soc_7_9_read,
354 .spi_write = snd_soc_7_9_spi_write,
357 .addr_bits = 8, .data_bits = 8,
358 .write = snd_soc_8_8_write, .read = snd_soc_8_8_read,
361 .addr_bits = 8, .data_bits = 16,
362 .write = snd_soc_8_16_write, .read = snd_soc_8_16_read,
363 .i2c_read = snd_soc_8_16_read_i2c,
366 .addr_bits = 16, .data_bits = 8,
367 .write = snd_soc_16_8_write, .read = snd_soc_16_8_read,
368 .i2c_read = snd_soc_16_8_read_i2c,
369 .spi_write = snd_soc_16_8_spi_write,
374 * snd_soc_codec_set_cache_io: Set up standard I/O functions.
376 * @codec: CODEC to configure.
377 * @type: Type of cache.
378 * @addr_bits: Number of bits of register address data.
379 * @data_bits: Number of bits of data per register.
380 * @control: Control bus used.
382 * Register formats are frequently shared between many I2C and SPI
383 * devices. In order to promote code reuse the ASoC core provides
384 * some standard implementations of CODEC read and write operations
385 * which can be set up using this function.
387 * The caller is responsible for allocating and initialising the
390 * Note that at present this code cannot be used by CODECs with
391 * volatile registers.
393 int snd_soc_codec_set_cache_io(struct snd_soc_codec *codec,
394 int addr_bits, int data_bits,
395 enum snd_soc_control_type control)
399 for (i = 0; i < ARRAY_SIZE(io_types); i++)
400 if (io_types[i].addr_bits == addr_bits &&
401 io_types[i].data_bits == data_bits)
403 if (i == ARRAY_SIZE(io_types)) {
405 "No I/O functions for %d bit address %d bit data\n",
406 addr_bits, data_bits);
410 codec->write = io_types[i].write;
411 codec->read = io_types[i].read;
418 #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
419 codec->hw_write = (hw_write_t)i2c_master_send;
421 if (io_types[i].i2c_read)
422 codec->hw_read = io_types[i].i2c_read;
426 if (io_types[i].spi_write)
427 codec->hw_write = io_types[i].spi_write;
433 EXPORT_SYMBOL_GPL(snd_soc_codec_set_cache_io);