2 * soc-cache.c -- ASoC register cache helpers
4 * Copyright 2009 Wolfson Microelectronics PLC.
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
14 #include <linux/i2c.h>
15 #include <linux/spi/spi.h>
16 #include <sound/soc.h>
17 #include <linux/lzo.h>
18 #include <linux/bitmap.h>
19 #include <linux/rbtree.h>
21 #include <trace/events/asoc.h>
23 #if defined(CONFIG_SPI_MASTER)
24 static int do_spi_write(void *control_data, const void *msg,
27 struct spi_device *spi = control_data;
28 struct spi_transfer t;
35 memset(&t, 0, sizeof t);
40 spi_message_add_tail(&t, &m);
47 static int do_hw_write(struct snd_soc_codec *codec, unsigned int reg,
48 unsigned int value, const void *data, int len)
52 if (!snd_soc_codec_volatile_register(codec, reg) &&
53 reg < codec->driver->reg_cache_size &&
54 !codec->cache_bypass) {
55 ret = snd_soc_cache_write(codec, reg, value);
60 if (codec->cache_only) {
61 codec->cache_sync = 1;
65 ret = codec->hw_write(codec->control_data, data, len);
74 static unsigned int do_hw_read(struct snd_soc_codec *codec, unsigned int reg)
79 if (reg >= codec->driver->reg_cache_size ||
80 snd_soc_codec_volatile_register(codec, reg) ||
81 codec->cache_bypass) {
82 if (codec->cache_only)
85 BUG_ON(!codec->hw_read);
86 return codec->hw_read(codec, reg);
89 ret = snd_soc_cache_read(codec, reg, &val);
95 static unsigned int snd_soc_4_12_read(struct snd_soc_codec *codec,
98 return do_hw_read(codec, reg);
101 static int snd_soc_4_12_write(struct snd_soc_codec *codec, unsigned int reg,
106 data[0] = (reg << 4) | ((value >> 8) & 0x000f);
107 data[1] = value & 0x00ff;
109 return do_hw_write(codec, reg, value, data, 2);
112 #if defined(CONFIG_SPI_MASTER)
113 static int snd_soc_4_12_spi_write(void *control_data, const char *data,
121 return do_spi_write(control_data, msg, len);
124 #define snd_soc_4_12_spi_write NULL
127 static unsigned int snd_soc_7_9_read(struct snd_soc_codec *codec,
130 return do_hw_read(codec, reg);
133 static int snd_soc_7_9_write(struct snd_soc_codec *codec, unsigned int reg,
138 data[0] = (reg << 1) | ((value >> 8) & 0x0001);
139 data[1] = value & 0x00ff;
141 return do_hw_write(codec, reg, value, data, 2);
144 #if defined(CONFIG_SPI_MASTER)
145 static int snd_soc_7_9_spi_write(void *control_data, const char *data,
153 return do_spi_write(control_data, msg, len);
156 #define snd_soc_7_9_spi_write NULL
159 static int snd_soc_8_8_write(struct snd_soc_codec *codec, unsigned int reg,
166 data[1] = value & 0xff;
168 return do_hw_write(codec, reg, value, data, 2);
171 static unsigned int snd_soc_8_8_read(struct snd_soc_codec *codec,
174 return do_hw_read(codec, reg);
177 #if defined(CONFIG_SPI_MASTER)
178 static int snd_soc_8_8_spi_write(void *control_data, const char *data,
186 return do_spi_write(control_data, msg, len);
189 #define snd_soc_8_8_spi_write NULL
192 static int snd_soc_8_16_write(struct snd_soc_codec *codec, unsigned int reg,
198 data[1] = (value >> 8) & 0xff;
199 data[2] = value & 0xff;
201 return do_hw_write(codec, reg, value, data, 3);
204 static unsigned int snd_soc_8_16_read(struct snd_soc_codec *codec,
207 return do_hw_read(codec, reg);
210 #if defined(CONFIG_SPI_MASTER)
211 static int snd_soc_8_16_spi_write(void *control_data, const char *data,
220 return do_spi_write(control_data, msg, len);
223 #define snd_soc_8_16_spi_write NULL
226 #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
227 static unsigned int do_i2c_read(struct snd_soc_codec *codec,
228 void *reg, int reglen,
229 void *data, int datalen)
231 struct i2c_msg xfer[2];
233 struct i2c_client *client = codec->control_data;
236 xfer[0].addr = client->addr;
238 xfer[0].len = reglen;
242 xfer[1].addr = client->addr;
243 xfer[1].flags = I2C_M_RD;
244 xfer[1].len = datalen;
247 ret = i2c_transfer(client->adapter, xfer, 2);
248 dev_err(&client->dev, "i2c_transfer() returned %d\n", ret);
258 #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
259 static unsigned int snd_soc_8_8_read_i2c(struct snd_soc_codec *codec,
266 ret = do_i2c_read(codec, ®, 1, &data, 1);
272 #define snd_soc_8_8_read_i2c NULL
275 #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
276 static unsigned int snd_soc_8_16_read_i2c(struct snd_soc_codec *codec,
283 ret = do_i2c_read(codec, ®, 1, &data, 2);
286 return (data >> 8) | ((data & 0xff) << 8);
289 #define snd_soc_8_16_read_i2c NULL
292 #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
293 static unsigned int snd_soc_16_8_read_i2c(struct snd_soc_codec *codec,
300 ret = do_i2c_read(codec, ®, 2, &data, 1);
306 #define snd_soc_16_8_read_i2c NULL
309 static unsigned int snd_soc_16_8_read(struct snd_soc_codec *codec,
312 return do_hw_read(codec, reg);
315 static int snd_soc_16_8_write(struct snd_soc_codec *codec, unsigned int reg,
320 data[0] = (reg >> 8) & 0xff;
321 data[1] = reg & 0xff;
325 return do_hw_write(codec, reg, value, data, 3);
328 #if defined(CONFIG_SPI_MASTER)
329 static int snd_soc_16_8_spi_write(void *control_data, const char *data,
338 return do_spi_write(control_data, msg, len);
341 #define snd_soc_16_8_spi_write NULL
344 #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
345 static unsigned int snd_soc_16_16_read_i2c(struct snd_soc_codec *codec,
348 u16 reg = cpu_to_be16(r);
352 ret = do_i2c_read(codec, ®, 2, &data, 2);
355 return be16_to_cpu(data);
358 #define snd_soc_16_16_read_i2c NULL
361 static unsigned int snd_soc_16_16_read(struct snd_soc_codec *codec,
364 return do_hw_read(codec, reg);
367 static int snd_soc_16_16_write(struct snd_soc_codec *codec, unsigned int reg,
372 data[0] = (reg >> 8) & 0xff;
373 data[1] = reg & 0xff;
374 data[2] = (value >> 8) & 0xff;
375 data[3] = value & 0xff;
377 return do_hw_write(codec, reg, value, data, 4);
380 #if defined(CONFIG_SPI_MASTER)
381 static int snd_soc_16_16_spi_write(void *control_data, const char *data,
391 return do_spi_write(control_data, msg, len);
394 #define snd_soc_16_16_spi_write NULL
397 /* Primitive bulk write support for soc-cache. The data pointed to by `data' needs
398 * to already be in the form the hardware expects including any leading register specific
399 * data. Any data written through this function will not go through the cache as it
400 * only handles writing to volatile or out of bounds registers.
402 static int snd_soc_hw_bulk_write_raw(struct snd_soc_codec *codec, unsigned int reg,
403 const void *data, size_t len)
407 /* Ensure that the base register is volatile. Subsequently
408 * any other register that is touched by this routine should be
409 * volatile as well to ensure that we don't get out of sync with
412 if (!snd_soc_codec_volatile_register(codec, reg)
413 && reg < codec->driver->reg_cache_size)
416 switch (codec->control_type) {
418 ret = i2c_master_send(codec->control_data, data, len);
421 ret = do_spi_write(codec->control_data, data, len);
438 int (*write)(struct snd_soc_codec *codec, unsigned int, unsigned int);
439 int (*spi_write)(void *, const char *, int);
440 unsigned int (*read)(struct snd_soc_codec *, unsigned int);
441 unsigned int (*i2c_read)(struct snd_soc_codec *, unsigned int);
444 .addr_bits = 4, .data_bits = 12,
445 .write = snd_soc_4_12_write, .read = snd_soc_4_12_read,
446 .spi_write = snd_soc_4_12_spi_write,
449 .addr_bits = 7, .data_bits = 9,
450 .write = snd_soc_7_9_write, .read = snd_soc_7_9_read,
451 .spi_write = snd_soc_7_9_spi_write,
454 .addr_bits = 8, .data_bits = 8,
455 .write = snd_soc_8_8_write, .read = snd_soc_8_8_read,
456 .i2c_read = snd_soc_8_8_read_i2c,
457 .spi_write = snd_soc_8_8_spi_write,
460 .addr_bits = 8, .data_bits = 16,
461 .write = snd_soc_8_16_write, .read = snd_soc_8_16_read,
462 .i2c_read = snd_soc_8_16_read_i2c,
463 .spi_write = snd_soc_8_16_spi_write,
466 .addr_bits = 16, .data_bits = 8,
467 .write = snd_soc_16_8_write, .read = snd_soc_16_8_read,
468 .i2c_read = snd_soc_16_8_read_i2c,
469 .spi_write = snd_soc_16_8_spi_write,
472 .addr_bits = 16, .data_bits = 16,
473 .write = snd_soc_16_16_write, .read = snd_soc_16_16_read,
474 .i2c_read = snd_soc_16_16_read_i2c,
475 .spi_write = snd_soc_16_16_spi_write,
480 * snd_soc_codec_set_cache_io: Set up standard I/O functions.
482 * @codec: CODEC to configure.
483 * @type: Type of cache.
484 * @addr_bits: Number of bits of register address data.
485 * @data_bits: Number of bits of data per register.
486 * @control: Control bus used.
488 * Register formats are frequently shared between many I2C and SPI
489 * devices. In order to promote code reuse the ASoC core provides
490 * some standard implementations of CODEC read and write operations
491 * which can be set up using this function.
493 * The caller is responsible for allocating and initialising the
496 * Note that at present this code cannot be used by CODECs with
497 * volatile registers.
499 int snd_soc_codec_set_cache_io(struct snd_soc_codec *codec,
500 int addr_bits, int data_bits,
501 enum snd_soc_control_type control)
505 for (i = 0; i < ARRAY_SIZE(io_types); i++)
506 if (io_types[i].addr_bits == addr_bits &&
507 io_types[i].data_bits == data_bits)
509 if (i == ARRAY_SIZE(io_types)) {
511 "No I/O functions for %d bit address %d bit data\n",
512 addr_bits, data_bits);
516 codec->write = io_types[i].write;
517 codec->read = io_types[i].read;
518 codec->bulk_write_raw = snd_soc_hw_bulk_write_raw;
525 #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
526 codec->hw_write = (hw_write_t)i2c_master_send;
528 if (io_types[i].i2c_read)
529 codec->hw_read = io_types[i].i2c_read;
531 codec->control_data = container_of(codec->dev,
537 if (io_types[i].spi_write)
538 codec->hw_write = io_types[i].spi_write;
540 codec->control_data = container_of(codec->dev,
548 EXPORT_SYMBOL_GPL(snd_soc_codec_set_cache_io);
550 static bool snd_soc_set_cache_val(void *base, unsigned int idx,
551 unsigned int val, unsigned int word_size)
556 if (cache[idx] == val)
563 if (cache[idx] == val)
574 static unsigned int snd_soc_get_cache_val(const void *base, unsigned int idx,
575 unsigned int word_size)
579 const u8 *cache = base;
583 const u16 *cache = base;
593 struct snd_soc_rbtree_node {
598 } __attribute__ ((packed));
600 struct snd_soc_rbtree_ctx {
604 static struct snd_soc_rbtree_node *snd_soc_rbtree_lookup(
605 struct rb_root *root, unsigned int reg)
607 struct rb_node *node;
608 struct snd_soc_rbtree_node *rbnode;
610 node = root->rb_node;
612 rbnode = container_of(node, struct snd_soc_rbtree_node, node);
613 if (rbnode->reg < reg)
614 node = node->rb_left;
615 else if (rbnode->reg > reg)
616 node = node->rb_right;
624 static int snd_soc_rbtree_insert(struct rb_root *root,
625 struct snd_soc_rbtree_node *rbnode)
627 struct rb_node **new, *parent;
628 struct snd_soc_rbtree_node *rbnode_tmp;
631 new = &root->rb_node;
633 rbnode_tmp = container_of(*new, struct snd_soc_rbtree_node,
636 if (rbnode_tmp->reg < rbnode->reg)
637 new = &((*new)->rb_left);
638 else if (rbnode_tmp->reg > rbnode->reg)
639 new = &((*new)->rb_right);
644 /* insert the node into the rbtree */
645 rb_link_node(&rbnode->node, parent, new);
646 rb_insert_color(&rbnode->node, root);
651 static int snd_soc_rbtree_cache_sync(struct snd_soc_codec *codec)
653 struct snd_soc_rbtree_ctx *rbtree_ctx;
654 struct rb_node *node;
655 struct snd_soc_rbtree_node *rbnode;
659 rbtree_ctx = codec->reg_cache;
660 for (node = rb_first(&rbtree_ctx->root); node; node = rb_next(node)) {
661 rbnode = rb_entry(node, struct snd_soc_rbtree_node, node);
662 if (rbnode->value == rbnode->defval)
664 ret = snd_soc_cache_read(codec, rbnode->reg, &val);
667 codec->cache_bypass = 1;
668 ret = snd_soc_write(codec, rbnode->reg, val);
669 codec->cache_bypass = 0;
672 dev_dbg(codec->dev, "Synced register %#x, value = %#x\n",
679 static int snd_soc_rbtree_cache_write(struct snd_soc_codec *codec,
680 unsigned int reg, unsigned int value)
682 struct snd_soc_rbtree_ctx *rbtree_ctx;
683 struct snd_soc_rbtree_node *rbnode;
685 rbtree_ctx = codec->reg_cache;
686 rbnode = snd_soc_rbtree_lookup(&rbtree_ctx->root, reg);
688 if (rbnode->value == value)
690 rbnode->value = value;
692 /* bail out early, no need to create the rbnode yet */
696 * for uninitialized registers whose value is changed
697 * from the default zero, create an rbnode and insert
700 rbnode = kzalloc(sizeof *rbnode, GFP_KERNEL);
704 rbnode->value = value;
705 snd_soc_rbtree_insert(&rbtree_ctx->root, rbnode);
711 static int snd_soc_rbtree_cache_read(struct snd_soc_codec *codec,
712 unsigned int reg, unsigned int *value)
714 struct snd_soc_rbtree_ctx *rbtree_ctx;
715 struct snd_soc_rbtree_node *rbnode;
717 rbtree_ctx = codec->reg_cache;
718 rbnode = snd_soc_rbtree_lookup(&rbtree_ctx->root, reg);
720 *value = rbnode->value;
722 /* uninitialized registers default to 0 */
729 static int snd_soc_rbtree_cache_exit(struct snd_soc_codec *codec)
731 struct rb_node *next;
732 struct snd_soc_rbtree_ctx *rbtree_ctx;
733 struct snd_soc_rbtree_node *rbtree_node;
735 /* if we've already been called then just return */
736 rbtree_ctx = codec->reg_cache;
740 /* free up the rbtree */
741 next = rb_first(&rbtree_ctx->root);
743 rbtree_node = rb_entry(next, struct snd_soc_rbtree_node, node);
744 next = rb_next(&rbtree_node->node);
745 rb_erase(&rbtree_node->node, &rbtree_ctx->root);
749 /* release the resources */
750 kfree(codec->reg_cache);
751 codec->reg_cache = NULL;
756 static int snd_soc_rbtree_cache_init(struct snd_soc_codec *codec)
758 struct snd_soc_rbtree_node *rbtree_node;
759 struct snd_soc_rbtree_ctx *rbtree_ctx;
761 unsigned int word_size;
765 codec->reg_cache = kmalloc(sizeof *rbtree_ctx, GFP_KERNEL);
766 if (!codec->reg_cache)
769 rbtree_ctx = codec->reg_cache;
770 rbtree_ctx->root = RB_ROOT;
772 if (!codec->reg_def_copy)
776 * populate the rbtree with the initialized registers. All other
777 * registers will be inserted when they are first modified.
779 word_size = codec->driver->reg_word_size;
780 for (i = 0; i < codec->driver->reg_cache_size; ++i) {
781 val = snd_soc_get_cache_val(codec->reg_def_copy, i, word_size);
784 rbtree_node = kzalloc(sizeof *rbtree_node, GFP_KERNEL);
787 snd_soc_cache_exit(codec);
790 rbtree_node->reg = i;
791 rbtree_node->value = val;
792 rbtree_node->defval = val;
793 snd_soc_rbtree_insert(&rbtree_ctx->root, rbtree_node);
799 #ifdef CONFIG_SND_SOC_CACHE_LZO
800 struct snd_soc_lzo_ctx {
806 size_t decompressed_size;
807 unsigned long *sync_bmp;
811 #define LZO_BLOCK_NUM 8
812 static int snd_soc_lzo_block_count(void)
814 return LZO_BLOCK_NUM;
817 static int snd_soc_lzo_prepare(struct snd_soc_lzo_ctx *lzo_ctx)
819 lzo_ctx->wmem = kmalloc(LZO1X_MEM_COMPRESS, GFP_KERNEL);
825 static int snd_soc_lzo_compress(struct snd_soc_lzo_ctx *lzo_ctx)
827 size_t compress_size;
830 ret = lzo1x_1_compress(lzo_ctx->src, lzo_ctx->src_len,
831 lzo_ctx->dst, &compress_size, lzo_ctx->wmem);
832 if (ret != LZO_E_OK || compress_size > lzo_ctx->dst_len)
834 lzo_ctx->dst_len = compress_size;
838 static int snd_soc_lzo_decompress(struct snd_soc_lzo_ctx *lzo_ctx)
843 dst_len = lzo_ctx->dst_len;
844 ret = lzo1x_decompress_safe(lzo_ctx->src, lzo_ctx->src_len,
845 lzo_ctx->dst, &dst_len);
846 if (ret != LZO_E_OK || dst_len != lzo_ctx->dst_len)
851 static int snd_soc_lzo_compress_cache_block(struct snd_soc_codec *codec,
852 struct snd_soc_lzo_ctx *lzo_ctx)
856 lzo_ctx->dst_len = lzo1x_worst_compress(PAGE_SIZE);
857 lzo_ctx->dst = kmalloc(lzo_ctx->dst_len, GFP_KERNEL);
859 lzo_ctx->dst_len = 0;
863 ret = snd_soc_lzo_compress(lzo_ctx);
869 static int snd_soc_lzo_decompress_cache_block(struct snd_soc_codec *codec,
870 struct snd_soc_lzo_ctx *lzo_ctx)
874 lzo_ctx->dst_len = lzo_ctx->decompressed_size;
875 lzo_ctx->dst = kmalloc(lzo_ctx->dst_len, GFP_KERNEL);
877 lzo_ctx->dst_len = 0;
881 ret = snd_soc_lzo_decompress(lzo_ctx);
887 static inline int snd_soc_lzo_get_blkindex(struct snd_soc_codec *codec,
890 const struct snd_soc_codec_driver *codec_drv;
892 codec_drv = codec->driver;
893 return (reg * codec_drv->reg_word_size) /
894 DIV_ROUND_UP(codec->reg_size, snd_soc_lzo_block_count());
897 static inline int snd_soc_lzo_get_blkpos(struct snd_soc_codec *codec,
900 const struct snd_soc_codec_driver *codec_drv;
902 codec_drv = codec->driver;
903 return reg % (DIV_ROUND_UP(codec->reg_size, snd_soc_lzo_block_count()) /
904 codec_drv->reg_word_size);
907 static inline int snd_soc_lzo_get_blksize(struct snd_soc_codec *codec)
909 const struct snd_soc_codec_driver *codec_drv;
911 codec_drv = codec->driver;
912 return DIV_ROUND_UP(codec->reg_size, snd_soc_lzo_block_count());
915 static int snd_soc_lzo_cache_sync(struct snd_soc_codec *codec)
917 struct snd_soc_lzo_ctx **lzo_blocks;
922 lzo_blocks = codec->reg_cache;
923 for_each_set_bit(i, lzo_blocks[0]->sync_bmp, lzo_blocks[0]->sync_bmp_nbits) {
924 ret = snd_soc_cache_read(codec, i, &val);
927 codec->cache_bypass = 1;
928 ret = snd_soc_write(codec, i, val);
929 codec->cache_bypass = 0;
932 dev_dbg(codec->dev, "Synced register %#x, value = %#x\n",
939 static int snd_soc_lzo_cache_write(struct snd_soc_codec *codec,
940 unsigned int reg, unsigned int value)
942 struct snd_soc_lzo_ctx *lzo_block, **lzo_blocks;
943 int ret, blkindex, blkpos;
944 size_t blksize, tmp_dst_len;
947 /* index of the compressed lzo block */
948 blkindex = snd_soc_lzo_get_blkindex(codec, reg);
949 /* register index within the decompressed block */
950 blkpos = snd_soc_lzo_get_blkpos(codec, reg);
951 /* size of the compressed block */
952 blksize = snd_soc_lzo_get_blksize(codec);
953 lzo_blocks = codec->reg_cache;
954 lzo_block = lzo_blocks[blkindex];
956 /* save the pointer and length of the compressed block */
957 tmp_dst = lzo_block->dst;
958 tmp_dst_len = lzo_block->dst_len;
960 /* prepare the source to be the compressed block */
961 lzo_block->src = lzo_block->dst;
962 lzo_block->src_len = lzo_block->dst_len;
964 /* decompress the block */
965 ret = snd_soc_lzo_decompress_cache_block(codec, lzo_block);
967 kfree(lzo_block->dst);
971 /* write the new value to the cache */
972 if (snd_soc_set_cache_val(lzo_block->dst, blkpos, value,
973 codec->driver->reg_word_size)) {
974 kfree(lzo_block->dst);
978 /* prepare the source to be the decompressed block */
979 lzo_block->src = lzo_block->dst;
980 lzo_block->src_len = lzo_block->dst_len;
982 /* compress the block */
983 ret = snd_soc_lzo_compress_cache_block(codec, lzo_block);
985 kfree(lzo_block->dst);
986 kfree(lzo_block->src);
990 /* set the bit so we know we have to sync this register */
991 set_bit(reg, lzo_block->sync_bmp);
993 kfree(lzo_block->src);
996 lzo_block->dst = tmp_dst;
997 lzo_block->dst_len = tmp_dst_len;
1001 static int snd_soc_lzo_cache_read(struct snd_soc_codec *codec,
1002 unsigned int reg, unsigned int *value)
1004 struct snd_soc_lzo_ctx *lzo_block, **lzo_blocks;
1005 int ret, blkindex, blkpos;
1006 size_t blksize, tmp_dst_len;
1010 /* index of the compressed lzo block */
1011 blkindex = snd_soc_lzo_get_blkindex(codec, reg);
1012 /* register index within the decompressed block */
1013 blkpos = snd_soc_lzo_get_blkpos(codec, reg);
1014 /* size of the compressed block */
1015 blksize = snd_soc_lzo_get_blksize(codec);
1016 lzo_blocks = codec->reg_cache;
1017 lzo_block = lzo_blocks[blkindex];
1019 /* save the pointer and length of the compressed block */
1020 tmp_dst = lzo_block->dst;
1021 tmp_dst_len = lzo_block->dst_len;
1023 /* prepare the source to be the compressed block */
1024 lzo_block->src = lzo_block->dst;
1025 lzo_block->src_len = lzo_block->dst_len;
1027 /* decompress the block */
1028 ret = snd_soc_lzo_decompress_cache_block(codec, lzo_block);
1030 /* fetch the value from the cache */
1031 *value = snd_soc_get_cache_val(lzo_block->dst, blkpos,
1032 codec->driver->reg_word_size);
1034 kfree(lzo_block->dst);
1035 /* restore the pointer and length of the compressed block */
1036 lzo_block->dst = tmp_dst;
1037 lzo_block->dst_len = tmp_dst_len;
1041 static int snd_soc_lzo_cache_exit(struct snd_soc_codec *codec)
1043 struct snd_soc_lzo_ctx **lzo_blocks;
1046 lzo_blocks = codec->reg_cache;
1050 blkcount = snd_soc_lzo_block_count();
1052 * the pointer to the bitmap used for syncing the cache
1053 * is shared amongst all lzo_blocks. Ensure it is freed
1057 kfree(lzo_blocks[0]->sync_bmp);
1058 for (i = 0; i < blkcount; ++i) {
1059 if (lzo_blocks[i]) {
1060 kfree(lzo_blocks[i]->wmem);
1061 kfree(lzo_blocks[i]->dst);
1063 /* each lzo_block is a pointer returned by kmalloc or NULL */
1064 kfree(lzo_blocks[i]);
1067 codec->reg_cache = NULL;
1071 static int snd_soc_lzo_cache_init(struct snd_soc_codec *codec)
1073 struct snd_soc_lzo_ctx **lzo_blocks;
1075 const struct snd_soc_codec_driver *codec_drv;
1076 int ret, tofree, i, blksize, blkcount;
1077 const char *p, *end;
1078 unsigned long *sync_bmp;
1081 codec_drv = codec->driver;
1084 * If we have not been given a default register cache
1085 * then allocate a dummy zero-ed out region, compress it
1086 * and remember to free it afterwards.
1089 if (!codec->reg_def_copy)
1092 if (!codec->reg_def_copy) {
1093 codec->reg_def_copy = kzalloc(codec->reg_size, GFP_KERNEL);
1094 if (!codec->reg_def_copy)
1098 blkcount = snd_soc_lzo_block_count();
1099 codec->reg_cache = kzalloc(blkcount * sizeof *lzo_blocks,
1101 if (!codec->reg_cache) {
1105 lzo_blocks = codec->reg_cache;
1108 * allocate a bitmap to be used when syncing the cache with
1109 * the hardware. Each time a register is modified, the corresponding
1110 * bit is set in the bitmap, so we know that we have to sync
1113 bmp_size = codec_drv->reg_cache_size;
1114 sync_bmp = kmalloc(BITS_TO_LONGS(bmp_size) * sizeof(long),
1120 bitmap_zero(sync_bmp, bmp_size);
1122 /* allocate the lzo blocks and initialize them */
1123 for (i = 0; i < blkcount; ++i) {
1124 lzo_blocks[i] = kzalloc(sizeof **lzo_blocks,
1126 if (!lzo_blocks[i]) {
1131 lzo_blocks[i]->sync_bmp = sync_bmp;
1132 lzo_blocks[i]->sync_bmp_nbits = bmp_size;
1133 /* alloc the working space for the compressed block */
1134 ret = snd_soc_lzo_prepare(lzo_blocks[i]);
1139 blksize = snd_soc_lzo_get_blksize(codec);
1140 p = codec->reg_def_copy;
1141 end = codec->reg_def_copy + codec->reg_size;
1142 /* compress the register map and fill the lzo blocks */
1143 for (i = 0; i < blkcount; ++i, p += blksize) {
1144 lzo_blocks[i]->src = p;
1145 if (p + blksize > end)
1146 lzo_blocks[i]->src_len = end - p;
1148 lzo_blocks[i]->src_len = blksize;
1149 ret = snd_soc_lzo_compress_cache_block(codec,
1153 lzo_blocks[i]->decompressed_size =
1154 lzo_blocks[i]->src_len;
1158 kfree(codec->reg_def_copy);
1159 codec->reg_def_copy = NULL;
1163 snd_soc_cache_exit(codec);
1166 kfree(codec->reg_def_copy);
1167 codec->reg_def_copy = NULL;
1173 static int snd_soc_flat_cache_sync(struct snd_soc_codec *codec)
1177 const struct snd_soc_codec_driver *codec_drv;
1180 codec_drv = codec->driver;
1181 for (i = 0; i < codec_drv->reg_cache_size; ++i) {
1182 ret = snd_soc_cache_read(codec, i, &val);
1185 if (codec->reg_def_copy)
1186 if (snd_soc_get_cache_val(codec->reg_def_copy,
1187 i, codec_drv->reg_word_size) == val)
1189 ret = snd_soc_write(codec, i, val);
1192 dev_dbg(codec->dev, "Synced register %#x, value = %#x\n",
1198 static int snd_soc_flat_cache_write(struct snd_soc_codec *codec,
1199 unsigned int reg, unsigned int value)
1201 snd_soc_set_cache_val(codec->reg_cache, reg, value,
1202 codec->driver->reg_word_size);
1206 static int snd_soc_flat_cache_read(struct snd_soc_codec *codec,
1207 unsigned int reg, unsigned int *value)
1209 *value = snd_soc_get_cache_val(codec->reg_cache, reg,
1210 codec->driver->reg_word_size);
1214 static int snd_soc_flat_cache_exit(struct snd_soc_codec *codec)
1216 if (!codec->reg_cache)
1218 kfree(codec->reg_cache);
1219 codec->reg_cache = NULL;
1223 static int snd_soc_flat_cache_init(struct snd_soc_codec *codec)
1225 const struct snd_soc_codec_driver *codec_drv;
1227 codec_drv = codec->driver;
1229 if (codec->reg_def_copy)
1230 codec->reg_cache = kmemdup(codec->reg_def_copy,
1231 codec->reg_size, GFP_KERNEL);
1233 codec->reg_cache = kzalloc(codec->reg_size, GFP_KERNEL);
1234 if (!codec->reg_cache)
1240 /* an array of all supported compression types */
1241 static const struct snd_soc_cache_ops cache_types[] = {
1242 /* Flat *must* be the first entry for fallback */
1244 .id = SND_SOC_FLAT_COMPRESSION,
1246 .init = snd_soc_flat_cache_init,
1247 .exit = snd_soc_flat_cache_exit,
1248 .read = snd_soc_flat_cache_read,
1249 .write = snd_soc_flat_cache_write,
1250 .sync = snd_soc_flat_cache_sync
1252 #ifdef CONFIG_SND_SOC_CACHE_LZO
1254 .id = SND_SOC_LZO_COMPRESSION,
1256 .init = snd_soc_lzo_cache_init,
1257 .exit = snd_soc_lzo_cache_exit,
1258 .read = snd_soc_lzo_cache_read,
1259 .write = snd_soc_lzo_cache_write,
1260 .sync = snd_soc_lzo_cache_sync
1264 .id = SND_SOC_RBTREE_COMPRESSION,
1266 .init = snd_soc_rbtree_cache_init,
1267 .exit = snd_soc_rbtree_cache_exit,
1268 .read = snd_soc_rbtree_cache_read,
1269 .write = snd_soc_rbtree_cache_write,
1270 .sync = snd_soc_rbtree_cache_sync
1274 int snd_soc_cache_init(struct snd_soc_codec *codec)
1278 for (i = 0; i < ARRAY_SIZE(cache_types); ++i)
1279 if (cache_types[i].id == codec->compress_type)
1282 /* Fall back to flat compression */
1283 if (i == ARRAY_SIZE(cache_types)) {
1284 dev_warn(codec->dev, "Could not match compress type: %d\n",
1285 codec->compress_type);
1289 mutex_init(&codec->cache_rw_mutex);
1290 codec->cache_ops = &cache_types[i];
1292 if (codec->cache_ops->init) {
1293 if (codec->cache_ops->name)
1294 dev_dbg(codec->dev, "Initializing %s cache for %s codec\n",
1295 codec->cache_ops->name, codec->name);
1296 return codec->cache_ops->init(codec);
1302 * NOTE: keep in mind that this function might be called
1305 int snd_soc_cache_exit(struct snd_soc_codec *codec)
1307 if (codec->cache_ops && codec->cache_ops->exit) {
1308 if (codec->cache_ops->name)
1309 dev_dbg(codec->dev, "Destroying %s cache for %s codec\n",
1310 codec->cache_ops->name, codec->name);
1311 return codec->cache_ops->exit(codec);
1317 * snd_soc_cache_read: Fetch the value of a given register from the cache.
1319 * @codec: CODEC to configure.
1320 * @reg: The register index.
1321 * @value: The value to be returned.
1323 int snd_soc_cache_read(struct snd_soc_codec *codec,
1324 unsigned int reg, unsigned int *value)
1328 mutex_lock(&codec->cache_rw_mutex);
1330 if (value && codec->cache_ops && codec->cache_ops->read) {
1331 ret = codec->cache_ops->read(codec, reg, value);
1332 mutex_unlock(&codec->cache_rw_mutex);
1336 mutex_unlock(&codec->cache_rw_mutex);
1339 EXPORT_SYMBOL_GPL(snd_soc_cache_read);
1342 * snd_soc_cache_write: Set the value of a given register in the cache.
1344 * @codec: CODEC to configure.
1345 * @reg: The register index.
1346 * @value: The new register value.
1348 int snd_soc_cache_write(struct snd_soc_codec *codec,
1349 unsigned int reg, unsigned int value)
1353 mutex_lock(&codec->cache_rw_mutex);
1355 if (codec->cache_ops && codec->cache_ops->write) {
1356 ret = codec->cache_ops->write(codec, reg, value);
1357 mutex_unlock(&codec->cache_rw_mutex);
1361 mutex_unlock(&codec->cache_rw_mutex);
1364 EXPORT_SYMBOL_GPL(snd_soc_cache_write);
1367 * snd_soc_cache_sync: Sync the register cache with the hardware.
1369 * @codec: CODEC to configure.
1371 * Any registers that should not be synced should be marked as
1372 * volatile. In general drivers can choose not to use the provided
1373 * syncing functionality if they so require.
1375 int snd_soc_cache_sync(struct snd_soc_codec *codec)
1380 if (!codec->cache_sync) {
1384 if (!codec->cache_ops || !codec->cache_ops->sync)
1387 if (codec->cache_ops->name)
1388 name = codec->cache_ops->name;
1392 if (codec->cache_ops->name)
1393 dev_dbg(codec->dev, "Syncing %s cache for %s codec\n",
1394 codec->cache_ops->name, codec->name);
1395 trace_snd_soc_cache_sync(codec, name, "start");
1396 ret = codec->cache_ops->sync(codec);
1398 codec->cache_sync = 0;
1399 trace_snd_soc_cache_sync(codec, name, "end");
1402 EXPORT_SYMBOL_GPL(snd_soc_cache_sync);
1404 static int snd_soc_get_reg_access_index(struct snd_soc_codec *codec,
1407 const struct snd_soc_codec_driver *codec_drv;
1408 unsigned int min, max, index;
1410 codec_drv = codec->driver;
1412 max = codec_drv->reg_access_size - 1;
1414 index = (min + max) / 2;
1415 if (codec_drv->reg_access_default[index].reg == reg)
1417 if (codec_drv->reg_access_default[index].reg < reg)
1421 } while (min <= max);
1425 int snd_soc_default_volatile_register(struct snd_soc_codec *codec,
1430 if (reg >= codec->driver->reg_cache_size)
1432 index = snd_soc_get_reg_access_index(codec, reg);
1435 return codec->driver->reg_access_default[index].vol;
1437 EXPORT_SYMBOL_GPL(snd_soc_default_volatile_register);
1439 int snd_soc_default_readable_register(struct snd_soc_codec *codec,
1444 if (reg >= codec->driver->reg_cache_size)
1446 index = snd_soc_get_reg_access_index(codec, reg);
1449 return codec->driver->reg_access_default[index].read;
1451 EXPORT_SYMBOL_GPL(snd_soc_default_readable_register);
1453 int snd_soc_default_writable_register(struct snd_soc_codec *codec,
1458 if (reg >= codec->driver->reg_cache_size)
1460 index = snd_soc_get_reg_access_index(codec, reg);
1463 return codec->driver->reg_access_default[index].write;
1465 EXPORT_SYMBOL_GPL(snd_soc_default_writable_register);