2 * soc-cache.c -- ASoC register cache helpers
4 * Copyright 2009 Wolfson Microelectronics PLC.
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
14 #include <linux/i2c.h>
15 #include <linux/spi/spi.h>
16 #include <sound/soc.h>
18 static unsigned int snd_soc_4_12_read(struct snd_soc_codec *codec,
21 u16 *cache = codec->reg_cache;
22 if (reg >= codec->reg_cache_size)
27 static int snd_soc_4_12_write(struct snd_soc_codec *codec, unsigned int reg,
30 u16 *cache = codec->reg_cache;
34 BUG_ON(codec->volatile_register);
36 data[0] = (reg << 4) | ((value >> 8) & 0x000f);
37 data[1] = value & 0x00ff;
39 if (reg < codec->reg_cache_size)
42 if (codec->cache_only) {
43 codec->cache_sync = 1;
47 dev_dbg(codec->dev, "0x%x = 0x%x\n", reg, value);
49 ret = codec->hw_write(codec->control_data, data, 2);
58 #if defined(CONFIG_SPI_MASTER)
59 static int snd_soc_4_12_spi_write(void *control_data, const char *data,
62 struct spi_device *spi = control_data;
63 struct spi_transfer t;
74 memset(&t, 0, (sizeof t));
79 spi_message_add_tail(&t, &m);
85 #define snd_soc_4_12_spi_write NULL
88 static unsigned int snd_soc_7_9_read(struct snd_soc_codec *codec,
91 u16 *cache = codec->reg_cache;
92 if (reg >= codec->reg_cache_size)
97 static int snd_soc_7_9_write(struct snd_soc_codec *codec, unsigned int reg,
100 u16 *cache = codec->reg_cache;
104 BUG_ON(codec->volatile_register);
106 data[0] = (reg << 1) | ((value >> 8) & 0x0001);
107 data[1] = value & 0x00ff;
109 if (reg < codec->reg_cache_size)
112 if (codec->cache_only) {
113 codec->cache_sync = 1;
117 dev_dbg(codec->dev, "0x%x = 0x%x\n", reg, value);
119 ret = codec->hw_write(codec->control_data, data, 2);
128 #if defined(CONFIG_SPI_MASTER)
129 static int snd_soc_7_9_spi_write(void *control_data, const char *data,
132 struct spi_device *spi = control_data;
133 struct spi_transfer t;
134 struct spi_message m;
143 spi_message_init(&m);
144 memset(&t, 0, (sizeof t));
149 spi_message_add_tail(&t, &m);
155 #define snd_soc_7_9_spi_write NULL
158 static int snd_soc_8_8_write(struct snd_soc_codec *codec, unsigned int reg,
161 u8 *cache = codec->reg_cache;
164 BUG_ON(codec->volatile_register);
168 data[1] = value & 0xff;
170 if (reg < codec->reg_cache_size)
173 if (codec->cache_only) {
174 codec->cache_sync = 1;
178 dev_dbg(codec->dev, "0x%x = 0x%x\n", reg, value);
180 if (codec->hw_write(codec->control_data, data, 2) == 2)
186 static unsigned int snd_soc_8_8_read(struct snd_soc_codec *codec,
189 u8 *cache = codec->reg_cache;
191 if (reg >= codec->reg_cache_size)
196 static int snd_soc_8_16_write(struct snd_soc_codec *codec, unsigned int reg,
199 u16 *reg_cache = codec->reg_cache;
203 data[1] = (value >> 8) & 0xff;
204 data[2] = value & 0xff;
206 if (!snd_soc_codec_volatile_register(codec, reg)
207 && reg < codec->reg_cache_size)
208 reg_cache[reg] = value;
210 if (codec->cache_only) {
211 codec->cache_sync = 1;
215 dev_dbg(codec->dev, "0x%x = 0x%x\n", reg, value);
217 if (codec->hw_write(codec->control_data, data, 3) == 3)
223 static unsigned int snd_soc_8_16_read(struct snd_soc_codec *codec,
226 u16 *cache = codec->reg_cache;
228 if (reg >= codec->reg_cache_size ||
229 snd_soc_codec_volatile_register(codec, reg)) {
230 if (codec->cache_only)
233 return codec->hw_read(codec, reg);
239 #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
240 static unsigned int snd_soc_8_8_read_i2c(struct snd_soc_codec *codec,
243 struct i2c_msg xfer[2];
247 struct i2c_client *client = codec->control_data;
250 xfer[0].addr = client->addr;
256 xfer[1].addr = client->addr;
257 xfer[1].flags = I2C_M_RD;
261 ret = i2c_transfer(client->adapter, xfer, 2);
263 dev_err(&client->dev, "i2c_transfer() returned %d\n", ret);
270 #define snd_soc_8_8_read_i2c NULL
273 #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
274 static unsigned int snd_soc_8_16_read_i2c(struct snd_soc_codec *codec,
277 struct i2c_msg xfer[2];
281 struct i2c_client *client = codec->control_data;
284 xfer[0].addr = client->addr;
290 xfer[1].addr = client->addr;
291 xfer[1].flags = I2C_M_RD;
293 xfer[1].buf = (u8 *)&data;
295 ret = i2c_transfer(client->adapter, xfer, 2);
297 dev_err(&client->dev, "i2c_transfer() returned %d\n", ret);
301 return (data >> 8) | ((data & 0xff) << 8);
304 #define snd_soc_8_16_read_i2c NULL
307 #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
308 static unsigned int snd_soc_16_8_read_i2c(struct snd_soc_codec *codec,
311 struct i2c_msg xfer[2];
315 struct i2c_client *client = codec->control_data;
318 xfer[0].addr = client->addr;
321 xfer[0].buf = (u8 *)®
324 xfer[1].addr = client->addr;
325 xfer[1].flags = I2C_M_RD;
329 ret = i2c_transfer(client->adapter, xfer, 2);
331 dev_err(&client->dev, "i2c_transfer() returned %d\n", ret);
338 #define snd_soc_16_8_read_i2c NULL
341 static unsigned int snd_soc_16_8_read(struct snd_soc_codec *codec,
344 u8 *cache = codec->reg_cache;
347 if (reg >= codec->reg_cache_size)
352 static int snd_soc_16_8_write(struct snd_soc_codec *codec, unsigned int reg,
355 u8 *cache = codec->reg_cache;
359 BUG_ON(codec->volatile_register);
361 data[0] = (reg >> 8) & 0xff;
362 data[1] = reg & 0xff;
366 if (reg < codec->reg_cache_size)
369 if (codec->cache_only) {
370 codec->cache_sync = 1;
374 dev_dbg(codec->dev, "0x%x = 0x%x\n", reg, value);
376 ret = codec->hw_write(codec->control_data, data, 3);
385 #if defined(CONFIG_SPI_MASTER)
386 static int snd_soc_16_8_spi_write(void *control_data, const char *data,
389 struct spi_device *spi = control_data;
390 struct spi_transfer t;
391 struct spi_message m;
401 spi_message_init(&m);
402 memset(&t, 0, (sizeof t));
407 spi_message_add_tail(&t, &m);
413 #define snd_soc_16_8_spi_write NULL
416 #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
417 static unsigned int snd_soc_16_16_read_i2c(struct snd_soc_codec *codec,
420 struct i2c_msg xfer[2];
421 u16 reg = cpu_to_be16(r);
424 struct i2c_client *client = codec->control_data;
427 xfer[0].addr = client->addr;
430 xfer[0].buf = (u8 *)®
433 xfer[1].addr = client->addr;
434 xfer[1].flags = I2C_M_RD;
436 xfer[1].buf = (u8 *)&data;
438 ret = i2c_transfer(client->adapter, xfer, 2);
440 dev_err(&client->dev, "i2c_transfer() returned %d\n", ret);
444 return be16_to_cpu(data);
447 #define snd_soc_16_16_read_i2c NULL
450 static unsigned int snd_soc_16_16_read(struct snd_soc_codec *codec,
453 u16 *cache = codec->reg_cache;
455 if (reg >= codec->reg_cache_size ||
456 snd_soc_codec_volatile_register(codec, reg)) {
457 if (codec->cache_only)
460 return codec->hw_read(codec, reg);
466 static int snd_soc_16_16_write(struct snd_soc_codec *codec, unsigned int reg,
469 u16 *cache = codec->reg_cache;
473 data[0] = (reg >> 8) & 0xff;
474 data[1] = reg & 0xff;
475 data[2] = (value >> 8) & 0xff;
476 data[3] = value & 0xff;
478 if (reg < codec->reg_cache_size)
481 if (codec->cache_only) {
482 codec->cache_sync = 1;
486 dev_dbg(codec->dev, "0x%x = 0x%x\n", reg, value);
488 ret = codec->hw_write(codec->control_data, data, 4);
500 int (*write)(struct snd_soc_codec *codec, unsigned int, unsigned int);
501 int (*spi_write)(void *, const char *, int);
502 unsigned int (*read)(struct snd_soc_codec *, unsigned int);
503 unsigned int (*i2c_read)(struct snd_soc_codec *, unsigned int);
506 .addr_bits = 4, .data_bits = 12,
507 .write = snd_soc_4_12_write, .read = snd_soc_4_12_read,
508 .spi_write = snd_soc_4_12_spi_write,
511 .addr_bits = 7, .data_bits = 9,
512 .write = snd_soc_7_9_write, .read = snd_soc_7_9_read,
513 .spi_write = snd_soc_7_9_spi_write,
516 .addr_bits = 8, .data_bits = 8,
517 .write = snd_soc_8_8_write, .read = snd_soc_8_8_read,
518 .i2c_read = snd_soc_8_8_read_i2c,
521 .addr_bits = 8, .data_bits = 16,
522 .write = snd_soc_8_16_write, .read = snd_soc_8_16_read,
523 .i2c_read = snd_soc_8_16_read_i2c,
526 .addr_bits = 16, .data_bits = 8,
527 .write = snd_soc_16_8_write, .read = snd_soc_16_8_read,
528 .i2c_read = snd_soc_16_8_read_i2c,
529 .spi_write = snd_soc_16_8_spi_write,
532 .addr_bits = 16, .data_bits = 16,
533 .write = snd_soc_16_16_write, .read = snd_soc_16_16_read,
534 .i2c_read = snd_soc_16_16_read_i2c,
539 * snd_soc_codec_set_cache_io: Set up standard I/O functions.
541 * @codec: CODEC to configure.
542 * @type: Type of cache.
543 * @addr_bits: Number of bits of register address data.
544 * @data_bits: Number of bits of data per register.
545 * @control: Control bus used.
547 * Register formats are frequently shared between many I2C and SPI
548 * devices. In order to promote code reuse the ASoC core provides
549 * some standard implementations of CODEC read and write operations
550 * which can be set up using this function.
552 * The caller is responsible for allocating and initialising the
555 * Note that at present this code cannot be used by CODECs with
556 * volatile registers.
558 int snd_soc_codec_set_cache_io(struct snd_soc_codec *codec,
559 int addr_bits, int data_bits,
560 enum snd_soc_control_type control)
564 for (i = 0; i < ARRAY_SIZE(io_types); i++)
565 if (io_types[i].addr_bits == addr_bits &&
566 io_types[i].data_bits == data_bits)
568 if (i == ARRAY_SIZE(io_types)) {
570 "No I/O functions for %d bit address %d bit data\n",
571 addr_bits, data_bits);
575 codec->write = io_types[i].write;
576 codec->read = io_types[i].read;
583 #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
584 codec->hw_write = (hw_write_t)i2c_master_send;
586 if (io_types[i].i2c_read)
587 codec->hw_read = io_types[i].i2c_read;
591 if (io_types[i].spi_write)
592 codec->hw_write = io_types[i].spi_write;
598 EXPORT_SYMBOL_GPL(snd_soc_codec_set_cache_io);