sound/x86/intel_hdmi_audio.c

   1 /*
   2  *   intel_hdmi_audio.c - Intel HDMI audio driver
   3  *
   4  *  Copyright (C) 2016 Intel Corp
   5  *  Authors:    Sailaja Bandarupalli <sailaja.bandarupalli@intel.com>
   6  *              Ramesh Babu K V <ramesh.babu@intel.com>
   7  *              Vaibhav Agarwal <vaibhav.agarwal@intel.com>
   8  *              Jerome Anand <jerome.anand@intel.com>
   9  *  ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  10  *
  11  *  This program is free software; you can redistribute it and/or modify
  12  *  it under the terms of the GNU General Public License as published by
  13  *  the Free Software Foundation; version 2 of the License.
  14  *
  15  *  This program is distributed in the hope that it will be useful, but
  16  *  WITHOUT ANY WARRANTY; without even the implied warranty of
  17  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  18  *  General Public License for more details.
  19  *
  20  * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  21  * ALSA driver for Intel HDMI audio
  22  */
  23
  24 #include <linux/platform_device.h>
  25 #include <linux/io.h>
  26 #include <linux/slab.h>
  27 #include <linux/module.h>
  28 #include <linux/interrupt.h>
  29 #include <linux/acpi.h>
  30 #include <asm/cacheflush.h>
  31 #include <sound/pcm.h>
  32 #include <sound/core.h>
  33 #include <sound/pcm_params.h>
  34 #include <sound/initval.h>
  35 #include <sound/control.h>
  36 #include <sound/initval.h>
  37 #include <drm/intel_lpe_audio.h>
  38 #include "intel_hdmi_audio.h"
  39
  40 /*standard module options for ALSA. This module supports only one card*/
  41 static int hdmi_card_index = SNDRV_DEFAULT_IDX1;
  42 static char *hdmi_card_id = SNDRV_DEFAULT_STR1;
  43
  44 module_param_named(index, hdmi_card_index, int, 0444);
  45 MODULE_PARM_DESC(index,
  46                 "Index value for INTEL Intel HDMI Audio controller.");
  47 module_param_named(id, hdmi_card_id, charp, 0444);
  48 MODULE_PARM_DESC(id,
  49                 "ID string for INTEL Intel HDMI Audio controller.");
  50
  51 /*
  52  * ELD SA bits in the CEA Speaker Allocation data block
  53  */
  54 static const int eld_speaker_allocation_bits[] = {
  55         [0] = FL | FR,
  56         [1] = LFE,
  57         [2] = FC,
  58         [3] = RL | RR,
  59         [4] = RC,
  60         [5] = FLC | FRC,
  61         [6] = RLC | RRC,
  62         /* the following are not defined in ELD yet */
  63         [7] = 0,
  64 };
  65
  66 /*
  67  * This is an ordered list!
  68  *
  69  * The preceding ones have better chances to be selected by
  70  * hdmi_channel_allocation().
  71  */
  72 static struct cea_channel_speaker_allocation channel_allocations[] = {
  73 /*                        channel:   7     6    5    4    3     2    1    0  */
  74 { .ca_index = 0x00,  .speakers = {   0,    0,   0,   0,   0,    0,  FR,  FL } },
  75                                 /* 2.1 */
  76 { .ca_index = 0x01,  .speakers = {   0,    0,   0,   0,   0,  LFE,  FR,  FL } },
  77                                 /* Dolby Surround */
  78 { .ca_index = 0x02,  .speakers = {   0,    0,   0,   0,  FC,    0,  FR,  FL } },
  79                                 /* surround40 */
  80 { .ca_index = 0x08,  .speakers = {   0,    0,  RR,  RL,   0,    0,  FR,  FL } },
  81                                 /* surround41 */
  82 { .ca_index = 0x09,  .speakers = {   0,    0,  RR,  RL,   0,  LFE,  FR,  FL } },
  83                                 /* surround50 */
  84 { .ca_index = 0x0a,  .speakers = {   0,    0,  RR,  RL,  FC,    0,  FR,  FL } },
  85                                 /* surround51 */
  86 { .ca_index = 0x0b,  .speakers = {   0,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
  87                                 /* 6.1 */
  88 { .ca_index = 0x0f,  .speakers = {   0,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
  89                                 /* surround71 */
  90 { .ca_index = 0x13,  .speakers = { RRC,  RLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
  91
  92 { .ca_index = 0x03,  .speakers = {   0,    0,   0,   0,  FC,  LFE,  FR,  FL } },
  93 { .ca_index = 0x04,  .speakers = {   0,    0,   0,  RC,   0,    0,  FR,  FL } },
  94 { .ca_index = 0x05,  .speakers = {   0,    0,   0,  RC,   0,  LFE,  FR,  FL } },
  95 { .ca_index = 0x06,  .speakers = {   0,    0,   0,  RC,  FC,    0,  FR,  FL } },
  96 { .ca_index = 0x07,  .speakers = {   0,    0,   0,  RC,  FC,  LFE,  FR,  FL } },
  97 { .ca_index = 0x0c,  .speakers = {   0,   RC,  RR,  RL,   0,    0,  FR,  FL } },
  98 { .ca_index = 0x0d,  .speakers = {   0,   RC,  RR,  RL,   0,  LFE,  FR,  FL } },
  99 { .ca_index = 0x0e,  .speakers = {   0,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 100 { .ca_index = 0x10,  .speakers = { RRC,  RLC,  RR,  RL,   0,    0,  FR,  FL } },
 101 { .ca_index = 0x11,  .speakers = { RRC,  RLC,  RR,  RL,   0,  LFE,  FR,  FL } },
 102 { .ca_index = 0x12,  .speakers = { RRC,  RLC,  RR,  RL,  FC,    0,  FR,  FL } },
 103 { .ca_index = 0x14,  .speakers = { FRC,  FLC,   0,   0,   0,    0,  FR,  FL } },
 104 { .ca_index = 0x15,  .speakers = { FRC,  FLC,   0,   0,   0,  LFE,  FR,  FL } },
 105 { .ca_index = 0x16,  .speakers = { FRC,  FLC,   0,   0,  FC,    0,  FR,  FL } },
 106 { .ca_index = 0x17,  .speakers = { FRC,  FLC,   0,   0,  FC,  LFE,  FR,  FL } },
 107 { .ca_index = 0x18,  .speakers = { FRC,  FLC,   0,  RC,   0,    0,  FR,  FL } },
 108 { .ca_index = 0x19,  .speakers = { FRC,  FLC,   0,  RC,   0,  LFE,  FR,  FL } },
 109 { .ca_index = 0x1a,  .speakers = { FRC,  FLC,   0,  RC,  FC,    0,  FR,  FL } },
 110 { .ca_index = 0x1b,  .speakers = { FRC,  FLC,   0,  RC,  FC,  LFE,  FR,  FL } },
 111 { .ca_index = 0x1c,  .speakers = { FRC,  FLC,  RR,  RL,   0,    0,  FR,  FL } },
 112 { .ca_index = 0x1d,  .speakers = { FRC,  FLC,  RR,  RL,   0,  LFE,  FR,  FL } },
 113 { .ca_index = 0x1e,  .speakers = { FRC,  FLC,  RR,  RL,  FC,    0,  FR,  FL } },
 114 { .ca_index = 0x1f,  .speakers = { FRC,  FLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 115 };
 116
 117 static const struct channel_map_table map_tables[] = {
 118         { SNDRV_CHMAP_FL,       0x00,   FL },
 119         { SNDRV_CHMAP_FR,       0x01,   FR },
 120         { SNDRV_CHMAP_RL,       0x04,   RL },
 121         { SNDRV_CHMAP_RR,       0x05,   RR },
 122         { SNDRV_CHMAP_LFE,      0x02,   LFE },
 123         { SNDRV_CHMAP_FC,       0x03,   FC },
 124         { SNDRV_CHMAP_RLC,      0x06,   RLC },
 125         { SNDRV_CHMAP_RRC,      0x07,   RRC },
 126         {} /* terminator */
 127 };
 128
 129 /* hardware capability structure */
 130 static const struct snd_pcm_hardware snd_intel_hadstream = {
 131         .info = (SNDRV_PCM_INFO_INTERLEAVED |
 132                 SNDRV_PCM_INFO_DOUBLE |
 133                 SNDRV_PCM_INFO_MMAP|
 134                 SNDRV_PCM_INFO_MMAP_VALID |
 135                 SNDRV_PCM_INFO_BATCH),
 136         .formats = (SNDRV_PCM_FMTBIT_S24 |
 137                 SNDRV_PCM_FMTBIT_U24),
 138         .rates = SNDRV_PCM_RATE_32000 |
 139                 SNDRV_PCM_RATE_44100 |
 140                 SNDRV_PCM_RATE_48000 |
 141                 SNDRV_PCM_RATE_88200 |
 142                 SNDRV_PCM_RATE_96000 |
 143                 SNDRV_PCM_RATE_176400 |
 144                 SNDRV_PCM_RATE_192000,
 145         .rate_min = HAD_MIN_RATE,
 146         .rate_max = HAD_MAX_RATE,
 147         .channels_min = HAD_MIN_CHANNEL,
 148         .channels_max = HAD_MAX_CHANNEL,
 149         .buffer_bytes_max = HAD_MAX_BUFFER,
 150         .period_bytes_min = HAD_MIN_PERIOD_BYTES,
 151         .period_bytes_max = HAD_MAX_PERIOD_BYTES,
 152         .periods_min = HAD_MIN_PERIODS,
 153         .periods_max = HAD_MAX_PERIODS,
 154         .fifo_size = HAD_FIFO_SIZE,
 155 };
 156
 157 /* Get the active PCM substream;
 158  * Call had_substream_put() for unreferecing.
 159  * Don't call this inside had_spinlock, as it takes by itself
 160  */
 161 static struct snd_pcm_substream *
 162 had_substream_get(struct snd_intelhad *intelhaddata)
 163 {
 164         struct snd_pcm_substream *substream;
 165         unsigned long flags;
 166
 167         spin_lock_irqsave(&intelhaddata->had_spinlock, flags);
 168         substream = intelhaddata->stream_info.substream;
 169         if (substream)
 170                 intelhaddata->stream_info.substream_refcount++;
 171         spin_unlock_irqrestore(&intelhaddata->had_spinlock, flags);
 172         return substream;
 173 }
 174
 175 /* Unref the active PCM substream;
 176  * Don't call this inside had_spinlock, as it takes by itself
 177  */
 178 static void had_substream_put(struct snd_intelhad *intelhaddata)
 179 {
 180         unsigned long flags;
 181
 182         spin_lock_irqsave(&intelhaddata->had_spinlock, flags);
 183         intelhaddata->stream_info.substream_refcount--;
 184         spin_unlock_irqrestore(&intelhaddata->had_spinlock, flags);
 185 }
 186
 187 /* Register access functions */
 188 static inline void
 189 mid_hdmi_audio_read(struct snd_intelhad *ctx, u32 reg, u32 *val)
 190 {
 191         *val = ioread32(ctx->mmio_start + ctx->had_config_offset + reg);
 192 }
 193
 194 static inline void
 195 mid_hdmi_audio_write(struct snd_intelhad *ctx, u32 reg, u32 val)
 196 {
 197         iowrite32(val, ctx->mmio_start + ctx->had_config_offset + reg);
 198 }
 199
 200 static int had_read_register(struct snd_intelhad *intelhaddata,
 201                              u32 offset, u32 *data)
 202 {
 203         if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED)
 204                 return -ENODEV;
 205
 206         mid_hdmi_audio_read(intelhaddata, offset, data);
 207         return 0;
 208 }
 209
 210 static void fixup_dp_config(struct snd_intelhad *intelhaddata,
 211                             u32 offset, u32 *data)
 212 {
 213         if (intelhaddata->dp_output) {
 214                 if (offset == AUD_CONFIG && (*data & AUD_CONFIG_VALID_BIT))
 215                         *data |= AUD_CONFIG_DP_MODE | AUD_CONFIG_BLOCK_BIT;
 216         }
 217 }
 218
 219 static int had_write_register(struct snd_intelhad *intelhaddata,
 220                               u32 offset, u32 data)
 221 {
 222         if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED)
 223                 return -ENODEV;
 224
 225         fixup_dp_config(intelhaddata, offset, &data);
 226         mid_hdmi_audio_write(intelhaddata, offset, data);
 227         return 0;
 228 }
 229
 230 static int had_read_modify(struct snd_intelhad *intelhaddata, u32 offset,
 231                            u32 data, u32 mask)
 232 {
 233         u32 val_tmp;
 234
 235         if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED)
 236                 return -ENODEV;
 237
 238         mid_hdmi_audio_read(intelhaddata, offset, &val_tmp);
 239         val_tmp &= ~mask;
 240         val_tmp |= (data & mask);
 241
 242         fixup_dp_config(intelhaddata, offset, &val_tmp);
 243         mid_hdmi_audio_write(intelhaddata, offset, val_tmp);
 244         return 0;
 245 }
 246
 247 /*
 248  * enable / disable audio configuration
 249  *
 250  * The had_read_modify() function should not directly be used on VLV2 for
 251  * updating AUD_CONFIG register.
 252  * This is because:
 253  * Bit6 of AUD_CONFIG register is writeonly due to a silicon bug on VLV2
 254  * HDMI IP. As a result a read-modify of AUD_CONFIG regiter will always
 255  * clear bit6. AUD_CONFIG[6:4] represents the "channels" field of the
 256  * register. This field should be 1xy binary for configuration with 6 or
 257  * more channels. Read-modify of AUD_CONFIG (Eg. for enabling audio)
 258  * causes the "channels" field to be updated as 0xy binary resulting in
 259  * bad audio. The fix is to always write the AUD_CONFIG[6:4] with
 260  * appropriate value when doing read-modify of AUD_CONFIG register.
 261  */
 262 static void snd_intelhad_enable_audio(struct snd_pcm_substream *substream,
 263                                       struct snd_intelhad *intelhaddata,
 264                                       bool enable)
 265 {
 266         union aud_cfg cfg_val = {.cfg_regval = 0};
 267         u8 channels, data, mask;
 268
 269         /*
 270          * If substream is NULL, there is no active stream.
 271          * In this case just set channels to 2
 272          */
 273         channels = substream ? substream->runtime->channels : 2;
 274         cfg_val.cfg_regx.num_ch = channels - 2;
 275
 276         data = cfg_val.cfg_regval;
 277         if (enable)
 278                 data |= 1;
 279         mask = AUD_CONFIG_CH_MASK | 1;
 280
 281         dev_dbg(intelhaddata->dev, "%s : data = %x, mask =%x\n",
 282                 __func__, data, mask);
 283
 284         had_read_modify(intelhaddata, AUD_CONFIG, data, mask);
 285 }
 286
 287 /* enable / disable the audio interface */
 288 static void snd_intelhad_enable_audio_int(struct snd_intelhad *ctx, bool enable)
 289 {
 290         u32 status_reg;
 291
 292         if (enable) {
 293                 mid_hdmi_audio_read(ctx, AUD_HDMI_STATUS, &status_reg);
 294                 status_reg |= HDMI_AUDIO_BUFFER_DONE | HDMI_AUDIO_UNDERRUN;
 295                 mid_hdmi_audio_write(ctx, AUD_HDMI_STATUS, status_reg);
 296                 mid_hdmi_audio_read(ctx, AUD_HDMI_STATUS, &status_reg);
 297         }
 298 }
 299
 300 static void snd_intelhad_reset_audio(struct snd_intelhad *intelhaddata,
 301                                      u8 reset)
 302 {
 303         had_write_register(intelhaddata, AUD_HDMI_STATUS, reset);
 304 }
 305
 306 /*
 307  * initialize audio channel status registers
 308  * This function is called in the prepare callback
 309  */
 310 static int had_prog_status_reg(struct snd_pcm_substream *substream,
 311                         struct snd_intelhad *intelhaddata)
 312 {
 313         union aud_cfg cfg_val = {.cfg_regval = 0};
 314         union aud_ch_status_0 ch_stat0 = {.status_0_regval = 0};
 315         union aud_ch_status_1 ch_stat1 = {.status_1_regval = 0};
 316         int format;
 317
 318         ch_stat0.status_0_regx.lpcm_id = (intelhaddata->aes_bits &
 319                                           IEC958_AES0_NONAUDIO) >> 1;
 320         ch_stat0.status_0_regx.clk_acc = (intelhaddata->aes_bits &
 321                                           IEC958_AES3_CON_CLOCK) >> 4;
 322         cfg_val.cfg_regx.val_bit = ch_stat0.status_0_regx.lpcm_id;
 323
 324         switch (substream->runtime->rate) {
 325         case AUD_SAMPLE_RATE_32:
 326                 ch_stat0.status_0_regx.samp_freq = CH_STATUS_MAP_32KHZ;
 327                 break;
 328
 329         case AUD_SAMPLE_RATE_44_1:
 330                 ch_stat0.status_0_regx.samp_freq = CH_STATUS_MAP_44KHZ;
 331                 break;
 332         case AUD_SAMPLE_RATE_48:
 333                 ch_stat0.status_0_regx.samp_freq = CH_STATUS_MAP_48KHZ;
 334                 break;
 335         case AUD_SAMPLE_RATE_88_2:
 336                 ch_stat0.status_0_regx.samp_freq = CH_STATUS_MAP_88KHZ;
 337                 break;
 338         case AUD_SAMPLE_RATE_96:
 339                 ch_stat0.status_0_regx.samp_freq = CH_STATUS_MAP_96KHZ;
 340                 break;
 341         case AUD_SAMPLE_RATE_176_4:
 342                 ch_stat0.status_0_regx.samp_freq = CH_STATUS_MAP_176KHZ;
 343                 break;
 344         case AUD_SAMPLE_RATE_192:
 345                 ch_stat0.status_0_regx.samp_freq = CH_STATUS_MAP_192KHZ;
 346                 break;
 347
 348         default:
 349                 /* control should never come here */
 350                 return -EINVAL;
 351         }
 352
 353         had_write_register(intelhaddata,
 354                            AUD_CH_STATUS_0, ch_stat0.status_0_regval);
 355
 356         format = substream->runtime->format;
 357
 358         if (format == SNDRV_PCM_FORMAT_S16_LE) {
 359                 ch_stat1.status_1_regx.max_wrd_len = MAX_SMPL_WIDTH_20;
 360                 ch_stat1.status_1_regx.wrd_len = SMPL_WIDTH_16BITS;
 361         } else if (format == SNDRV_PCM_FORMAT_S24_LE) {
 362                 ch_stat1.status_1_regx.max_wrd_len = MAX_SMPL_WIDTH_24;
 363                 ch_stat1.status_1_regx.wrd_len = SMPL_WIDTH_24BITS;
 364         } else {
 365                 ch_stat1.status_1_regx.max_wrd_len = 0;
 366                 ch_stat1.status_1_regx.wrd_len = 0;
 367         }
 368
 369         had_write_register(intelhaddata,
 370                            AUD_CH_STATUS_1, ch_stat1.status_1_regval);
 371         return 0;
 372 }
 373
 374 /*
 375  * function to initialize audio
 376  * registers and buffer confgiuration registers
 377  * This function is called in the prepare callback
 378  */
 379 static int snd_intelhad_audio_ctrl(struct snd_pcm_substream *substream,
 380                                    struct snd_intelhad *intelhaddata)
 381 {
 382         union aud_cfg cfg_val = {.cfg_regval = 0};
 383         union aud_buf_config buf_cfg = {.buf_cfgval = 0};
 384         u8 channels;
 385
 386         had_prog_status_reg(substream, intelhaddata);
 387
 388         buf_cfg.buf_cfg_regx.audio_fifo_watermark = FIFO_THRESHOLD;
 389         buf_cfg.buf_cfg_regx.dma_fifo_watermark = DMA_FIFO_THRESHOLD;
 390         buf_cfg.buf_cfg_regx.aud_delay = 0;
 391         had_write_register(intelhaddata, AUD_BUF_CONFIG, buf_cfg.buf_cfgval);
 392
 393         channels = substream->runtime->channels;
 394         cfg_val.cfg_regx.num_ch = channels - 2;
 395         if (channels <= 2)
 396                 cfg_val.cfg_regx.layout = LAYOUT0;
 397         else
 398                 cfg_val.cfg_regx.layout = LAYOUT1;
 399
 400         cfg_val.cfg_regx.val_bit = 1;
 401         had_write_register(intelhaddata, AUD_CONFIG, cfg_val.cfg_regval);
 402         return 0;
 403 }
 404
 405 /*
 406  * Compute derived values in channel_allocations[].
 407  */
 408 static void init_channel_allocations(void)
 409 {
 410         int i, j;
 411         struct cea_channel_speaker_allocation *p;
 412
 413         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 414                 p = channel_allocations + i;
 415                 p->channels = 0;
 416                 p->spk_mask = 0;
 417                 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
 418                         if (p->speakers[j]) {
 419                                 p->channels++;
 420                                 p->spk_mask |= p->speakers[j];
 421                         }
 422         }
 423 }
 424
 425 /*
 426  * The transformation takes two steps:
 427  *
 428  *      eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
 429  *            spk_mask => (channel_allocations[])         => ai->CA
 430  *
 431  * TODO: it could select the wrong CA from multiple candidates.
 432  */
 433 static int snd_intelhad_channel_allocation(struct snd_intelhad *intelhaddata,
 434                                         int channels)
 435 {
 436         int i;
 437         int ca = 0;
 438         int spk_mask = 0;
 439
 440         /*
 441          * CA defaults to 0 for basic stereo audio
 442          */
 443         if (channels <= 2)
 444                 return 0;
 445
 446         /*
 447          * expand ELD's speaker allocation mask
 448          *
 449          * ELD tells the speaker mask in a compact(paired) form,
 450          * expand ELD's notions to match the ones used by Audio InfoFrame.
 451          */
 452
 453         for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
 454                 if (intelhaddata->eld.speaker_allocation_block & (1 << i))
 455                         spk_mask |= eld_speaker_allocation_bits[i];
 456         }
 457
 458         /* search for the first working match in the CA table */
 459         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 460                 if (channels == channel_allocations[i].channels &&
 461                 (spk_mask & channel_allocations[i].spk_mask) ==
 462                                 channel_allocations[i].spk_mask) {
 463                         ca = channel_allocations[i].ca_index;
 464                         break;
 465                 }
 466         }
 467
 468         dev_dbg(intelhaddata->dev, "select CA 0x%x for %d\n", ca, channels);
 469
 470         return ca;
 471 }
 472
 473 /* from speaker bit mask to ALSA API channel position */
 474 static int spk_to_chmap(int spk)
 475 {
 476         const struct channel_map_table *t = map_tables;
 477
 478         for (; t->map; t++) {
 479                 if (t->spk_mask == spk)
 480                         return t->map;
 481         }
 482         return 0;
 483 }
 484
 485 static void had_build_channel_allocation_map(struct snd_intelhad *intelhaddata)
 486 {
 487         int i, c;
 488         int spk_mask = 0;
 489         struct snd_pcm_chmap_elem *chmap;
 490         u8 eld_high, eld_high_mask = 0xF0;
 491         u8 high_msb;
 492
 493         chmap = kzalloc(sizeof(*chmap), GFP_KERNEL);
 494         if (!chmap) {
 495                 intelhaddata->chmap->chmap = NULL;
 496                 return;
 497         }
 498
 499         dev_dbg(intelhaddata->dev, "eld.speaker_allocation_block = %x\n",
 500                         intelhaddata->eld.speaker_allocation_block);
 501
 502         /* WA: Fix the max channel supported to 8 */
 503
 504         /*
 505          * Sink may support more than 8 channels, if eld_high has more than
 506          * one bit set. SOC supports max 8 channels.
 507          * Refer eld_speaker_allocation_bits, for sink speaker allocation
 508          */
 509
 510         /* if 0x2F < eld < 0x4F fall back to 0x2f, else fall back to 0x4F */
 511         eld_high = intelhaddata->eld.speaker_allocation_block & eld_high_mask;
 512         if ((eld_high & (eld_high-1)) && (eld_high > 0x1F)) {
 513                 /* eld_high & (eld_high-1): if more than 1 bit set */
 514                 /* 0x1F: 7 channels */
 515                 for (i = 1; i < 4; i++) {
 516                         high_msb = eld_high & (0x80 >> i);
 517                         if (high_msb) {
 518                                 intelhaddata->eld.speaker_allocation_block &=
 519                                         high_msb | 0xF;
 520                                 break;
 521                         }
 522                 }
 523         }
 524
 525         for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
 526                 if (intelhaddata->eld.speaker_allocation_block & (1 << i))
 527                         spk_mask |= eld_speaker_allocation_bits[i];
 528         }
 529
 530         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 531                 if (spk_mask == channel_allocations[i].spk_mask) {
 532                         for (c = 0; c < channel_allocations[i].channels; c++) {
 533                                 chmap->map[c] = spk_to_chmap(
 534                                         channel_allocations[i].speakers[
 535                                                 (MAX_SPEAKERS - 1) - c]);
 536                         }
 537                         chmap->channels = channel_allocations[i].channels;
 538                         intelhaddata->chmap->chmap = chmap;
 539                         break;
 540                 }
 541         }
 542         if (i >= ARRAY_SIZE(channel_allocations)) {
 543                 intelhaddata->chmap->chmap = NULL;
 544                 kfree(chmap);
 545         }
 546 }
 547
 548 /*
 549  * ALSA API channel-map control callbacks
 550  */
 551 static int had_chmap_ctl_info(struct snd_kcontrol *kcontrol,
 552                                 struct snd_ctl_elem_info *uinfo)
 553 {
 554         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
 555         struct snd_intelhad *intelhaddata = info->private_data;
 556
 557         if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED)
 558                 return -ENODEV;
 559         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
 560         uinfo->count = HAD_MAX_CHANNEL;
 561         uinfo->value.integer.min = 0;
 562         uinfo->value.integer.max = SNDRV_CHMAP_LAST;
 563         return 0;
 564 }
 565
 566 static int had_chmap_ctl_get(struct snd_kcontrol *kcontrol,
 567                                 struct snd_ctl_elem_value *ucontrol)
 568 {
 569         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
 570         struct snd_intelhad *intelhaddata = info->private_data;
 571         int i;
 572         const struct snd_pcm_chmap_elem *chmap;
 573
 574         if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED)
 575                 return -ENODEV;
 576
 577         mutex_lock(&intelhaddata->mutex);
 578         if (!intelhaddata->chmap->chmap) {
 579                 mutex_unlock(&intelhaddata->mutex);
 580                 return -ENODATA;
 581         }
 582
 583         chmap = intelhaddata->chmap->chmap;
 584         for (i = 0; i < chmap->channels; i++)
 585                 ucontrol->value.integer.value[i] = chmap->map[i];
 586         mutex_unlock(&intelhaddata->mutex);
 587
 588         return 0;
 589 }
 590
 591 static int had_register_chmap_ctls(struct snd_intelhad *intelhaddata,
 592                                                 struct snd_pcm *pcm)
 593 {
 594         int err;
 595
 596         err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK,
 597                         NULL, 0, (unsigned long)intelhaddata,
 598                         &intelhaddata->chmap);
 599         if (err < 0)
 600                 return err;
 601
 602         intelhaddata->chmap->private_data = intelhaddata;
 603         intelhaddata->chmap->kctl->info = had_chmap_ctl_info;
 604         intelhaddata->chmap->kctl->get = had_chmap_ctl_get;
 605         intelhaddata->chmap->chmap = NULL;
 606         return 0;
 607 }
 608
 609 /*
 610  * snd_intelhad_prog_dip - to initialize Data Island Packets registers
 611  *
 612  * @substream:substream for which the prepare function is called
 613  * @intelhaddata:substream private data
 614  *
 615  * This function is called in the prepare callback
 616  */
 617 static void snd_intelhad_prog_dip(struct snd_pcm_substream *substream,
 618                                   struct snd_intelhad *intelhaddata)
 619 {
 620         int i;
 621         union aud_ctrl_st ctrl_state = {.ctrl_val = 0};
 622         union aud_info_frame2 frame2 = {.fr2_val = 0};
 623         union aud_info_frame3 frame3 = {.fr3_val = 0};
 624         u8 checksum = 0;
 625         u32 info_frame;
 626         int channels;
 627
 628         channels = substream->runtime->channels;
 629
 630         had_write_register(intelhaddata, AUD_CNTL_ST, ctrl_state.ctrl_val);
 631
 632         if (intelhaddata->dp_output) {
 633                 info_frame = DP_INFO_FRAME_WORD1;
 634                 frame2.fr2_val = 1;
 635         } else {
 636                 info_frame = HDMI_INFO_FRAME_WORD1;
 637                 frame2.fr2_regx.chnl_cnt = substream->runtime->channels - 1;
 638
 639                 frame3.fr3_regx.chnl_alloc = snd_intelhad_channel_allocation(
 640                         intelhaddata, channels);
 641
 642                 /* Calculte the byte wide checksum for all valid DIP words */
 643                 for (i = 0; i < BYTES_PER_WORD; i++)
 644                         checksum += (info_frame >> i*BITS_PER_BYTE) & MASK_BYTE0;
 645                 for (i = 0; i < BYTES_PER_WORD; i++)
 646                         checksum += (frame2.fr2_val >> i*BITS_PER_BYTE) & MASK_BYTE0;
 647                 for (i = 0; i < BYTES_PER_WORD; i++)
 648                         checksum += (frame3.fr3_val >> i*BITS_PER_BYTE) & MASK_BYTE0;
 649
 650                 frame2.fr2_regx.chksum = -(checksum);
 651         }
 652
 653         had_write_register(intelhaddata, AUD_HDMIW_INFOFR, info_frame);
 654         had_write_register(intelhaddata, AUD_HDMIW_INFOFR, frame2.fr2_val);
 655         had_write_register(intelhaddata, AUD_HDMIW_INFOFR, frame3.fr3_val);
 656
 657         /* program remaining DIP words with zero */
 658         for (i = 0; i < HAD_MAX_DIP_WORDS-VALID_DIP_WORDS; i++)
 659                 had_write_register(intelhaddata, AUD_HDMIW_INFOFR, 0x0);
 660
 661         ctrl_state.ctrl_regx.dip_freq = 1;
 662         ctrl_state.ctrl_regx.dip_en_sta = 1;
 663         had_write_register(intelhaddata, AUD_CNTL_ST, ctrl_state.ctrl_val);
 664 }
 665
 666 /*
 667  * snd_intelhad_prog_buffer - programs buffer address and length registers
 668  * @substream: substream for which the prepare function is called
 669  * @intelhaddata: substream private data
 670  *
 671  * This function programs ring buffer address and length into registers.
 672  */
 673 static int snd_intelhad_prog_buffer(struct snd_pcm_substream *substream,
 674                                     struct snd_intelhad *intelhaddata,
 675                                     int start, int end)
 676 {
 677         u32 ring_buf_addr, ring_buf_size, period_bytes;
 678         u8 i, num_periods;
 679
 680         ring_buf_addr = substream->runtime->dma_addr;
 681         ring_buf_size = snd_pcm_lib_buffer_bytes(substream);
 682         intelhaddata->stream_info.ring_buf_size = ring_buf_size;
 683         period_bytes = frames_to_bytes(substream->runtime,
 684                                 substream->runtime->period_size);
 685         num_periods = substream->runtime->periods;
 686
 687         /*
 688          * buffer addr should  be 64 byte aligned, period bytes
 689          * will be used to calculate addr offset
 690          */
 691         period_bytes &= ~0x3F;
 692
 693         /* Hardware supports MAX_PERIODS buffers */
 694         if (end >= HAD_MAX_PERIODS)
 695                 return -EINVAL;
 696
 697         for (i = start; i <= end; i++) {
 698                 /* Program the buf registers with addr and len */
 699                 intelhaddata->buf_info[i].buf_addr = ring_buf_addr +
 700                                                          (i * period_bytes);
 701                 if (i < num_periods-1)
 702                         intelhaddata->buf_info[i].buf_size = period_bytes;
 703                 else
 704                         intelhaddata->buf_info[i].buf_size = ring_buf_size -
 705                                                         (i * period_bytes);
 706
 707                 had_write_register(intelhaddata,
 708                                    AUD_BUF_A_ADDR + (i * HAD_REG_WIDTH),
 709                                         intelhaddata->buf_info[i].buf_addr |
 710                                         BIT(0) | BIT(1));
 711                 had_write_register(intelhaddata,
 712                                    AUD_BUF_A_LENGTH + (i * HAD_REG_WIDTH),
 713                                         period_bytes);
 714                 intelhaddata->buf_info[i].is_valid = true;
 715         }
 716         dev_dbg(intelhaddata->dev, "%s:buf[%d-%d] addr=%#x  and size=%d\n",
 717                 __func__, start, end,
 718                 intelhaddata->buf_info[start].buf_addr,
 719                 intelhaddata->buf_info[start].buf_size);
 720         intelhaddata->valid_buf_cnt = num_periods;
 721         return 0;
 722 }
 723
 724 static int snd_intelhad_read_len(struct snd_intelhad *intelhaddata)
 725 {
 726         int i, retval = 0;
 727         u32 len[4];
 728
 729         for (i = 0; i < 4 ; i++) {
 730                 had_read_register(intelhaddata,
 731                                   AUD_BUF_A_LENGTH + (i * HAD_REG_WIDTH),
 732                                   &len[i]);
 733                 if (!len[i])
 734                         retval++;
 735         }
 736         if (retval != 1) {
 737                 for (i = 0; i < 4 ; i++)
 738                         dev_dbg(intelhaddata->dev, "buf[%d] size=%d\n",
 739                                 i, len[i]);
 740         }
 741
 742         return retval;
 743 }
 744
 745 static int had_calculate_maud_value(u32 aud_samp_freq, u32 link_rate)
 746 {
 747         u32 maud_val;
 748
 749         /* Select maud according to DP 1.2 spec */
 750         if (link_rate == DP_2_7_GHZ) {
 751                 switch (aud_samp_freq) {
 752                 case AUD_SAMPLE_RATE_32:
 753                         maud_val = AUD_SAMPLE_RATE_32_DP_2_7_MAUD_VAL;
 754                         break;
 755
 756                 case AUD_SAMPLE_RATE_44_1:
 757                         maud_val = AUD_SAMPLE_RATE_44_1_DP_2_7_MAUD_VAL;
 758                         break;
 759
 760                 case AUD_SAMPLE_RATE_48:
 761                         maud_val = AUD_SAMPLE_RATE_48_DP_2_7_MAUD_VAL;
 762                         break;
 763
 764                 case AUD_SAMPLE_RATE_88_2:
 765                         maud_val = AUD_SAMPLE_RATE_88_2_DP_2_7_MAUD_VAL;
 766                         break;
 767
 768                 case AUD_SAMPLE_RATE_96:
 769                         maud_val = AUD_SAMPLE_RATE_96_DP_2_7_MAUD_VAL;
 770                         break;
 771
 772                 case AUD_SAMPLE_RATE_176_4:
 773                         maud_val = AUD_SAMPLE_RATE_176_4_DP_2_7_MAUD_VAL;
 774                         break;
 775
 776                 case HAD_MAX_RATE:
 777                         maud_val = HAD_MAX_RATE_DP_2_7_MAUD_VAL;
 778                         break;
 779
 780                 default:
 781                         maud_val = -EINVAL;
 782                         break;
 783                 }
 784         } else if (link_rate == DP_1_62_GHZ) {
 785                 switch (aud_samp_freq) {
 786                 case AUD_SAMPLE_RATE_32:
 787                         maud_val = AUD_SAMPLE_RATE_32_DP_1_62_MAUD_VAL;
 788                         break;
 789
 790                 case AUD_SAMPLE_RATE_44_1:
 791                         maud_val = AUD_SAMPLE_RATE_44_1_DP_1_62_MAUD_VAL;
 792                         break;
 793
 794                 case AUD_SAMPLE_RATE_48:
 795                         maud_val = AUD_SAMPLE_RATE_48_DP_1_62_MAUD_VAL;
 796                         break;
 797
 798                 case AUD_SAMPLE_RATE_88_2:
 799                         maud_val = AUD_SAMPLE_RATE_88_2_DP_1_62_MAUD_VAL;
 800                         break;
 801
 802                 case AUD_SAMPLE_RATE_96:
 803                         maud_val = AUD_SAMPLE_RATE_96_DP_1_62_MAUD_VAL;
 804                         break;
 805
 806                 case AUD_SAMPLE_RATE_176_4:
 807                         maud_val = AUD_SAMPLE_RATE_176_4_DP_1_62_MAUD_VAL;
 808                         break;
 809
 810                 case HAD_MAX_RATE:
 811                         maud_val = HAD_MAX_RATE_DP_1_62_MAUD_VAL;
 812                         break;
 813
 814                 default:
 815                         maud_val = -EINVAL;
 816                         break;
 817                 }
 818         } else
 819                 maud_val = -EINVAL;
 820
 821         return maud_val;
 822 }
 823
 824 /*
 825  * snd_intelhad_prog_cts - Program HDMI audio CTS value
 826  *
 827  * @aud_samp_freq: sampling frequency of audio data
 828  * @tmds: sampling frequency of the display data
 829  * @n_param: N value, depends on aud_samp_freq
 830  * @intelhaddata:substream private data
 831  *
 832  * Program CTS register based on the audio and display sampling frequency
 833  */
 834 static void snd_intelhad_prog_cts(u32 aud_samp_freq, u32 tmds,
 835                                   u32 link_rate, u32 n_param,
 836                                   struct snd_intelhad *intelhaddata)
 837 {
 838         u32 cts_val;
 839         u64 dividend, divisor;
 840
 841         if (intelhaddata->dp_output) {
 842                 /* Substitute cts_val with Maud according to DP 1.2 spec*/
 843                 cts_val = had_calculate_maud_value(aud_samp_freq, link_rate);
 844         } else {
 845                 /* Calculate CTS according to HDMI 1.3a spec*/
 846                 dividend = (u64)tmds * n_param*1000;
 847                 divisor = 128 * aud_samp_freq;
 848                 cts_val = div64_u64(dividend, divisor);
 849         }
 850         dev_dbg(intelhaddata->dev, "TMDS value=%d, N value=%d, CTS Value=%d\n",
 851                  tmds, n_param, cts_val);
 852         had_write_register(intelhaddata, AUD_HDMI_CTS, (BIT(24) | cts_val));
 853 }
 854
 855 static int had_calculate_n_value(u32 aud_samp_freq)
 856 {
 857         int n_val;
 858
 859         /* Select N according to HDMI 1.3a spec*/
 860         switch (aud_samp_freq) {
 861         case AUD_SAMPLE_RATE_32:
 862                 n_val = 4096;
 863                 break;
 864
 865         case AUD_SAMPLE_RATE_44_1:
 866                 n_val = 6272;
 867                 break;
 868
 869         case AUD_SAMPLE_RATE_48:
 870                 n_val = 6144;
 871                 break;
 872
 873         case AUD_SAMPLE_RATE_88_2:
 874                 n_val = 12544;
 875                 break;
 876
 877         case AUD_SAMPLE_RATE_96:
 878                 n_val = 12288;
 879                 break;
 880
 881         case AUD_SAMPLE_RATE_176_4:
 882                 n_val = 25088;
 883                 break;
 884
 885         case HAD_MAX_RATE:
 886                 n_val = 24576;
 887                 break;
 888
 889         default:
 890                 n_val = -EINVAL;
 891                 break;
 892         }
 893         return n_val;
 894 }
 895
 896 /*
 897  * snd_intelhad_prog_n - Program HDMI audio N value
 898  *
 899  * @aud_samp_freq: sampling frequency of audio data
 900  * @n_param: N value, depends on aud_samp_freq
 901  * @intelhaddata:substream private data
 902  *
 903  * This function is called in the prepare callback.
 904  * It programs based on the audio and display sampling frequency
 905  */
 906 static int snd_intelhad_prog_n(u32 aud_samp_freq, u32 *n_param,
 907                                struct snd_intelhad *intelhaddata)
 908 {
 909         int n_val;
 910
 911         if (intelhaddata->dp_output) {
 912                 /*
 913                  * According to DP specs, Maud and Naud values hold
 914                  * a relationship, which is stated as:
 915                  * Maud/Naud = 512 * fs / f_LS_Clk
 916                  * where, fs is the sampling frequency of the audio stream
 917                  * and Naud is 32768 for Async clock.
 918                  */
 919
 920                 n_val = DP_NAUD_VAL;
 921         } else
 922                 n_val = had_calculate_n_value(aud_samp_freq);
 923
 924         if (n_val < 0)
 925                 return n_val;
 926
 927         had_write_register(intelhaddata, AUD_N_ENABLE, (BIT(24) | n_val));
 928         *n_param = n_val;
 929         return 0;
 930 }
 931
 932 static void snd_intelhad_handle_underrun(struct snd_intelhad *intelhaddata)
 933 {
 934         u32 hdmi_status = 0, i = 0;
 935
 936         /* Handle Underrun interrupt within Audio Unit */
 937         had_write_register(intelhaddata, AUD_CONFIG, 0);
 938         /* Reset buffer pointers */
 939         had_write_register(intelhaddata, AUD_HDMI_STATUS, 1);
 940         had_write_register(intelhaddata, AUD_HDMI_STATUS, 0);
 941         /*
 942          * The interrupt status 'sticky' bits might not be cleared by
 943          * setting '1' to that bit once...
 944          */
 945         do { /* clear bit30, 31 AUD_HDMI_STATUS */
 946                 had_read_register(intelhaddata, AUD_HDMI_STATUS,
 947                                   &hdmi_status);
 948                 dev_dbg(intelhaddata->dev, "HDMI status =0x%x\n", hdmi_status);
 949                 if (hdmi_status & AUD_CONFIG_MASK_UNDERRUN) {
 950                         i++;
 951                         had_write_register(intelhaddata,
 952                                            AUD_HDMI_STATUS, hdmi_status);
 953                 } else
 954                         break;
 955         } while (i < MAX_CNT);
 956         if (i >= MAX_CNT)
 957                 dev_err(intelhaddata->dev, "Unable to clear UNDERRUN bits\n");
 958 }
 959
 960 /*
 961  * snd_intelhad_open - stream initializations are done here
 962  * @substream:substream for which the stream function is called
 963  *
 964  * This function is called whenever a PCM stream is opened
 965  */
 966 static int snd_intelhad_open(struct snd_pcm_substream *substream)
 967 {
 968         struct snd_intelhad *intelhaddata;
 969         struct snd_pcm_runtime *runtime;
 970         struct had_stream_data *had_stream;
 971         int retval;
 972
 973         intelhaddata = snd_pcm_substream_chip(substream);
 974         had_stream = &intelhaddata->stream_data;
 975         runtime = substream->runtime;
 976         intelhaddata->underrun_count = 0;
 977
 978         pm_runtime_get(intelhaddata->dev);
 979
 980         if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED) {
 981                 dev_dbg(intelhaddata->dev, "%s: HDMI cable plugged-out\n",
 982                         __func__);
 983                 retval = -ENODEV;
 984                 goto error;
 985         }
 986
 987         /* set the runtime hw parameter with local snd_pcm_hardware struct */
 988         runtime->hw = snd_intel_hadstream;
 989
 990         retval = snd_pcm_hw_constraint_integer(runtime,
 991                          SNDRV_PCM_HW_PARAM_PERIODS);
 992         if (retval < 0)
 993                 goto error;
 994
 995         /* Make sure, that the period size is always aligned
 996          * 64byte boundary
 997          */
 998         retval = snd_pcm_hw_constraint_step(substream->runtime, 0,
 999                         SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 64);
1000         if (retval < 0) {
1001                 dev_dbg(intelhaddata->dev, "%s:step_size=64 failed,err=%d\n",
1002                         __func__, retval);
1003                 goto error;
1004         }
1005
1006         spin_lock_irq(&intelhaddata->had_spinlock);
1007         intelhaddata->stream_info.substream = substream;
1008         intelhaddata->stream_info.substream_refcount++;
1009         spin_unlock_irq(&intelhaddata->had_spinlock);
1010
1011         return retval;
1012  error:
1013         pm_runtime_put(intelhaddata->dev);
1014         return retval;
1015 }
1016
1017 /*
1018  * snd_intelhad_close - to free parameteres when stream is stopped
1019  * @substream:  substream for which the function is called
1020  *
1021  * This function is called by ALSA framework when stream is stopped
1022  */
1023 static int snd_intelhad_close(struct snd_pcm_substream *substream)
1024 {
1025         struct snd_intelhad *intelhaddata;
1026
1027         intelhaddata = snd_pcm_substream_chip(substream);
1028
1029         intelhaddata->stream_info.buffer_rendered = 0;
1030         spin_lock_irq(&intelhaddata->had_spinlock);
1031         intelhaddata->stream_info.substream = NULL;
1032         intelhaddata->stream_info.substream_refcount--;
1033         while (intelhaddata->stream_info.substream_refcount > 0) {
1034                 spin_unlock_irq(&intelhaddata->had_spinlock);
1035                 cpu_relax();
1036                 spin_lock_irq(&intelhaddata->had_spinlock);
1037         }
1038         spin_unlock_irq(&intelhaddata->had_spinlock);
1039
1040         /* Check if following drv_status modification is required - VA */
1041         if (intelhaddata->drv_status != HAD_DRV_DISCONNECTED) {
1042                 intelhaddata->drv_status = HAD_DRV_CONNECTED;
1043                 dev_dbg(intelhaddata->dev,
1044                         "%s @ %d:DEBUG PLUG/UNPLUG : HAD_DRV_CONNECTED\n",
1045                         __func__, __LINE__);
1046         }
1047         pm_runtime_put(intelhaddata->dev);
1048         return 0;
1049 }
1050
1051 /*
1052  * snd_intelhad_hw_params - to setup the hardware parameters
1053  *   like allocating the buffers
1054  * @substream: substream for which the function is called
1055  * @hw_params: hardware parameters
1056  *
1057  * This function is called by ALSA framework when hardware params are set
1058  */
1059 static int snd_intelhad_hw_params(struct snd_pcm_substream *substream,
1060                                     struct snd_pcm_hw_params *hw_params)
1061 {
1062         struct snd_intelhad *intelhaddata;
1063         unsigned long addr;
1064         int pages, buf_size, retval;
1065
1066         if (!hw_params)
1067                 return -EINVAL;
1068
1069         intelhaddata = snd_pcm_substream_chip(substream);
1070         buf_size = params_buffer_bytes(hw_params);
1071         retval = snd_pcm_lib_malloc_pages(substream, buf_size);
1072         if (retval < 0)
1073                 return retval;
1074         dev_dbg(intelhaddata->dev, "%s:allocated memory = %d\n",
1075                 __func__, buf_size);
1076         /* mark the pages as uncached region */
1077         addr = (unsigned long) substream->runtime->dma_area;
1078         pages = (substream->runtime->dma_bytes + PAGE_SIZE - 1) / PAGE_SIZE;
1079         retval = set_memory_uc(addr, pages);
1080         if (retval) {
1081                 dev_err(intelhaddata->dev, "set_memory_uc failed.Error:%d\n",
1082                         retval);
1083                 return retval;
1084         }
1085         memset(substream->runtime->dma_area, 0, buf_size);
1086
1087         return retval;
1088 }
1089
1090 /*
1091  * snd_intelhad_hw_free - to release the resources allocated during
1092  *   hardware params setup
1093  * @substream:  substream for which the function is called
1094  *
1095  * This function is called by ALSA framework before close callback.
1096  */
1097 static int snd_intelhad_hw_free(struct snd_pcm_substream *substream)
1098 {
1099         unsigned long addr;
1100         u32 pages;
1101
1102         /* mark back the pages as cached/writeback region before the free */
1103         if (substream->runtime->dma_area != NULL) {
1104                 addr = (unsigned long) substream->runtime->dma_area;
1105                 pages = (substream->runtime->dma_bytes + PAGE_SIZE - 1) /
1106                                                                 PAGE_SIZE;
1107                 set_memory_wb(addr, pages);
1108                 return snd_pcm_lib_free_pages(substream);
1109         }
1110         return 0;
1111 }
1112
1113 /*
1114  * snd_intelhad_pcm_trigger - stream activities are handled here
1115  * @substream: substream for which the stream function is called
1116  * @cmd: the stream commamd thats requested from upper layer
1117  *
1118  * This function is called whenever an a stream activity is invoked
1119  */
1120 static int snd_intelhad_pcm_trigger(struct snd_pcm_substream *substream,
1121                                         int cmd)
1122 {
1123         int retval = 0;
1124         struct snd_intelhad *intelhaddata;
1125         struct had_stream_data *had_stream;
1126
1127         intelhaddata = snd_pcm_substream_chip(substream);
1128         had_stream = &intelhaddata->stream_data;
1129
1130         switch (cmd) {
1131         case SNDRV_PCM_TRIGGER_START:
1132                 /* Disable local INTRs till register prgmng is done */
1133                 if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED) {
1134                         dev_dbg(intelhaddata->dev,
1135                                 "_START: HDMI cable plugged-out\n");
1136                         retval = -ENODEV;
1137                         break;
1138                 }
1139
1140                 had_stream->stream_type = HAD_RUNNING_STREAM;
1141
1142                 /* Enable Audio */
1143                 snd_intelhad_enable_audio_int(intelhaddata, true);
1144                 snd_intelhad_enable_audio(substream, intelhaddata, true);
1145                 break;
1146
1147         case SNDRV_PCM_TRIGGER_STOP:
1148                 spin_lock(&intelhaddata->had_spinlock);
1149                 intelhaddata->curr_buf = 0;
1150
1151                 /* Stop reporting BUFFER_DONE/UNDERRUN to above layers */
1152
1153                 had_stream->stream_type = HAD_INIT;
1154                 spin_unlock(&intelhaddata->had_spinlock);
1155                 /* Disable Audio */
1156                 snd_intelhad_enable_audio_int(intelhaddata, false);
1157                 snd_intelhad_enable_audio(substream, intelhaddata, false);
1158                 /* Reset buffer pointers */
1159                 snd_intelhad_reset_audio(intelhaddata, 1);
1160                 snd_intelhad_reset_audio(intelhaddata, 0);
1161                 snd_intelhad_enable_audio_int(intelhaddata, false);
1162                 break;
1163
1164         default:
1165                 retval = -EINVAL;
1166         }
1167         return retval;
1168 }
1169
1170 /*
1171  * snd_intelhad_pcm_prepare - internal preparation before starting a stream
1172  * @substream: substream for which the function is called
1173  *
1174  * This function is called when a stream is started for internal preparation.
1175  */
1176 static int snd_intelhad_pcm_prepare(struct snd_pcm_substream *substream)
1177 {
1178         int retval;
1179         u32 disp_samp_freq, n_param;
1180         u32 link_rate = 0;
1181         struct snd_intelhad *intelhaddata;
1182         struct snd_pcm_runtime *runtime;
1183         struct had_stream_data *had_stream;
1184
1185         intelhaddata = snd_pcm_substream_chip(substream);
1186         runtime = substream->runtime;
1187         had_stream = &intelhaddata->stream_data;
1188
1189         if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED) {
1190                 dev_dbg(intelhaddata->dev, "%s: HDMI cable plugged-out\n",
1191                         __func__);
1192                 retval = -ENODEV;
1193                 goto prep_end;
1194         }
1195
1196         dev_dbg(intelhaddata->dev, "period_size=%d\n",
1197                 (int)frames_to_bytes(runtime, runtime->period_size));
1198         dev_dbg(intelhaddata->dev, "periods=%d\n", runtime->periods);
1199         dev_dbg(intelhaddata->dev, "buffer_size=%d\n",
1200                 (int)snd_pcm_lib_buffer_bytes(substream));
1201         dev_dbg(intelhaddata->dev, "rate=%d\n", runtime->rate);
1202         dev_dbg(intelhaddata->dev, "channels=%d\n", runtime->channels);
1203
1204         intelhaddata->stream_info.buffer_rendered = 0;
1205
1206         /* Get N value in KHz */
1207         disp_samp_freq = intelhaddata->tmds_clock_speed;
1208
1209         retval = snd_intelhad_prog_n(substream->runtime->rate, &n_param,
1210                                      intelhaddata);
1211         if (retval) {
1212                 dev_err(intelhaddata->dev,
1213                         "programming N value failed %#x\n", retval);
1214                 goto prep_end;
1215         }
1216
1217         if (intelhaddata->dp_output)
1218                 link_rate = intelhaddata->link_rate;
1219
1220         snd_intelhad_prog_cts(substream->runtime->rate,
1221                               disp_samp_freq, link_rate,
1222                               n_param, intelhaddata);
1223
1224         snd_intelhad_prog_dip(substream, intelhaddata);
1225
1226         retval = snd_intelhad_audio_ctrl(substream, intelhaddata);
1227
1228         /* Prog buffer address */
1229         retval = snd_intelhad_prog_buffer(substream, intelhaddata,
1230                         HAD_BUF_TYPE_A, HAD_BUF_TYPE_D);
1231
1232         /*
1233          * Program channel mapping in following order:
1234          * FL, FR, C, LFE, RL, RR
1235          */
1236
1237         had_write_register(intelhaddata, AUD_BUF_CH_SWAP, SWAP_LFE_CENTER);
1238
1239 prep_end:
1240         return retval;
1241 }
1242
1243 /*
1244  * snd_intelhad_pcm_pointer- to send the current buffer pointerprocessed by hw
1245  * @substream: substream for which the function is called
1246  *
1247  * This function is called by ALSA framework to get the current hw buffer ptr
1248  * when a period is elapsed
1249  */
1250 static snd_pcm_uframes_t snd_intelhad_pcm_pointer(
1251                                         struct snd_pcm_substream *substream)
1252 {
1253         struct snd_intelhad *intelhaddata;
1254         u32 bytes_rendered = 0;
1255         u32 t;
1256         int buf_id;
1257
1258         intelhaddata = snd_pcm_substream_chip(substream);
1259
1260         if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED)
1261                 return SNDRV_PCM_POS_XRUN;
1262
1263         /* Use a hw register to calculate sub-period position reports.
1264          * This makes PulseAudio happier.
1265          */
1266
1267         buf_id = intelhaddata->curr_buf % 4;
1268         had_read_register(intelhaddata,
1269                           AUD_BUF_A_LENGTH + (buf_id * HAD_REG_WIDTH), &t);
1270
1271         if ((t == 0) || (t == ((u32)-1L))) {
1272                 intelhaddata->underrun_count++;
1273                 dev_dbg(intelhaddata->dev,
1274                         "discovered buffer done for buf %d, count = %d\n",
1275                          buf_id, intelhaddata->underrun_count);
1276
1277                 if (intelhaddata->underrun_count > (HAD_MIN_PERIODS/2)) {
1278                         dev_dbg(intelhaddata->dev,
1279                                 "assume audio_codec_reset, underrun = %d - do xrun\n",
1280                                  intelhaddata->underrun_count);
1281                         intelhaddata->underrun_count = 0;
1282                         return SNDRV_PCM_POS_XRUN;
1283                 }
1284         } else {
1285                 /* Reset Counter */
1286                 intelhaddata->underrun_count = 0;
1287         }
1288
1289         t = intelhaddata->buf_info[buf_id].buf_size - t;
1290
1291         if (intelhaddata->stream_info.buffer_rendered)
1292                 div_u64_rem(intelhaddata->stream_info.buffer_rendered,
1293                         intelhaddata->stream_info.ring_buf_size,
1294                         &(bytes_rendered));
1295
1296         return bytes_to_frames(substream->runtime, bytes_rendered + t);
1297 }
1298
1299 /*
1300  * snd_intelhad_pcm_mmap- mmaps a kernel buffer to user space for copying data
1301  * @substream: substream for which the function is called
1302  * @vma: struct instance of memory VMM memory area
1303  *
1304  * This function is called by OS when a user space component
1305  * tries to get mmap memory from driver
1306  */
1307 static int snd_intelhad_pcm_mmap(struct snd_pcm_substream *substream,
1308         struct vm_area_struct *vma)
1309 {
1310         vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
1311         return remap_pfn_range(vma, vma->vm_start,
1312                         substream->dma_buffer.addr >> PAGE_SHIFT,
1313                         vma->vm_end - vma->vm_start, vma->vm_page_prot);
1314 }
1315
1316 /* process mode change of the running stream; called in mutex */
1317 static int hdmi_audio_mode_change(struct snd_intelhad *intelhaddata)
1318 {
1319         struct snd_pcm_substream *substream;
1320         int retval = 0;
1321         u32 disp_samp_freq, n_param;
1322         u32 link_rate = 0;
1323
1324         substream = had_substream_get(intelhaddata);
1325         if (!substream)
1326                 return 0;
1327
1328         /* Disable Audio */
1329         snd_intelhad_enable_audio(substream, intelhaddata, false);
1330
1331         /* Update CTS value */
1332         disp_samp_freq = intelhaddata->tmds_clock_speed;
1333
1334         retval = snd_intelhad_prog_n(substream->runtime->rate, &n_param,
1335                                      intelhaddata);
1336         if (retval) {
1337                 dev_err(intelhaddata->dev,
1338                         "programming N value failed %#x\n", retval);
1339                 goto out;
1340         }
1341
1342         if (intelhaddata->dp_output)
1343                 link_rate = intelhaddata->link_rate;
1344
1345         snd_intelhad_prog_cts(substream->runtime->rate,
1346                               disp_samp_freq, link_rate,
1347                               n_param, intelhaddata);
1348
1349         /* Enable Audio */
1350         snd_intelhad_enable_audio(substream, intelhaddata, true);
1351
1352 out:
1353         had_substream_put(intelhaddata);
1354         return retval;
1355 }
1356
1357 /*
1358  * hdmi_lpe_audio_suspend - power management suspend function
1359  * @pdev: platform device
1360  *
1361  * This function is called to suspend the hdmi audio.
1362  */
1363 static int hdmi_lpe_audio_suspend(struct platform_device *pdev,
1364                                   pm_message_t state)
1365 {
1366         struct had_stream_data *had_stream;
1367         struct snd_intelhad *intelhaddata = platform_get_drvdata(pdev);
1368
1369         had_stream = &intelhaddata->stream_data;
1370
1371         if (!pm_runtime_status_suspended(intelhaddata->dev)) {
1372                 dev_err(intelhaddata->dev, "audio stream is active\n");
1373                 return -EAGAIN;
1374         }
1375
1376         spin_lock_irq(&intelhaddata->had_spinlock);
1377         if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED) {
1378                 spin_unlock_irq(&intelhaddata->had_spinlock);
1379                 dev_dbg(intelhaddata->dev, "had not connected\n");
1380                 return 0;
1381         }
1382
1383         if (intelhaddata->drv_status == HAD_DRV_SUSPENDED) {
1384                 spin_unlock_irq(&intelhaddata->had_spinlock);
1385                 dev_dbg(intelhaddata->dev, "had already suspended\n");
1386                 return 0;
1387         }
1388
1389         intelhaddata->drv_status = HAD_DRV_SUSPENDED;
1390         dev_dbg(intelhaddata->dev,
1391                 "%s @ %d:DEBUG PLUG/UNPLUG : HAD_DRV_SUSPENDED\n",
1392                         __func__, __LINE__);
1393
1394         spin_unlock_irq(&intelhaddata->had_spinlock);
1395         snd_intelhad_enable_audio_int(intelhaddata, false);
1396         return 0;
1397 }
1398
1399 /*
1400  * hdmi_lpe_audio_resume - power management resume function
1401  * @pdev: platform device
1402  *
1403  * This function is called to resume the hdmi audio.
1404  */
1405 static int hdmi_lpe_audio_resume(struct platform_device *pdev)
1406 {
1407         struct snd_intelhad *intelhaddata = platform_get_drvdata(pdev);
1408
1409         spin_lock_irq(&intelhaddata->had_spinlock);
1410         if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED) {
1411                 spin_unlock_irq(&intelhaddata->had_spinlock);
1412                 dev_dbg(intelhaddata->dev, "had not connected\n");
1413                 return 0;
1414         }
1415
1416         if (intelhaddata->drv_status != HAD_DRV_SUSPENDED) {
1417                 spin_unlock_irq(&intelhaddata->had_spinlock);
1418                 dev_dbg(intelhaddata->dev, "had is not in suspended state\n");
1419                 return 0;
1420         }
1421
1422         intelhaddata->drv_status = HAD_DRV_CONNECTED;
1423         dev_dbg(intelhaddata->dev,
1424                 "%s @ %d:DEBUG PLUG/UNPLUG : HAD_DRV_DISCONNECTED\n",
1425                         __func__, __LINE__);
1426         spin_unlock_irq(&intelhaddata->had_spinlock);
1427         snd_intelhad_enable_audio_int(intelhaddata, true);
1428         return 0;
1429 }
1430
1431 static inline int had_chk_intrmiss(struct snd_intelhad *intelhaddata,
1432                 enum intel_had_aud_buf_type buf_id)
1433 {
1434         int i, intr_count = 0;
1435         enum intel_had_aud_buf_type buff_done;
1436         u32 buf_size, buf_addr;
1437         struct had_stream_data *had_stream;
1438
1439         had_stream = &intelhaddata->stream_data;
1440
1441         buff_done = buf_id;
1442
1443         intr_count = snd_intelhad_read_len(intelhaddata);
1444         if (intr_count > 1) {
1445                 /* In case of active playback */
1446                 dev_err(intelhaddata->dev,
1447                         "Driver detected %d missed buffer done interrupt(s)\n",
1448                         (intr_count - 1));
1449                 if (intr_count > 3)
1450                         return intr_count;
1451
1452                 buf_id += (intr_count - 1);
1453                 /* Reprogram registers*/
1454                 for (i = buff_done; i < buf_id; i++) {
1455                         int j = i % 4;
1456
1457                         buf_size = intelhaddata->buf_info[j].buf_size;
1458                         buf_addr = intelhaddata->buf_info[j].buf_addr;
1459                         had_write_register(intelhaddata,
1460                                            AUD_BUF_A_LENGTH +
1461                                            (j * HAD_REG_WIDTH), buf_size);
1462                         had_write_register(intelhaddata,
1463                                            AUD_BUF_A_ADDR+(j * HAD_REG_WIDTH),
1464                                            (buf_addr | BIT(0) | BIT(1)));
1465                 }
1466                 buf_id = buf_id % 4;
1467                 intelhaddata->buff_done = buf_id;
1468         }
1469
1470         return intr_count;
1471 }
1472
1473 /* called from irq handler */
1474 static int had_process_buffer_done(struct snd_intelhad *intelhaddata)
1475 {
1476         u32 len = 1;
1477         enum intel_had_aud_buf_type buf_id;
1478         enum intel_had_aud_buf_type buff_done;
1479         struct pcm_stream_info *stream;
1480         struct snd_pcm_substream *substream;
1481         u32 buf_size;
1482         struct had_stream_data *had_stream;
1483         int intr_count;
1484         unsigned long flags;
1485
1486         had_stream = &intelhaddata->stream_data;
1487         stream = &intelhaddata->stream_info;
1488         intr_count = 1;
1489
1490         spin_lock_irqsave(&intelhaddata->had_spinlock, flags);
1491         if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED) {
1492                 spin_unlock_irqrestore(&intelhaddata->had_spinlock, flags);
1493                 dev_dbg(intelhaddata->dev,
1494                         "%s:Device already disconnected\n", __func__);
1495                 return 0;
1496         }
1497         buf_id = intelhaddata->curr_buf;
1498         intelhaddata->buff_done = buf_id;
1499         buff_done = intelhaddata->buff_done;
1500         buf_size = intelhaddata->buf_info[buf_id].buf_size;
1501
1502         /* Every debug statement has an implication
1503          * of ~5msec. Thus, avoid having >3 debug statements
1504          * for each buffer_done handling.
1505          */
1506
1507         /* Check for any intr_miss in case of active playback */
1508         if (had_stream->stream_type == HAD_RUNNING_STREAM) {
1509                 intr_count = had_chk_intrmiss(intelhaddata, buf_id);
1510                 if (!intr_count || (intr_count > 3)) {
1511                         spin_unlock_irqrestore(&intelhaddata->had_spinlock,
1512                                                flags);
1513                         dev_err(intelhaddata->dev,
1514                                 "HAD SW state in non-recoverable mode\n");
1515                         return 0;
1516                 }
1517                 buf_id += (intr_count - 1);
1518                 buf_id = buf_id % 4;
1519         }
1520
1521         intelhaddata->buf_info[buf_id].is_valid = true;
1522         if (intelhaddata->valid_buf_cnt-1 == buf_id) {
1523                 if (had_stream->stream_type >= HAD_RUNNING_STREAM)
1524                         intelhaddata->curr_buf = HAD_BUF_TYPE_A;
1525         } else
1526                 intelhaddata->curr_buf = buf_id + 1;
1527
1528         spin_unlock_irqrestore(&intelhaddata->had_spinlock, flags);
1529
1530         if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED) {
1531                 dev_dbg(intelhaddata->dev, "HDMI cable plugged-out\n");
1532                 return 0;
1533         }
1534
1535         /* Reprogram the registers with addr and length */
1536         had_write_register(intelhaddata,
1537                            AUD_BUF_A_LENGTH + (buf_id * HAD_REG_WIDTH),
1538                            buf_size);
1539         had_write_register(intelhaddata,
1540                            AUD_BUF_A_ADDR + (buf_id * HAD_REG_WIDTH),
1541                            intelhaddata->buf_info[buf_id].buf_addr |
1542                            BIT(0) | BIT(1));
1543
1544         had_read_register(intelhaddata,
1545                           AUD_BUF_A_LENGTH + (buf_id * HAD_REG_WIDTH),
1546                           &len);
1547         dev_dbg(intelhaddata->dev, "%s:Enabled buf[%d]\n", __func__, buf_id);
1548
1549         /* In case of actual data,
1550          * report buffer_done to above ALSA layer
1551          */
1552         substream = had_substream_get(intelhaddata);
1553         if (substream) {
1554                 buf_size = intelhaddata->buf_info[buf_id].buf_size;
1555                 intelhaddata->stream_info.buffer_rendered +=
1556                         (intr_count * buf_size);
1557                 snd_pcm_period_elapsed(substream);
1558                 had_substream_put(intelhaddata);
1559         }
1560
1561         return 0;
1562 }
1563
1564 /* called from irq handler */
1565 static int had_process_buffer_underrun(struct snd_intelhad *intelhaddata)
1566 {
1567         enum intel_had_aud_buf_type buf_id;
1568         struct pcm_stream_info *stream;
1569         struct had_stream_data *had_stream;
1570         struct snd_pcm_substream *substream;
1571         enum had_status_stream stream_type;
1572         unsigned long flags;
1573         int drv_status;
1574
1575         had_stream = &intelhaddata->stream_data;
1576         stream = &intelhaddata->stream_info;
1577
1578         spin_lock_irqsave(&intelhaddata->had_spinlock, flags);
1579         buf_id = intelhaddata->curr_buf;
1580         stream_type = had_stream->stream_type;
1581         intelhaddata->buff_done = buf_id;
1582         drv_status = intelhaddata->drv_status;
1583         if (stream_type == HAD_RUNNING_STREAM)
1584                 intelhaddata->curr_buf = HAD_BUF_TYPE_A;
1585
1586         spin_unlock_irqrestore(&intelhaddata->had_spinlock, flags);
1587
1588         dev_dbg(intelhaddata->dev, "Enter:%s buf_id=%d, stream_type=%d\n",
1589                         __func__, buf_id, stream_type);
1590
1591         snd_intelhad_handle_underrun(intelhaddata);
1592
1593         if (drv_status == HAD_DRV_DISCONNECTED) {
1594                 dev_dbg(intelhaddata->dev,
1595                         "%s:Device already disconnected\n", __func__);
1596                 return 0;
1597         }
1598
1599         if (stream_type == HAD_RUNNING_STREAM) {
1600                 /* Report UNDERRUN error to above layers */
1601                 substream = had_substream_get(intelhaddata);
1602                 if (substream) {
1603                         snd_pcm_stop_xrun(substream);
1604                         had_substream_put(intelhaddata);
1605                 }
1606         }
1607
1608         return 0;
1609 }
1610
1611 /* process hot plug, called from wq with mutex locked */
1612 static void had_process_hot_plug(struct snd_intelhad *intelhaddata)
1613 {
1614         enum intel_had_aud_buf_type buf_id;
1615         struct snd_pcm_substream *substream;
1616         struct had_stream_data *had_stream;
1617
1618         had_stream = &intelhaddata->stream_data;
1619
1620         spin_lock_irq(&intelhaddata->had_spinlock);
1621         if (intelhaddata->drv_status == HAD_DRV_CONNECTED) {
1622                 dev_dbg(intelhaddata->dev, "Device already connected\n");
1623                 spin_unlock_irq(&intelhaddata->had_spinlock);
1624                 return;
1625         }
1626
1627         buf_id = intelhaddata->curr_buf;
1628         intelhaddata->buff_done = buf_id;
1629         intelhaddata->drv_status = HAD_DRV_CONNECTED;
1630         dev_dbg(intelhaddata->dev,
1631                 "%s @ %d:DEBUG PLUG/UNPLUG : HAD_DRV_CONNECTED\n",
1632                         __func__, __LINE__);
1633         spin_unlock_irq(&intelhaddata->had_spinlock);
1634
1635         dev_dbg(intelhaddata->dev, "Processing HOT_PLUG, buf_id = %d\n",
1636                 buf_id);
1637
1638         /* Safety check */
1639         substream = had_substream_get(intelhaddata);
1640         if (substream) {
1641                 dev_dbg(intelhaddata->dev,
1642                         "Force to stop the active stream by disconnection\n");
1643                 /* Set runtime->state to hw_params done */
1644                 snd_pcm_stop(substream, SNDRV_PCM_STATE_SETUP);
1645                 had_substream_put(intelhaddata);
1646         }
1647
1648         had_build_channel_allocation_map(intelhaddata);
1649 }
1650
1651 /* process hot unplug, called from wq with mutex locked */
1652 static void had_process_hot_unplug(struct snd_intelhad *intelhaddata)
1653 {
1654         enum intel_had_aud_buf_type buf_id;
1655         struct had_stream_data *had_stream;
1656         struct snd_pcm_substream *substream;
1657
1658         had_stream = &intelhaddata->stream_data;
1659         buf_id = intelhaddata->curr_buf;
1660
1661         substream = had_substream_get(intelhaddata);
1662
1663         spin_lock_irq(&intelhaddata->had_spinlock);
1664
1665         if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED) {
1666                 dev_dbg(intelhaddata->dev, "Device already disconnected\n");
1667                 spin_unlock_irq(&intelhaddata->had_spinlock);
1668                 goto out;
1669
1670         }
1671
1672         /* Disable Audio */
1673         snd_intelhad_enable_audio_int(intelhaddata, false);
1674         snd_intelhad_enable_audio(substream, intelhaddata, false);
1675
1676         intelhaddata->drv_status = HAD_DRV_DISCONNECTED;
1677         dev_dbg(intelhaddata->dev,
1678                 "%s @ %d:DEBUG PLUG/UNPLUG : HAD_DRV_DISCONNECTED\n",
1679                         __func__, __LINE__);
1680         had_stream->stream_type = HAD_INIT;
1681         spin_unlock_irq(&intelhaddata->had_spinlock);
1682
1683         /* Report to above ALSA layer */
1684         if (substream)
1685                 snd_pcm_stop(substream, SNDRV_PCM_STATE_SETUP);
1686
1687  out:
1688         if (substream)
1689                 had_substream_put(intelhaddata);
1690         kfree(intelhaddata->chmap->chmap);
1691         intelhaddata->chmap->chmap = NULL;
1692 }
1693
1694 /* PCM operations structure and the calls back for the same */
1695 static struct snd_pcm_ops snd_intelhad_playback_ops = {
1696         .open =         snd_intelhad_open,
1697         .close =        snd_intelhad_close,
1698         .ioctl =        snd_pcm_lib_ioctl,
1699         .hw_params =    snd_intelhad_hw_params,
1700         .hw_free =      snd_intelhad_hw_free,
1701         .prepare =      snd_intelhad_pcm_prepare,
1702         .trigger =      snd_intelhad_pcm_trigger,
1703         .pointer =      snd_intelhad_pcm_pointer,
1704         .mmap = snd_intelhad_pcm_mmap,
1705 };
1706
1707 static int had_iec958_info(struct snd_kcontrol *kcontrol,
1708                                 struct snd_ctl_elem_info *uinfo)
1709 {
1710         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1711         uinfo->count = 1;
1712         return 0;
1713 }
1714
1715 static int had_iec958_get(struct snd_kcontrol *kcontrol,
1716                                 struct snd_ctl_elem_value *ucontrol)
1717 {
1718         struct snd_intelhad *intelhaddata = snd_kcontrol_chip(kcontrol);
1719
1720         mutex_lock(&intelhaddata->mutex);
1721         ucontrol->value.iec958.status[0] = (intelhaddata->aes_bits >> 0) & 0xff;
1722         ucontrol->value.iec958.status[1] = (intelhaddata->aes_bits >> 8) & 0xff;
1723         ucontrol->value.iec958.status[2] =
1724                                         (intelhaddata->aes_bits >> 16) & 0xff;
1725         ucontrol->value.iec958.status[3] =
1726                                         (intelhaddata->aes_bits >> 24) & 0xff;
1727         mutex_unlock(&intelhaddata->mutex);
1728         return 0;
1729 }
1730
1731 static int had_iec958_mask_get(struct snd_kcontrol *kcontrol,
1732                                 struct snd_ctl_elem_value *ucontrol)
1733 {
1734         ucontrol->value.iec958.status[0] = 0xff;
1735         ucontrol->value.iec958.status[1] = 0xff;
1736         ucontrol->value.iec958.status[2] = 0xff;
1737         ucontrol->value.iec958.status[3] = 0xff;
1738         return 0;
1739 }
1740
1741 static int had_iec958_put(struct snd_kcontrol *kcontrol,
1742                                 struct snd_ctl_elem_value *ucontrol)
1743 {
1744         unsigned int val;
1745         struct snd_intelhad *intelhaddata = snd_kcontrol_chip(kcontrol);
1746         int changed = 0;
1747
1748         val = (ucontrol->value.iec958.status[0] << 0) |
1749                 (ucontrol->value.iec958.status[1] << 8) |
1750                 (ucontrol->value.iec958.status[2] << 16) |
1751                 (ucontrol->value.iec958.status[3] << 24);
1752         mutex_lock(&intelhaddata->mutex);
1753         if (intelhaddata->aes_bits != val) {
1754                 intelhaddata->aes_bits = val;
1755                 changed = 1;
1756         }
1757         mutex_unlock(&intelhaddata->mutex);
1758         return changed;
1759 }
1760
1761 static struct snd_kcontrol_new had_control_iec958_mask = {
1762         .access =   SNDRV_CTL_ELEM_ACCESS_READ,
1763         .iface =    SNDRV_CTL_ELEM_IFACE_PCM,
1764         .name =     SNDRV_CTL_NAME_IEC958("", PLAYBACK, MASK),
1765         .info =     had_iec958_info, /* shared */
1766         .get =      had_iec958_mask_get,
1767 };
1768
1769 static struct snd_kcontrol_new had_control_iec958 = {
1770         .iface =    SNDRV_CTL_ELEM_IFACE_PCM,
1771         .name =         SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT),
1772         .info =         had_iec958_info,
1773         .get =          had_iec958_get,
1774         .put =          had_iec958_put
1775 };
1776
1777 static irqreturn_t display_pipe_interrupt_handler(int irq, void *dev_id)
1778 {
1779         struct snd_intelhad *ctx = dev_id;
1780         u32 audio_stat, audio_reg;
1781
1782         audio_reg = AUD_HDMI_STATUS;
1783         mid_hdmi_audio_read(ctx, audio_reg, &audio_stat);
1784
1785         if (audio_stat & HDMI_AUDIO_UNDERRUN) {
1786                 mid_hdmi_audio_write(ctx, audio_reg, HDMI_AUDIO_UNDERRUN);
1787                 had_process_buffer_underrun(ctx);
1788         }
1789
1790         if (audio_stat & HDMI_AUDIO_BUFFER_DONE) {
1791                 mid_hdmi_audio_write(ctx, audio_reg, HDMI_AUDIO_BUFFER_DONE);
1792                 had_process_buffer_done(ctx);
1793         }
1794
1795         return IRQ_HANDLED;
1796 }
1797
1798 static void notify_audio_lpe(struct platform_device *pdev)
1799 {
1800         struct snd_intelhad *ctx = platform_get_drvdata(pdev);
1801
1802         schedule_work(&ctx->hdmi_audio_wq);
1803 }
1804
1805 static void had_audio_wq(struct work_struct *work)
1806 {
1807         struct snd_intelhad *ctx =
1808                 container_of(work, struct snd_intelhad, hdmi_audio_wq);
1809         struct intel_hdmi_lpe_audio_pdata *pdata = ctx->dev->platform_data;
1810
1811         mutex_lock(&ctx->mutex);
1812         if (!pdata->hdmi_connected) {
1813                 dev_dbg(ctx->dev, "%s: Event: HAD_NOTIFY_HOT_UNPLUG\n",
1814                         __func__);
1815                 had_process_hot_unplug(ctx);
1816         } else {
1817                 struct intel_hdmi_lpe_audio_eld *eld = &pdata->eld;
1818
1819                 dev_dbg(ctx->dev, "%s: HAD_NOTIFY_ELD : port = %d, tmds = %d\n",
1820                         __func__, eld->port_id, pdata->tmds_clock_speed);
1821
1822                 switch (eld->pipe_id) {
1823                 case 0:
1824                         ctx->had_config_offset = AUDIO_HDMI_CONFIG_A;
1825                         break;
1826                 case 1:
1827                         ctx->had_config_offset = AUDIO_HDMI_CONFIG_B;
1828                         break;
1829                 case 2:
1830                         ctx->had_config_offset = AUDIO_HDMI_CONFIG_C;
1831                         break;
1832                 default:
1833                         dev_dbg(ctx->dev, "Invalid pipe %d\n",
1834                                 eld->pipe_id);
1835                         break;
1836                 }
1837
1838                 memcpy(&ctx->eld, eld->eld_data, sizeof(ctx->eld));
1839
1840                 ctx->dp_output = pdata->dp_output;
1841                 ctx->tmds_clock_speed = pdata->tmds_clock_speed;
1842                 ctx->link_rate = pdata->link_rate;
1843
1844                 had_process_hot_plug(ctx);
1845
1846                 /* Process mode change if stream is active */
1847                 if (ctx->stream_data.stream_type == HAD_RUNNING_STREAM)
1848                         hdmi_audio_mode_change(ctx);
1849         }
1850         mutex_unlock(&ctx->mutex);
1851 }
1852
1853 /* release resources */
1854 static void hdmi_lpe_audio_free(struct snd_card *card)
1855 {
1856         struct snd_intelhad *ctx = card->private_data;
1857
1858         cancel_work_sync(&ctx->hdmi_audio_wq);
1859
1860         if (ctx->mmio_start)
1861                 iounmap(ctx->mmio_start);
1862         if (ctx->irq >= 0)
1863                 free_irq(ctx->irq, ctx);
1864 }
1865
1866 /*
1867  * hdmi_lpe_audio_probe - start bridge with i915
1868  *
1869  * This function is called when the i915 driver creates the
1870  * hdmi-lpe-audio platform device.
1871  */
1872 static int hdmi_lpe_audio_probe(struct platform_device *pdev)
1873 {
1874         struct snd_card *card;
1875         struct snd_intelhad *ctx;
1876         struct snd_pcm *pcm;
1877         struct intel_hdmi_lpe_audio_pdata *pdata;
1878         int irq;
1879         struct resource *res_mmio;
1880         int ret;
1881
1882         dev_dbg(&pdev->dev, "dma_mask: %p\n", pdev->dev.dma_mask);
1883
1884         pdata = pdev->dev.platform_data;
1885         if (!pdata) {
1886                 dev_err(&pdev->dev, "%s: quit: pdata not allocated by i915!!\n", __func__);
1887                 return -EINVAL;
1888         }
1889
1890         /* get resources */
1891         irq = platform_get_irq(pdev, 0);
1892         if (irq < 0) {
1893                 dev_err(&pdev->dev, "Could not get irq resource\n");
1894                 return -ENODEV;
1895         }
1896
1897         res_mmio = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1898         if (!res_mmio) {
1899                 dev_err(&pdev->dev, "Could not get IO_MEM resources\n");
1900                 return -ENXIO;
1901         }
1902
1903         /* create a card instance with ALSA framework */
1904         ret = snd_card_new(&pdev->dev, hdmi_card_index, hdmi_card_id,
1905                            THIS_MODULE, sizeof(*ctx), &card);
1906         if (ret)
1907                 return ret;
1908
1909         ctx = card->private_data;
1910         spin_lock_init(&ctx->had_spinlock);
1911         mutex_init(&ctx->mutex);
1912         ctx->drv_status = HAD_DRV_DISCONNECTED;
1913         ctx->dev = &pdev->dev;
1914         ctx->card = card;
1915         ctx->aes_bits = SNDRV_PCM_DEFAULT_CON_SPDIF;
1916         strcpy(card->driver, INTEL_HAD);
1917         strcpy(card->shortname, INTEL_HAD);
1918
1919         ctx->irq = -1;
1920         ctx->tmds_clock_speed = DIS_SAMPLE_RATE_148_5;
1921         INIT_WORK(&ctx->hdmi_audio_wq, had_audio_wq);
1922
1923         card->private_free = hdmi_lpe_audio_free;
1924
1925         /* assume pipe A as default */
1926         ctx->had_config_offset = AUDIO_HDMI_CONFIG_A;
1927
1928         platform_set_drvdata(pdev, ctx);
1929
1930         dev_dbg(&pdev->dev, "%s: mmio_start = 0x%x, mmio_end = 0x%x\n",
1931                 __func__, (unsigned int)res_mmio->start,
1932                 (unsigned int)res_mmio->end);
1933
1934         ctx->mmio_start = ioremap_nocache(res_mmio->start,
1935                                           (size_t)(resource_size(res_mmio)));
1936         if (!ctx->mmio_start) {
1937                 dev_err(&pdev->dev, "Could not get ioremap\n");
1938                 ret = -EACCES;
1939                 goto err;
1940         }
1941
1942         /* setup interrupt handler */
1943         ret = request_irq(irq, display_pipe_interrupt_handler, 0,
1944                           pdev->name, ctx);
1945         if (ret < 0) {
1946                 dev_err(&pdev->dev, "request_irq failed\n");
1947                 goto err;
1948         }
1949
1950         ctx->irq = irq;
1951
1952         ret = snd_pcm_new(card, INTEL_HAD, PCM_INDEX, MAX_PB_STREAMS,
1953                           MAX_CAP_STREAMS, &pcm);
1954         if (ret)
1955                 goto err;
1956
1957         /* setup private data which can be retrieved when required */
1958         pcm->private_data = ctx;
1959         pcm->info_flags = 0;
1960         strncpy(pcm->name, card->shortname, strlen(card->shortname));
1961         /* setup the ops for playabck */
1962         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1963                             &snd_intelhad_playback_ops);
1964         /* allocate dma pages for ALSA stream operations
1965          * memory allocated is based on size, not max value
1966          * thus using same argument for max & size
1967          */
1968         snd_pcm_lib_preallocate_pages_for_all(pcm,
1969                         SNDRV_DMA_TYPE_DEV, NULL,
1970                         HAD_MAX_BUFFER, HAD_MAX_BUFFER);
1971
1972         /* IEC958 controls */
1973         ret = snd_ctl_add(card, snd_ctl_new1(&had_control_iec958_mask, ctx));
1974         if (ret < 0)
1975                 goto err;
1976         ret = snd_ctl_add(card, snd_ctl_new1(&had_control_iec958, ctx));
1977         if (ret < 0)
1978                 goto err;
1979
1980         init_channel_allocations();
1981
1982         /* Register channel map controls */
1983         ret = had_register_chmap_ctls(ctx, pcm);
1984         if (ret < 0)
1985                 goto err;
1986
1987         ret = snd_card_register(card);
1988         if (ret)
1989                 goto err;
1990
1991         spin_lock_irq(&pdata->lpe_audio_slock);
1992         pdata->notify_audio_lpe = notify_audio_lpe;
1993         pdata->notify_pending = false;
1994         spin_unlock_irq(&pdata->lpe_audio_slock);
1995
1996         pm_runtime_set_active(&pdev->dev);
1997         pm_runtime_enable(&pdev->dev);
1998
1999         dev_dbg(&pdev->dev, "%s: handle pending notification\n", __func__);
2000         schedule_work(&ctx->hdmi_audio_wq);
2001
2002         return 0;
2003
2004 err:
2005         snd_card_free(card);
2006         return ret;
2007 }
2008
2009 /*
2010  * hdmi_lpe_audio_remove - stop bridge with i915
2011  *
2012  * This function is called when the platform device is destroyed.
2013  */
2014 static int hdmi_lpe_audio_remove(struct platform_device *pdev)
2015 {
2016         struct snd_intelhad *ctx = platform_get_drvdata(pdev);
2017
2018         if (ctx->drv_status != HAD_DRV_DISCONNECTED)
2019                 snd_intelhad_enable_audio_int(ctx, false);
2020         snd_card_free(ctx->card);
2021         return 0;
2022 }
2023
2024 static struct platform_driver hdmi_lpe_audio_driver = {
2025         .driver         = {
2026                 .name  = "hdmi-lpe-audio",
2027         },
2028         .probe          = hdmi_lpe_audio_probe,
2029         .remove         = hdmi_lpe_audio_remove,
2030         .suspend        = hdmi_lpe_audio_suspend,
2031         .resume         = hdmi_lpe_audio_resume
2032 };
2033
2034 module_platform_driver(hdmi_lpe_audio_driver);
2035 MODULE_ALIAS("platform:hdmi_lpe_audio");
2036
2037 MODULE_AUTHOR("Sailaja Bandarupalli <sailaja.bandarupalli@intel.com>");
2038 MODULE_AUTHOR("Ramesh Babu K V <ramesh.babu@intel.com>");
2039 MODULE_AUTHOR("Vaibhav Agarwal <vaibhav.agarwal@intel.com>");
2040 MODULE_AUTHOR("Jerome Anand <jerome.anand@intel.com>");
2041 MODULE_DESCRIPTION("Intel HDMI Audio driver");
2042 MODULE_LICENSE("GPL v2");
2043 MODULE_SUPPORTED_DEVICE("{Intel,Intel_HAD}");