sound/x86/intel_hdmi_audio.c

   1 /*
   2  *   intel_hdmi_audio.c - Intel HDMI audio driver
   3  *
   4  *  Copyright (C) 2016 Intel Corp
   5  *  Authors:    Sailaja Bandarupalli <sailaja.bandarupalli@intel.com>
   6  *              Ramesh Babu K V <ramesh.babu@intel.com>
   7  *              Vaibhav Agarwal <vaibhav.agarwal@intel.com>
   8  *              Jerome Anand <jerome.anand@intel.com>
   9  *  ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  10  *
  11  *  This program is free software; you can redistribute it and/or modify
  12  *  it under the terms of the GNU General Public License as published by
  13  *  the Free Software Foundation; version 2 of the License.
  14  *
  15  *  This program is distributed in the hope that it will be useful, but
  16  *  WITHOUT ANY WARRANTY; without even the implied warranty of
  17  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  18  *  General Public License for more details.
  19  *
  20  * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  21  * ALSA driver for Intel HDMI audio
  22  */
  23
  24 #include <linux/platform_device.h>
  25 #include <linux/io.h>
  26 #include <linux/slab.h>
  27 #include <linux/module.h>
  28 #include <linux/interrupt.h>
  29 #include <linux/acpi.h>
  30 #include <asm/cacheflush.h>
  31 #include <sound/pcm.h>
  32 #include <sound/core.h>
  33 #include <sound/pcm_params.h>
  34 #include <sound/initval.h>
  35 #include <sound/control.h>
  36 #include <sound/initval.h>
  37 #include <drm/intel_lpe_audio.h>
  38 #include "intel_hdmi_audio.h"
  39
  40 /*standard module options for ALSA. This module supports only one card*/
  41 static int hdmi_card_index = SNDRV_DEFAULT_IDX1;
  42 static char *hdmi_card_id = SNDRV_DEFAULT_STR1;
  43
  44 module_param_named(index, hdmi_card_index, int, 0444);
  45 MODULE_PARM_DESC(index,
  46                 "Index value for INTEL Intel HDMI Audio controller.");
  47 module_param_named(id, hdmi_card_id, charp, 0444);
  48 MODULE_PARM_DESC(id,
  49                 "ID string for INTEL Intel HDMI Audio controller.");
  50
  51 /*
  52  * ELD SA bits in the CEA Speaker Allocation data block
  53  */
  54 static const int eld_speaker_allocation_bits[] = {
  55         [0] = FL | FR,
  56         [1] = LFE,
  57         [2] = FC,
  58         [3] = RL | RR,
  59         [4] = RC,
  60         [5] = FLC | FRC,
  61         [6] = RLC | RRC,
  62         /* the following are not defined in ELD yet */
  63         [7] = 0,
  64 };
  65
  66 /*
  67  * This is an ordered list!
  68  *
  69  * The preceding ones have better chances to be selected by
  70  * hdmi_channel_allocation().
  71  */
  72 static struct cea_channel_speaker_allocation channel_allocations[] = {
  73 /*                        channel:   7     6    5    4    3     2    1    0  */
  74 { .ca_index = 0x00,  .speakers = {   0,    0,   0,   0,   0,    0,  FR,  FL } },
  75                                 /* 2.1 */
  76 { .ca_index = 0x01,  .speakers = {   0,    0,   0,   0,   0,  LFE,  FR,  FL } },
  77                                 /* Dolby Surround */
  78 { .ca_index = 0x02,  .speakers = {   0,    0,   0,   0,  FC,    0,  FR,  FL } },
  79                                 /* surround40 */
  80 { .ca_index = 0x08,  .speakers = {   0,    0,  RR,  RL,   0,    0,  FR,  FL } },
  81                                 /* surround41 */
  82 { .ca_index = 0x09,  .speakers = {   0,    0,  RR,  RL,   0,  LFE,  FR,  FL } },
  83                                 /* surround50 */
  84 { .ca_index = 0x0a,  .speakers = {   0,    0,  RR,  RL,  FC,    0,  FR,  FL } },
  85                                 /* surround51 */
  86 { .ca_index = 0x0b,  .speakers = {   0,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
  87                                 /* 6.1 */
  88 { .ca_index = 0x0f,  .speakers = {   0,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
  89                                 /* surround71 */
  90 { .ca_index = 0x13,  .speakers = { RRC,  RLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
  91
  92 { .ca_index = 0x03,  .speakers = {   0,    0,   0,   0,  FC,  LFE,  FR,  FL } },
  93 { .ca_index = 0x04,  .speakers = {   0,    0,   0,  RC,   0,    0,  FR,  FL } },
  94 { .ca_index = 0x05,  .speakers = {   0,    0,   0,  RC,   0,  LFE,  FR,  FL } },
  95 { .ca_index = 0x06,  .speakers = {   0,    0,   0,  RC,  FC,    0,  FR,  FL } },
  96 { .ca_index = 0x07,  .speakers = {   0,    0,   0,  RC,  FC,  LFE,  FR,  FL } },
  97 { .ca_index = 0x0c,  .speakers = {   0,   RC,  RR,  RL,   0,    0,  FR,  FL } },
  98 { .ca_index = 0x0d,  .speakers = {   0,   RC,  RR,  RL,   0,  LFE,  FR,  FL } },
  99 { .ca_index = 0x0e,  .speakers = {   0,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 100 { .ca_index = 0x10,  .speakers = { RRC,  RLC,  RR,  RL,   0,    0,  FR,  FL } },
 101 { .ca_index = 0x11,  .speakers = { RRC,  RLC,  RR,  RL,   0,  LFE,  FR,  FL } },
 102 { .ca_index = 0x12,  .speakers = { RRC,  RLC,  RR,  RL,  FC,    0,  FR,  FL } },
 103 { .ca_index = 0x14,  .speakers = { FRC,  FLC,   0,   0,   0,    0,  FR,  FL } },
 104 { .ca_index = 0x15,  .speakers = { FRC,  FLC,   0,   0,   0,  LFE,  FR,  FL } },
 105 { .ca_index = 0x16,  .speakers = { FRC,  FLC,   0,   0,  FC,    0,  FR,  FL } },
 106 { .ca_index = 0x17,  .speakers = { FRC,  FLC,   0,   0,  FC,  LFE,  FR,  FL } },
 107 { .ca_index = 0x18,  .speakers = { FRC,  FLC,   0,  RC,   0,    0,  FR,  FL } },
 108 { .ca_index = 0x19,  .speakers = { FRC,  FLC,   0,  RC,   0,  LFE,  FR,  FL } },
 109 { .ca_index = 0x1a,  .speakers = { FRC,  FLC,   0,  RC,  FC,    0,  FR,  FL } },
 110 { .ca_index = 0x1b,  .speakers = { FRC,  FLC,   0,  RC,  FC,  LFE,  FR,  FL } },
 111 { .ca_index = 0x1c,  .speakers = { FRC,  FLC,  RR,  RL,   0,    0,  FR,  FL } },
 112 { .ca_index = 0x1d,  .speakers = { FRC,  FLC,  RR,  RL,   0,  LFE,  FR,  FL } },
 113 { .ca_index = 0x1e,  .speakers = { FRC,  FLC,  RR,  RL,  FC,    0,  FR,  FL } },
 114 { .ca_index = 0x1f,  .speakers = { FRC,  FLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 115 };
 116
 117 static const struct channel_map_table map_tables[] = {
 118         { SNDRV_CHMAP_FL,       0x00,   FL },
 119         { SNDRV_CHMAP_FR,       0x01,   FR },
 120         { SNDRV_CHMAP_RL,       0x04,   RL },
 121         { SNDRV_CHMAP_RR,       0x05,   RR },
 122         { SNDRV_CHMAP_LFE,      0x02,   LFE },
 123         { SNDRV_CHMAP_FC,       0x03,   FC },
 124         { SNDRV_CHMAP_RLC,      0x06,   RLC },
 125         { SNDRV_CHMAP_RRC,      0x07,   RRC },
 126         {} /* terminator */
 127 };
 128
 129 /* hardware capability structure */
 130 static const struct snd_pcm_hardware snd_intel_hadstream = {
 131         .info = (SNDRV_PCM_INFO_INTERLEAVED |
 132                 SNDRV_PCM_INFO_DOUBLE |
 133                 SNDRV_PCM_INFO_MMAP|
 134                 SNDRV_PCM_INFO_MMAP_VALID |
 135                 SNDRV_PCM_INFO_BATCH),
 136         .formats = (SNDRV_PCM_FMTBIT_S24 |
 137                 SNDRV_PCM_FMTBIT_U24),
 138         .rates = SNDRV_PCM_RATE_32000 |
 139                 SNDRV_PCM_RATE_44100 |
 140                 SNDRV_PCM_RATE_48000 |
 141                 SNDRV_PCM_RATE_88200 |
 142                 SNDRV_PCM_RATE_96000 |
 143                 SNDRV_PCM_RATE_176400 |
 144                 SNDRV_PCM_RATE_192000,
 145         .rate_min = HAD_MIN_RATE,
 146         .rate_max = HAD_MAX_RATE,
 147         .channels_min = HAD_MIN_CHANNEL,
 148         .channels_max = HAD_MAX_CHANNEL,
 149         .buffer_bytes_max = HAD_MAX_BUFFER,
 150         .period_bytes_min = HAD_MIN_PERIOD_BYTES,
 151         .period_bytes_max = HAD_MAX_PERIOD_BYTES,
 152         .periods_min = HAD_MIN_PERIODS,
 153         .periods_max = HAD_MAX_PERIODS,
 154         .fifo_size = HAD_FIFO_SIZE,
 155 };
 156
 157 /* Get the active PCM substream;
 158  * Call had_substream_put() for unreferecing.
 159  * Don't call this inside had_spinlock, as it takes by itself
 160  */
 161 static struct snd_pcm_substream *
 162 had_substream_get(struct snd_intelhad *intelhaddata)
 163 {
 164         struct snd_pcm_substream *substream;
 165         unsigned long flags;
 166
 167         spin_lock_irqsave(&intelhaddata->had_spinlock, flags);
 168         substream = intelhaddata->stream_info.substream;
 169         if (substream)
 170                 intelhaddata->stream_info.substream_refcount++;
 171         spin_unlock_irqrestore(&intelhaddata->had_spinlock, flags);
 172         return substream;
 173 }
 174
 175 /* Unref the active PCM substream;
 176  * Don't call this inside had_spinlock, as it takes by itself
 177  */
 178 static void had_substream_put(struct snd_intelhad *intelhaddata)
 179 {
 180         unsigned long flags;
 181
 182         spin_lock_irqsave(&intelhaddata->had_spinlock, flags);
 183         intelhaddata->stream_info.substream_refcount--;
 184         spin_unlock_irqrestore(&intelhaddata->had_spinlock, flags);
 185 }
 186
 187 /* Register access functions */
 188 static inline void
 189 mid_hdmi_audio_read(struct snd_intelhad *ctx, u32 reg, u32 *val)
 190 {
 191         *val = ioread32(ctx->mmio_start + ctx->had_config_offset + reg);
 192 }
 193
 194 static inline void
 195 mid_hdmi_audio_write(struct snd_intelhad *ctx, u32 reg, u32 val)
 196 {
 197         iowrite32(val, ctx->mmio_start + ctx->had_config_offset + reg);
 198 }
 199
 200 static int had_read_register(struct snd_intelhad *intelhaddata,
 201                              u32 offset, u32 *data)
 202 {
 203         if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED)
 204                 return -ENODEV;
 205
 206         mid_hdmi_audio_read(intelhaddata, offset, data);
 207         return 0;
 208 }
 209
 210 static void fixup_dp_config(struct snd_intelhad *intelhaddata,
 211                             u32 offset, u32 *data)
 212 {
 213         if (intelhaddata->dp_output) {
 214                 if (offset == AUD_CONFIG && (*data & AUD_CONFIG_VALID_BIT))
 215                         *data |= AUD_CONFIG_DP_MODE | AUD_CONFIG_BLOCK_BIT;
 216         }
 217 }
 218
 219 static int had_write_register(struct snd_intelhad *intelhaddata,
 220                               u32 offset, u32 data)
 221 {
 222         if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED)
 223                 return -ENODEV;
 224
 225         fixup_dp_config(intelhaddata, offset, &data);
 226         mid_hdmi_audio_write(intelhaddata, offset, data);
 227         return 0;
 228 }
 229
 230 static int had_read_modify(struct snd_intelhad *intelhaddata, u32 offset,
 231                            u32 data, u32 mask)
 232 {
 233         u32 val_tmp;
 234
 235         if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED)
 236                 return -ENODEV;
 237
 238         mid_hdmi_audio_read(intelhaddata, offset, &val_tmp);
 239         val_tmp &= ~mask;
 240         val_tmp |= (data & mask);
 241
 242         fixup_dp_config(intelhaddata, offset, &val_tmp);
 243         mid_hdmi_audio_write(intelhaddata, offset, val_tmp);
 244         return 0;
 245 }
 246
 247 /*
 248  * enable / disable audio configuration
 249  *
 250  * The had_read_modify() function should not directly be used on VLV2 for
 251  * updating AUD_CONFIG register.
 252  * This is because:
 253  * Bit6 of AUD_CONFIG register is writeonly due to a silicon bug on VLV2
 254  * HDMI IP. As a result a read-modify of AUD_CONFIG regiter will always
 255  * clear bit6. AUD_CONFIG[6:4] represents the "channels" field of the
 256  * register. This field should be 1xy binary for configuration with 6 or
 257  * more channels. Read-modify of AUD_CONFIG (Eg. for enabling audio)
 258  * causes the "channels" field to be updated as 0xy binary resulting in
 259  * bad audio. The fix is to always write the AUD_CONFIG[6:4] with
 260  * appropriate value when doing read-modify of AUD_CONFIG register.
 261  */
 262 static void snd_intelhad_enable_audio(struct snd_pcm_substream *substream,
 263                                       struct snd_intelhad *intelhaddata,
 264                                       bool enable)
 265 {
 266         union aud_cfg cfg_val = {.regval = 0};
 267         u8 channels, data, mask;
 268
 269         /*
 270          * If substream is NULL, there is no active stream.
 271          * In this case just set channels to 2
 272          */
 273         channels = substream ? substream->runtime->channels : 2;
 274         cfg_val.regx.num_ch = channels - 2;
 275
 276         data = cfg_val.regval;
 277         if (enable)
 278                 data |= 1;
 279         mask = AUD_CONFIG_CH_MASK | 1;
 280
 281         dev_dbg(intelhaddata->dev, "%s : data = %x, mask =%x\n",
 282                 __func__, data, mask);
 283
 284         had_read_modify(intelhaddata, AUD_CONFIG, data, mask);
 285 }
 286
 287 /* enable / disable the audio interface */
 288 static void snd_intelhad_enable_audio_int(struct snd_intelhad *ctx, bool enable)
 289 {
 290         u32 status_reg;
 291
 292         if (enable) {
 293                 mid_hdmi_audio_read(ctx, AUD_HDMI_STATUS, &status_reg);
 294                 status_reg |= HDMI_AUDIO_BUFFER_DONE | HDMI_AUDIO_UNDERRUN;
 295                 mid_hdmi_audio_write(ctx, AUD_HDMI_STATUS, status_reg);
 296                 mid_hdmi_audio_read(ctx, AUD_HDMI_STATUS, &status_reg);
 297         }
 298 }
 299
 300 static void snd_intelhad_reset_audio(struct snd_intelhad *intelhaddata,
 301                                      u8 reset)
 302 {
 303         had_write_register(intelhaddata, AUD_HDMI_STATUS, reset);
 304 }
 305
 306 /*
 307  * initialize audio channel status registers
 308  * This function is called in the prepare callback
 309  */
 310 static int had_prog_status_reg(struct snd_pcm_substream *substream,
 311                         struct snd_intelhad *intelhaddata)
 312 {
 313         union aud_cfg cfg_val = {.regval = 0};
 314         union aud_ch_status_0 ch_stat0 = {.regval = 0};
 315         union aud_ch_status_1 ch_stat1 = {.regval = 0};
 316         int format;
 317
 318         ch_stat0.regx.lpcm_id = (intelhaddata->aes_bits &
 319                                           IEC958_AES0_NONAUDIO) >> 1;
 320         ch_stat0.regx.clk_acc = (intelhaddata->aes_bits &
 321                                           IEC958_AES3_CON_CLOCK) >> 4;
 322         cfg_val.regx.val_bit = ch_stat0.regx.lpcm_id;
 323
 324         switch (substream->runtime->rate) {
 325         case AUD_SAMPLE_RATE_32:
 326                 ch_stat0.regx.samp_freq = CH_STATUS_MAP_32KHZ;
 327                 break;
 328
 329         case AUD_SAMPLE_RATE_44_1:
 330                 ch_stat0.regx.samp_freq = CH_STATUS_MAP_44KHZ;
 331                 break;
 332         case AUD_SAMPLE_RATE_48:
 333                 ch_stat0.regx.samp_freq = CH_STATUS_MAP_48KHZ;
 334                 break;
 335         case AUD_SAMPLE_RATE_88_2:
 336                 ch_stat0.regx.samp_freq = CH_STATUS_MAP_88KHZ;
 337                 break;
 338         case AUD_SAMPLE_RATE_96:
 339                 ch_stat0.regx.samp_freq = CH_STATUS_MAP_96KHZ;
 340                 break;
 341         case AUD_SAMPLE_RATE_176_4:
 342                 ch_stat0.regx.samp_freq = CH_STATUS_MAP_176KHZ;
 343                 break;
 344         case AUD_SAMPLE_RATE_192:
 345                 ch_stat0.regx.samp_freq = CH_STATUS_MAP_192KHZ;
 346                 break;
 347
 348         default:
 349                 /* control should never come here */
 350                 return -EINVAL;
 351         }
 352
 353         had_write_register(intelhaddata,
 354                            AUD_CH_STATUS_0, ch_stat0.regval);
 355
 356         format = substream->runtime->format;
 357
 358         if (format == SNDRV_PCM_FORMAT_S16_LE) {
 359                 ch_stat1.regx.max_wrd_len = MAX_SMPL_WIDTH_20;
 360                 ch_stat1.regx.wrd_len = SMPL_WIDTH_16BITS;
 361         } else if (format == SNDRV_PCM_FORMAT_S24_LE) {
 362                 ch_stat1.regx.max_wrd_len = MAX_SMPL_WIDTH_24;
 363                 ch_stat1.regx.wrd_len = SMPL_WIDTH_24BITS;
 364         } else {
 365                 ch_stat1.regx.max_wrd_len = 0;
 366                 ch_stat1.regx.wrd_len = 0;
 367         }
 368
 369         had_write_register(intelhaddata,
 370                            AUD_CH_STATUS_1, ch_stat1.regval);
 371         return 0;
 372 }
 373
 374 /*
 375  * function to initialize audio
 376  * registers and buffer confgiuration registers
 377  * This function is called in the prepare callback
 378  */
 379 static int snd_intelhad_audio_ctrl(struct snd_pcm_substream *substream,
 380                                    struct snd_intelhad *intelhaddata)
 381 {
 382         union aud_cfg cfg_val = {.regval = 0};
 383         union aud_buf_config buf_cfg = {.regval = 0};
 384         u8 channels;
 385
 386         had_prog_status_reg(substream, intelhaddata);
 387
 388         buf_cfg.regx.audio_fifo_watermark = FIFO_THRESHOLD;
 389         buf_cfg.regx.dma_fifo_watermark = DMA_FIFO_THRESHOLD;
 390         buf_cfg.regx.aud_delay = 0;
 391         had_write_register(intelhaddata, AUD_BUF_CONFIG, buf_cfg.regval);
 392
 393         channels = substream->runtime->channels;
 394         cfg_val.regx.num_ch = channels - 2;
 395         if (channels <= 2)
 396                 cfg_val.regx.layout = LAYOUT0;
 397         else
 398                 cfg_val.regx.layout = LAYOUT1;
 399
 400         cfg_val.regx.val_bit = 1;
 401         had_write_register(intelhaddata, AUD_CONFIG, cfg_val.regval);
 402         return 0;
 403 }
 404
 405 /*
 406  * Compute derived values in channel_allocations[].
 407  */
 408 static void init_channel_allocations(void)
 409 {
 410         int i, j;
 411         struct cea_channel_speaker_allocation *p;
 412
 413         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 414                 p = channel_allocations + i;
 415                 p->channels = 0;
 416                 p->spk_mask = 0;
 417                 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
 418                         if (p->speakers[j]) {
 419                                 p->channels++;
 420                                 p->spk_mask |= p->speakers[j];
 421                         }
 422         }
 423 }
 424
 425 /*
 426  * The transformation takes two steps:
 427  *
 428  *      eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
 429  *            spk_mask => (channel_allocations[])         => ai->CA
 430  *
 431  * TODO: it could select the wrong CA from multiple candidates.
 432  */
 433 static int snd_intelhad_channel_allocation(struct snd_intelhad *intelhaddata,
 434                                         int channels)
 435 {
 436         int i;
 437         int ca = 0;
 438         int spk_mask = 0;
 439
 440         /*
 441          * CA defaults to 0 for basic stereo audio
 442          */
 443         if (channels <= 2)
 444                 return 0;
 445
 446         /*
 447          * expand ELD's speaker allocation mask
 448          *
 449          * ELD tells the speaker mask in a compact(paired) form,
 450          * expand ELD's notions to match the ones used by Audio InfoFrame.
 451          */
 452
 453         for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
 454                 if (intelhaddata->eld[DRM_ELD_SPEAKER] & (1 << i))
 455                         spk_mask |= eld_speaker_allocation_bits[i];
 456         }
 457
 458         /* search for the first working match in the CA table */
 459         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 460                 if (channels == channel_allocations[i].channels &&
 461                 (spk_mask & channel_allocations[i].spk_mask) ==
 462                                 channel_allocations[i].spk_mask) {
 463                         ca = channel_allocations[i].ca_index;
 464                         break;
 465                 }
 466         }
 467
 468         dev_dbg(intelhaddata->dev, "select CA 0x%x for %d\n", ca, channels);
 469
 470         return ca;
 471 }
 472
 473 /* from speaker bit mask to ALSA API channel position */
 474 static int spk_to_chmap(int spk)
 475 {
 476         const struct channel_map_table *t = map_tables;
 477
 478         for (; t->map; t++) {
 479                 if (t->spk_mask == spk)
 480                         return t->map;
 481         }
 482         return 0;
 483 }
 484
 485 static void had_build_channel_allocation_map(struct snd_intelhad *intelhaddata)
 486 {
 487         int i, c;
 488         int spk_mask = 0;
 489         struct snd_pcm_chmap_elem *chmap;
 490         u8 eld_high, eld_high_mask = 0xF0;
 491         u8 high_msb;
 492
 493         chmap = kzalloc(sizeof(*chmap), GFP_KERNEL);
 494         if (!chmap) {
 495                 intelhaddata->chmap->chmap = NULL;
 496                 return;
 497         }
 498
 499         dev_dbg(intelhaddata->dev, "eld speaker = %x\n",
 500                 intelhaddata->eld[DRM_ELD_SPEAKER]);
 501
 502         /* WA: Fix the max channel supported to 8 */
 503
 504         /*
 505          * Sink may support more than 8 channels, if eld_high has more than
 506          * one bit set. SOC supports max 8 channels.
 507          * Refer eld_speaker_allocation_bits, for sink speaker allocation
 508          */
 509
 510         /* if 0x2F < eld < 0x4F fall back to 0x2f, else fall back to 0x4F */
 511         eld_high = intelhaddata->eld[DRM_ELD_SPEAKER] & eld_high_mask;
 512         if ((eld_high & (eld_high-1)) && (eld_high > 0x1F)) {
 513                 /* eld_high & (eld_high-1): if more than 1 bit set */
 514                 /* 0x1F: 7 channels */
 515                 for (i = 1; i < 4; i++) {
 516                         high_msb = eld_high & (0x80 >> i);
 517                         if (high_msb) {
 518                                 intelhaddata->eld[DRM_ELD_SPEAKER] &=
 519                                         high_msb | 0xF;
 520                                 break;
 521                         }
 522                 }
 523         }
 524
 525         for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
 526                 if (intelhaddata->eld[DRM_ELD_SPEAKER] & (1 << i))
 527                         spk_mask |= eld_speaker_allocation_bits[i];
 528         }
 529
 530         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 531                 if (spk_mask == channel_allocations[i].spk_mask) {
 532                         for (c = 0; c < channel_allocations[i].channels; c++) {
 533                                 chmap->map[c] = spk_to_chmap(
 534                                         channel_allocations[i].speakers[
 535                                                 (MAX_SPEAKERS - 1) - c]);
 536                         }
 537                         chmap->channels = channel_allocations[i].channels;
 538                         intelhaddata->chmap->chmap = chmap;
 539                         break;
 540                 }
 541         }
 542         if (i >= ARRAY_SIZE(channel_allocations)) {
 543                 intelhaddata->chmap->chmap = NULL;
 544                 kfree(chmap);
 545         }
 546 }
 547
 548 /*
 549  * ALSA API channel-map control callbacks
 550  */
 551 static int had_chmap_ctl_info(struct snd_kcontrol *kcontrol,
 552                                 struct snd_ctl_elem_info *uinfo)
 553 {
 554         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
 555         struct snd_intelhad *intelhaddata = info->private_data;
 556
 557         if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED)
 558                 return -ENODEV;
 559         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
 560         uinfo->count = HAD_MAX_CHANNEL;
 561         uinfo->value.integer.min = 0;
 562         uinfo->value.integer.max = SNDRV_CHMAP_LAST;
 563         return 0;
 564 }
 565
 566 static int had_chmap_ctl_get(struct snd_kcontrol *kcontrol,
 567                                 struct snd_ctl_elem_value *ucontrol)
 568 {
 569         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
 570         struct snd_intelhad *intelhaddata = info->private_data;
 571         int i;
 572         const struct snd_pcm_chmap_elem *chmap;
 573
 574         if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED)
 575                 return -ENODEV;
 576
 577         mutex_lock(&intelhaddata->mutex);
 578         if (!intelhaddata->chmap->chmap) {
 579                 mutex_unlock(&intelhaddata->mutex);
 580                 return -ENODATA;
 581         }
 582
 583         chmap = intelhaddata->chmap->chmap;
 584         for (i = 0; i < chmap->channels; i++)
 585                 ucontrol->value.integer.value[i] = chmap->map[i];
 586         mutex_unlock(&intelhaddata->mutex);
 587
 588         return 0;
 589 }
 590
 591 static int had_register_chmap_ctls(struct snd_intelhad *intelhaddata,
 592                                                 struct snd_pcm *pcm)
 593 {
 594         int err;
 595
 596         err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK,
 597                         NULL, 0, (unsigned long)intelhaddata,
 598                         &intelhaddata->chmap);
 599         if (err < 0)
 600                 return err;
 601
 602         intelhaddata->chmap->private_data = intelhaddata;
 603         intelhaddata->chmap->kctl->info = had_chmap_ctl_info;
 604         intelhaddata->chmap->kctl->get = had_chmap_ctl_get;
 605         intelhaddata->chmap->chmap = NULL;
 606         return 0;
 607 }
 608
 609 /*
 610  * snd_intelhad_prog_dip - to initialize Data Island Packets registers
 611  *
 612  * @substream:substream for which the prepare function is called
 613  * @intelhaddata:substream private data
 614  *
 615  * This function is called in the prepare callback
 616  */
 617 static void snd_intelhad_prog_dip(struct snd_pcm_substream *substream,
 618                                   struct snd_intelhad *intelhaddata)
 619 {
 620         int i;
 621         union aud_ctrl_st ctrl_state = {.regval = 0};
 622         union aud_info_frame2 frame2 = {.regval = 0};
 623         union aud_info_frame3 frame3 = {.regval = 0};
 624         u8 checksum = 0;
 625         u32 info_frame;
 626         int channels;
 627
 628         channels = substream->runtime->channels;
 629
 630         had_write_register(intelhaddata, AUD_CNTL_ST, ctrl_state.regval);
 631
 632         if (intelhaddata->dp_output) {
 633                 info_frame = DP_INFO_FRAME_WORD1;
 634                 frame2.regval = 1;
 635         } else {
 636                 info_frame = HDMI_INFO_FRAME_WORD1;
 637                 frame2.regx.chnl_cnt = substream->runtime->channels - 1;
 638
 639                 frame3.regx.chnl_alloc = snd_intelhad_channel_allocation(
 640                         intelhaddata, channels);
 641
 642                 /* Calculte the byte wide checksum for all valid DIP words */
 643                 for (i = 0; i < BYTES_PER_WORD; i++)
 644                         checksum += (info_frame >> (i * 8)) & 0xff;
 645                 for (i = 0; i < BYTES_PER_WORD; i++)
 646                         checksum += (frame2.regval >> (i * 8)) & 0xff;
 647                 for (i = 0; i < BYTES_PER_WORD; i++)
 648                         checksum += (frame3.regval >> (i * 8)) & 0xff;
 649
 650                 frame2.regx.chksum = -(checksum);
 651         }
 652
 653         had_write_register(intelhaddata, AUD_HDMIW_INFOFR, info_frame);
 654         had_write_register(intelhaddata, AUD_HDMIW_INFOFR, frame2.regval);
 655         had_write_register(intelhaddata, AUD_HDMIW_INFOFR, frame3.regval);
 656
 657         /* program remaining DIP words with zero */
 658         for (i = 0; i < HAD_MAX_DIP_WORDS-VALID_DIP_WORDS; i++)
 659                 had_write_register(intelhaddata, AUD_HDMIW_INFOFR, 0x0);
 660
 661         ctrl_state.regx.dip_freq = 1;
 662         ctrl_state.regx.dip_en_sta = 1;
 663         had_write_register(intelhaddata, AUD_CNTL_ST, ctrl_state.regval);
 664 }
 665
 666 /*
 667  * snd_intelhad_prog_buffer - programs buffer address and length registers
 668  * @substream: substream for which the prepare function is called
 669  * @intelhaddata: substream private data
 670  *
 671  * This function programs ring buffer address and length into registers.
 672  */
 673 static int snd_intelhad_prog_buffer(struct snd_pcm_substream *substream,
 674                                     struct snd_intelhad *intelhaddata,
 675                                     int start, int end)
 676 {
 677         u32 ring_buf_addr, ring_buf_size, period_bytes;
 678         u8 i, num_periods;
 679
 680         ring_buf_addr = substream->runtime->dma_addr;
 681         ring_buf_size = snd_pcm_lib_buffer_bytes(substream);
 682         intelhaddata->stream_info.ring_buf_size = ring_buf_size;
 683         period_bytes = frames_to_bytes(substream->runtime,
 684                                 substream->runtime->period_size);
 685         num_periods = substream->runtime->periods;
 686
 687         /*
 688          * buffer addr should  be 64 byte aligned, period bytes
 689          * will be used to calculate addr offset
 690          */
 691         period_bytes &= ~0x3F;
 692
 693         /* Hardware supports MAX_PERIODS buffers */
 694         if (end >= HAD_MAX_PERIODS)
 695                 return -EINVAL;
 696
 697         for (i = start; i <= end; i++) {
 698                 /* Program the buf registers with addr and len */
 699                 intelhaddata->buf_info[i].buf_addr = ring_buf_addr +
 700                                                          (i * period_bytes);
 701                 if (i < num_periods-1)
 702                         intelhaddata->buf_info[i].buf_size = period_bytes;
 703                 else
 704                         intelhaddata->buf_info[i].buf_size = ring_buf_size -
 705                                                         (i * period_bytes);
 706
 707                 had_write_register(intelhaddata,
 708                                    AUD_BUF_A_ADDR + (i * HAD_REG_WIDTH),
 709                                         intelhaddata->buf_info[i].buf_addr |
 710                                         BIT(0) | BIT(1));
 711                 had_write_register(intelhaddata,
 712                                    AUD_BUF_A_LENGTH + (i * HAD_REG_WIDTH),
 713                                         period_bytes);
 714                 intelhaddata->buf_info[i].is_valid = true;
 715         }
 716         dev_dbg(intelhaddata->dev, "%s:buf[%d-%d] addr=%#x  and size=%d\n",
 717                 __func__, start, end,
 718                 intelhaddata->buf_info[start].buf_addr,
 719                 intelhaddata->buf_info[start].buf_size);
 720         intelhaddata->valid_buf_cnt = num_periods;
 721         return 0;
 722 }
 723
 724 static int snd_intelhad_read_len(struct snd_intelhad *intelhaddata)
 725 {
 726         int i, retval = 0;
 727         u32 len[4];
 728
 729         for (i = 0; i < 4 ; i++) {
 730                 had_read_register(intelhaddata,
 731                                   AUD_BUF_A_LENGTH + (i * HAD_REG_WIDTH),
 732                                   &len[i]);
 733                 if (!len[i])
 734                         retval++;
 735         }
 736         if (retval != 1) {
 737                 for (i = 0; i < 4 ; i++)
 738                         dev_dbg(intelhaddata->dev, "buf[%d] size=%d\n",
 739                                 i, len[i]);
 740         }
 741
 742         return retval;
 743 }
 744
 745 static int had_calculate_maud_value(u32 aud_samp_freq, u32 link_rate)
 746 {
 747         u32 maud_val;
 748
 749         /* Select maud according to DP 1.2 spec */
 750         if (link_rate == DP_2_7_GHZ) {
 751                 switch (aud_samp_freq) {
 752                 case AUD_SAMPLE_RATE_32:
 753                         maud_val = AUD_SAMPLE_RATE_32_DP_2_7_MAUD_VAL;
 754                         break;
 755
 756                 case AUD_SAMPLE_RATE_44_1:
 757                         maud_val = AUD_SAMPLE_RATE_44_1_DP_2_7_MAUD_VAL;
 758                         break;
 759
 760                 case AUD_SAMPLE_RATE_48:
 761                         maud_val = AUD_SAMPLE_RATE_48_DP_2_7_MAUD_VAL;
 762                         break;
 763
 764                 case AUD_SAMPLE_RATE_88_2:
 765                         maud_val = AUD_SAMPLE_RATE_88_2_DP_2_7_MAUD_VAL;
 766                         break;
 767
 768                 case AUD_SAMPLE_RATE_96:
 769                         maud_val = AUD_SAMPLE_RATE_96_DP_2_7_MAUD_VAL;
 770                         break;
 771
 772                 case AUD_SAMPLE_RATE_176_4:
 773                         maud_val = AUD_SAMPLE_RATE_176_4_DP_2_7_MAUD_VAL;
 774                         break;
 775
 776                 case HAD_MAX_RATE:
 777                         maud_val = HAD_MAX_RATE_DP_2_7_MAUD_VAL;
 778                         break;
 779
 780                 default:
 781                         maud_val = -EINVAL;
 782                         break;
 783                 }
 784         } else if (link_rate == DP_1_62_GHZ) {
 785                 switch (aud_samp_freq) {
 786                 case AUD_SAMPLE_RATE_32:
 787                         maud_val = AUD_SAMPLE_RATE_32_DP_1_62_MAUD_VAL;
 788                         break;
 789
 790                 case AUD_SAMPLE_RATE_44_1:
 791                         maud_val = AUD_SAMPLE_RATE_44_1_DP_1_62_MAUD_VAL;
 792                         break;
 793
 794                 case AUD_SAMPLE_RATE_48:
 795                         maud_val = AUD_SAMPLE_RATE_48_DP_1_62_MAUD_VAL;
 796                         break;
 797
 798                 case AUD_SAMPLE_RATE_88_2:
 799                         maud_val = AUD_SAMPLE_RATE_88_2_DP_1_62_MAUD_VAL;
 800                         break;
 801
 802                 case AUD_SAMPLE_RATE_96:
 803                         maud_val = AUD_SAMPLE_RATE_96_DP_1_62_MAUD_VAL;
 804                         break;
 805
 806                 case AUD_SAMPLE_RATE_176_4:
 807                         maud_val = AUD_SAMPLE_RATE_176_4_DP_1_62_MAUD_VAL;
 808                         break;
 809
 810                 case HAD_MAX_RATE:
 811                         maud_val = HAD_MAX_RATE_DP_1_62_MAUD_VAL;
 812                         break;
 813
 814                 default:
 815                         maud_val = -EINVAL;
 816                         break;
 817                 }
 818         } else
 819                 maud_val = -EINVAL;
 820
 821         return maud_val;
 822 }
 823
 824 /*
 825  * snd_intelhad_prog_cts - Program HDMI audio CTS value
 826  *
 827  * @aud_samp_freq: sampling frequency of audio data
 828  * @tmds: sampling frequency of the display data
 829  * @n_param: N value, depends on aud_samp_freq
 830  * @intelhaddata:substream private data
 831  *
 832  * Program CTS register based on the audio and display sampling frequency
 833  */
 834 static void snd_intelhad_prog_cts(u32 aud_samp_freq, u32 tmds,
 835                                   u32 link_rate, u32 n_param,
 836                                   struct snd_intelhad *intelhaddata)
 837 {
 838         u32 cts_val;
 839         u64 dividend, divisor;
 840
 841         if (intelhaddata->dp_output) {
 842                 /* Substitute cts_val with Maud according to DP 1.2 spec*/
 843                 cts_val = had_calculate_maud_value(aud_samp_freq, link_rate);
 844         } else {
 845                 /* Calculate CTS according to HDMI 1.3a spec*/
 846                 dividend = (u64)tmds * n_param*1000;
 847                 divisor = 128 * aud_samp_freq;
 848                 cts_val = div64_u64(dividend, divisor);
 849         }
 850         dev_dbg(intelhaddata->dev, "TMDS value=%d, N value=%d, CTS Value=%d\n",
 851                  tmds, n_param, cts_val);
 852         had_write_register(intelhaddata, AUD_HDMI_CTS, (BIT(24) | cts_val));
 853 }
 854
 855 static int had_calculate_n_value(u32 aud_samp_freq)
 856 {
 857         int n_val;
 858
 859         /* Select N according to HDMI 1.3a spec*/
 860         switch (aud_samp_freq) {
 861         case AUD_SAMPLE_RATE_32:
 862                 n_val = 4096;
 863                 break;
 864
 865         case AUD_SAMPLE_RATE_44_1:
 866                 n_val = 6272;
 867                 break;
 868
 869         case AUD_SAMPLE_RATE_48:
 870                 n_val = 6144;
 871                 break;
 872
 873         case AUD_SAMPLE_RATE_88_2:
 874                 n_val = 12544;
 875                 break;
 876
 877         case AUD_SAMPLE_RATE_96:
 878                 n_val = 12288;
 879                 break;
 880
 881         case AUD_SAMPLE_RATE_176_4:
 882                 n_val = 25088;
 883                 break;
 884
 885         case HAD_MAX_RATE:
 886                 n_val = 24576;
 887                 break;
 888
 889         default:
 890                 n_val = -EINVAL;
 891                 break;
 892         }
 893         return n_val;
 894 }
 895
 896 /*
 897  * snd_intelhad_prog_n - Program HDMI audio N value
 898  *
 899  * @aud_samp_freq: sampling frequency of audio data
 900  * @n_param: N value, depends on aud_samp_freq
 901  * @intelhaddata:substream private data
 902  *
 903  * This function is called in the prepare callback.
 904  * It programs based on the audio and display sampling frequency
 905  */
 906 static int snd_intelhad_prog_n(u32 aud_samp_freq, u32 *n_param,
 907                                struct snd_intelhad *intelhaddata)
 908 {
 909         int n_val;
 910
 911         if (intelhaddata->dp_output) {
 912                 /*
 913                  * According to DP specs, Maud and Naud values hold
 914                  * a relationship, which is stated as:
 915                  * Maud/Naud = 512 * fs / f_LS_Clk
 916                  * where, fs is the sampling frequency of the audio stream
 917                  * and Naud is 32768 for Async clock.
 918                  */
 919
 920                 n_val = DP_NAUD_VAL;
 921         } else
 922                 n_val = had_calculate_n_value(aud_samp_freq);
 923
 924         if (n_val < 0)
 925                 return n_val;
 926
 927         had_write_register(intelhaddata, AUD_N_ENABLE, (BIT(24) | n_val));
 928         *n_param = n_val;
 929         return 0;
 930 }
 931
 932 static void snd_intelhad_handle_underrun(struct snd_intelhad *intelhaddata)
 933 {
 934         u32 hdmi_status = 0, i = 0;
 935
 936         /* Handle Underrun interrupt within Audio Unit */
 937         had_write_register(intelhaddata, AUD_CONFIG, 0);
 938         /* Reset buffer pointers */
 939         had_write_register(intelhaddata, AUD_HDMI_STATUS, 1);
 940         had_write_register(intelhaddata, AUD_HDMI_STATUS, 0);
 941         /*
 942          * The interrupt status 'sticky' bits might not be cleared by
 943          * setting '1' to that bit once...
 944          */
 945         do { /* clear bit30, 31 AUD_HDMI_STATUS */
 946                 had_read_register(intelhaddata, AUD_HDMI_STATUS,
 947                                   &hdmi_status);
 948                 dev_dbg(intelhaddata->dev, "HDMI status =0x%x\n", hdmi_status);
 949                 if (hdmi_status & AUD_CONFIG_MASK_UNDERRUN) {
 950                         i++;
 951                         had_write_register(intelhaddata,
 952                                            AUD_HDMI_STATUS, hdmi_status);
 953                 } else
 954                         break;
 955         } while (i < MAX_CNT);
 956         if (i >= MAX_CNT)
 957                 dev_err(intelhaddata->dev, "Unable to clear UNDERRUN bits\n");
 958 }
 959
 960 /*
 961  * snd_intelhad_open - stream initializations are done here
 962  * @substream:substream for which the stream function is called
 963  *
 964  * This function is called whenever a PCM stream is opened
 965  */
 966 static int snd_intelhad_open(struct snd_pcm_substream *substream)
 967 {
 968         struct snd_intelhad *intelhaddata;
 969         struct snd_pcm_runtime *runtime;
 970         int retval;
 971
 972         intelhaddata = snd_pcm_substream_chip(substream);
 973         runtime = substream->runtime;
 974         intelhaddata->underrun_count = 0;
 975
 976         pm_runtime_get_sync(intelhaddata->dev);
 977
 978         if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED) {
 979                 dev_dbg(intelhaddata->dev, "%s: HDMI cable plugged-out\n",
 980                         __func__);
 981                 retval = -ENODEV;
 982                 goto error;
 983         }
 984
 985         /* set the runtime hw parameter with local snd_pcm_hardware struct */
 986         runtime->hw = snd_intel_hadstream;
 987
 988         retval = snd_pcm_hw_constraint_integer(runtime,
 989                          SNDRV_PCM_HW_PARAM_PERIODS);
 990         if (retval < 0)
 991                 goto error;
 992
 993         /* Make sure, that the period size is always aligned
 994          * 64byte boundary
 995          */
 996         retval = snd_pcm_hw_constraint_step(substream->runtime, 0,
 997                         SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 64);
 998         if (retval < 0) {
 999                 dev_dbg(intelhaddata->dev, "%s:step_size=64 failed,err=%d\n",
1000                         __func__, retval);
1001                 goto error;
1002         }
1003
1004         spin_lock_irq(&intelhaddata->had_spinlock);
1005         intelhaddata->stream_info.substream = substream;
1006         intelhaddata->stream_info.substream_refcount++;
1007         spin_unlock_irq(&intelhaddata->had_spinlock);
1008
1009         return retval;
1010  error:
1011         pm_runtime_put(intelhaddata->dev);
1012         return retval;
1013 }
1014
1015 /*
1016  * snd_intelhad_close - to free parameteres when stream is stopped
1017  * @substream:  substream for which the function is called
1018  *
1019  * This function is called by ALSA framework when stream is stopped
1020  */
1021 static int snd_intelhad_close(struct snd_pcm_substream *substream)
1022 {
1023         struct snd_intelhad *intelhaddata;
1024
1025         intelhaddata = snd_pcm_substream_chip(substream);
1026
1027         intelhaddata->stream_info.buffer_rendered = 0;
1028         spin_lock_irq(&intelhaddata->had_spinlock);
1029         intelhaddata->stream_info.substream = NULL;
1030         intelhaddata->stream_info.substream_refcount--;
1031         while (intelhaddata->stream_info.substream_refcount > 0) {
1032                 spin_unlock_irq(&intelhaddata->had_spinlock);
1033                 cpu_relax();
1034                 spin_lock_irq(&intelhaddata->had_spinlock);
1035         }
1036         spin_unlock_irq(&intelhaddata->had_spinlock);
1037
1038         /* Check if following drv_status modification is required - VA */
1039         if (intelhaddata->drv_status != HAD_DRV_DISCONNECTED) {
1040                 intelhaddata->drv_status = HAD_DRV_CONNECTED;
1041                 dev_dbg(intelhaddata->dev,
1042                         "%s @ %d:DEBUG PLUG/UNPLUG : HAD_DRV_CONNECTED\n",
1043                         __func__, __LINE__);
1044         }
1045         pm_runtime_put(intelhaddata->dev);
1046         return 0;
1047 }
1048
1049 /*
1050  * snd_intelhad_hw_params - to setup the hardware parameters
1051  *   like allocating the buffers
1052  * @substream: substream for which the function is called
1053  * @hw_params: hardware parameters
1054  *
1055  * This function is called by ALSA framework when hardware params are set
1056  */
1057 static int snd_intelhad_hw_params(struct snd_pcm_substream *substream,
1058                                     struct snd_pcm_hw_params *hw_params)
1059 {
1060         struct snd_intelhad *intelhaddata;
1061         unsigned long addr;
1062         int pages, buf_size, retval;
1063
1064         if (!hw_params)
1065                 return -EINVAL;
1066
1067         intelhaddata = snd_pcm_substream_chip(substream);
1068         buf_size = params_buffer_bytes(hw_params);
1069         retval = snd_pcm_lib_malloc_pages(substream, buf_size);
1070         if (retval < 0)
1071                 return retval;
1072         dev_dbg(intelhaddata->dev, "%s:allocated memory = %d\n",
1073                 __func__, buf_size);
1074         /* mark the pages as uncached region */
1075         addr = (unsigned long) substream->runtime->dma_area;
1076         pages = (substream->runtime->dma_bytes + PAGE_SIZE - 1) / PAGE_SIZE;
1077         retval = set_memory_uc(addr, pages);
1078         if (retval) {
1079                 dev_err(intelhaddata->dev, "set_memory_uc failed.Error:%d\n",
1080                         retval);
1081                 return retval;
1082         }
1083         memset(substream->runtime->dma_area, 0, buf_size);
1084
1085         return retval;
1086 }
1087
1088 /*
1089  * snd_intelhad_hw_free - to release the resources allocated during
1090  *   hardware params setup
1091  * @substream:  substream for which the function is called
1092  *
1093  * This function is called by ALSA framework before close callback.
1094  */
1095 static int snd_intelhad_hw_free(struct snd_pcm_substream *substream)
1096 {
1097         unsigned long addr;
1098         u32 pages;
1099
1100         /* mark back the pages as cached/writeback region before the free */
1101         if (substream->runtime->dma_area != NULL) {
1102                 addr = (unsigned long) substream->runtime->dma_area;
1103                 pages = (substream->runtime->dma_bytes + PAGE_SIZE - 1) /
1104                                                                 PAGE_SIZE;
1105                 set_memory_wb(addr, pages);
1106                 return snd_pcm_lib_free_pages(substream);
1107         }
1108         return 0;
1109 }
1110
1111 /*
1112  * snd_intelhad_pcm_trigger - stream activities are handled here
1113  * @substream: substream for which the stream function is called
1114  * @cmd: the stream commamd thats requested from upper layer
1115  *
1116  * This function is called whenever an a stream activity is invoked
1117  */
1118 static int snd_intelhad_pcm_trigger(struct snd_pcm_substream *substream,
1119                                         int cmd)
1120 {
1121         int retval = 0;
1122         struct snd_intelhad *intelhaddata;
1123
1124         intelhaddata = snd_pcm_substream_chip(substream);
1125
1126         switch (cmd) {
1127         case SNDRV_PCM_TRIGGER_START:
1128         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
1129         case SNDRV_PCM_TRIGGER_RESUME:
1130                 /* Disable local INTRs till register prgmng is done */
1131                 if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED) {
1132                         dev_dbg(intelhaddata->dev,
1133                                 "_START: HDMI cable plugged-out\n");
1134                         retval = -ENODEV;
1135                         break;
1136                 }
1137
1138                 intelhaddata->stream_info.running = true;
1139
1140                 /* Enable Audio */
1141                 snd_intelhad_enable_audio_int(intelhaddata, true);
1142                 snd_intelhad_enable_audio(substream, intelhaddata, true);
1143                 break;
1144
1145         case SNDRV_PCM_TRIGGER_STOP:
1146         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
1147         case SNDRV_PCM_TRIGGER_SUSPEND:
1148                 spin_lock(&intelhaddata->had_spinlock);
1149                 intelhaddata->curr_buf = 0;
1150
1151                 /* Stop reporting BUFFER_DONE/UNDERRUN to above layers */
1152
1153                 intelhaddata->stream_info.running = false;
1154                 spin_unlock(&intelhaddata->had_spinlock);
1155                 /* Disable Audio */
1156                 snd_intelhad_enable_audio_int(intelhaddata, false);
1157                 snd_intelhad_enable_audio(substream, intelhaddata, false);
1158                 /* Reset buffer pointers */
1159                 snd_intelhad_reset_audio(intelhaddata, 1);
1160                 snd_intelhad_reset_audio(intelhaddata, 0);
1161                 snd_intelhad_enable_audio_int(intelhaddata, false);
1162                 break;
1163
1164         default:
1165                 retval = -EINVAL;
1166         }
1167         return retval;
1168 }
1169
1170 /*
1171  * snd_intelhad_pcm_prepare - internal preparation before starting a stream
1172  * @substream: substream for which the function is called
1173  *
1174  * This function is called when a stream is started for internal preparation.
1175  */
1176 static int snd_intelhad_pcm_prepare(struct snd_pcm_substream *substream)
1177 {
1178         int retval;
1179         u32 disp_samp_freq, n_param;
1180         u32 link_rate = 0;
1181         struct snd_intelhad *intelhaddata;
1182         struct snd_pcm_runtime *runtime;
1183
1184         intelhaddata = snd_pcm_substream_chip(substream);
1185         runtime = substream->runtime;
1186
1187         if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED) {
1188                 dev_dbg(intelhaddata->dev, "%s: HDMI cable plugged-out\n",
1189                         __func__);
1190                 retval = -ENODEV;
1191                 goto prep_end;
1192         }
1193
1194         dev_dbg(intelhaddata->dev, "period_size=%d\n",
1195                 (int)frames_to_bytes(runtime, runtime->period_size));
1196         dev_dbg(intelhaddata->dev, "periods=%d\n", runtime->periods);
1197         dev_dbg(intelhaddata->dev, "buffer_size=%d\n",
1198                 (int)snd_pcm_lib_buffer_bytes(substream));
1199         dev_dbg(intelhaddata->dev, "rate=%d\n", runtime->rate);
1200         dev_dbg(intelhaddata->dev, "channels=%d\n", runtime->channels);
1201
1202         intelhaddata->stream_info.buffer_rendered = 0;
1203
1204         /* Get N value in KHz */
1205         disp_samp_freq = intelhaddata->tmds_clock_speed;
1206
1207         retval = snd_intelhad_prog_n(substream->runtime->rate, &n_param,
1208                                      intelhaddata);
1209         if (retval) {
1210                 dev_err(intelhaddata->dev,
1211                         "programming N value failed %#x\n", retval);
1212                 goto prep_end;
1213         }
1214
1215         if (intelhaddata->dp_output)
1216                 link_rate = intelhaddata->link_rate;
1217
1218         snd_intelhad_prog_cts(substream->runtime->rate,
1219                               disp_samp_freq, link_rate,
1220                               n_param, intelhaddata);
1221
1222         snd_intelhad_prog_dip(substream, intelhaddata);
1223
1224         retval = snd_intelhad_audio_ctrl(substream, intelhaddata);
1225
1226         /* Prog buffer address */
1227         retval = snd_intelhad_prog_buffer(substream, intelhaddata,
1228                         HAD_BUF_TYPE_A, HAD_BUF_TYPE_D);
1229
1230         /*
1231          * Program channel mapping in following order:
1232          * FL, FR, C, LFE, RL, RR
1233          */
1234
1235         had_write_register(intelhaddata, AUD_BUF_CH_SWAP, SWAP_LFE_CENTER);
1236
1237 prep_end:
1238         return retval;
1239 }
1240
1241 /*
1242  * snd_intelhad_pcm_pointer- to send the current buffer pointerprocessed by hw
1243  * @substream: substream for which the function is called
1244  *
1245  * This function is called by ALSA framework to get the current hw buffer ptr
1246  * when a period is elapsed
1247  */
1248 static snd_pcm_uframes_t snd_intelhad_pcm_pointer(
1249                                         struct snd_pcm_substream *substream)
1250 {
1251         struct snd_intelhad *intelhaddata;
1252         u32 bytes_rendered = 0;
1253         u32 t;
1254         int buf_id;
1255
1256         intelhaddata = snd_pcm_substream_chip(substream);
1257
1258         if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED)
1259                 return SNDRV_PCM_POS_XRUN;
1260
1261         /* Use a hw register to calculate sub-period position reports.
1262          * This makes PulseAudio happier.
1263          */
1264
1265         buf_id = intelhaddata->curr_buf % 4;
1266         had_read_register(intelhaddata,
1267                           AUD_BUF_A_LENGTH + (buf_id * HAD_REG_WIDTH), &t);
1268
1269         if ((t == 0) || (t == ((u32)-1L))) {
1270                 intelhaddata->underrun_count++;
1271                 dev_dbg(intelhaddata->dev,
1272                         "discovered buffer done for buf %d, count = %d\n",
1273                          buf_id, intelhaddata->underrun_count);
1274
1275                 if (intelhaddata->underrun_count > (HAD_MIN_PERIODS/2)) {
1276                         dev_dbg(intelhaddata->dev,
1277                                 "assume audio_codec_reset, underrun = %d - do xrun\n",
1278                                  intelhaddata->underrun_count);
1279                         intelhaddata->underrun_count = 0;
1280                         return SNDRV_PCM_POS_XRUN;
1281                 }
1282         } else {
1283                 /* Reset Counter */
1284                 intelhaddata->underrun_count = 0;
1285         }
1286
1287         t = intelhaddata->buf_info[buf_id].buf_size - t;
1288
1289         if (intelhaddata->stream_info.buffer_rendered)
1290                 div_u64_rem(intelhaddata->stream_info.buffer_rendered,
1291                         intelhaddata->stream_info.ring_buf_size,
1292                         &(bytes_rendered));
1293
1294         return bytes_to_frames(substream->runtime, bytes_rendered + t);
1295 }
1296
1297 /*
1298  * snd_intelhad_pcm_mmap- mmaps a kernel buffer to user space for copying data
1299  * @substream: substream for which the function is called
1300  * @vma: struct instance of memory VMM memory area
1301  *
1302  * This function is called by OS when a user space component
1303  * tries to get mmap memory from driver
1304  */
1305 static int snd_intelhad_pcm_mmap(struct snd_pcm_substream *substream,
1306         struct vm_area_struct *vma)
1307 {
1308         vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
1309         return remap_pfn_range(vma, vma->vm_start,
1310                         substream->dma_buffer.addr >> PAGE_SHIFT,
1311                         vma->vm_end - vma->vm_start, vma->vm_page_prot);
1312 }
1313
1314 /* process mode change of the running stream; called in mutex */
1315 static int hdmi_audio_mode_change(struct snd_intelhad *intelhaddata)
1316 {
1317         struct snd_pcm_substream *substream;
1318         int retval = 0;
1319         u32 disp_samp_freq, n_param;
1320         u32 link_rate = 0;
1321
1322         substream = had_substream_get(intelhaddata);
1323         if (!substream)
1324                 return 0;
1325
1326         /* Disable Audio */
1327         snd_intelhad_enable_audio(substream, intelhaddata, false);
1328
1329         /* Update CTS value */
1330         disp_samp_freq = intelhaddata->tmds_clock_speed;
1331
1332         retval = snd_intelhad_prog_n(substream->runtime->rate, &n_param,
1333                                      intelhaddata);
1334         if (retval) {
1335                 dev_err(intelhaddata->dev,
1336                         "programming N value failed %#x\n", retval);
1337                 goto out;
1338         }
1339
1340         if (intelhaddata->dp_output)
1341                 link_rate = intelhaddata->link_rate;
1342
1343         snd_intelhad_prog_cts(substream->runtime->rate,
1344                               disp_samp_freq, link_rate,
1345                               n_param, intelhaddata);
1346
1347         /* Enable Audio */
1348         snd_intelhad_enable_audio(substream, intelhaddata, true);
1349
1350 out:
1351         had_substream_put(intelhaddata);
1352         return retval;
1353 }
1354
1355 static inline int had_chk_intrmiss(struct snd_intelhad *intelhaddata,
1356                 enum intel_had_aud_buf_type buf_id)
1357 {
1358         int i, intr_count = 0;
1359         enum intel_had_aud_buf_type buff_done;
1360         u32 buf_size, buf_addr;
1361
1362         buff_done = buf_id;
1363
1364         intr_count = snd_intelhad_read_len(intelhaddata);
1365         if (intr_count > 1) {
1366                 /* In case of active playback */
1367                 dev_err(intelhaddata->dev,
1368                         "Driver detected %d missed buffer done interrupt(s)\n",
1369                         (intr_count - 1));
1370                 if (intr_count > 3)
1371                         return intr_count;
1372
1373                 buf_id += (intr_count - 1);
1374                 /* Reprogram registers*/
1375                 for (i = buff_done; i < buf_id; i++) {
1376                         int j = i % 4;
1377
1378                         buf_size = intelhaddata->buf_info[j].buf_size;
1379                         buf_addr = intelhaddata->buf_info[j].buf_addr;
1380                         had_write_register(intelhaddata,
1381                                            AUD_BUF_A_LENGTH +
1382                                            (j * HAD_REG_WIDTH), buf_size);
1383                         had_write_register(intelhaddata,
1384                                            AUD_BUF_A_ADDR+(j * HAD_REG_WIDTH),
1385                                            (buf_addr | BIT(0) | BIT(1)));
1386                 }
1387                 buf_id = buf_id % 4;
1388                 intelhaddata->buff_done = buf_id;
1389         }
1390
1391         return intr_count;
1392 }
1393
1394 /* called from irq handler */
1395 static int had_process_buffer_done(struct snd_intelhad *intelhaddata)
1396 {
1397         u32 len = 1;
1398         enum intel_had_aud_buf_type buf_id;
1399         enum intel_had_aud_buf_type buff_done;
1400         struct pcm_stream_info *stream;
1401         struct snd_pcm_substream *substream;
1402         u32 buf_size;
1403         int intr_count;
1404         unsigned long flags;
1405
1406         stream = &intelhaddata->stream_info;
1407         intr_count = 1;
1408
1409         spin_lock_irqsave(&intelhaddata->had_spinlock, flags);
1410         if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED) {
1411                 spin_unlock_irqrestore(&intelhaddata->had_spinlock, flags);
1412                 dev_dbg(intelhaddata->dev,
1413                         "%s:Device already disconnected\n", __func__);
1414                 return 0;
1415         }
1416         buf_id = intelhaddata->curr_buf;
1417         intelhaddata->buff_done = buf_id;
1418         buff_done = intelhaddata->buff_done;
1419         buf_size = intelhaddata->buf_info[buf_id].buf_size;
1420
1421         /* Every debug statement has an implication
1422          * of ~5msec. Thus, avoid having >3 debug statements
1423          * for each buffer_done handling.
1424          */
1425
1426         /* Check for any intr_miss in case of active playback */
1427         if (stream->running) {
1428                 intr_count = had_chk_intrmiss(intelhaddata, buf_id);
1429                 if (!intr_count || (intr_count > 3)) {
1430                         spin_unlock_irqrestore(&intelhaddata->had_spinlock,
1431                                                flags);
1432                         dev_err(intelhaddata->dev,
1433                                 "HAD SW state in non-recoverable mode\n");
1434                         return 0;
1435                 }
1436                 buf_id += (intr_count - 1);
1437                 buf_id = buf_id % 4;
1438         }
1439
1440         intelhaddata->buf_info[buf_id].is_valid = true;
1441         if (intelhaddata->valid_buf_cnt-1 == buf_id) {
1442                 if (stream->running)
1443                         intelhaddata->curr_buf = HAD_BUF_TYPE_A;
1444         } else
1445                 intelhaddata->curr_buf = buf_id + 1;
1446
1447         spin_unlock_irqrestore(&intelhaddata->had_spinlock, flags);
1448
1449         if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED) {
1450                 dev_dbg(intelhaddata->dev, "HDMI cable plugged-out\n");
1451                 return 0;
1452         }
1453
1454         /* Reprogram the registers with addr and length */
1455         had_write_register(intelhaddata,
1456                            AUD_BUF_A_LENGTH + (buf_id * HAD_REG_WIDTH),
1457                            buf_size);
1458         had_write_register(intelhaddata,
1459                            AUD_BUF_A_ADDR + (buf_id * HAD_REG_WIDTH),
1460                            intelhaddata->buf_info[buf_id].buf_addr |
1461                            BIT(0) | BIT(1));
1462
1463         had_read_register(intelhaddata,
1464                           AUD_BUF_A_LENGTH + (buf_id * HAD_REG_WIDTH),
1465                           &len);
1466         dev_dbg(intelhaddata->dev, "%s:Enabled buf[%d]\n", __func__, buf_id);
1467
1468         /* In case of actual data,
1469          * report buffer_done to above ALSA layer
1470          */
1471         substream = had_substream_get(intelhaddata);
1472         if (substream) {
1473                 buf_size = intelhaddata->buf_info[buf_id].buf_size;
1474                 intelhaddata->stream_info.buffer_rendered +=
1475                         (intr_count * buf_size);
1476                 snd_pcm_period_elapsed(substream);
1477                 had_substream_put(intelhaddata);
1478         }
1479
1480         return 0;
1481 }
1482
1483 /* called from irq handler */
1484 static int had_process_buffer_underrun(struct snd_intelhad *intelhaddata)
1485 {
1486         enum intel_had_aud_buf_type buf_id;
1487         struct pcm_stream_info *stream;
1488         struct snd_pcm_substream *substream;
1489         unsigned long flags;
1490         int drv_status;
1491
1492         stream = &intelhaddata->stream_info;
1493
1494         spin_lock_irqsave(&intelhaddata->had_spinlock, flags);
1495         buf_id = intelhaddata->curr_buf;
1496         intelhaddata->buff_done = buf_id;
1497         drv_status = intelhaddata->drv_status;
1498         if (stream->running)
1499                 intelhaddata->curr_buf = HAD_BUF_TYPE_A;
1500
1501         spin_unlock_irqrestore(&intelhaddata->had_spinlock, flags);
1502
1503         dev_dbg(intelhaddata->dev, "Enter:%s buf_id=%d, stream_running=%d\n",
1504                         __func__, buf_id, stream->running);
1505
1506         snd_intelhad_handle_underrun(intelhaddata);
1507
1508         if (drv_status == HAD_DRV_DISCONNECTED) {
1509                 dev_dbg(intelhaddata->dev,
1510                         "%s:Device already disconnected\n", __func__);
1511                 return 0;
1512         }
1513
1514         /* Report UNDERRUN error to above layers */
1515         substream = had_substream_get(intelhaddata);
1516         if (substream) {
1517                 snd_pcm_stop_xrun(substream);
1518                 had_substream_put(intelhaddata);
1519         }
1520
1521         return 0;
1522 }
1523
1524 /* process hot plug, called from wq with mutex locked */
1525 static void had_process_hot_plug(struct snd_intelhad *intelhaddata)
1526 {
1527         enum intel_had_aud_buf_type buf_id;
1528         struct snd_pcm_substream *substream;
1529
1530         spin_lock_irq(&intelhaddata->had_spinlock);
1531         if (intelhaddata->drv_status == HAD_DRV_CONNECTED) {
1532                 dev_dbg(intelhaddata->dev, "Device already connected\n");
1533                 spin_unlock_irq(&intelhaddata->had_spinlock);
1534                 return;
1535         }
1536
1537         buf_id = intelhaddata->curr_buf;
1538         intelhaddata->buff_done = buf_id;
1539         intelhaddata->drv_status = HAD_DRV_CONNECTED;
1540         dev_dbg(intelhaddata->dev,
1541                 "%s @ %d:DEBUG PLUG/UNPLUG : HAD_DRV_CONNECTED\n",
1542                         __func__, __LINE__);
1543         spin_unlock_irq(&intelhaddata->had_spinlock);
1544
1545         dev_dbg(intelhaddata->dev, "Processing HOT_PLUG, buf_id = %d\n",
1546                 buf_id);
1547
1548         /* Safety check */
1549         substream = had_substream_get(intelhaddata);
1550         if (substream) {
1551                 dev_dbg(intelhaddata->dev,
1552                         "Force to stop the active stream by disconnection\n");
1553                 /* Set runtime->state to hw_params done */
1554                 snd_pcm_stop(substream, SNDRV_PCM_STATE_SETUP);
1555                 had_substream_put(intelhaddata);
1556         }
1557
1558         had_build_channel_allocation_map(intelhaddata);
1559 }
1560
1561 /* process hot unplug, called from wq with mutex locked */
1562 static void had_process_hot_unplug(struct snd_intelhad *intelhaddata)
1563 {
1564         enum intel_had_aud_buf_type buf_id;
1565         struct snd_pcm_substream *substream;
1566
1567         buf_id = intelhaddata->curr_buf;
1568
1569         substream = had_substream_get(intelhaddata);
1570
1571         spin_lock_irq(&intelhaddata->had_spinlock);
1572
1573         if (intelhaddata->drv_status == HAD_DRV_DISCONNECTED) {
1574                 dev_dbg(intelhaddata->dev, "Device already disconnected\n");
1575                 spin_unlock_irq(&intelhaddata->had_spinlock);
1576                 goto out;
1577
1578         }
1579
1580         /* Disable Audio */
1581         snd_intelhad_enable_audio_int(intelhaddata, false);
1582         snd_intelhad_enable_audio(substream, intelhaddata, false);
1583
1584         intelhaddata->drv_status = HAD_DRV_DISCONNECTED;
1585         dev_dbg(intelhaddata->dev,
1586                 "%s @ %d:DEBUG PLUG/UNPLUG : HAD_DRV_DISCONNECTED\n",
1587                         __func__, __LINE__);
1588         spin_unlock_irq(&intelhaddata->had_spinlock);
1589
1590         /* Report to above ALSA layer */
1591         if (substream)
1592                 snd_pcm_stop(substream, SNDRV_PCM_STATE_SETUP);
1593
1594  out:
1595         if (substream)
1596                 had_substream_put(intelhaddata);
1597         kfree(intelhaddata->chmap->chmap);
1598         intelhaddata->chmap->chmap = NULL;
1599 }
1600
1601 /* PCM operations structure and the calls back for the same */
1602 static struct snd_pcm_ops snd_intelhad_playback_ops = {
1603         .open =         snd_intelhad_open,
1604         .close =        snd_intelhad_close,
1605         .ioctl =        snd_pcm_lib_ioctl,
1606         .hw_params =    snd_intelhad_hw_params,
1607         .hw_free =      snd_intelhad_hw_free,
1608         .prepare =      snd_intelhad_pcm_prepare,
1609         .trigger =      snd_intelhad_pcm_trigger,
1610         .pointer =      snd_intelhad_pcm_pointer,
1611         .mmap = snd_intelhad_pcm_mmap,
1612 };
1613
1614 static int had_iec958_info(struct snd_kcontrol *kcontrol,
1615                                 struct snd_ctl_elem_info *uinfo)
1616 {
1617         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1618         uinfo->count = 1;
1619         return 0;
1620 }
1621
1622 static int had_iec958_get(struct snd_kcontrol *kcontrol,
1623                                 struct snd_ctl_elem_value *ucontrol)
1624 {
1625         struct snd_intelhad *intelhaddata = snd_kcontrol_chip(kcontrol);
1626
1627         mutex_lock(&intelhaddata->mutex);
1628         ucontrol->value.iec958.status[0] = (intelhaddata->aes_bits >> 0) & 0xff;
1629         ucontrol->value.iec958.status[1] = (intelhaddata->aes_bits >> 8) & 0xff;
1630         ucontrol->value.iec958.status[2] =
1631                                         (intelhaddata->aes_bits >> 16) & 0xff;
1632         ucontrol->value.iec958.status[3] =
1633                                         (intelhaddata->aes_bits >> 24) & 0xff;
1634         mutex_unlock(&intelhaddata->mutex);
1635         return 0;
1636 }
1637
1638 static int had_iec958_mask_get(struct snd_kcontrol *kcontrol,
1639                                 struct snd_ctl_elem_value *ucontrol)
1640 {
1641         ucontrol->value.iec958.status[0] = 0xff;
1642         ucontrol->value.iec958.status[1] = 0xff;
1643         ucontrol->value.iec958.status[2] = 0xff;
1644         ucontrol->value.iec958.status[3] = 0xff;
1645         return 0;
1646 }
1647
1648 static int had_iec958_put(struct snd_kcontrol *kcontrol,
1649                                 struct snd_ctl_elem_value *ucontrol)
1650 {
1651         unsigned int val;
1652         struct snd_intelhad *intelhaddata = snd_kcontrol_chip(kcontrol);
1653         int changed = 0;
1654
1655         val = (ucontrol->value.iec958.status[0] << 0) |
1656                 (ucontrol->value.iec958.status[1] << 8) |
1657                 (ucontrol->value.iec958.status[2] << 16) |
1658                 (ucontrol->value.iec958.status[3] << 24);
1659         mutex_lock(&intelhaddata->mutex);
1660         if (intelhaddata->aes_bits != val) {
1661                 intelhaddata->aes_bits = val;
1662                 changed = 1;
1663         }
1664         mutex_unlock(&intelhaddata->mutex);
1665         return changed;
1666 }
1667
1668 static struct snd_kcontrol_new had_control_iec958_mask = {
1669         .access =   SNDRV_CTL_ELEM_ACCESS_READ,
1670         .iface =    SNDRV_CTL_ELEM_IFACE_PCM,
1671         .name =     SNDRV_CTL_NAME_IEC958("", PLAYBACK, MASK),
1672         .info =     had_iec958_info, /* shared */
1673         .get =      had_iec958_mask_get,
1674 };
1675
1676 static struct snd_kcontrol_new had_control_iec958 = {
1677         .iface =    SNDRV_CTL_ELEM_IFACE_PCM,
1678         .name =         SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT),
1679         .info =         had_iec958_info,
1680         .get =          had_iec958_get,
1681         .put =          had_iec958_put
1682 };
1683
1684 static irqreturn_t display_pipe_interrupt_handler(int irq, void *dev_id)
1685 {
1686         struct snd_intelhad *ctx = dev_id;
1687         u32 audio_stat, audio_reg;
1688
1689         audio_reg = AUD_HDMI_STATUS;
1690         mid_hdmi_audio_read(ctx, audio_reg, &audio_stat);
1691
1692         if (audio_stat & HDMI_AUDIO_UNDERRUN) {
1693                 mid_hdmi_audio_write(ctx, audio_reg, HDMI_AUDIO_UNDERRUN);
1694                 had_process_buffer_underrun(ctx);
1695         }
1696
1697         if (audio_stat & HDMI_AUDIO_BUFFER_DONE) {
1698                 mid_hdmi_audio_write(ctx, audio_reg, HDMI_AUDIO_BUFFER_DONE);
1699                 had_process_buffer_done(ctx);
1700         }
1701
1702         return IRQ_HANDLED;
1703 }
1704
1705 static void notify_audio_lpe(struct platform_device *pdev)
1706 {
1707         struct snd_intelhad *ctx = platform_get_drvdata(pdev);
1708
1709         schedule_work(&ctx->hdmi_audio_wq);
1710 }
1711
1712 static void had_audio_wq(struct work_struct *work)
1713 {
1714         struct snd_intelhad *ctx =
1715                 container_of(work, struct snd_intelhad, hdmi_audio_wq);
1716         struct intel_hdmi_lpe_audio_pdata *pdata = ctx->dev->platform_data;
1717
1718         pm_runtime_get_sync(ctx->dev);
1719         mutex_lock(&ctx->mutex);
1720         if (!pdata->hdmi_connected) {
1721                 dev_dbg(ctx->dev, "%s: Event: HAD_NOTIFY_HOT_UNPLUG\n",
1722                         __func__);
1723                 had_process_hot_unplug(ctx);
1724         } else {
1725                 struct intel_hdmi_lpe_audio_eld *eld = &pdata->eld;
1726
1727                 dev_dbg(ctx->dev, "%s: HAD_NOTIFY_ELD : port = %d, tmds = %d\n",
1728                         __func__, eld->port_id, pdata->tmds_clock_speed);
1729
1730                 switch (eld->pipe_id) {
1731                 case 0:
1732                         ctx->had_config_offset = AUDIO_HDMI_CONFIG_A;
1733                         break;
1734                 case 1:
1735                         ctx->had_config_offset = AUDIO_HDMI_CONFIG_B;
1736                         break;
1737                 case 2:
1738                         ctx->had_config_offset = AUDIO_HDMI_CONFIG_C;
1739                         break;
1740                 default:
1741                         dev_dbg(ctx->dev, "Invalid pipe %d\n",
1742                                 eld->pipe_id);
1743                         break;
1744                 }
1745
1746                 memcpy(ctx->eld, eld->eld_data, sizeof(ctx->eld));
1747
1748                 ctx->dp_output = pdata->dp_output;
1749                 ctx->tmds_clock_speed = pdata->tmds_clock_speed;
1750                 ctx->link_rate = pdata->link_rate;
1751
1752                 had_process_hot_plug(ctx);
1753
1754                 /* Process mode change if stream is active */
1755                 hdmi_audio_mode_change(ctx);
1756         }
1757         mutex_unlock(&ctx->mutex);
1758         pm_runtime_put(ctx->dev);
1759 }
1760
1761 /*
1762  * PM callbacks
1763  */
1764
1765 static int hdmi_lpe_audio_runtime_suspend(struct device *dev)
1766 {
1767         struct snd_intelhad *ctx = dev_get_drvdata(dev);
1768         struct snd_pcm_substream *substream;
1769
1770         substream = had_substream_get(ctx);
1771         if (substream) {
1772                 snd_pcm_suspend(substream);
1773                 had_substream_put(ctx);
1774         }
1775
1776         return 0;
1777 }
1778
1779 static int hdmi_lpe_audio_suspend(struct device *dev)
1780 {
1781         struct snd_intelhad *ctx = dev_get_drvdata(dev);
1782         int err;
1783
1784         err = hdmi_lpe_audio_runtime_suspend(dev);
1785         if (!err)
1786                 snd_power_change_state(ctx->card, SNDRV_CTL_POWER_D3hot);
1787         return err;
1788 }
1789
1790 static int hdmi_lpe_audio_resume(struct device *dev)
1791 {
1792         struct snd_intelhad *ctx = dev_get_drvdata(dev);
1793
1794         snd_power_change_state(ctx->card, SNDRV_CTL_POWER_D0);
1795         return 0;
1796 }
1797
1798 /* release resources */
1799 static void hdmi_lpe_audio_free(struct snd_card *card)
1800 {
1801         struct snd_intelhad *ctx = card->private_data;
1802
1803         cancel_work_sync(&ctx->hdmi_audio_wq);
1804
1805         if (ctx->mmio_start)
1806                 iounmap(ctx->mmio_start);
1807         if (ctx->irq >= 0)
1808                 free_irq(ctx->irq, ctx);
1809 }
1810
1811 /*
1812  * hdmi_lpe_audio_probe - start bridge with i915
1813  *
1814  * This function is called when the i915 driver creates the
1815  * hdmi-lpe-audio platform device.
1816  */
1817 static int hdmi_lpe_audio_probe(struct platform_device *pdev)
1818 {
1819         struct snd_card *card;
1820         struct snd_intelhad *ctx;
1821         struct snd_pcm *pcm;
1822         struct intel_hdmi_lpe_audio_pdata *pdata;
1823         int irq;
1824         struct resource *res_mmio;
1825         int ret;
1826
1827         dev_dbg(&pdev->dev, "dma_mask: %p\n", pdev->dev.dma_mask);
1828
1829         pdata = pdev->dev.platform_data;
1830         if (!pdata) {
1831                 dev_err(&pdev->dev, "%s: quit: pdata not allocated by i915!!\n", __func__);
1832                 return -EINVAL;
1833         }
1834
1835         /* get resources */
1836         irq = platform_get_irq(pdev, 0);
1837         if (irq < 0) {
1838                 dev_err(&pdev->dev, "Could not get irq resource\n");
1839                 return -ENODEV;
1840         }
1841
1842         res_mmio = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1843         if (!res_mmio) {
1844                 dev_err(&pdev->dev, "Could not get IO_MEM resources\n");
1845                 return -ENXIO;
1846         }
1847
1848         /* create a card instance with ALSA framework */
1849         ret = snd_card_new(&pdev->dev, hdmi_card_index, hdmi_card_id,
1850                            THIS_MODULE, sizeof(*ctx), &card);
1851         if (ret)
1852                 return ret;
1853
1854         ctx = card->private_data;
1855         spin_lock_init(&ctx->had_spinlock);
1856         mutex_init(&ctx->mutex);
1857         ctx->drv_status = HAD_DRV_DISCONNECTED;
1858         ctx->dev = &pdev->dev;
1859         ctx->card = card;
1860         ctx->aes_bits = SNDRV_PCM_DEFAULT_CON_SPDIF;
1861         strcpy(card->driver, INTEL_HAD);
1862         strcpy(card->shortname, INTEL_HAD);
1863
1864         ctx->irq = -1;
1865         ctx->tmds_clock_speed = DIS_SAMPLE_RATE_148_5;
1866         INIT_WORK(&ctx->hdmi_audio_wq, had_audio_wq);
1867
1868         card->private_free = hdmi_lpe_audio_free;
1869
1870         /* assume pipe A as default */
1871         ctx->had_config_offset = AUDIO_HDMI_CONFIG_A;
1872
1873         platform_set_drvdata(pdev, ctx);
1874
1875         dev_dbg(&pdev->dev, "%s: mmio_start = 0x%x, mmio_end = 0x%x\n",
1876                 __func__, (unsigned int)res_mmio->start,
1877                 (unsigned int)res_mmio->end);
1878
1879         ctx->mmio_start = ioremap_nocache(res_mmio->start,
1880                                           (size_t)(resource_size(res_mmio)));
1881         if (!ctx->mmio_start) {
1882                 dev_err(&pdev->dev, "Could not get ioremap\n");
1883                 ret = -EACCES;
1884                 goto err;
1885         }
1886
1887         /* setup interrupt handler */
1888         ret = request_irq(irq, display_pipe_interrupt_handler, 0,
1889                           pdev->name, ctx);
1890         if (ret < 0) {
1891                 dev_err(&pdev->dev, "request_irq failed\n");
1892                 goto err;
1893         }
1894
1895         ctx->irq = irq;
1896
1897         ret = snd_pcm_new(card, INTEL_HAD, PCM_INDEX, MAX_PB_STREAMS,
1898                           MAX_CAP_STREAMS, &pcm);
1899         if (ret)
1900                 goto err;
1901
1902         /* setup private data which can be retrieved when required */
1903         pcm->private_data = ctx;
1904         pcm->info_flags = 0;
1905         strncpy(pcm->name, card->shortname, strlen(card->shortname));
1906         /* setup the ops for playabck */
1907         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1908                             &snd_intelhad_playback_ops);
1909         /* allocate dma pages for ALSA stream operations
1910          * memory allocated is based on size, not max value
1911          * thus using same argument for max & size
1912          */
1913         snd_pcm_lib_preallocate_pages_for_all(pcm,
1914                         SNDRV_DMA_TYPE_DEV, NULL,
1915                         HAD_MAX_BUFFER, HAD_MAX_BUFFER);
1916
1917         /* IEC958 controls */
1918         ret = snd_ctl_add(card, snd_ctl_new1(&had_control_iec958_mask, ctx));
1919         if (ret < 0)
1920                 goto err;
1921         ret = snd_ctl_add(card, snd_ctl_new1(&had_control_iec958, ctx));
1922         if (ret < 0)
1923                 goto err;
1924
1925         init_channel_allocations();
1926
1927         /* Register channel map controls */
1928         ret = had_register_chmap_ctls(ctx, pcm);
1929         if (ret < 0)
1930                 goto err;
1931
1932         ret = snd_card_register(card);
1933         if (ret)
1934                 goto err;
1935
1936         spin_lock_irq(&pdata->lpe_audio_slock);
1937         pdata->notify_audio_lpe = notify_audio_lpe;
1938         pdata->notify_pending = false;
1939         spin_unlock_irq(&pdata->lpe_audio_slock);
1940
1941         pm_runtime_set_active(&pdev->dev);
1942         pm_runtime_enable(&pdev->dev);
1943
1944         dev_dbg(&pdev->dev, "%s: handle pending notification\n", __func__);
1945         schedule_work(&ctx->hdmi_audio_wq);
1946
1947         return 0;
1948
1949 err:
1950         snd_card_free(card);
1951         return ret;
1952 }
1953
1954 /*
1955  * hdmi_lpe_audio_remove - stop bridge with i915
1956  *
1957  * This function is called when the platform device is destroyed.
1958  */
1959 static int hdmi_lpe_audio_remove(struct platform_device *pdev)
1960 {
1961         struct snd_intelhad *ctx = platform_get_drvdata(pdev);
1962
1963         if (ctx->drv_status != HAD_DRV_DISCONNECTED)
1964                 snd_intelhad_enable_audio_int(ctx, false);
1965         snd_card_free(ctx->card);
1966         return 0;
1967 }
1968
1969 static const struct dev_pm_ops hdmi_lpe_audio_pm = {
1970         SET_SYSTEM_SLEEP_PM_OPS(hdmi_lpe_audio_suspend, hdmi_lpe_audio_resume)
1971         SET_RUNTIME_PM_OPS(hdmi_lpe_audio_runtime_suspend, NULL, NULL)
1972 };
1973
1974 static struct platform_driver hdmi_lpe_audio_driver = {
1975         .driver         = {
1976                 .name  = "hdmi-lpe-audio",
1977                 .pm = &hdmi_lpe_audio_pm,
1978         },
1979         .probe          = hdmi_lpe_audio_probe,
1980         .remove         = hdmi_lpe_audio_remove,
1981 };
1982
1983 module_platform_driver(hdmi_lpe_audio_driver);
1984 MODULE_ALIAS("platform:hdmi_lpe_audio");
1985
1986 MODULE_AUTHOR("Sailaja Bandarupalli <sailaja.bandarupalli@intel.com>");
1987 MODULE_AUTHOR("Ramesh Babu K V <ramesh.babu@intel.com>");
1988 MODULE_AUTHOR("Vaibhav Agarwal <vaibhav.agarwal@intel.com>");
1989 MODULE_AUTHOR("Jerome Anand <jerome.anand@intel.com>");
1990 MODULE_DESCRIPTION("Intel HDMI Audio driver");
1991 MODULE_LICENSE("GPL v2");
1992 MODULE_SUPPORTED_DEVICE("{Intel,Intel_HAD}");