4 #include <asm/unistd.h>
7 #define mb() asm volatile("lock; addl $0,0(%%esp)" ::: "memory")
8 #define wmb() asm volatile("lock; addl $0,0(%%esp)" ::: "memory")
9 #define rmb() asm volatile("lock; addl $0,0(%%esp)" ::: "memory")
10 #define cpu_relax() asm volatile("rep; nop" ::: "memory");
11 #define CPUINFO_PROC "model name"
12 #ifndef __NR_perf_event_open
13 # define __NR_perf_event_open 336
16 # define __NR_futex 240
20 #if defined(__x86_64__)
21 #define mb() asm volatile("mfence" ::: "memory")
22 #define wmb() asm volatile("sfence" ::: "memory")
23 #define rmb() asm volatile("lfence" ::: "memory")
24 #define cpu_relax() asm volatile("rep; nop" ::: "memory");
25 #define CPUINFO_PROC "model name"
26 #ifndef __NR_perf_event_open
27 # define __NR_perf_event_open 298
30 # define __NR_futex 202
35 #include "../../arch/powerpc/include/uapi/asm/unistd.h"
36 #define mb() asm volatile ("sync" ::: "memory")
37 #define wmb() asm volatile ("sync" ::: "memory")
38 #define rmb() asm volatile ("sync" ::: "memory")
39 #define CPUINFO_PROC "cpu"
43 #define mb() asm volatile("bcr 15,0" ::: "memory")
44 #define wmb() asm volatile("bcr 15,0" ::: "memory")
45 #define rmb() asm volatile("bcr 15,0" ::: "memory")
49 #if defined(__SH4A__) || defined(__SH5__)
50 # define mb() asm volatile("synco" ::: "memory")
51 # define wmb() asm volatile("synco" ::: "memory")
52 # define rmb() asm volatile("synco" ::: "memory")
54 # define mb() asm volatile("" ::: "memory")
55 # define wmb() asm volatile("" ::: "memory")
56 # define rmb() asm volatile("" ::: "memory")
58 #define CPUINFO_PROC "cpu type"
62 #define mb() asm volatile("" ::: "memory")
63 #define wmb() asm volatile("" ::: "memory")
64 #define rmb() asm volatile("" ::: "memory")
65 #define CPUINFO_PROC "cpu"
70 #define mb() asm volatile("ba,pt %%xcc, 1f\n" \
71 "membar #StoreLoad\n" \
74 #define mb() asm volatile("":::"memory")
76 #define wmb() asm volatile("":::"memory")
77 #define rmb() asm volatile("":::"memory")
78 #define CPUINFO_PROC "cpu"
82 #define mb() asm volatile("mb" ::: "memory")
83 #define wmb() asm volatile("wmb" ::: "memory")
84 #define rmb() asm volatile("mb" ::: "memory")
85 #define CPUINFO_PROC "cpu model"
89 #define mb() asm volatile ("mf" ::: "memory")
90 #define wmb() asm volatile ("mf" ::: "memory")
91 #define rmb() asm volatile ("mf" ::: "memory")
92 #define cpu_relax() asm volatile ("hint @pause" ::: "memory")
93 #define CPUINFO_PROC "model name"
98 * Use the __kuser_memory_barrier helper in the CPU helper page. See
99 * arch/arm/kernel/entry-armv.S in the kernel source for details.
101 #define mb() ((void(*)(void))0xffff0fa0)()
102 #define wmb() ((void(*)(void))0xffff0fa0)()
103 #define rmb() ((void(*)(void))0xffff0fa0)()
104 #define CPUINFO_PROC "Processor"
108 #define mb() asm volatile("dmb ish" ::: "memory")
109 #define wmb() asm volatile("dmb ishst" ::: "memory")
110 #define rmb() asm volatile("dmb ishld" ::: "memory")
111 #define cpu_relax() asm volatile("yield" ::: "memory")
115 #define mb() asm volatile( \
124 #define CPUINFO_PROC "cpu model"
128 #define mb() asm volatile("" ::: "memory")
129 #define wmb() asm volatile("" ::: "memory")
130 #define rmb() asm volatile("" ::: "memory")
131 #define CPUINFO_PROC "Processor"
135 #define mb() asm volatile("" ::: "memory")
136 #define wmb() asm volatile("" ::: "memory")
137 #define rmb() asm volatile("" ::: "memory")
138 #define CPUINFO_PROC "CPU"
142 #define mb() asm volatile("memw" ::: "memory")
143 #define wmb() asm volatile("memw" ::: "memory")
144 #define rmb() asm volatile("" ::: "memory")
145 #define CPUINFO_PROC "core ID"
149 #define mb() asm volatile ("mf" ::: "memory")
150 #define wmb() asm volatile ("mf" ::: "memory")
151 #define rmb() asm volatile ("mf" ::: "memory")
152 #define cpu_relax() asm volatile ("mfspr zero, PASS" ::: "memory")
153 #define CPUINFO_PROC "model name"
156 #define barrier() asm volatile ("" ::: "memory")
159 #define cpu_relax() barrier()
162 #define ACCESS_ONCE(x) (*(volatile typeof(x) *)&(x))
167 #include <sys/types.h>
168 #include <sys/syscall.h>
170 #include <linux/perf_event.h>
171 #include "util/types.h"
175 * prctl(PR_TASK_PERF_EVENTS_DISABLE) will (cheaply) disable all
176 * counters in the current task.
178 #define PR_TASK_PERF_EVENTS_DISABLE 31
179 #define PR_TASK_PERF_EVENTS_ENABLE 32
182 # define NSEC_PER_SEC 1000000000ULL
184 #ifndef NSEC_PER_USEC
185 # define NSEC_PER_USEC 1000ULL
188 static inline unsigned long long rdclock(void)
192 clock_gettime(CLOCK_MONOTONIC, &ts);
193 return ts.tv_sec * 1000000000ULL + ts.tv_nsec;
197 * Pick up some kernel type conventions:
202 #define unlikely(x) __builtin_expect(!!(x), 0)
203 #define min(x, y) ({ \
204 typeof(x) _min1 = (x); \
205 typeof(y) _min2 = (y); \
206 (void) (&_min1 == &_min2); \
207 _min1 < _min2 ? _min1 : _min2; })
209 extern bool test_attr__enabled;
210 void test_attr__init(void);
211 void test_attr__open(struct perf_event_attr *attr, pid_t pid, int cpu,
212 int fd, int group_fd, unsigned long flags);
215 sys_perf_event_open(struct perf_event_attr *attr,
216 pid_t pid, int cpu, int group_fd,
221 fd = syscall(__NR_perf_event_open, attr, pid, cpu,
224 if (unlikely(test_attr__enabled))
225 test_attr__open(attr, pid, cpu, fd, group_fd, flags);
230 #define MAX_COUNTERS 256
231 #define MAX_NR_CPUS 256
233 struct ip_callchain {
238 struct branch_flags {
246 struct branch_entry {
249 struct branch_flags flags;
252 struct branch_stack {
254 struct branch_entry entries[0];
257 extern const char *input_name;
258 extern bool perf_host, perf_guest;
259 extern const char perf_version_string[];
261 void pthread__unblock_sigwinch(void);
263 #include "util/target.h"
265 enum perf_call_graph_mode {
273 struct target target;
275 bool call_graph_enabled;
288 unsigned int mmap_pages;
289 unsigned int user_freq;
291 u64 default_interval;
294 bool sample_transaction;
295 unsigned initial_delay;