2 * intel_pt.c: Intel Processor Trace support
3 * Copyright (c) 2013-2015, Intel Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
20 #include <linux/kernel.h>
21 #include <linux/types.h>
36 #include "thread-stack.h"
38 #include "callchain.h"
46 #include "intel-pt-decoder/intel-pt-log.h"
47 #include "intel-pt-decoder/intel-pt-decoder.h"
48 #include "intel-pt-decoder/intel-pt-insn-decoder.h"
49 #include "intel-pt-decoder/intel-pt-pkt-decoder.h"
51 #define MAX_TIMESTAMP (~0ULL)
54 struct auxtrace auxtrace;
55 struct auxtrace_queues queues;
56 struct auxtrace_heap heap;
58 struct perf_session *session;
59 struct machine *machine;
60 struct perf_evsel *switch_evsel;
61 struct thread *unknown_thread;
62 bool timeless_decoding;
71 int have_sched_switch;
77 struct perf_tsc_conversion tc;
78 bool cap_user_time_zero;
80 struct itrace_synth_opts synth_opts;
82 bool sample_instructions;
83 u64 instructions_sample_type;
88 u64 branches_sample_type;
91 bool sample_transactions;
92 u64 transactions_sample_type;
96 u64 ptwrites_sample_type;
99 bool sample_pwr_events;
100 u64 pwr_events_sample_type;
107 bool synth_needs_swap;
116 unsigned max_non_turbo_ratio;
119 unsigned long num_events;
122 struct addr_filters filts;
126 INTEL_PT_SS_NOT_TRACING,
129 INTEL_PT_SS_EXPECTING_SWITCH_EVENT,
130 INTEL_PT_SS_EXPECTING_SWITCH_IP,
133 struct intel_pt_queue {
135 unsigned int queue_nr;
136 struct auxtrace_buffer *buffer;
138 const struct intel_pt_state *state;
139 struct ip_callchain *chain;
140 struct branch_stack *last_branch;
141 struct branch_stack *last_branch_rb;
142 size_t last_branch_pos;
143 union perf_event *event_buf;
146 bool step_through_buffers;
147 bool use_buffer_pid_tid;
152 struct thread *thread;
160 char insn[INTEL_PT_INSN_BUF_SZ];
163 static void intel_pt_dump(struct intel_pt *pt __maybe_unused,
164 unsigned char *buf, size_t len)
166 struct intel_pt_pkt packet;
169 char desc[INTEL_PT_PKT_DESC_MAX];
170 const char *color = PERF_COLOR_BLUE;
172 color_fprintf(stdout, color,
173 ". ... Intel Processor Trace data: size %zu bytes\n",
177 ret = intel_pt_get_packet(buf, len, &packet);
183 color_fprintf(stdout, color, " %08x: ", pos);
184 for (i = 0; i < pkt_len; i++)
185 color_fprintf(stdout, color, " %02x", buf[i]);
187 color_fprintf(stdout, color, " ");
189 ret = intel_pt_pkt_desc(&packet, desc,
190 INTEL_PT_PKT_DESC_MAX);
192 color_fprintf(stdout, color, " %s\n", desc);
194 color_fprintf(stdout, color, " Bad packet!\n");
202 static void intel_pt_dump_event(struct intel_pt *pt, unsigned char *buf,
206 intel_pt_dump(pt, buf, len);
209 static int intel_pt_do_fix_overlap(struct intel_pt *pt, struct auxtrace_buffer *a,
210 struct auxtrace_buffer *b)
214 start = intel_pt_find_overlap(a->data, a->size, b->data, b->size,
218 b->use_size = b->data + b->size - start;
223 static void intel_pt_use_buffer_pid_tid(struct intel_pt_queue *ptq,
224 struct auxtrace_queue *queue,
225 struct auxtrace_buffer *buffer)
227 if (queue->cpu == -1 && buffer->cpu != -1)
228 ptq->cpu = buffer->cpu;
230 ptq->pid = buffer->pid;
231 ptq->tid = buffer->tid;
233 intel_pt_log("queue %u cpu %d pid %d tid %d\n",
234 ptq->queue_nr, ptq->cpu, ptq->pid, ptq->tid);
236 thread__zput(ptq->thread);
238 if (ptq->tid != -1) {
240 ptq->thread = machine__findnew_thread(ptq->pt->machine,
244 ptq->thread = machine__find_thread(ptq->pt->machine, -1,
249 /* This function assumes data is processed sequentially only */
250 static int intel_pt_get_trace(struct intel_pt_buffer *b, void *data)
252 struct intel_pt_queue *ptq = data;
253 struct auxtrace_buffer *buffer = ptq->buffer, *old_buffer = buffer;
254 struct auxtrace_queue *queue;
261 queue = &ptq->pt->queues.queue_array[ptq->queue_nr];
263 buffer = auxtrace_buffer__next(queue, buffer);
266 auxtrace_buffer__drop_data(old_buffer);
271 ptq->buffer = buffer;
274 int fd = perf_data_file__fd(ptq->pt->session->file);
276 buffer->data = auxtrace_buffer__get_data(buffer, fd);
281 if (ptq->pt->snapshot_mode && !buffer->consecutive && old_buffer &&
282 intel_pt_do_fix_overlap(ptq->pt, old_buffer, buffer))
285 if (buffer->use_data) {
286 b->len = buffer->use_size;
287 b->buf = buffer->use_data;
289 b->len = buffer->size;
290 b->buf = buffer->data;
292 b->ref_timestamp = buffer->reference;
295 * If in snapshot mode and the buffer has no usable data, get next
296 * buffer and again check overlap against old_buffer.
298 if (ptq->pt->snapshot_mode && !b->len)
302 auxtrace_buffer__drop_data(old_buffer);
304 if (!old_buffer || ptq->pt->sampling_mode || (ptq->pt->snapshot_mode &&
305 !buffer->consecutive)) {
306 b->consecutive = false;
307 b->trace_nr = buffer->buffer_nr + 1;
309 b->consecutive = true;
312 if (ptq->use_buffer_pid_tid && (ptq->pid != buffer->pid ||
313 ptq->tid != buffer->tid))
314 intel_pt_use_buffer_pid_tid(ptq, queue, buffer);
316 if (ptq->step_through_buffers)
320 return intel_pt_get_trace(b, data);
325 struct intel_pt_cache_entry {
326 struct auxtrace_cache_entry entry;
329 enum intel_pt_insn_op op;
330 enum intel_pt_insn_branch branch;
333 char insn[INTEL_PT_INSN_BUF_SZ];
336 static int intel_pt_config_div(const char *var, const char *value, void *data)
341 if (!strcmp(var, "intel-pt.cache-divisor")) {
342 val = strtol(value, NULL, 0);
343 if (val > 0 && val <= INT_MAX)
350 static int intel_pt_cache_divisor(void)
357 perf_config(intel_pt_config_div, &d);
365 static unsigned int intel_pt_cache_size(struct dso *dso,
366 struct machine *machine)
370 size = dso__data_size(dso, machine);
371 size /= intel_pt_cache_divisor();
374 if (size > (1 << 21))
376 return 32 - __builtin_clz(size);
379 static struct auxtrace_cache *intel_pt_cache(struct dso *dso,
380 struct machine *machine)
382 struct auxtrace_cache *c;
385 if (dso->auxtrace_cache)
386 return dso->auxtrace_cache;
388 bits = intel_pt_cache_size(dso, machine);
390 /* Ignoring cache creation failure */
391 c = auxtrace_cache__new(bits, sizeof(struct intel_pt_cache_entry), 200);
393 dso->auxtrace_cache = c;
398 static int intel_pt_cache_add(struct dso *dso, struct machine *machine,
399 u64 offset, u64 insn_cnt, u64 byte_cnt,
400 struct intel_pt_insn *intel_pt_insn)
402 struct auxtrace_cache *c = intel_pt_cache(dso, machine);
403 struct intel_pt_cache_entry *e;
409 e = auxtrace_cache__alloc_entry(c);
413 e->insn_cnt = insn_cnt;
414 e->byte_cnt = byte_cnt;
415 e->op = intel_pt_insn->op;
416 e->branch = intel_pt_insn->branch;
417 e->length = intel_pt_insn->length;
418 e->rel = intel_pt_insn->rel;
419 memcpy(e->insn, intel_pt_insn->buf, INTEL_PT_INSN_BUF_SZ);
421 err = auxtrace_cache__add(c, offset, &e->entry);
423 auxtrace_cache__free_entry(c, e);
428 static struct intel_pt_cache_entry *
429 intel_pt_cache_lookup(struct dso *dso, struct machine *machine, u64 offset)
431 struct auxtrace_cache *c = intel_pt_cache(dso, machine);
436 return auxtrace_cache__lookup(dso->auxtrace_cache, offset);
439 static int intel_pt_walk_next_insn(struct intel_pt_insn *intel_pt_insn,
440 uint64_t *insn_cnt_ptr, uint64_t *ip,
441 uint64_t to_ip, uint64_t max_insn_cnt,
444 struct intel_pt_queue *ptq = data;
445 struct machine *machine = ptq->pt->machine;
446 struct thread *thread;
447 struct addr_location al;
448 unsigned char buf[INTEL_PT_INSN_BUF_SZ];
452 u64 offset, start_offset, start_ip;
456 intel_pt_insn->length = 0;
458 if (to_ip && *ip == to_ip)
461 if (*ip >= ptq->pt->kernel_start)
462 cpumode = PERF_RECORD_MISC_KERNEL;
464 cpumode = PERF_RECORD_MISC_USER;
466 thread = ptq->thread;
468 if (cpumode != PERF_RECORD_MISC_KERNEL)
470 thread = ptq->pt->unknown_thread;
474 thread__find_addr_map(thread, cpumode, MAP__FUNCTION, *ip, &al);
475 if (!al.map || !al.map->dso)
478 if (al.map->dso->data.status == DSO_DATA_STATUS_ERROR &&
479 dso__data_status_seen(al.map->dso,
480 DSO_DATA_STATUS_SEEN_ITRACE))
483 offset = al.map->map_ip(al.map, *ip);
485 if (!to_ip && one_map) {
486 struct intel_pt_cache_entry *e;
488 e = intel_pt_cache_lookup(al.map->dso, machine, offset);
490 (!max_insn_cnt || e->insn_cnt <= max_insn_cnt)) {
491 *insn_cnt_ptr = e->insn_cnt;
493 intel_pt_insn->op = e->op;
494 intel_pt_insn->branch = e->branch;
495 intel_pt_insn->length = e->length;
496 intel_pt_insn->rel = e->rel;
497 memcpy(intel_pt_insn->buf, e->insn,
498 INTEL_PT_INSN_BUF_SZ);
499 intel_pt_log_insn_no_data(intel_pt_insn, *ip);
504 start_offset = offset;
507 /* Load maps to ensure dso->is_64_bit has been updated */
510 x86_64 = al.map->dso->is_64_bit;
513 len = dso__data_read_offset(al.map->dso, machine,
515 INTEL_PT_INSN_BUF_SZ);
519 if (intel_pt_get_insn(buf, len, x86_64, intel_pt_insn))
522 intel_pt_log_insn(intel_pt_insn, *ip);
526 if (intel_pt_insn->branch != INTEL_PT_BR_NO_BRANCH)
529 if (max_insn_cnt && insn_cnt >= max_insn_cnt)
532 *ip += intel_pt_insn->length;
534 if (to_ip && *ip == to_ip)
537 if (*ip >= al.map->end)
540 offset += intel_pt_insn->length;
545 *insn_cnt_ptr = insn_cnt;
551 * Didn't lookup in the 'to_ip' case, so do it now to prevent duplicate
555 struct intel_pt_cache_entry *e;
557 e = intel_pt_cache_lookup(al.map->dso, machine, start_offset);
562 /* Ignore cache errors */
563 intel_pt_cache_add(al.map->dso, machine, start_offset, insn_cnt,
564 *ip - start_ip, intel_pt_insn);
569 *insn_cnt_ptr = insn_cnt;
573 static bool intel_pt_match_pgd_ip(struct intel_pt *pt, uint64_t ip,
574 uint64_t offset, const char *filename)
576 struct addr_filter *filt;
577 bool have_filter = false;
578 bool hit_tracestop = false;
579 bool hit_filter = false;
581 list_for_each_entry(filt, &pt->filts.head, list) {
585 if ((filename && !filt->filename) ||
586 (!filename && filt->filename) ||
587 (filename && strcmp(filename, filt->filename)))
590 if (!(offset >= filt->addr && offset < filt->addr + filt->size))
593 intel_pt_log("TIP.PGD ip %#"PRIx64" offset %#"PRIx64" in %s hit filter: %s offset %#"PRIx64" size %#"PRIx64"\n",
594 ip, offset, filename ? filename : "[kernel]",
595 filt->start ? "filter" : "stop",
596 filt->addr, filt->size);
601 hit_tracestop = true;
604 if (!hit_tracestop && !hit_filter)
605 intel_pt_log("TIP.PGD ip %#"PRIx64" offset %#"PRIx64" in %s is not in a filter region\n",
606 ip, offset, filename ? filename : "[kernel]");
608 return hit_tracestop || (have_filter && !hit_filter);
611 static int __intel_pt_pgd_ip(uint64_t ip, void *data)
613 struct intel_pt_queue *ptq = data;
614 struct thread *thread;
615 struct addr_location al;
619 if (ip >= ptq->pt->kernel_start)
620 return intel_pt_match_pgd_ip(ptq->pt, ip, ip, NULL);
622 cpumode = PERF_RECORD_MISC_USER;
624 thread = ptq->thread;
628 thread__find_addr_map(thread, cpumode, MAP__FUNCTION, ip, &al);
629 if (!al.map || !al.map->dso)
632 offset = al.map->map_ip(al.map, ip);
634 return intel_pt_match_pgd_ip(ptq->pt, ip, offset,
635 al.map->dso->long_name);
638 static bool intel_pt_pgd_ip(uint64_t ip, void *data)
640 return __intel_pt_pgd_ip(ip, data) > 0;
643 static bool intel_pt_get_config(struct intel_pt *pt,
644 struct perf_event_attr *attr, u64 *config)
646 if (attr->type == pt->pmu_type) {
648 *config = attr->config;
655 static bool intel_pt_exclude_kernel(struct intel_pt *pt)
657 struct perf_evsel *evsel;
659 evlist__for_each_entry(pt->session->evlist, evsel) {
660 if (intel_pt_get_config(pt, &evsel->attr, NULL) &&
661 !evsel->attr.exclude_kernel)
667 static bool intel_pt_return_compression(struct intel_pt *pt)
669 struct perf_evsel *evsel;
672 if (!pt->noretcomp_bit)
675 evlist__for_each_entry(pt->session->evlist, evsel) {
676 if (intel_pt_get_config(pt, &evsel->attr, &config) &&
677 (config & pt->noretcomp_bit))
683 static bool intel_pt_branch_enable(struct intel_pt *pt)
685 struct perf_evsel *evsel;
688 evlist__for_each_entry(pt->session->evlist, evsel) {
689 if (intel_pt_get_config(pt, &evsel->attr, &config) &&
690 (config & 1) && !(config & 0x2000))
696 static unsigned int intel_pt_mtc_period(struct intel_pt *pt)
698 struct perf_evsel *evsel;
702 if (!pt->mtc_freq_bits)
705 for (shift = 0, config = pt->mtc_freq_bits; !(config & 1); shift++)
708 evlist__for_each_entry(pt->session->evlist, evsel) {
709 if (intel_pt_get_config(pt, &evsel->attr, &config))
710 return (config & pt->mtc_freq_bits) >> shift;
715 static bool intel_pt_timeless_decoding(struct intel_pt *pt)
717 struct perf_evsel *evsel;
718 bool timeless_decoding = true;
721 if (!pt->tsc_bit || !pt->cap_user_time_zero)
724 evlist__for_each_entry(pt->session->evlist, evsel) {
725 if (!(evsel->attr.sample_type & PERF_SAMPLE_TIME))
727 if (intel_pt_get_config(pt, &evsel->attr, &config)) {
728 if (config & pt->tsc_bit)
729 timeless_decoding = false;
734 return timeless_decoding;
737 static bool intel_pt_tracing_kernel(struct intel_pt *pt)
739 struct perf_evsel *evsel;
741 evlist__for_each_entry(pt->session->evlist, evsel) {
742 if (intel_pt_get_config(pt, &evsel->attr, NULL) &&
743 !evsel->attr.exclude_kernel)
749 static bool intel_pt_have_tsc(struct intel_pt *pt)
751 struct perf_evsel *evsel;
752 bool have_tsc = false;
758 evlist__for_each_entry(pt->session->evlist, evsel) {
759 if (intel_pt_get_config(pt, &evsel->attr, &config)) {
760 if (config & pt->tsc_bit)
769 static u64 intel_pt_ns_to_ticks(const struct intel_pt *pt, u64 ns)
773 quot = ns / pt->tc.time_mult;
774 rem = ns % pt->tc.time_mult;
775 return (quot << pt->tc.time_shift) + (rem << pt->tc.time_shift) /
779 static struct intel_pt_queue *intel_pt_alloc_queue(struct intel_pt *pt,
780 unsigned int queue_nr)
782 struct intel_pt_params params = { .get_trace = 0, };
783 struct intel_pt_queue *ptq;
785 ptq = zalloc(sizeof(struct intel_pt_queue));
789 if (pt->synth_opts.callchain) {
790 size_t sz = sizeof(struct ip_callchain);
792 sz += pt->synth_opts.callchain_sz * sizeof(u64);
793 ptq->chain = zalloc(sz);
798 if (pt->synth_opts.last_branch) {
799 size_t sz = sizeof(struct branch_stack);
801 sz += pt->synth_opts.last_branch_sz *
802 sizeof(struct branch_entry);
803 ptq->last_branch = zalloc(sz);
804 if (!ptq->last_branch)
806 ptq->last_branch_rb = zalloc(sz);
807 if (!ptq->last_branch_rb)
811 ptq->event_buf = malloc(PERF_SAMPLE_MAX_SIZE);
816 ptq->queue_nr = queue_nr;
817 ptq->exclude_kernel = intel_pt_exclude_kernel(pt);
823 params.get_trace = intel_pt_get_trace;
824 params.walk_insn = intel_pt_walk_next_insn;
826 params.return_compression = intel_pt_return_compression(pt);
827 params.branch_enable = intel_pt_branch_enable(pt);
828 params.max_non_turbo_ratio = pt->max_non_turbo_ratio;
829 params.mtc_period = intel_pt_mtc_period(pt);
830 params.tsc_ctc_ratio_n = pt->tsc_ctc_ratio_n;
831 params.tsc_ctc_ratio_d = pt->tsc_ctc_ratio_d;
833 if (pt->filts.cnt > 0)
834 params.pgd_ip = intel_pt_pgd_ip;
836 if (pt->synth_opts.instructions) {
837 if (pt->synth_opts.period) {
838 switch (pt->synth_opts.period_type) {
839 case PERF_ITRACE_PERIOD_INSTRUCTIONS:
841 INTEL_PT_PERIOD_INSTRUCTIONS;
842 params.period = pt->synth_opts.period;
844 case PERF_ITRACE_PERIOD_TICKS:
845 params.period_type = INTEL_PT_PERIOD_TICKS;
846 params.period = pt->synth_opts.period;
848 case PERF_ITRACE_PERIOD_NANOSECS:
849 params.period_type = INTEL_PT_PERIOD_TICKS;
850 params.period = intel_pt_ns_to_ticks(pt,
851 pt->synth_opts.period);
858 if (!params.period) {
859 params.period_type = INTEL_PT_PERIOD_INSTRUCTIONS;
864 ptq->decoder = intel_pt_decoder_new(¶ms);
871 zfree(&ptq->event_buf);
872 zfree(&ptq->last_branch);
873 zfree(&ptq->last_branch_rb);
879 static void intel_pt_free_queue(void *priv)
881 struct intel_pt_queue *ptq = priv;
885 thread__zput(ptq->thread);
886 intel_pt_decoder_free(ptq->decoder);
887 zfree(&ptq->event_buf);
888 zfree(&ptq->last_branch);
889 zfree(&ptq->last_branch_rb);
894 static void intel_pt_set_pid_tid_cpu(struct intel_pt *pt,
895 struct auxtrace_queue *queue)
897 struct intel_pt_queue *ptq = queue->priv;
899 if (queue->tid == -1 || pt->have_sched_switch) {
900 ptq->tid = machine__get_current_tid(pt->machine, ptq->cpu);
901 thread__zput(ptq->thread);
904 if (!ptq->thread && ptq->tid != -1)
905 ptq->thread = machine__find_thread(pt->machine, -1, ptq->tid);
908 ptq->pid = ptq->thread->pid_;
909 if (queue->cpu == -1)
910 ptq->cpu = ptq->thread->cpu;
914 static void intel_pt_sample_flags(struct intel_pt_queue *ptq)
916 if (ptq->state->flags & INTEL_PT_ABORT_TX) {
917 ptq->flags = PERF_IP_FLAG_BRANCH | PERF_IP_FLAG_TX_ABORT;
918 } else if (ptq->state->flags & INTEL_PT_ASYNC) {
919 if (ptq->state->to_ip)
920 ptq->flags = PERF_IP_FLAG_BRANCH | PERF_IP_FLAG_CALL |
922 PERF_IP_FLAG_INTERRUPT;
924 ptq->flags = PERF_IP_FLAG_BRANCH |
925 PERF_IP_FLAG_TRACE_END;
928 if (ptq->state->from_ip)
929 ptq->flags = intel_pt_insn_type(ptq->state->insn_op);
931 ptq->flags = PERF_IP_FLAG_BRANCH |
932 PERF_IP_FLAG_TRACE_BEGIN;
933 if (ptq->state->flags & INTEL_PT_IN_TX)
934 ptq->flags |= PERF_IP_FLAG_IN_TX;
935 ptq->insn_len = ptq->state->insn_len;
936 memcpy(ptq->insn, ptq->state->insn, INTEL_PT_INSN_BUF_SZ);
940 static int intel_pt_setup_queue(struct intel_pt *pt,
941 struct auxtrace_queue *queue,
942 unsigned int queue_nr)
944 struct intel_pt_queue *ptq = queue->priv;
946 if (list_empty(&queue->head))
950 ptq = intel_pt_alloc_queue(pt, queue_nr);
955 if (queue->cpu != -1)
956 ptq->cpu = queue->cpu;
957 ptq->tid = queue->tid;
959 if (pt->sampling_mode) {
960 if (pt->timeless_decoding)
961 ptq->step_through_buffers = true;
962 if (pt->timeless_decoding || !pt->have_sched_switch)
963 ptq->use_buffer_pid_tid = true;
969 ptq->switch_state != INTEL_PT_SS_EXPECTING_SWITCH_EVENT)) {
970 const struct intel_pt_state *state;
973 if (pt->timeless_decoding)
976 intel_pt_log("queue %u getting timestamp\n", queue_nr);
977 intel_pt_log("queue %u decoding cpu %d pid %d tid %d\n",
978 queue_nr, ptq->cpu, ptq->pid, ptq->tid);
980 state = intel_pt_decode(ptq->decoder);
982 if (state->err == INTEL_PT_ERR_NODATA) {
983 intel_pt_log("queue %u has no timestamp\n",
989 if (state->timestamp)
993 ptq->timestamp = state->timestamp;
994 intel_pt_log("queue %u timestamp 0x%" PRIx64 "\n",
995 queue_nr, ptq->timestamp);
997 ptq->have_sample = true;
998 intel_pt_sample_flags(ptq);
999 ret = auxtrace_heap__add(&pt->heap, queue_nr, ptq->timestamp);
1002 ptq->on_heap = true;
1008 static int intel_pt_setup_queues(struct intel_pt *pt)
1013 for (i = 0; i < pt->queues.nr_queues; i++) {
1014 ret = intel_pt_setup_queue(pt, &pt->queues.queue_array[i], i);
1021 static inline void intel_pt_copy_last_branch_rb(struct intel_pt_queue *ptq)
1023 struct branch_stack *bs_src = ptq->last_branch_rb;
1024 struct branch_stack *bs_dst = ptq->last_branch;
1027 bs_dst->nr = bs_src->nr;
1032 nr = ptq->pt->synth_opts.last_branch_sz - ptq->last_branch_pos;
1033 memcpy(&bs_dst->entries[0],
1034 &bs_src->entries[ptq->last_branch_pos],
1035 sizeof(struct branch_entry) * nr);
1037 if (bs_src->nr >= ptq->pt->synth_opts.last_branch_sz) {
1038 memcpy(&bs_dst->entries[nr],
1039 &bs_src->entries[0],
1040 sizeof(struct branch_entry) * ptq->last_branch_pos);
1044 static inline void intel_pt_reset_last_branch_rb(struct intel_pt_queue *ptq)
1046 ptq->last_branch_pos = 0;
1047 ptq->last_branch_rb->nr = 0;
1050 static void intel_pt_update_last_branch_rb(struct intel_pt_queue *ptq)
1052 const struct intel_pt_state *state = ptq->state;
1053 struct branch_stack *bs = ptq->last_branch_rb;
1054 struct branch_entry *be;
1056 if (!ptq->last_branch_pos)
1057 ptq->last_branch_pos = ptq->pt->synth_opts.last_branch_sz;
1059 ptq->last_branch_pos -= 1;
1061 be = &bs->entries[ptq->last_branch_pos];
1062 be->from = state->from_ip;
1063 be->to = state->to_ip;
1064 be->flags.abort = !!(state->flags & INTEL_PT_ABORT_TX);
1065 be->flags.in_tx = !!(state->flags & INTEL_PT_IN_TX);
1066 /* No support for mispredict */
1067 be->flags.mispred = ptq->pt->mispred_all;
1069 if (bs->nr < ptq->pt->synth_opts.last_branch_sz)
1073 static inline bool intel_pt_skip_event(struct intel_pt *pt)
1075 return pt->synth_opts.initial_skip &&
1076 pt->num_events++ < pt->synth_opts.initial_skip;
1079 static void intel_pt_prep_b_sample(struct intel_pt *pt,
1080 struct intel_pt_queue *ptq,
1081 union perf_event *event,
1082 struct perf_sample *sample)
1084 event->sample.header.type = PERF_RECORD_SAMPLE;
1085 event->sample.header.misc = PERF_RECORD_MISC_USER;
1086 event->sample.header.size = sizeof(struct perf_event_header);
1088 if (!pt->timeless_decoding)
1089 sample->time = tsc_to_perf_time(ptq->timestamp, &pt->tc);
1091 sample->cpumode = PERF_RECORD_MISC_USER;
1092 sample->ip = ptq->state->from_ip;
1093 sample->pid = ptq->pid;
1094 sample->tid = ptq->tid;
1095 sample->addr = ptq->state->to_ip;
1097 sample->cpu = ptq->cpu;
1098 sample->flags = ptq->flags;
1099 sample->insn_len = ptq->insn_len;
1100 memcpy(sample->insn, ptq->insn, INTEL_PT_INSN_BUF_SZ);
1103 static int intel_pt_inject_event(union perf_event *event,
1104 struct perf_sample *sample, u64 type,
1107 event->header.size = perf_event__sample_event_size(sample, type, 0);
1108 return perf_event__synthesize_sample(event, type, 0, sample, swapped);
1111 static inline int intel_pt_opt_inject(struct intel_pt *pt,
1112 union perf_event *event,
1113 struct perf_sample *sample, u64 type)
1115 if (!pt->synth_opts.inject)
1118 return intel_pt_inject_event(event, sample, type, pt->synth_needs_swap);
1121 static int intel_pt_deliver_synth_b_event(struct intel_pt *pt,
1122 union perf_event *event,
1123 struct perf_sample *sample, u64 type)
1127 ret = intel_pt_opt_inject(pt, event, sample, type);
1131 ret = perf_session__deliver_synth_event(pt->session, event, sample);
1133 pr_err("Intel PT: failed to deliver event, error %d\n", ret);
1138 static int intel_pt_synth_branch_sample(struct intel_pt_queue *ptq)
1140 struct intel_pt *pt = ptq->pt;
1141 union perf_event *event = ptq->event_buf;
1142 struct perf_sample sample = { .ip = 0, };
1143 struct dummy_branch_stack {
1145 struct branch_entry entries;
1148 if (pt->branches_filter && !(pt->branches_filter & ptq->flags))
1151 if (intel_pt_skip_event(pt))
1154 intel_pt_prep_b_sample(pt, ptq, event, &sample);
1156 sample.id = ptq->pt->branches_id;
1157 sample.stream_id = ptq->pt->branches_id;
1160 * perf report cannot handle events without a branch stack when using
1161 * SORT_MODE__BRANCH so make a dummy one.
1163 if (pt->synth_opts.last_branch && sort__mode == SORT_MODE__BRANCH) {
1164 dummy_bs = (struct dummy_branch_stack){
1171 sample.branch_stack = (struct branch_stack *)&dummy_bs;
1174 return intel_pt_deliver_synth_b_event(pt, event, &sample,
1175 pt->branches_sample_type);
1178 static void intel_pt_prep_sample(struct intel_pt *pt,
1179 struct intel_pt_queue *ptq,
1180 union perf_event *event,
1181 struct perf_sample *sample)
1183 intel_pt_prep_b_sample(pt, ptq, event, sample);
1185 if (pt->synth_opts.callchain) {
1186 thread_stack__sample(ptq->thread, ptq->chain,
1187 pt->synth_opts.callchain_sz, sample->ip);
1188 sample->callchain = ptq->chain;
1191 if (pt->synth_opts.last_branch) {
1192 intel_pt_copy_last_branch_rb(ptq);
1193 sample->branch_stack = ptq->last_branch;
1197 static inline int intel_pt_deliver_synth_event(struct intel_pt *pt,
1198 struct intel_pt_queue *ptq,
1199 union perf_event *event,
1200 struct perf_sample *sample,
1205 ret = intel_pt_deliver_synth_b_event(pt, event, sample, type);
1207 if (pt->synth_opts.last_branch)
1208 intel_pt_reset_last_branch_rb(ptq);
1213 static int intel_pt_synth_instruction_sample(struct intel_pt_queue *ptq)
1215 struct intel_pt *pt = ptq->pt;
1216 union perf_event *event = ptq->event_buf;
1217 struct perf_sample sample = { .ip = 0, };
1219 if (intel_pt_skip_event(pt))
1222 intel_pt_prep_sample(pt, ptq, event, &sample);
1224 sample.id = ptq->pt->instructions_id;
1225 sample.stream_id = ptq->pt->instructions_id;
1226 sample.period = ptq->state->tot_insn_cnt - ptq->last_insn_cnt;
1228 ptq->last_insn_cnt = ptq->state->tot_insn_cnt;
1230 return intel_pt_deliver_synth_event(pt, ptq, event, &sample,
1231 pt->instructions_sample_type);
1234 static int intel_pt_synth_transaction_sample(struct intel_pt_queue *ptq)
1236 struct intel_pt *pt = ptq->pt;
1237 union perf_event *event = ptq->event_buf;
1238 struct perf_sample sample = { .ip = 0, };
1240 if (intel_pt_skip_event(pt))
1243 intel_pt_prep_sample(pt, ptq, event, &sample);
1245 sample.id = ptq->pt->transactions_id;
1246 sample.stream_id = ptq->pt->transactions_id;
1248 return intel_pt_deliver_synth_event(pt, ptq, event, &sample,
1249 pt->transactions_sample_type);
1252 static void intel_pt_prep_p_sample(struct intel_pt *pt,
1253 struct intel_pt_queue *ptq,
1254 union perf_event *event,
1255 struct perf_sample *sample)
1257 intel_pt_prep_sample(pt, ptq, event, sample);
1260 * Zero IP is used to mean "trace start" but that is not the case for
1261 * power or PTWRITE events with no IP, so clear the flags.
1267 static int intel_pt_synth_ptwrite_sample(struct intel_pt_queue *ptq)
1269 struct intel_pt *pt = ptq->pt;
1270 union perf_event *event = ptq->event_buf;
1271 struct perf_sample sample = { .ip = 0, };
1272 struct perf_synth_intel_ptwrite raw;
1274 if (intel_pt_skip_event(pt))
1277 intel_pt_prep_p_sample(pt, ptq, event, &sample);
1279 sample.id = ptq->pt->ptwrites_id;
1280 sample.stream_id = ptq->pt->ptwrites_id;
1283 raw.ip = !!(ptq->state->flags & INTEL_PT_FUP_IP);
1284 raw.payload = cpu_to_le64(ptq->state->ptw_payload);
1286 sample.raw_size = perf_synth__raw_size(raw);
1287 sample.raw_data = perf_synth__raw_data(&raw);
1289 return intel_pt_deliver_synth_event(pt, ptq, event, &sample,
1290 pt->ptwrites_sample_type);
1293 static int intel_pt_synth_cbr_sample(struct intel_pt_queue *ptq)
1295 struct intel_pt *pt = ptq->pt;
1296 union perf_event *event = ptq->event_buf;
1297 struct perf_sample sample = { .ip = 0, };
1298 struct perf_synth_intel_cbr raw;
1301 if (intel_pt_skip_event(pt))
1304 intel_pt_prep_p_sample(pt, ptq, event, &sample);
1306 sample.id = ptq->pt->cbr_id;
1307 sample.stream_id = ptq->pt->cbr_id;
1309 flags = (u16)ptq->state->cbr_payload | (pt->max_non_turbo_ratio << 16);
1310 raw.flags = cpu_to_le32(flags);
1311 raw.freq = cpu_to_le32(raw.cbr * pt->cbr2khz);
1314 sample.raw_size = perf_synth__raw_size(raw);
1315 sample.raw_data = perf_synth__raw_data(&raw);
1317 return intel_pt_deliver_synth_event(pt, ptq, event, &sample,
1318 pt->pwr_events_sample_type);
1321 static int intel_pt_synth_mwait_sample(struct intel_pt_queue *ptq)
1323 struct intel_pt *pt = ptq->pt;
1324 union perf_event *event = ptq->event_buf;
1325 struct perf_sample sample = { .ip = 0, };
1326 struct perf_synth_intel_mwait raw;
1328 if (intel_pt_skip_event(pt))
1331 intel_pt_prep_p_sample(pt, ptq, event, &sample);
1333 sample.id = ptq->pt->mwait_id;
1334 sample.stream_id = ptq->pt->mwait_id;
1337 raw.payload = cpu_to_le64(ptq->state->mwait_payload);
1339 sample.raw_size = perf_synth__raw_size(raw);
1340 sample.raw_data = perf_synth__raw_data(&raw);
1342 return intel_pt_deliver_synth_event(pt, ptq, event, &sample,
1343 pt->pwr_events_sample_type);
1346 static int intel_pt_synth_pwre_sample(struct intel_pt_queue *ptq)
1348 struct intel_pt *pt = ptq->pt;
1349 union perf_event *event = ptq->event_buf;
1350 struct perf_sample sample = { .ip = 0, };
1351 struct perf_synth_intel_pwre raw;
1353 if (intel_pt_skip_event(pt))
1356 intel_pt_prep_p_sample(pt, ptq, event, &sample);
1358 sample.id = ptq->pt->pwre_id;
1359 sample.stream_id = ptq->pt->pwre_id;
1362 raw.payload = cpu_to_le64(ptq->state->pwre_payload);
1364 sample.raw_size = perf_synth__raw_size(raw);
1365 sample.raw_data = perf_synth__raw_data(&raw);
1367 return intel_pt_deliver_synth_event(pt, ptq, event, &sample,
1368 pt->pwr_events_sample_type);
1371 static int intel_pt_synth_exstop_sample(struct intel_pt_queue *ptq)
1373 struct intel_pt *pt = ptq->pt;
1374 union perf_event *event = ptq->event_buf;
1375 struct perf_sample sample = { .ip = 0, };
1376 struct perf_synth_intel_exstop raw;
1378 if (intel_pt_skip_event(pt))
1381 intel_pt_prep_p_sample(pt, ptq, event, &sample);
1383 sample.id = ptq->pt->exstop_id;
1384 sample.stream_id = ptq->pt->exstop_id;
1387 raw.ip = !!(ptq->state->flags & INTEL_PT_FUP_IP);
1389 sample.raw_size = perf_synth__raw_size(raw);
1390 sample.raw_data = perf_synth__raw_data(&raw);
1392 return intel_pt_deliver_synth_event(pt, ptq, event, &sample,
1393 pt->pwr_events_sample_type);
1396 static int intel_pt_synth_pwrx_sample(struct intel_pt_queue *ptq)
1398 struct intel_pt *pt = ptq->pt;
1399 union perf_event *event = ptq->event_buf;
1400 struct perf_sample sample = { .ip = 0, };
1401 struct perf_synth_intel_pwrx raw;
1403 if (intel_pt_skip_event(pt))
1406 intel_pt_prep_p_sample(pt, ptq, event, &sample);
1408 sample.id = ptq->pt->pwrx_id;
1409 sample.stream_id = ptq->pt->pwrx_id;
1412 raw.payload = cpu_to_le64(ptq->state->pwrx_payload);
1414 sample.raw_size = perf_synth__raw_size(raw);
1415 sample.raw_data = perf_synth__raw_data(&raw);
1417 return intel_pt_deliver_synth_event(pt, ptq, event, &sample,
1418 pt->pwr_events_sample_type);
1421 static int intel_pt_synth_error(struct intel_pt *pt, int code, int cpu,
1422 pid_t pid, pid_t tid, u64 ip)
1424 union perf_event event;
1425 char msg[MAX_AUXTRACE_ERROR_MSG];
1428 intel_pt__strerror(code, msg, MAX_AUXTRACE_ERROR_MSG);
1430 auxtrace_synth_error(&event.auxtrace_error, PERF_AUXTRACE_ERROR_ITRACE,
1431 code, cpu, pid, tid, ip, msg);
1433 err = perf_session__deliver_synth_event(pt->session, &event, NULL);
1435 pr_err("Intel Processor Trace: failed to deliver error event, error %d\n",
1441 static int intel_pt_next_tid(struct intel_pt *pt, struct intel_pt_queue *ptq)
1443 struct auxtrace_queue *queue;
1444 pid_t tid = ptq->next_tid;
1450 intel_pt_log("switch: cpu %d tid %d\n", ptq->cpu, tid);
1452 err = machine__set_current_tid(pt->machine, ptq->cpu, -1, tid);
1454 queue = &pt->queues.queue_array[ptq->queue_nr];
1455 intel_pt_set_pid_tid_cpu(pt, queue);
1462 static inline bool intel_pt_is_switch_ip(struct intel_pt_queue *ptq, u64 ip)
1464 struct intel_pt *pt = ptq->pt;
1466 return ip == pt->switch_ip &&
1467 (ptq->flags & PERF_IP_FLAG_BRANCH) &&
1468 !(ptq->flags & (PERF_IP_FLAG_CONDITIONAL | PERF_IP_FLAG_ASYNC |
1469 PERF_IP_FLAG_INTERRUPT | PERF_IP_FLAG_TX_ABORT));
1472 #define INTEL_PT_PWR_EVT (INTEL_PT_MWAIT_OP | INTEL_PT_PWR_ENTRY | \
1473 INTEL_PT_EX_STOP | INTEL_PT_PWR_EXIT | \
1476 static int intel_pt_sample(struct intel_pt_queue *ptq)
1478 const struct intel_pt_state *state = ptq->state;
1479 struct intel_pt *pt = ptq->pt;
1482 if (!ptq->have_sample)
1485 ptq->have_sample = false;
1487 if (pt->sample_pwr_events && (state->type & INTEL_PT_PWR_EVT)) {
1488 if (state->type & INTEL_PT_CBR_CHG) {
1489 err = intel_pt_synth_cbr_sample(ptq);
1493 if (state->type & INTEL_PT_MWAIT_OP) {
1494 err = intel_pt_synth_mwait_sample(ptq);
1498 if (state->type & INTEL_PT_PWR_ENTRY) {
1499 err = intel_pt_synth_pwre_sample(ptq);
1503 if (state->type & INTEL_PT_EX_STOP) {
1504 err = intel_pt_synth_exstop_sample(ptq);
1508 if (state->type & INTEL_PT_PWR_EXIT) {
1509 err = intel_pt_synth_pwrx_sample(ptq);
1515 if (pt->sample_instructions && (state->type & INTEL_PT_INSTRUCTION)) {
1516 err = intel_pt_synth_instruction_sample(ptq);
1521 if (pt->sample_transactions && (state->type & INTEL_PT_TRANSACTION)) {
1522 err = intel_pt_synth_transaction_sample(ptq);
1527 if (pt->sample_ptwrites && (state->type & INTEL_PT_PTW)) {
1528 err = intel_pt_synth_ptwrite_sample(ptq);
1533 if (!(state->type & INTEL_PT_BRANCH))
1536 if (pt->synth_opts.callchain || pt->synth_opts.thread_stack)
1537 thread_stack__event(ptq->thread, ptq->flags, state->from_ip,
1538 state->to_ip, ptq->insn_len,
1541 thread_stack__set_trace_nr(ptq->thread, state->trace_nr);
1543 if (pt->sample_branches) {
1544 err = intel_pt_synth_branch_sample(ptq);
1549 if (pt->synth_opts.last_branch)
1550 intel_pt_update_last_branch_rb(ptq);
1552 if (!pt->sync_switch)
1555 if (intel_pt_is_switch_ip(ptq, state->to_ip)) {
1556 switch (ptq->switch_state) {
1557 case INTEL_PT_SS_UNKNOWN:
1558 case INTEL_PT_SS_EXPECTING_SWITCH_IP:
1559 err = intel_pt_next_tid(pt, ptq);
1562 ptq->switch_state = INTEL_PT_SS_TRACING;
1565 ptq->switch_state = INTEL_PT_SS_EXPECTING_SWITCH_EVENT;
1568 } else if (!state->to_ip) {
1569 ptq->switch_state = INTEL_PT_SS_NOT_TRACING;
1570 } else if (ptq->switch_state == INTEL_PT_SS_NOT_TRACING) {
1571 ptq->switch_state = INTEL_PT_SS_UNKNOWN;
1572 } else if (ptq->switch_state == INTEL_PT_SS_UNKNOWN &&
1573 state->to_ip == pt->ptss_ip &&
1574 (ptq->flags & PERF_IP_FLAG_CALL)) {
1575 ptq->switch_state = INTEL_PT_SS_TRACING;
1581 static u64 intel_pt_switch_ip(struct intel_pt *pt, u64 *ptss_ip)
1583 struct machine *machine = pt->machine;
1585 struct symbol *sym, *start;
1586 u64 ip, switch_ip = 0;
1592 map = machine__kernel_map(machine);
1599 start = dso__first_symbol(map->dso, MAP__FUNCTION);
1601 for (sym = start; sym; sym = dso__next_symbol(sym)) {
1602 if (sym->binding == STB_GLOBAL &&
1603 !strcmp(sym->name, "__switch_to")) {
1604 ip = map->unmap_ip(map, sym->start);
1605 if (ip >= map->start && ip < map->end) {
1612 if (!switch_ip || !ptss_ip)
1615 if (pt->have_sched_switch == 1)
1616 ptss = "perf_trace_sched_switch";
1618 ptss = "__perf_event_task_sched_out";
1620 for (sym = start; sym; sym = dso__next_symbol(sym)) {
1621 if (!strcmp(sym->name, ptss)) {
1622 ip = map->unmap_ip(map, sym->start);
1623 if (ip >= map->start && ip < map->end) {
1633 static int intel_pt_run_decoder(struct intel_pt_queue *ptq, u64 *timestamp)
1635 const struct intel_pt_state *state = ptq->state;
1636 struct intel_pt *pt = ptq->pt;
1639 if (!pt->kernel_start) {
1640 pt->kernel_start = machine__kernel_start(pt->machine);
1641 if (pt->per_cpu_mmaps &&
1642 (pt->have_sched_switch == 1 || pt->have_sched_switch == 3) &&
1643 !pt->timeless_decoding && intel_pt_tracing_kernel(pt) &&
1644 !pt->sampling_mode) {
1645 pt->switch_ip = intel_pt_switch_ip(pt, &pt->ptss_ip);
1646 if (pt->switch_ip) {
1647 intel_pt_log("switch_ip: %"PRIx64" ptss_ip: %"PRIx64"\n",
1648 pt->switch_ip, pt->ptss_ip);
1649 pt->sync_switch = true;
1654 intel_pt_log("queue %u decoding cpu %d pid %d tid %d\n",
1655 ptq->queue_nr, ptq->cpu, ptq->pid, ptq->tid);
1657 err = intel_pt_sample(ptq);
1661 state = intel_pt_decode(ptq->decoder);
1663 if (state->err == INTEL_PT_ERR_NODATA)
1665 if (pt->sync_switch &&
1666 state->from_ip >= pt->kernel_start) {
1667 pt->sync_switch = false;
1668 intel_pt_next_tid(pt, ptq);
1670 if (pt->synth_opts.errors) {
1671 err = intel_pt_synth_error(pt, state->err,
1682 ptq->have_sample = true;
1683 intel_pt_sample_flags(ptq);
1685 /* Use estimated TSC upon return to user space */
1687 (state->from_ip >= pt->kernel_start || !state->from_ip) &&
1688 state->to_ip && state->to_ip < pt->kernel_start) {
1689 intel_pt_log("TSC %"PRIx64" est. TSC %"PRIx64"\n",
1690 state->timestamp, state->est_timestamp);
1691 ptq->timestamp = state->est_timestamp;
1692 /* Use estimated TSC in unknown switch state */
1693 } else if (pt->sync_switch &&
1694 ptq->switch_state == INTEL_PT_SS_UNKNOWN &&
1695 intel_pt_is_switch_ip(ptq, state->to_ip) &&
1696 ptq->next_tid == -1) {
1697 intel_pt_log("TSC %"PRIx64" est. TSC %"PRIx64"\n",
1698 state->timestamp, state->est_timestamp);
1699 ptq->timestamp = state->est_timestamp;
1700 } else if (state->timestamp > ptq->timestamp) {
1701 ptq->timestamp = state->timestamp;
1704 if (!pt->timeless_decoding && ptq->timestamp >= *timestamp) {
1705 *timestamp = ptq->timestamp;
1712 static inline int intel_pt_update_queues(struct intel_pt *pt)
1714 if (pt->queues.new_data) {
1715 pt->queues.new_data = false;
1716 return intel_pt_setup_queues(pt);
1721 static int intel_pt_process_queues(struct intel_pt *pt, u64 timestamp)
1723 unsigned int queue_nr;
1728 struct auxtrace_queue *queue;
1729 struct intel_pt_queue *ptq;
1731 if (!pt->heap.heap_cnt)
1734 if (pt->heap.heap_array[0].ordinal >= timestamp)
1737 queue_nr = pt->heap.heap_array[0].queue_nr;
1738 queue = &pt->queues.queue_array[queue_nr];
1741 intel_pt_log("queue %u processing 0x%" PRIx64 " to 0x%" PRIx64 "\n",
1742 queue_nr, pt->heap.heap_array[0].ordinal,
1745 auxtrace_heap__pop(&pt->heap);
1747 if (pt->heap.heap_cnt) {
1748 ts = pt->heap.heap_array[0].ordinal + 1;
1755 intel_pt_set_pid_tid_cpu(pt, queue);
1757 ret = intel_pt_run_decoder(ptq, &ts);
1760 auxtrace_heap__add(&pt->heap, queue_nr, ts);
1765 ret = auxtrace_heap__add(&pt->heap, queue_nr, ts);
1769 ptq->on_heap = false;
1776 static int intel_pt_process_timeless_queues(struct intel_pt *pt, pid_t tid,
1779 struct auxtrace_queues *queues = &pt->queues;
1783 for (i = 0; i < queues->nr_queues; i++) {
1784 struct auxtrace_queue *queue = &pt->queues.queue_array[i];
1785 struct intel_pt_queue *ptq = queue->priv;
1787 if (ptq && (tid == -1 || ptq->tid == tid)) {
1789 intel_pt_set_pid_tid_cpu(pt, queue);
1790 intel_pt_run_decoder(ptq, &ts);
1796 static int intel_pt_lost(struct intel_pt *pt, struct perf_sample *sample)
1798 return intel_pt_synth_error(pt, INTEL_PT_ERR_LOST, sample->cpu,
1799 sample->pid, sample->tid, 0);
1802 static struct intel_pt_queue *intel_pt_cpu_to_ptq(struct intel_pt *pt, int cpu)
1806 if (cpu < 0 || !pt->queues.nr_queues)
1809 if ((unsigned)cpu >= pt->queues.nr_queues)
1810 i = pt->queues.nr_queues - 1;
1814 if (pt->queues.queue_array[i].cpu == cpu)
1815 return pt->queues.queue_array[i].priv;
1817 for (j = 0; i > 0; j++) {
1818 if (pt->queues.queue_array[--i].cpu == cpu)
1819 return pt->queues.queue_array[i].priv;
1822 for (; j < pt->queues.nr_queues; j++) {
1823 if (pt->queues.queue_array[j].cpu == cpu)
1824 return pt->queues.queue_array[j].priv;
1830 static int intel_pt_sync_switch(struct intel_pt *pt, int cpu, pid_t tid,
1833 struct intel_pt_queue *ptq;
1836 if (!pt->sync_switch)
1839 ptq = intel_pt_cpu_to_ptq(pt, cpu);
1843 switch (ptq->switch_state) {
1844 case INTEL_PT_SS_NOT_TRACING:
1847 case INTEL_PT_SS_UNKNOWN:
1848 case INTEL_PT_SS_TRACING:
1849 ptq->next_tid = tid;
1850 ptq->switch_state = INTEL_PT_SS_EXPECTING_SWITCH_IP;
1852 case INTEL_PT_SS_EXPECTING_SWITCH_EVENT:
1853 if (!ptq->on_heap) {
1854 ptq->timestamp = perf_time_to_tsc(timestamp,
1856 err = auxtrace_heap__add(&pt->heap, ptq->queue_nr,
1860 ptq->on_heap = true;
1862 ptq->switch_state = INTEL_PT_SS_TRACING;
1864 case INTEL_PT_SS_EXPECTING_SWITCH_IP:
1865 ptq->next_tid = tid;
1866 intel_pt_log("ERROR: cpu %d expecting switch ip\n", cpu);
1875 static int intel_pt_process_switch(struct intel_pt *pt,
1876 struct perf_sample *sample)
1878 struct perf_evsel *evsel;
1882 evsel = perf_evlist__id2evsel(pt->session->evlist, sample->id);
1883 if (evsel != pt->switch_evsel)
1886 tid = perf_evsel__intval(evsel, sample, "next_pid");
1889 intel_pt_log("sched_switch: cpu %d tid %d time %"PRIu64" tsc %#"PRIx64"\n",
1890 cpu, tid, sample->time, perf_time_to_tsc(sample->time,
1893 ret = intel_pt_sync_switch(pt, cpu, tid, sample->time);
1897 return machine__set_current_tid(pt->machine, cpu, -1, tid);
1900 static int intel_pt_context_switch(struct intel_pt *pt, union perf_event *event,
1901 struct perf_sample *sample)
1903 bool out = event->header.misc & PERF_RECORD_MISC_SWITCH_OUT;
1909 if (pt->have_sched_switch == 3) {
1912 if (event->header.type != PERF_RECORD_SWITCH_CPU_WIDE) {
1913 pr_err("Expecting CPU-wide context switch event\n");
1916 pid = event->context_switch.next_prev_pid;
1917 tid = event->context_switch.next_prev_tid;
1926 pr_err("context_switch event has no tid\n");
1930 intel_pt_log("context_switch: cpu %d pid %d tid %d time %"PRIu64" tsc %#"PRIx64"\n",
1931 cpu, pid, tid, sample->time, perf_time_to_tsc(sample->time,
1934 ret = intel_pt_sync_switch(pt, cpu, tid, sample->time);
1938 return machine__set_current_tid(pt->machine, cpu, pid, tid);
1941 static int intel_pt_process_itrace_start(struct intel_pt *pt,
1942 union perf_event *event,
1943 struct perf_sample *sample)
1945 if (!pt->per_cpu_mmaps)
1948 intel_pt_log("itrace_start: cpu %d pid %d tid %d time %"PRIu64" tsc %#"PRIx64"\n",
1949 sample->cpu, event->itrace_start.pid,
1950 event->itrace_start.tid, sample->time,
1951 perf_time_to_tsc(sample->time, &pt->tc));
1953 return machine__set_current_tid(pt->machine, sample->cpu,
1954 event->itrace_start.pid,
1955 event->itrace_start.tid);
1958 static int intel_pt_process_event(struct perf_session *session,
1959 union perf_event *event,
1960 struct perf_sample *sample,
1961 struct perf_tool *tool)
1963 struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
1971 if (!tool->ordered_events) {
1972 pr_err("Intel Processor Trace requires ordered events\n");
1976 if (sample->time && sample->time != (u64)-1)
1977 timestamp = perf_time_to_tsc(sample->time, &pt->tc);
1981 if (timestamp || pt->timeless_decoding) {
1982 err = intel_pt_update_queues(pt);
1987 if (pt->timeless_decoding) {
1988 if (event->header.type == PERF_RECORD_EXIT) {
1989 err = intel_pt_process_timeless_queues(pt,
1993 } else if (timestamp) {
1994 err = intel_pt_process_queues(pt, timestamp);
1999 if (event->header.type == PERF_RECORD_AUX &&
2000 (event->aux.flags & PERF_AUX_FLAG_TRUNCATED) &&
2001 pt->synth_opts.errors) {
2002 err = intel_pt_lost(pt, sample);
2007 if (pt->switch_evsel && event->header.type == PERF_RECORD_SAMPLE)
2008 err = intel_pt_process_switch(pt, sample);
2009 else if (event->header.type == PERF_RECORD_ITRACE_START)
2010 err = intel_pt_process_itrace_start(pt, event, sample);
2011 else if (event->header.type == PERF_RECORD_SWITCH ||
2012 event->header.type == PERF_RECORD_SWITCH_CPU_WIDE)
2013 err = intel_pt_context_switch(pt, event, sample);
2015 intel_pt_log("event %s (%u): cpu %d time %"PRIu64" tsc %#"PRIx64"\n",
2016 perf_event__name(event->header.type), event->header.type,
2017 sample->cpu, sample->time, timestamp);
2022 static int intel_pt_flush(struct perf_session *session, struct perf_tool *tool)
2024 struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
2031 if (!tool->ordered_events)
2034 ret = intel_pt_update_queues(pt);
2038 if (pt->timeless_decoding)
2039 return intel_pt_process_timeless_queues(pt, -1,
2042 return intel_pt_process_queues(pt, MAX_TIMESTAMP);
2045 static void intel_pt_free_events(struct perf_session *session)
2047 struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
2049 struct auxtrace_queues *queues = &pt->queues;
2052 for (i = 0; i < queues->nr_queues; i++) {
2053 intel_pt_free_queue(queues->queue_array[i].priv);
2054 queues->queue_array[i].priv = NULL;
2056 intel_pt_log_disable();
2057 auxtrace_queues__free(queues);
2060 static void intel_pt_free(struct perf_session *session)
2062 struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
2065 auxtrace_heap__free(&pt->heap);
2066 intel_pt_free_events(session);
2067 session->auxtrace = NULL;
2068 thread__put(pt->unknown_thread);
2069 addr_filters__exit(&pt->filts);
2074 static int intel_pt_process_auxtrace_event(struct perf_session *session,
2075 union perf_event *event,
2076 struct perf_tool *tool __maybe_unused)
2078 struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
2081 if (pt->sampling_mode)
2084 if (!pt->data_queued) {
2085 struct auxtrace_buffer *buffer;
2087 int fd = perf_data_file__fd(session->file);
2090 if (perf_data_file__is_pipe(session->file)) {
2093 data_offset = lseek(fd, 0, SEEK_CUR);
2094 if (data_offset == -1)
2098 err = auxtrace_queues__add_event(&pt->queues, session, event,
2099 data_offset, &buffer);
2103 /* Dump here now we have copied a piped trace out of the pipe */
2105 if (auxtrace_buffer__get_data(buffer, fd)) {
2106 intel_pt_dump_event(pt, buffer->data,
2108 auxtrace_buffer__put_data(buffer);
2116 struct intel_pt_synth {
2117 struct perf_tool dummy_tool;
2118 struct perf_session *session;
2121 static int intel_pt_event_synth(struct perf_tool *tool,
2122 union perf_event *event,
2123 struct perf_sample *sample __maybe_unused,
2124 struct machine *machine __maybe_unused)
2126 struct intel_pt_synth *intel_pt_synth =
2127 container_of(tool, struct intel_pt_synth, dummy_tool);
2129 return perf_session__deliver_synth_event(intel_pt_synth->session, event,
2133 static int intel_pt_synth_event(struct perf_session *session, const char *name,
2134 struct perf_event_attr *attr, u64 id)
2136 struct intel_pt_synth intel_pt_synth;
2139 pr_debug("Synthesizing '%s' event with id %" PRIu64 " sample type %#" PRIx64 "\n",
2140 name, id, (u64)attr->sample_type);
2142 memset(&intel_pt_synth, 0, sizeof(struct intel_pt_synth));
2143 intel_pt_synth.session = session;
2145 err = perf_event__synthesize_attr(&intel_pt_synth.dummy_tool, attr, 1,
2146 &id, intel_pt_event_synth);
2148 pr_err("%s: failed to synthesize '%s' event type\n",
2154 static void intel_pt_set_event_name(struct perf_evlist *evlist, u64 id,
2157 struct perf_evsel *evsel;
2159 evlist__for_each_entry(evlist, evsel) {
2160 if (evsel->id && evsel->id[0] == id) {
2162 zfree(&evsel->name);
2163 evsel->name = strdup(name);
2169 static struct perf_evsel *intel_pt_evsel(struct intel_pt *pt,
2170 struct perf_evlist *evlist)
2172 struct perf_evsel *evsel;
2174 evlist__for_each_entry(evlist, evsel) {
2175 if (evsel->attr.type == pt->pmu_type && evsel->ids)
2182 static int intel_pt_synth_events(struct intel_pt *pt,
2183 struct perf_session *session)
2185 struct perf_evlist *evlist = session->evlist;
2186 struct perf_evsel *evsel = intel_pt_evsel(pt, evlist);
2187 struct perf_event_attr attr;
2192 pr_debug("There are no selected events with Intel Processor Trace data\n");
2196 memset(&attr, 0, sizeof(struct perf_event_attr));
2197 attr.size = sizeof(struct perf_event_attr);
2198 attr.type = PERF_TYPE_HARDWARE;
2199 attr.sample_type = evsel->attr.sample_type & PERF_SAMPLE_MASK;
2200 attr.sample_type |= PERF_SAMPLE_IP | PERF_SAMPLE_TID |
2202 if (pt->timeless_decoding)
2203 attr.sample_type &= ~(u64)PERF_SAMPLE_TIME;
2205 attr.sample_type |= PERF_SAMPLE_TIME;
2206 if (!pt->per_cpu_mmaps)
2207 attr.sample_type &= ~(u64)PERF_SAMPLE_CPU;
2208 attr.exclude_user = evsel->attr.exclude_user;
2209 attr.exclude_kernel = evsel->attr.exclude_kernel;
2210 attr.exclude_hv = evsel->attr.exclude_hv;
2211 attr.exclude_host = evsel->attr.exclude_host;
2212 attr.exclude_guest = evsel->attr.exclude_guest;
2213 attr.sample_id_all = evsel->attr.sample_id_all;
2214 attr.read_format = evsel->attr.read_format;
2216 id = evsel->id[0] + 1000000000;
2220 if (pt->synth_opts.branches) {
2221 attr.config = PERF_COUNT_HW_BRANCH_INSTRUCTIONS;
2222 attr.sample_period = 1;
2223 attr.sample_type |= PERF_SAMPLE_ADDR;
2224 err = intel_pt_synth_event(session, "branches", &attr, id);
2227 pt->sample_branches = true;
2228 pt->branches_sample_type = attr.sample_type;
2229 pt->branches_id = id;
2231 attr.sample_type &= ~(u64)PERF_SAMPLE_ADDR;
2234 if (pt->synth_opts.callchain)
2235 attr.sample_type |= PERF_SAMPLE_CALLCHAIN;
2236 if (pt->synth_opts.last_branch)
2237 attr.sample_type |= PERF_SAMPLE_BRANCH_STACK;
2239 if (pt->synth_opts.instructions) {
2240 attr.config = PERF_COUNT_HW_INSTRUCTIONS;
2241 if (pt->synth_opts.period_type == PERF_ITRACE_PERIOD_NANOSECS)
2242 attr.sample_period =
2243 intel_pt_ns_to_ticks(pt, pt->synth_opts.period);
2245 attr.sample_period = pt->synth_opts.period;
2246 err = intel_pt_synth_event(session, "instructions", &attr, id);
2249 pt->sample_instructions = true;
2250 pt->instructions_sample_type = attr.sample_type;
2251 pt->instructions_id = id;
2255 attr.sample_type &= ~(u64)PERF_SAMPLE_PERIOD;
2256 attr.sample_period = 1;
2258 if (pt->synth_opts.transactions) {
2259 attr.config = PERF_COUNT_HW_INSTRUCTIONS;
2260 err = intel_pt_synth_event(session, "transactions", &attr, id);
2263 pt->sample_transactions = true;
2264 pt->transactions_sample_type = attr.sample_type;
2265 pt->transactions_id = id;
2266 intel_pt_set_event_name(evlist, id, "transactions");
2270 attr.type = PERF_TYPE_SYNTH;
2271 attr.sample_type |= PERF_SAMPLE_RAW;
2273 if (pt->synth_opts.ptwrites) {
2274 attr.config = PERF_SYNTH_INTEL_PTWRITE;
2275 err = intel_pt_synth_event(session, "ptwrite", &attr, id);
2278 pt->sample_ptwrites = true;
2279 pt->ptwrites_sample_type = attr.sample_type;
2280 pt->ptwrites_id = id;
2281 intel_pt_set_event_name(evlist, id, "ptwrite");
2285 if (pt->synth_opts.pwr_events) {
2286 pt->sample_pwr_events = true;
2287 pt->pwr_events_sample_type = attr.sample_type;
2289 attr.config = PERF_SYNTH_INTEL_CBR;
2290 err = intel_pt_synth_event(session, "cbr", &attr, id);
2294 intel_pt_set_event_name(evlist, id, "cbr");
2298 if (pt->synth_opts.pwr_events && (evsel->attr.config & 0x10)) {
2299 attr.config = PERF_SYNTH_INTEL_MWAIT;
2300 err = intel_pt_synth_event(session, "mwait", &attr, id);
2304 intel_pt_set_event_name(evlist, id, "mwait");
2307 attr.config = PERF_SYNTH_INTEL_PWRE;
2308 err = intel_pt_synth_event(session, "pwre", &attr, id);
2312 intel_pt_set_event_name(evlist, id, "pwre");
2315 attr.config = PERF_SYNTH_INTEL_EXSTOP;
2316 err = intel_pt_synth_event(session, "exstop", &attr, id);
2320 intel_pt_set_event_name(evlist, id, "exstop");
2323 attr.config = PERF_SYNTH_INTEL_PWRX;
2324 err = intel_pt_synth_event(session, "pwrx", &attr, id);
2328 intel_pt_set_event_name(evlist, id, "pwrx");
2332 pt->synth_needs_swap = evsel->needs_swap;
2337 static struct perf_evsel *intel_pt_find_sched_switch(struct perf_evlist *evlist)
2339 struct perf_evsel *evsel;
2341 evlist__for_each_entry_reverse(evlist, evsel) {
2342 const char *name = perf_evsel__name(evsel);
2344 if (!strcmp(name, "sched:sched_switch"))
2351 static bool intel_pt_find_switch(struct perf_evlist *evlist)
2353 struct perf_evsel *evsel;
2355 evlist__for_each_entry(evlist, evsel) {
2356 if (evsel->attr.context_switch)
2363 static int intel_pt_perf_config(const char *var, const char *value, void *data)
2365 struct intel_pt *pt = data;
2367 if (!strcmp(var, "intel-pt.mispred-all"))
2368 pt->mispred_all = perf_config_bool(var, value);
2373 static const char * const intel_pt_info_fmts[] = {
2374 [INTEL_PT_PMU_TYPE] = " PMU Type %"PRId64"\n",
2375 [INTEL_PT_TIME_SHIFT] = " Time Shift %"PRIu64"\n",
2376 [INTEL_PT_TIME_MULT] = " Time Muliplier %"PRIu64"\n",
2377 [INTEL_PT_TIME_ZERO] = " Time Zero %"PRIu64"\n",
2378 [INTEL_PT_CAP_USER_TIME_ZERO] = " Cap Time Zero %"PRId64"\n",
2379 [INTEL_PT_TSC_BIT] = " TSC bit %#"PRIx64"\n",
2380 [INTEL_PT_NORETCOMP_BIT] = " NoRETComp bit %#"PRIx64"\n",
2381 [INTEL_PT_HAVE_SCHED_SWITCH] = " Have sched_switch %"PRId64"\n",
2382 [INTEL_PT_SNAPSHOT_MODE] = " Snapshot mode %"PRId64"\n",
2383 [INTEL_PT_PER_CPU_MMAPS] = " Per-cpu maps %"PRId64"\n",
2384 [INTEL_PT_MTC_BIT] = " MTC bit %#"PRIx64"\n",
2385 [INTEL_PT_TSC_CTC_N] = " TSC:CTC numerator %"PRIu64"\n",
2386 [INTEL_PT_TSC_CTC_D] = " TSC:CTC denominator %"PRIu64"\n",
2387 [INTEL_PT_CYC_BIT] = " CYC bit %#"PRIx64"\n",
2388 [INTEL_PT_MAX_NONTURBO_RATIO] = " Max non-turbo ratio %"PRIu64"\n",
2389 [INTEL_PT_FILTER_STR_LEN] = " Filter string len. %"PRIu64"\n",
2392 static void intel_pt_print_info(u64 *arr, int start, int finish)
2399 for (i = start; i <= finish; i++)
2400 fprintf(stdout, intel_pt_info_fmts[i], arr[i]);
2403 static void intel_pt_print_info_str(const char *name, const char *str)
2408 fprintf(stdout, " %-20s%s\n", name, str ? str : "");
2411 static bool intel_pt_has(struct auxtrace_info_event *auxtrace_info, int pos)
2413 return auxtrace_info->header.size >=
2414 sizeof(struct auxtrace_info_event) + (sizeof(u64) * (pos + 1));
2417 int intel_pt_process_auxtrace_info(union perf_event *event,
2418 struct perf_session *session)
2420 struct auxtrace_info_event *auxtrace_info = &event->auxtrace_info;
2421 size_t min_sz = sizeof(u64) * INTEL_PT_PER_CPU_MMAPS;
2422 struct intel_pt *pt;
2427 if (auxtrace_info->header.size < sizeof(struct auxtrace_info_event) +
2431 pt = zalloc(sizeof(struct intel_pt));
2435 addr_filters__init(&pt->filts);
2437 err = perf_config(intel_pt_perf_config, pt);
2441 err = auxtrace_queues__init(&pt->queues);
2445 intel_pt_log_set_name(INTEL_PT_PMU_NAME);
2447 pt->session = session;
2448 pt->machine = &session->machines.host; /* No kvm support */
2449 pt->auxtrace_type = auxtrace_info->type;
2450 pt->pmu_type = auxtrace_info->priv[INTEL_PT_PMU_TYPE];
2451 pt->tc.time_shift = auxtrace_info->priv[INTEL_PT_TIME_SHIFT];
2452 pt->tc.time_mult = auxtrace_info->priv[INTEL_PT_TIME_MULT];
2453 pt->tc.time_zero = auxtrace_info->priv[INTEL_PT_TIME_ZERO];
2454 pt->cap_user_time_zero = auxtrace_info->priv[INTEL_PT_CAP_USER_TIME_ZERO];
2455 pt->tsc_bit = auxtrace_info->priv[INTEL_PT_TSC_BIT];
2456 pt->noretcomp_bit = auxtrace_info->priv[INTEL_PT_NORETCOMP_BIT];
2457 pt->have_sched_switch = auxtrace_info->priv[INTEL_PT_HAVE_SCHED_SWITCH];
2458 pt->snapshot_mode = auxtrace_info->priv[INTEL_PT_SNAPSHOT_MODE];
2459 pt->per_cpu_mmaps = auxtrace_info->priv[INTEL_PT_PER_CPU_MMAPS];
2460 intel_pt_print_info(&auxtrace_info->priv[0], INTEL_PT_PMU_TYPE,
2461 INTEL_PT_PER_CPU_MMAPS);
2463 if (intel_pt_has(auxtrace_info, INTEL_PT_CYC_BIT)) {
2464 pt->mtc_bit = auxtrace_info->priv[INTEL_PT_MTC_BIT];
2465 pt->mtc_freq_bits = auxtrace_info->priv[INTEL_PT_MTC_FREQ_BITS];
2466 pt->tsc_ctc_ratio_n = auxtrace_info->priv[INTEL_PT_TSC_CTC_N];
2467 pt->tsc_ctc_ratio_d = auxtrace_info->priv[INTEL_PT_TSC_CTC_D];
2468 pt->cyc_bit = auxtrace_info->priv[INTEL_PT_CYC_BIT];
2469 intel_pt_print_info(&auxtrace_info->priv[0], INTEL_PT_MTC_BIT,
2473 if (intel_pt_has(auxtrace_info, INTEL_PT_MAX_NONTURBO_RATIO)) {
2474 pt->max_non_turbo_ratio =
2475 auxtrace_info->priv[INTEL_PT_MAX_NONTURBO_RATIO];
2476 intel_pt_print_info(&auxtrace_info->priv[0],
2477 INTEL_PT_MAX_NONTURBO_RATIO,
2478 INTEL_PT_MAX_NONTURBO_RATIO);
2481 info = &auxtrace_info->priv[INTEL_PT_FILTER_STR_LEN] + 1;
2482 info_end = (void *)info + auxtrace_info->header.size;
2484 if (intel_pt_has(auxtrace_info, INTEL_PT_FILTER_STR_LEN)) {
2487 len = auxtrace_info->priv[INTEL_PT_FILTER_STR_LEN];
2488 intel_pt_print_info(&auxtrace_info->priv[0],
2489 INTEL_PT_FILTER_STR_LEN,
2490 INTEL_PT_FILTER_STR_LEN);
2492 const char *filter = (const char *)info;
2494 len = roundup(len + 1, 8);
2496 if ((void *)info > info_end) {
2497 pr_err("%s: bad filter string length\n", __func__);
2499 goto err_free_queues;
2501 pt->filter = memdup(filter, len);
2504 goto err_free_queues;
2506 if (session->header.needs_swap)
2507 mem_bswap_64(pt->filter, len);
2508 if (pt->filter[len - 1]) {
2509 pr_err("%s: filter string not null terminated\n", __func__);
2511 goto err_free_queues;
2513 err = addr_filters__parse_bare_filter(&pt->filts,
2516 goto err_free_queues;
2518 intel_pt_print_info_str("Filter string", pt->filter);
2521 pt->timeless_decoding = intel_pt_timeless_decoding(pt);
2522 pt->have_tsc = intel_pt_have_tsc(pt);
2523 pt->sampling_mode = false;
2524 pt->est_tsc = !pt->timeless_decoding;
2526 pt->unknown_thread = thread__new(999999999, 999999999);
2527 if (!pt->unknown_thread) {
2529 goto err_free_queues;
2533 * Since this thread will not be kept in any rbtree not in a
2534 * list, initialize its list node so that at thread__put() the
2535 * current thread lifetime assuption is kept and we don't segfault
2536 * at list_del_init().
2538 INIT_LIST_HEAD(&pt->unknown_thread->node);
2540 err = thread__set_comm(pt->unknown_thread, "unknown", 0);
2542 goto err_delete_thread;
2543 if (thread__init_map_groups(pt->unknown_thread, pt->machine)) {
2545 goto err_delete_thread;
2548 pt->auxtrace.process_event = intel_pt_process_event;
2549 pt->auxtrace.process_auxtrace_event = intel_pt_process_auxtrace_event;
2550 pt->auxtrace.flush_events = intel_pt_flush;
2551 pt->auxtrace.free_events = intel_pt_free_events;
2552 pt->auxtrace.free = intel_pt_free;
2553 session->auxtrace = &pt->auxtrace;
2558 if (pt->have_sched_switch == 1) {
2559 pt->switch_evsel = intel_pt_find_sched_switch(session->evlist);
2560 if (!pt->switch_evsel) {
2561 pr_err("%s: missing sched_switch event\n", __func__);
2563 goto err_delete_thread;
2565 } else if (pt->have_sched_switch == 2 &&
2566 !intel_pt_find_switch(session->evlist)) {
2567 pr_err("%s: missing context_switch attribute flag\n", __func__);
2569 goto err_delete_thread;
2572 if (session->itrace_synth_opts && session->itrace_synth_opts->set) {
2573 pt->synth_opts = *session->itrace_synth_opts;
2575 itrace_synth_opts__set_default(&pt->synth_opts);
2576 if (use_browser != -1) {
2577 pt->synth_opts.branches = false;
2578 pt->synth_opts.callchain = true;
2580 if (session->itrace_synth_opts)
2581 pt->synth_opts.thread_stack =
2582 session->itrace_synth_opts->thread_stack;
2585 if (pt->synth_opts.log)
2586 intel_pt_log_enable();
2588 /* Maximum non-turbo ratio is TSC freq / 100 MHz */
2589 if (pt->tc.time_mult) {
2590 u64 tsc_freq = intel_pt_ns_to_ticks(pt, 1000000000);
2592 if (!pt->max_non_turbo_ratio)
2593 pt->max_non_turbo_ratio =
2594 (tsc_freq + 50000000) / 100000000;
2595 intel_pt_log("TSC frequency %"PRIu64"\n", tsc_freq);
2596 intel_pt_log("Maximum non-turbo ratio %u\n",
2597 pt->max_non_turbo_ratio);
2598 pt->cbr2khz = tsc_freq / pt->max_non_turbo_ratio / 1000;
2601 if (pt->synth_opts.calls)
2602 pt->branches_filter |= PERF_IP_FLAG_CALL | PERF_IP_FLAG_ASYNC |
2603 PERF_IP_FLAG_TRACE_END;
2604 if (pt->synth_opts.returns)
2605 pt->branches_filter |= PERF_IP_FLAG_RETURN |
2606 PERF_IP_FLAG_TRACE_BEGIN;
2608 if (pt->synth_opts.callchain && !symbol_conf.use_callchain) {
2609 symbol_conf.use_callchain = true;
2610 if (callchain_register_param(&callchain_param) < 0) {
2611 symbol_conf.use_callchain = false;
2612 pt->synth_opts.callchain = false;
2616 err = intel_pt_synth_events(pt, session);
2618 goto err_delete_thread;
2620 err = auxtrace_queues__process_index(&pt->queues, session);
2622 goto err_delete_thread;
2624 if (pt->queues.populated)
2625 pt->data_queued = true;
2627 if (pt->timeless_decoding)
2628 pr_debug2("Intel PT decoding without timestamps\n");
2633 thread__zput(pt->unknown_thread);
2635 intel_pt_log_disable();
2636 auxtrace_queues__free(&pt->queues);
2637 session->auxtrace = NULL;
2639 addr_filters__exit(&pt->filts);