virt/kvm/arm/vgic/vgic-its.c

   1 /*
   2  * GICv3 ITS emulation
   3  *
   4  * Copyright (C) 2015,2016 ARM Ltd.
   5  * Author: Andre Przywara <andre.przywara@arm.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #include <linux/cpu.h>
  21 #include <linux/kvm.h>
  22 #include <linux/kvm_host.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/list.h>
  25 #include <linux/uaccess.h>
  26
  27 #include <linux/irqchip/arm-gic-v3.h>
  28
  29 #include <asm/kvm_emulate.h>
  30 #include <asm/kvm_arm.h>
  31 #include <asm/kvm_mmu.h>
  32
  33 #include "vgic.h"
  34 #include "vgic-mmio.h"
  35
  36 static int vgic_its_save_tables_v0(struct vgic_its *its);
  37 static int vgic_its_restore_tables_v0(struct vgic_its *its);
  38 static int vgic_its_commit_v0(struct vgic_its *its);
  39 static int update_lpi_config(struct kvm *kvm, struct vgic_irq *irq,
  40                              struct kvm_vcpu *filter_vcpu);
  41
  42 /*
  43  * Creates a new (reference to a) struct vgic_irq for a given LPI.
  44  * If this LPI is already mapped on another ITS, we increase its refcount
  45  * and return a pointer to the existing structure.
  46  * If this is a "new" LPI, we allocate and initialize a new struct vgic_irq.
  47  * This function returns a pointer to the _unlocked_ structure.
  48  */
  49 static struct vgic_irq *vgic_add_lpi(struct kvm *kvm, u32 intid,
  50                                      struct kvm_vcpu *vcpu)
  51 {
  52         struct vgic_dist *dist = &kvm->arch.vgic;
  53         struct vgic_irq *irq = vgic_get_irq(kvm, NULL, intid), *oldirq;
  54         int ret;
  55
  56         /* In this case there is no put, since we keep the reference. */
  57         if (irq)
  58                 return irq;
  59
  60         irq = kzalloc(sizeof(struct vgic_irq), GFP_KERNEL);
  61         if (!irq)
  62                 return ERR_PTR(-ENOMEM);
  63
  64         INIT_LIST_HEAD(&irq->lpi_list);
  65         INIT_LIST_HEAD(&irq->ap_list);
  66         spin_lock_init(&irq->irq_lock);
  67
  68         irq->config = VGIC_CONFIG_EDGE;
  69         kref_init(&irq->refcount);
  70         irq->intid = intid;
  71         irq->target_vcpu = vcpu;
  72
  73         spin_lock(&dist->lpi_list_lock);
  74
  75         /*
  76          * There could be a race with another vgic_add_lpi(), so we need to
  77          * check that we don't add a second list entry with the same LPI.
  78          */
  79         list_for_each_entry(oldirq, &dist->lpi_list_head, lpi_list) {
  80                 if (oldirq->intid != intid)
  81                         continue;
  82
  83                 /* Someone was faster with adding this LPI, lets use that. */
  84                 kfree(irq);
  85                 irq = oldirq;
  86
  87                 /*
  88                  * This increases the refcount, the caller is expected to
  89                  * call vgic_put_irq() on the returned pointer once it's
  90                  * finished with the IRQ.
  91                  */
  92                 vgic_get_irq_kref(irq);
  93
  94                 goto out_unlock;
  95         }
  96
  97         list_add_tail(&irq->lpi_list, &dist->lpi_list_head);
  98         dist->lpi_list_count++;
  99
 100 out_unlock:
 101         spin_unlock(&dist->lpi_list_lock);
 102
 103         /*
 104          * We "cache" the configuration table entries in our struct vgic_irq's.
 105          * However we only have those structs for mapped IRQs, so we read in
 106          * the respective config data from memory here upon mapping the LPI.
 107          */
 108         ret = update_lpi_config(kvm, irq, NULL);
 109         if (ret)
 110                 return ERR_PTR(ret);
 111
 112         ret = vgic_v3_lpi_sync_pending_status(kvm, irq);
 113         if (ret)
 114                 return ERR_PTR(ret);
 115
 116         return irq;
 117 }
 118
 119 struct its_device {
 120         struct list_head dev_list;
 121
 122         /* the head for the list of ITTEs */
 123         struct list_head itt_head;
 124         u32 num_eventid_bits;
 125         gpa_t itt_addr;
 126         u32 device_id;
 127 };
 128
 129 #define COLLECTION_NOT_MAPPED ((u32)~0)
 130
 131 struct its_collection {
 132         struct list_head coll_list;
 133
 134         u32 collection_id;
 135         u32 target_addr;
 136 };
 137
 138 #define its_is_collection_mapped(coll) ((coll) && \
 139                                 ((coll)->target_addr != COLLECTION_NOT_MAPPED))
 140
 141 struct its_ite {
 142         struct list_head ite_list;
 143
 144         struct vgic_irq *irq;
 145         struct its_collection *collection;
 146         u32 lpi;
 147         u32 event_id;
 148 };
 149
 150 /**
 151  * struct vgic_its_abi - ITS abi ops and settings
 152  * @cte_esz: collection table entry size
 153  * @dte_esz: device table entry size
 154  * @ite_esz: interrupt translation table entry size
 155  * @save tables: save the ITS tables into guest RAM
 156  * @restore_tables: restore the ITS internal structs from tables
 157  *  stored in guest RAM
 158  * @commit: initialize the registers which expose the ABI settings,
 159  *  especially the entry sizes
 160  */
 161 struct vgic_its_abi {
 162         int cte_esz;
 163         int dte_esz;
 164         int ite_esz;
 165         int (*save_tables)(struct vgic_its *its);
 166         int (*restore_tables)(struct vgic_its *its);
 167         int (*commit)(struct vgic_its *its);
 168 };
 169
 170 static const struct vgic_its_abi its_table_abi_versions[] = {
 171         [0] = {.cte_esz = 8, .dte_esz = 8, .ite_esz = 8,
 172          .save_tables = vgic_its_save_tables_v0,
 173          .restore_tables = vgic_its_restore_tables_v0,
 174          .commit = vgic_its_commit_v0,
 175         },
 176 };
 177
 178 #define NR_ITS_ABIS     ARRAY_SIZE(its_table_abi_versions)
 179
 180 inline const struct vgic_its_abi *vgic_its_get_abi(struct vgic_its *its)
 181 {
 182         return &its_table_abi_versions[its->abi_rev];
 183 }
 184
 185 int vgic_its_set_abi(struct vgic_its *its, int rev)
 186 {
 187         const struct vgic_its_abi *abi;
 188
 189         its->abi_rev = rev;
 190         abi = vgic_its_get_abi(its);
 191         return abi->commit(its);
 192 }
 193
 194 /*
 195  * Find and returns a device in the device table for an ITS.
 196  * Must be called with the its_lock mutex held.
 197  */
 198 static struct its_device *find_its_device(struct vgic_its *its, u32 device_id)
 199 {
 200         struct its_device *device;
 201
 202         list_for_each_entry(device, &its->device_list, dev_list)
 203                 if (device_id == device->device_id)
 204                         return device;
 205
 206         return NULL;
 207 }
 208
 209 /*
 210  * Find and returns an interrupt translation table entry (ITTE) for a given
 211  * Device ID/Event ID pair on an ITS.
 212  * Must be called with the its_lock mutex held.
 213  */
 214 static struct its_ite *find_ite(struct vgic_its *its, u32 device_id,
 215                                   u32 event_id)
 216 {
 217         struct its_device *device;
 218         struct its_ite *ite;
 219
 220         device = find_its_device(its, device_id);
 221         if (device == NULL)
 222                 return NULL;
 223
 224         list_for_each_entry(ite, &device->itt_head, ite_list)
 225                 if (ite->event_id == event_id)
 226                         return ite;
 227
 228         return NULL;
 229 }
 230
 231 /* To be used as an iterator this macro misses the enclosing parentheses */
 232 #define for_each_lpi_its(dev, ite, its) \
 233         list_for_each_entry(dev, &(its)->device_list, dev_list) \
 234                 list_for_each_entry(ite, &(dev)->itt_head, ite_list)
 235
 236 /*
 237  * We only implement 48 bits of PA at the moment, although the ITS
 238  * supports more. Let's be restrictive here.
 239  */
 240 #define BASER_ADDRESS(x)        ((x) & GENMASK_ULL(47, 16))
 241 #define CBASER_ADDRESS(x)       ((x) & GENMASK_ULL(47, 12))
 242
 243 #define GIC_LPI_OFFSET 8192
 244
 245 #define VITS_TYPER_IDBITS 16
 246 #define VITS_TYPER_DEVBITS 16
 247 #define VITS_DTE_MAX_DEVID_OFFSET       (BIT(14) - 1)
 248 #define VITS_ITE_MAX_EVENTID_OFFSET     (BIT(16) - 1)
 249
 250 /*
 251  * Finds and returns a collection in the ITS collection table.
 252  * Must be called with the its_lock mutex held.
 253  */
 254 static struct its_collection *find_collection(struct vgic_its *its, int coll_id)
 255 {
 256         struct its_collection *collection;
 257
 258         list_for_each_entry(collection, &its->collection_list, coll_list) {
 259                 if (coll_id == collection->collection_id)
 260                         return collection;
 261         }
 262
 263         return NULL;
 264 }
 265
 266 #define LPI_PROP_ENABLE_BIT(p)  ((p) & LPI_PROP_ENABLED)
 267 #define LPI_PROP_PRIORITY(p)    ((p) & 0xfc)
 268
 269 /*
 270  * Reads the configuration data for a given LPI from guest memory and
 271  * updates the fields in struct vgic_irq.
 272  * If filter_vcpu is not NULL, applies only if the IRQ is targeting this
 273  * VCPU. Unconditionally applies if filter_vcpu is NULL.
 274  */
 275 static int update_lpi_config(struct kvm *kvm, struct vgic_irq *irq,
 276                              struct kvm_vcpu *filter_vcpu)
 277 {
 278         u64 propbase = GICR_PROPBASER_ADDRESS(kvm->arch.vgic.propbaser);
 279         u8 prop;
 280         int ret;
 281
 282         ret = kvm_read_guest(kvm, propbase + irq->intid - GIC_LPI_OFFSET,
 283                              &prop, 1);
 284
 285         if (ret)
 286                 return ret;
 287
 288         spin_lock(&irq->irq_lock);
 289
 290         if (!filter_vcpu || filter_vcpu == irq->target_vcpu) {
 291                 irq->priority = LPI_PROP_PRIORITY(prop);
 292                 irq->enabled = LPI_PROP_ENABLE_BIT(prop);
 293
 294                 vgic_queue_irq_unlock(kvm, irq);
 295         } else {
 296                 spin_unlock(&irq->irq_lock);
 297         }
 298
 299         return 0;
 300 }
 301
 302 /*
 303  * Create a snapshot of the current LPI list, so that we can enumerate all
 304  * LPIs without holding any lock.
 305  * Returns the array length and puts the kmalloc'ed array into intid_ptr.
 306  */
 307 static int vgic_copy_lpi_list(struct kvm *kvm, u32 **intid_ptr)
 308 {
 309         struct vgic_dist *dist = &kvm->arch.vgic;
 310         struct vgic_irq *irq;
 311         u32 *intids;
 312         int irq_count = dist->lpi_list_count, i = 0;
 313
 314         /*
 315          * We use the current value of the list length, which may change
 316          * after the kmalloc. We don't care, because the guest shouldn't
 317          * change anything while the command handling is still running,
 318          * and in the worst case we would miss a new IRQ, which one wouldn't
 319          * expect to be covered by this command anyway.
 320          */
 321         intids = kmalloc_array(irq_count, sizeof(intids[0]), GFP_KERNEL);
 322         if (!intids)
 323                 return -ENOMEM;
 324
 325         spin_lock(&dist->lpi_list_lock);
 326         list_for_each_entry(irq, &dist->lpi_list_head, lpi_list) {
 327                 /* We don't need to "get" the IRQ, as we hold the list lock. */
 328                 intids[i] = irq->intid;
 329                 if (++i == irq_count)
 330                         break;
 331         }
 332         spin_unlock(&dist->lpi_list_lock);
 333
 334         *intid_ptr = intids;
 335         return irq_count;
 336 }
 337
 338 /*
 339  * Promotes the ITS view of affinity of an ITTE (which redistributor this LPI
 340  * is targeting) to the VGIC's view, which deals with target VCPUs.
 341  * Needs to be called whenever either the collection for a LPIs has
 342  * changed or the collection itself got retargeted.
 343  */
 344 static void update_affinity_ite(struct kvm *kvm, struct its_ite *ite)
 345 {
 346         struct kvm_vcpu *vcpu;
 347
 348         if (!its_is_collection_mapped(ite->collection))
 349                 return;
 350
 351         vcpu = kvm_get_vcpu(kvm, ite->collection->target_addr);
 352
 353         spin_lock(&ite->irq->irq_lock);
 354         ite->irq->target_vcpu = vcpu;
 355         spin_unlock(&ite->irq->irq_lock);
 356 }
 357
 358 /*
 359  * Updates the target VCPU for every LPI targeting this collection.
 360  * Must be called with the its_lock mutex held.
 361  */
 362 static void update_affinity_collection(struct kvm *kvm, struct vgic_its *its,
 363                                        struct its_collection *coll)
 364 {
 365         struct its_device *device;
 366         struct its_ite *ite;
 367
 368         for_each_lpi_its(device, ite, its) {
 369                 if (!ite->collection || coll != ite->collection)
 370                         continue;
 371
 372                 update_affinity_ite(kvm, ite);
 373         }
 374 }
 375
 376 static u32 max_lpis_propbaser(u64 propbaser)
 377 {
 378         int nr_idbits = (propbaser & 0x1f) + 1;
 379
 380         return 1U << min(nr_idbits, INTERRUPT_ID_BITS_ITS);
 381 }
 382
 383 /*
 384  * Scan the whole LPI pending table and sync the pending bit in there
 385  * with our own data structures. This relies on the LPI being
 386  * mapped before.
 387  */
 388 static int its_sync_lpi_pending_table(struct kvm_vcpu *vcpu)
 389 {
 390         gpa_t pendbase = GICR_PENDBASER_ADDRESS(vcpu->arch.vgic_cpu.pendbaser);
 391         struct vgic_irq *irq;
 392         int last_byte_offset = -1;
 393         int ret = 0;
 394         u32 *intids;
 395         int nr_irqs, i;
 396
 397         nr_irqs = vgic_copy_lpi_list(vcpu->kvm, &intids);
 398         if (nr_irqs < 0)
 399                 return nr_irqs;
 400
 401         for (i = 0; i < nr_irqs; i++) {
 402                 int byte_offset, bit_nr;
 403                 u8 pendmask;
 404
 405                 byte_offset = intids[i] / BITS_PER_BYTE;
 406                 bit_nr = intids[i] % BITS_PER_BYTE;
 407
 408                 /*
 409                  * For contiguously allocated LPIs chances are we just read
 410                  * this very same byte in the last iteration. Reuse that.
 411                  */
 412                 if (byte_offset != last_byte_offset) {
 413                         ret = kvm_read_guest(vcpu->kvm, pendbase + byte_offset,
 414                                              &pendmask, 1);
 415                         if (ret) {
 416                                 kfree(intids);
 417                                 return ret;
 418                         }
 419                         last_byte_offset = byte_offset;
 420                 }
 421
 422                 irq = vgic_get_irq(vcpu->kvm, NULL, intids[i]);
 423                 spin_lock(&irq->irq_lock);
 424                 irq->pending_latch = pendmask & (1U << bit_nr);
 425                 vgic_queue_irq_unlock(vcpu->kvm, irq);
 426                 vgic_put_irq(vcpu->kvm, irq);
 427         }
 428
 429         kfree(intids);
 430
 431         return ret;
 432 }
 433
 434 static unsigned long vgic_mmio_read_its_typer(struct kvm *kvm,
 435                                               struct vgic_its *its,
 436                                               gpa_t addr, unsigned int len)
 437 {
 438         const struct vgic_its_abi *abi = vgic_its_get_abi(its);
 439         u64 reg = GITS_TYPER_PLPIS;
 440
 441         /*
 442          * We use linear CPU numbers for redistributor addressing,
 443          * so GITS_TYPER.PTA is 0.
 444          * Also we force all PROPBASER registers to be the same, so
 445          * CommonLPIAff is 0 as well.
 446          * To avoid memory waste in the guest, we keep the number of IDBits and
 447          * DevBits low - as least for the time being.
 448          */
 449         reg |= GIC_ENCODE_SZ(VITS_TYPER_DEVBITS, 5) << GITS_TYPER_DEVBITS_SHIFT;
 450         reg |= GIC_ENCODE_SZ(VITS_TYPER_IDBITS, 5) << GITS_TYPER_IDBITS_SHIFT;
 451         reg |= GIC_ENCODE_SZ(abi->ite_esz, 4) << GITS_TYPER_ITT_ENTRY_SIZE_SHIFT;
 452
 453         return extract_bytes(reg, addr & 7, len);
 454 }
 455
 456 static unsigned long vgic_mmio_read_its_iidr(struct kvm *kvm,
 457                                              struct vgic_its *its,
 458                                              gpa_t addr, unsigned int len)
 459 {
 460         u32 val;
 461
 462         val = (its->abi_rev << GITS_IIDR_REV_SHIFT) & GITS_IIDR_REV_MASK;
 463         val |= (PRODUCT_ID_KVM << GITS_IIDR_PRODUCTID_SHIFT) | IMPLEMENTER_ARM;
 464         return val;
 465 }
 466
 467 static int vgic_mmio_uaccess_write_its_iidr(struct kvm *kvm,
 468                                             struct vgic_its *its,
 469                                             gpa_t addr, unsigned int len,
 470                                             unsigned long val)
 471 {
 472         u32 rev = GITS_IIDR_REV(val);
 473
 474         if (rev >= NR_ITS_ABIS)
 475                 return -EINVAL;
 476         return vgic_its_set_abi(its, rev);
 477 }
 478
 479 static unsigned long vgic_mmio_read_its_idregs(struct kvm *kvm,
 480                                                struct vgic_its *its,
 481                                                gpa_t addr, unsigned int len)
 482 {
 483         switch (addr & 0xffff) {
 484         case GITS_PIDR0:
 485                 return 0x92;    /* part number, bits[7:0] */
 486         case GITS_PIDR1:
 487                 return 0xb4;    /* part number, bits[11:8] */
 488         case GITS_PIDR2:
 489                 return GIC_PIDR2_ARCH_GICv3 | 0x0b;
 490         case GITS_PIDR4:
 491                 return 0x40;    /* This is a 64K software visible page */
 492         /* The following are the ID registers for (any) GIC. */
 493         case GITS_CIDR0:
 494                 return 0x0d;
 495         case GITS_CIDR1:
 496                 return 0xf0;
 497         case GITS_CIDR2:
 498                 return 0x05;
 499         case GITS_CIDR3:
 500                 return 0xb1;
 501         }
 502
 503         return 0;
 504 }
 505
 506 /*
 507  * Find the target VCPU and the LPI number for a given devid/eventid pair
 508  * and make this IRQ pending, possibly injecting it.
 509  * Must be called with the its_lock mutex held.
 510  * Returns 0 on success, a positive error value for any ITS mapping
 511  * related errors and negative error values for generic errors.
 512  */
 513 static int vgic_its_trigger_msi(struct kvm *kvm, struct vgic_its *its,
 514                                 u32 devid, u32 eventid)
 515 {
 516         struct kvm_vcpu *vcpu;
 517         struct its_ite *ite;
 518
 519         if (!its->enabled)
 520                 return -EBUSY;
 521
 522         ite = find_ite(its, devid, eventid);
 523         if (!ite || !its_is_collection_mapped(ite->collection))
 524                 return E_ITS_INT_UNMAPPED_INTERRUPT;
 525
 526         vcpu = kvm_get_vcpu(kvm, ite->collection->target_addr);
 527         if (!vcpu)
 528                 return E_ITS_INT_UNMAPPED_INTERRUPT;
 529
 530         if (!vcpu->arch.vgic_cpu.lpis_enabled)
 531                 return -EBUSY;
 532
 533         spin_lock(&ite->irq->irq_lock);
 534         ite->irq->pending_latch = true;
 535         vgic_queue_irq_unlock(kvm, ite->irq);
 536
 537         return 0;
 538 }
 539
 540 static struct vgic_io_device *vgic_get_its_iodev(struct kvm_io_device *dev)
 541 {
 542         struct vgic_io_device *iodev;
 543
 544         if (dev->ops != &kvm_io_gic_ops)
 545                 return NULL;
 546
 547         iodev = container_of(dev, struct vgic_io_device, dev);
 548
 549         if (iodev->iodev_type != IODEV_ITS)
 550                 return NULL;
 551
 552         return iodev;
 553 }
 554
 555 /*
 556  * Queries the KVM IO bus framework to get the ITS pointer from the given
 557  * doorbell address.
 558  * We then call vgic_its_trigger_msi() with the decoded data.
 559  * According to the KVM_SIGNAL_MSI API description returns 1 on success.
 560  */
 561 int vgic_its_inject_msi(struct kvm *kvm, struct kvm_msi *msi)
 562 {
 563         u64 address;
 564         struct kvm_io_device *kvm_io_dev;
 565         struct vgic_io_device *iodev;
 566         int ret;
 567
 568         if (!vgic_has_its(kvm))
 569                 return -ENODEV;
 570
 571         if (!(msi->flags & KVM_MSI_VALID_DEVID))
 572                 return -EINVAL;
 573
 574         address = (u64)msi->address_hi << 32 | msi->address_lo;
 575
 576         kvm_io_dev = kvm_io_bus_get_dev(kvm, KVM_MMIO_BUS, address);
 577         if (!kvm_io_dev)
 578                 return -EINVAL;
 579
 580         iodev = vgic_get_its_iodev(kvm_io_dev);
 581         if (!iodev)
 582                 return -EINVAL;
 583
 584         mutex_lock(&iodev->its->its_lock);
 585         ret = vgic_its_trigger_msi(kvm, iodev->its, msi->devid, msi->data);
 586         mutex_unlock(&iodev->its->its_lock);
 587
 588         if (ret < 0)
 589                 return ret;
 590
 591         /*
 592          * KVM_SIGNAL_MSI demands a return value > 0 for success and 0
 593          * if the guest has blocked the MSI. So we map any LPI mapping
 594          * related error to that.
 595          */
 596         if (ret)
 597                 return 0;
 598         else
 599                 return 1;
 600 }
 601
 602 /* Requires the its_lock to be held. */
 603 static void its_free_ite(struct kvm *kvm, struct its_ite *ite)
 604 {
 605         list_del(&ite->ite_list);
 606
 607         /* This put matches the get in vgic_add_lpi. */
 608         if (ite->irq)
 609                 vgic_put_irq(kvm, ite->irq);
 610
 611         kfree(ite);
 612 }
 613
 614 static u64 its_cmd_mask_field(u64 *its_cmd, int word, int shift, int size)
 615 {
 616         return (le64_to_cpu(its_cmd[word]) >> shift) & (BIT_ULL(size) - 1);
 617 }
 618
 619 #define its_cmd_get_command(cmd)        its_cmd_mask_field(cmd, 0,  0,  8)
 620 #define its_cmd_get_deviceid(cmd)       its_cmd_mask_field(cmd, 0, 32, 32)
 621 #define its_cmd_get_size(cmd)           (its_cmd_mask_field(cmd, 1,  0,  5) + 1)
 622 #define its_cmd_get_id(cmd)             its_cmd_mask_field(cmd, 1,  0, 32)
 623 #define its_cmd_get_physical_id(cmd)    its_cmd_mask_field(cmd, 1, 32, 32)
 624 #define its_cmd_get_collection(cmd)     its_cmd_mask_field(cmd, 2,  0, 16)
 625 #define its_cmd_get_ittaddr(cmd)        (its_cmd_mask_field(cmd, 2,  8, 44) << 8)
 626 #define its_cmd_get_target_addr(cmd)    its_cmd_mask_field(cmd, 2, 16, 32)
 627 #define its_cmd_get_validbit(cmd)       its_cmd_mask_field(cmd, 2, 63,  1)
 628
 629 /*
 630  * The DISCARD command frees an Interrupt Translation Table Entry (ITTE).
 631  * Must be called with the its_lock mutex held.
 632  */
 633 static int vgic_its_cmd_handle_discard(struct kvm *kvm, struct vgic_its *its,
 634                                        u64 *its_cmd)
 635 {
 636         u32 device_id = its_cmd_get_deviceid(its_cmd);
 637         u32 event_id = its_cmd_get_id(its_cmd);
 638         struct its_ite *ite;
 639
 640
 641         ite = find_ite(its, device_id, event_id);
 642         if (ite && ite->collection) {
 643                 /*
 644                  * Though the spec talks about removing the pending state, we
 645                  * don't bother here since we clear the ITTE anyway and the
 646                  * pending state is a property of the ITTE struct.
 647                  */
 648                 its_free_ite(kvm, ite);
 649                 return 0;
 650         }
 651
 652         return E_ITS_DISCARD_UNMAPPED_INTERRUPT;
 653 }
 654
 655 /*
 656  * The MOVI command moves an ITTE to a different collection.
 657  * Must be called with the its_lock mutex held.
 658  */
 659 static int vgic_its_cmd_handle_movi(struct kvm *kvm, struct vgic_its *its,
 660                                     u64 *its_cmd)
 661 {
 662         u32 device_id = its_cmd_get_deviceid(its_cmd);
 663         u32 event_id = its_cmd_get_id(its_cmd);
 664         u32 coll_id = its_cmd_get_collection(its_cmd);
 665         struct kvm_vcpu *vcpu;
 666         struct its_ite *ite;
 667         struct its_collection *collection;
 668
 669         ite = find_ite(its, device_id, event_id);
 670         if (!ite)
 671                 return E_ITS_MOVI_UNMAPPED_INTERRUPT;
 672
 673         if (!its_is_collection_mapped(ite->collection))
 674                 return E_ITS_MOVI_UNMAPPED_COLLECTION;
 675
 676         collection = find_collection(its, coll_id);
 677         if (!its_is_collection_mapped(collection))
 678                 return E_ITS_MOVI_UNMAPPED_COLLECTION;
 679
 680         ite->collection = collection;
 681         vcpu = kvm_get_vcpu(kvm, collection->target_addr);
 682
 683         spin_lock(&ite->irq->irq_lock);
 684         ite->irq->target_vcpu = vcpu;
 685         spin_unlock(&ite->irq->irq_lock);
 686
 687         return 0;
 688 }
 689
 690 /*
 691  * Check whether an ID can be stored into the corresponding guest table.
 692  * For a direct table this is pretty easy, but gets a bit nasty for
 693  * indirect tables. We check whether the resulting guest physical address
 694  * is actually valid (covered by a memslot and guest accessible).
 695  * For this we have to read the respective first level entry.
 696  */
 697 static bool vgic_its_check_id(struct vgic_its *its, u64 baser, u32 id,
 698                               gpa_t *eaddr)
 699 {
 700         int l1_tbl_size = GITS_BASER_NR_PAGES(baser) * SZ_64K;
 701         u64 indirect_ptr, type = GITS_BASER_TYPE(baser);
 702         int esz = GITS_BASER_ENTRY_SIZE(baser);
 703         int index;
 704         gfn_t gfn;
 705
 706         switch (type) {
 707         case GITS_BASER_TYPE_DEVICE:
 708                 if (id >= BIT_ULL(VITS_TYPER_DEVBITS))
 709                         return false;
 710                 break;
 711         case GITS_BASER_TYPE_COLLECTION:
 712                 /* as GITS_TYPER.CIL == 0, ITS supports 16-bit collection ID */
 713                 if (id >= BIT_ULL(16))
 714                         return false;
 715                 break;
 716         default:
 717                 return false;
 718         }
 719
 720         if (!(baser & GITS_BASER_INDIRECT)) {
 721                 phys_addr_t addr;
 722
 723                 if (id >= (l1_tbl_size / esz))
 724                         return false;
 725
 726                 addr = BASER_ADDRESS(baser) + id * esz;
 727                 gfn = addr >> PAGE_SHIFT;
 728
 729                 if (eaddr)
 730                         *eaddr = addr;
 731                 return kvm_is_visible_gfn(its->dev->kvm, gfn);
 732         }
 733
 734         /* calculate and check the index into the 1st level */
 735         index = id / (SZ_64K / esz);
 736         if (index >= (l1_tbl_size / sizeof(u64)))
 737                 return false;
 738
 739         /* Each 1st level entry is represented by a 64-bit value. */
 740         if (kvm_read_guest(its->dev->kvm,
 741                            BASER_ADDRESS(baser) + index * sizeof(indirect_ptr),
 742                            &indirect_ptr, sizeof(indirect_ptr)))
 743                 return false;
 744
 745         indirect_ptr = le64_to_cpu(indirect_ptr);
 746
 747         /* check the valid bit of the first level entry */
 748         if (!(indirect_ptr & BIT_ULL(63)))
 749                 return false;
 750
 751         /*
 752          * Mask the guest physical address and calculate the frame number.
 753          * Any address beyond our supported 48 bits of PA will be caught
 754          * by the actual check in the final step.
 755          */
 756         indirect_ptr &= GENMASK_ULL(51, 16);
 757
 758         /* Find the address of the actual entry */
 759         index = id % (SZ_64K / esz);
 760         indirect_ptr += index * esz;
 761         gfn = indirect_ptr >> PAGE_SHIFT;
 762
 763         if (eaddr)
 764                 *eaddr = indirect_ptr;
 765         return kvm_is_visible_gfn(its->dev->kvm, gfn);
 766 }
 767
 768 static int vgic_its_alloc_collection(struct vgic_its *its,
 769                                      struct its_collection **colp,
 770                                      u32 coll_id)
 771 {
 772         struct its_collection *collection;
 773
 774         if (!vgic_its_check_id(its, its->baser_coll_table, coll_id, NULL))
 775                 return E_ITS_MAPC_COLLECTION_OOR;
 776
 777         collection = kzalloc(sizeof(*collection), GFP_KERNEL);
 778
 779         collection->collection_id = coll_id;
 780         collection->target_addr = COLLECTION_NOT_MAPPED;
 781
 782         list_add_tail(&collection->coll_list, &its->collection_list);
 783         *colp = collection;
 784
 785         return 0;
 786 }
 787
 788 static void vgic_its_free_collection(struct vgic_its *its, u32 coll_id)
 789 {
 790         struct its_collection *collection;
 791         struct its_device *device;
 792         struct its_ite *ite;
 793
 794         /*
 795          * Clearing the mapping for that collection ID removes the
 796          * entry from the list. If there wasn't any before, we can
 797          * go home early.
 798          */
 799         collection = find_collection(its, coll_id);
 800         if (!collection)
 801                 return;
 802
 803         for_each_lpi_its(device, ite, its)
 804                 if (ite->collection &&
 805                     ite->collection->collection_id == coll_id)
 806                         ite->collection = NULL;
 807
 808         list_del(&collection->coll_list);
 809         kfree(collection);
 810 }
 811
 812 /* Must be called with its_lock mutex held */
 813 static struct its_ite *vgic_its_alloc_ite(struct its_device *device,
 814                                           struct its_collection *collection,
 815                                           u32 lpi_id, u32 event_id)
 816 {
 817         struct its_ite *ite;
 818
 819         ite = kzalloc(sizeof(*ite), GFP_KERNEL);
 820         if (!ite)
 821                 return ERR_PTR(-ENOMEM);
 822
 823         ite->event_id   = event_id;
 824         ite->collection = collection;
 825         ite->lpi = lpi_id;
 826
 827         list_add_tail(&ite->ite_list, &device->itt_head);
 828         return ite;
 829 }
 830
 831 /*
 832  * The MAPTI and MAPI commands map LPIs to ITTEs.
 833  * Must be called with its_lock mutex held.
 834  */
 835 static int vgic_its_cmd_handle_mapi(struct kvm *kvm, struct vgic_its *its,
 836                                     u64 *its_cmd)
 837 {
 838         u32 device_id = its_cmd_get_deviceid(its_cmd);
 839         u32 event_id = its_cmd_get_id(its_cmd);
 840         u32 coll_id = its_cmd_get_collection(its_cmd);
 841         struct its_ite *ite;
 842         struct kvm_vcpu *vcpu = NULL;
 843         struct its_device *device;
 844         struct its_collection *collection, *new_coll = NULL;
 845         struct vgic_irq *irq;
 846         int lpi_nr;
 847
 848         device = find_its_device(its, device_id);
 849         if (!device)
 850                 return E_ITS_MAPTI_UNMAPPED_DEVICE;
 851
 852         if (event_id >= BIT_ULL(device->num_eventid_bits))
 853                 return E_ITS_MAPTI_ID_OOR;
 854
 855         if (its_cmd_get_command(its_cmd) == GITS_CMD_MAPTI)
 856                 lpi_nr = its_cmd_get_physical_id(its_cmd);
 857         else
 858                 lpi_nr = event_id;
 859         if (lpi_nr < GIC_LPI_OFFSET ||
 860             lpi_nr >= max_lpis_propbaser(kvm->arch.vgic.propbaser))
 861                 return E_ITS_MAPTI_PHYSICALID_OOR;
 862
 863         /* If there is an existing mapping, behavior is UNPREDICTABLE. */
 864         if (find_ite(its, device_id, event_id))
 865                 return 0;
 866
 867         collection = find_collection(its, coll_id);
 868         if (!collection) {
 869                 int ret = vgic_its_alloc_collection(its, &collection, coll_id);
 870                 if (ret)
 871                         return ret;
 872                 new_coll = collection;
 873         }
 874
 875         ite = vgic_its_alloc_ite(device, collection, lpi_nr, event_id);
 876         if (IS_ERR(ite)) {
 877                 if (new_coll)
 878                         vgic_its_free_collection(its, coll_id);
 879                 return PTR_ERR(ite);
 880         }
 881
 882         if (its_is_collection_mapped(collection))
 883                 vcpu = kvm_get_vcpu(kvm, collection->target_addr);
 884
 885         irq = vgic_add_lpi(kvm, lpi_nr, vcpu);
 886         if (IS_ERR(irq)) {
 887                 if (new_coll)
 888                         vgic_its_free_collection(its, coll_id);
 889                 its_free_ite(kvm, ite);
 890                 return PTR_ERR(irq);
 891         }
 892         ite->irq = irq;
 893
 894         return 0;
 895 }
 896
 897 /* Requires the its_lock to be held. */
 898 static void vgic_its_unmap_device(struct kvm *kvm, struct its_device *device)
 899 {
 900         struct its_ite *ite, *temp;
 901
 902         /*
 903          * The spec says that unmapping a device with still valid
 904          * ITTEs associated is UNPREDICTABLE. We remove all ITTEs,
 905          * since we cannot leave the memory unreferenced.
 906          */
 907         list_for_each_entry_safe(ite, temp, &device->itt_head, ite_list)
 908                 its_free_ite(kvm, ite);
 909
 910         list_del(&device->dev_list);
 911         kfree(device);
 912 }
 913
 914 /* Must be called with its_lock mutex held */
 915 static struct its_device *vgic_its_alloc_device(struct vgic_its *its,
 916                                                 u32 device_id, gpa_t itt_addr,
 917                                                 u8 num_eventid_bits)
 918 {
 919         struct its_device *device;
 920
 921         device = kzalloc(sizeof(*device), GFP_KERNEL);
 922         if (!device)
 923                 return ERR_PTR(-ENOMEM);
 924
 925         device->device_id = device_id;
 926         device->itt_addr = itt_addr;
 927         device->num_eventid_bits = num_eventid_bits;
 928         INIT_LIST_HEAD(&device->itt_head);
 929
 930         list_add_tail(&device->dev_list, &its->device_list);
 931         return device;
 932 }
 933
 934 /*
 935  * MAPD maps or unmaps a device ID to Interrupt Translation Tables (ITTs).
 936  * Must be called with the its_lock mutex held.
 937  */
 938 static int vgic_its_cmd_handle_mapd(struct kvm *kvm, struct vgic_its *its,
 939                                     u64 *its_cmd)
 940 {
 941         u32 device_id = its_cmd_get_deviceid(its_cmd);
 942         bool valid = its_cmd_get_validbit(its_cmd);
 943         u8 num_eventid_bits = its_cmd_get_size(its_cmd);
 944         gpa_t itt_addr = its_cmd_get_ittaddr(its_cmd);
 945         struct its_device *device;
 946
 947         if (!vgic_its_check_id(its, its->baser_device_table, device_id, NULL))
 948                 return E_ITS_MAPD_DEVICE_OOR;
 949
 950         if (valid && num_eventid_bits > VITS_TYPER_IDBITS)
 951                 return E_ITS_MAPD_ITTSIZE_OOR;
 952
 953         device = find_its_device(its, device_id);
 954
 955         /*
 956          * The spec says that calling MAPD on an already mapped device
 957          * invalidates all cached data for this device. We implement this
 958          * by removing the mapping and re-establishing it.
 959          */
 960         if (device)
 961                 vgic_its_unmap_device(kvm, device);
 962
 963         /*
 964          * The spec does not say whether unmapping a not-mapped device
 965          * is an error, so we are done in any case.
 966          */
 967         if (!valid)
 968                 return 0;
 969
 970         device = vgic_its_alloc_device(its, device_id, itt_addr,
 971                                        num_eventid_bits);
 972         if (IS_ERR(device))
 973                 return PTR_ERR(device);
 974
 975         return 0;
 976 }
 977
 978 /*
 979  * The MAPC command maps collection IDs to redistributors.
 980  * Must be called with the its_lock mutex held.
 981  */
 982 static int vgic_its_cmd_handle_mapc(struct kvm *kvm, struct vgic_its *its,
 983                                     u64 *its_cmd)
 984 {
 985         u16 coll_id;
 986         u32 target_addr;
 987         struct its_collection *collection;
 988         bool valid;
 989
 990         valid = its_cmd_get_validbit(its_cmd);
 991         coll_id = its_cmd_get_collection(its_cmd);
 992         target_addr = its_cmd_get_target_addr(its_cmd);
 993
 994         if (target_addr >= atomic_read(&kvm->online_vcpus))
 995                 return E_ITS_MAPC_PROCNUM_OOR;
 996
 997         if (!valid) {
 998                 vgic_its_free_collection(its, coll_id);
 999         } else {
1000                 collection = find_collection(its, coll_id);
1001
1002                 if (!collection) {
1003                         int ret;
1004
1005                         ret = vgic_its_alloc_collection(its, &collection,
1006                                                         coll_id);
1007                         if (ret)
1008                                 return ret;
1009                         collection->target_addr = target_addr;
1010                 } else {
1011                         collection->target_addr = target_addr;
1012                         update_affinity_collection(kvm, its, collection);
1013                 }
1014         }
1015
1016         return 0;
1017 }
1018
1019 /*
1020  * The CLEAR command removes the pending state for a particular LPI.
1021  * Must be called with the its_lock mutex held.
1022  */
1023 static int vgic_its_cmd_handle_clear(struct kvm *kvm, struct vgic_its *its,
1024                                      u64 *its_cmd)
1025 {
1026         u32 device_id = its_cmd_get_deviceid(its_cmd);
1027         u32 event_id = its_cmd_get_id(its_cmd);
1028         struct its_ite *ite;
1029
1030
1031         ite = find_ite(its, device_id, event_id);
1032         if (!ite)
1033                 return E_ITS_CLEAR_UNMAPPED_INTERRUPT;
1034
1035         ite->irq->pending_latch = false;
1036
1037         return 0;
1038 }
1039
1040 /*
1041  * The INV command syncs the configuration bits from the memory table.
1042  * Must be called with the its_lock mutex held.
1043  */
1044 static int vgic_its_cmd_handle_inv(struct kvm *kvm, struct vgic_its *its,
1045                                    u64 *its_cmd)
1046 {
1047         u32 device_id = its_cmd_get_deviceid(its_cmd);
1048         u32 event_id = its_cmd_get_id(its_cmd);
1049         struct its_ite *ite;
1050
1051
1052         ite = find_ite(its, device_id, event_id);
1053         if (!ite)
1054                 return E_ITS_INV_UNMAPPED_INTERRUPT;
1055
1056         return update_lpi_config(kvm, ite->irq, NULL);
1057 }
1058
1059 /*
1060  * The INVALL command requests flushing of all IRQ data in this collection.
1061  * Find the VCPU mapped to that collection, then iterate over the VM's list
1062  * of mapped LPIs and update the configuration for each IRQ which targets
1063  * the specified vcpu. The configuration will be read from the in-memory
1064  * configuration table.
1065  * Must be called with the its_lock mutex held.
1066  */
1067 static int vgic_its_cmd_handle_invall(struct kvm *kvm, struct vgic_its *its,
1068                                       u64 *its_cmd)
1069 {
1070         u32 coll_id = its_cmd_get_collection(its_cmd);
1071         struct its_collection *collection;
1072         struct kvm_vcpu *vcpu;
1073         struct vgic_irq *irq;
1074         u32 *intids;
1075         int irq_count, i;
1076
1077         collection = find_collection(its, coll_id);
1078         if (!its_is_collection_mapped(collection))
1079                 return E_ITS_INVALL_UNMAPPED_COLLECTION;
1080
1081         vcpu = kvm_get_vcpu(kvm, collection->target_addr);
1082
1083         irq_count = vgic_copy_lpi_list(kvm, &intids);
1084         if (irq_count < 0)
1085                 return irq_count;
1086
1087         for (i = 0; i < irq_count; i++) {
1088                 irq = vgic_get_irq(kvm, NULL, intids[i]);
1089                 if (!irq)
1090                         continue;
1091                 update_lpi_config(kvm, irq, vcpu);
1092                 vgic_put_irq(kvm, irq);
1093         }
1094
1095         kfree(intids);
1096
1097         return 0;
1098 }
1099
1100 /*
1101  * The MOVALL command moves the pending state of all IRQs targeting one
1102  * redistributor to another. We don't hold the pending state in the VCPUs,
1103  * but in the IRQs instead, so there is really not much to do for us here.
1104  * However the spec says that no IRQ must target the old redistributor
1105  * afterwards, so we make sure that no LPI is using the associated target_vcpu.
1106  * This command affects all LPIs in the system that target that redistributor.
1107  */
1108 static int vgic_its_cmd_handle_movall(struct kvm *kvm, struct vgic_its *its,
1109                                       u64 *its_cmd)
1110 {
1111         struct vgic_dist *dist = &kvm->arch.vgic;
1112         u32 target1_addr = its_cmd_get_target_addr(its_cmd);
1113         u32 target2_addr = its_cmd_mask_field(its_cmd, 3, 16, 32);
1114         struct kvm_vcpu *vcpu1, *vcpu2;
1115         struct vgic_irq *irq;
1116
1117         if (target1_addr >= atomic_read(&kvm->online_vcpus) ||
1118             target2_addr >= atomic_read(&kvm->online_vcpus))
1119                 return E_ITS_MOVALL_PROCNUM_OOR;
1120
1121         if (target1_addr == target2_addr)
1122                 return 0;
1123
1124         vcpu1 = kvm_get_vcpu(kvm, target1_addr);
1125         vcpu2 = kvm_get_vcpu(kvm, target2_addr);
1126
1127         spin_lock(&dist->lpi_list_lock);
1128
1129         list_for_each_entry(irq, &dist->lpi_list_head, lpi_list) {
1130                 spin_lock(&irq->irq_lock);
1131
1132                 if (irq->target_vcpu == vcpu1)
1133                         irq->target_vcpu = vcpu2;
1134
1135                 spin_unlock(&irq->irq_lock);
1136         }
1137
1138         spin_unlock(&dist->lpi_list_lock);
1139
1140         return 0;
1141 }
1142
1143 /*
1144  * The INT command injects the LPI associated with that DevID/EvID pair.
1145  * Must be called with the its_lock mutex held.
1146  */
1147 static int vgic_its_cmd_handle_int(struct kvm *kvm, struct vgic_its *its,
1148                                    u64 *its_cmd)
1149 {
1150         u32 msi_data = its_cmd_get_id(its_cmd);
1151         u64 msi_devid = its_cmd_get_deviceid(its_cmd);
1152
1153         return vgic_its_trigger_msi(kvm, its, msi_devid, msi_data);
1154 }
1155
1156 /*
1157  * This function is called with the its_cmd lock held, but the ITS data
1158  * structure lock dropped.
1159  */
1160 static int vgic_its_handle_command(struct kvm *kvm, struct vgic_its *its,
1161                                    u64 *its_cmd)
1162 {
1163         int ret = -ENODEV;
1164
1165         mutex_lock(&its->its_lock);
1166         switch (its_cmd_get_command(its_cmd)) {
1167         case GITS_CMD_MAPD:
1168                 ret = vgic_its_cmd_handle_mapd(kvm, its, its_cmd);
1169                 break;
1170         case GITS_CMD_MAPC:
1171                 ret = vgic_its_cmd_handle_mapc(kvm, its, its_cmd);
1172                 break;
1173         case GITS_CMD_MAPI:
1174                 ret = vgic_its_cmd_handle_mapi(kvm, its, its_cmd);
1175                 break;
1176         case GITS_CMD_MAPTI:
1177                 ret = vgic_its_cmd_handle_mapi(kvm, its, its_cmd);
1178                 break;
1179         case GITS_CMD_MOVI:
1180                 ret = vgic_its_cmd_handle_movi(kvm, its, its_cmd);
1181                 break;
1182         case GITS_CMD_DISCARD:
1183                 ret = vgic_its_cmd_handle_discard(kvm, its, its_cmd);
1184                 break;
1185         case GITS_CMD_CLEAR:
1186                 ret = vgic_its_cmd_handle_clear(kvm, its, its_cmd);
1187                 break;
1188         case GITS_CMD_MOVALL:
1189                 ret = vgic_its_cmd_handle_movall(kvm, its, its_cmd);
1190                 break;
1191         case GITS_CMD_INT:
1192                 ret = vgic_its_cmd_handle_int(kvm, its, its_cmd);
1193                 break;
1194         case GITS_CMD_INV:
1195                 ret = vgic_its_cmd_handle_inv(kvm, its, its_cmd);
1196                 break;
1197         case GITS_CMD_INVALL:
1198                 ret = vgic_its_cmd_handle_invall(kvm, its, its_cmd);
1199                 break;
1200         case GITS_CMD_SYNC:
1201                 /* we ignore this command: we are in sync all of the time */
1202                 ret = 0;
1203                 break;
1204         }
1205         mutex_unlock(&its->its_lock);
1206
1207         return ret;
1208 }
1209
1210 static u64 vgic_sanitise_its_baser(u64 reg)
1211 {
1212         reg = vgic_sanitise_field(reg, GITS_BASER_SHAREABILITY_MASK,
1213                                   GITS_BASER_SHAREABILITY_SHIFT,
1214                                   vgic_sanitise_shareability);
1215         reg = vgic_sanitise_field(reg, GITS_BASER_INNER_CACHEABILITY_MASK,
1216                                   GITS_BASER_INNER_CACHEABILITY_SHIFT,
1217                                   vgic_sanitise_inner_cacheability);
1218         reg = vgic_sanitise_field(reg, GITS_BASER_OUTER_CACHEABILITY_MASK,
1219                                   GITS_BASER_OUTER_CACHEABILITY_SHIFT,
1220                                   vgic_sanitise_outer_cacheability);
1221
1222         /* Bits 15:12 contain bits 51:48 of the PA, which we don't support. */
1223         reg &= ~GENMASK_ULL(15, 12);
1224
1225         /* We support only one (ITS) page size: 64K */
1226         reg = (reg & ~GITS_BASER_PAGE_SIZE_MASK) | GITS_BASER_PAGE_SIZE_64K;
1227
1228         return reg;
1229 }
1230
1231 static u64 vgic_sanitise_its_cbaser(u64 reg)
1232 {
1233         reg = vgic_sanitise_field(reg, GITS_CBASER_SHAREABILITY_MASK,
1234                                   GITS_CBASER_SHAREABILITY_SHIFT,
1235                                   vgic_sanitise_shareability);
1236         reg = vgic_sanitise_field(reg, GITS_CBASER_INNER_CACHEABILITY_MASK,
1237                                   GITS_CBASER_INNER_CACHEABILITY_SHIFT,
1238                                   vgic_sanitise_inner_cacheability);
1239         reg = vgic_sanitise_field(reg, GITS_CBASER_OUTER_CACHEABILITY_MASK,
1240                                   GITS_CBASER_OUTER_CACHEABILITY_SHIFT,
1241                                   vgic_sanitise_outer_cacheability);
1242
1243         /*
1244          * Sanitise the physical address to be 64k aligned.
1245          * Also limit the physical addresses to 48 bits.
1246          */
1247         reg &= ~(GENMASK_ULL(51, 48) | GENMASK_ULL(15, 12));
1248
1249         return reg;
1250 }
1251
1252 static unsigned long vgic_mmio_read_its_cbaser(struct kvm *kvm,
1253                                                struct vgic_its *its,
1254                                                gpa_t addr, unsigned int len)
1255 {
1256         return extract_bytes(its->cbaser, addr & 7, len);
1257 }
1258
1259 static void vgic_mmio_write_its_cbaser(struct kvm *kvm, struct vgic_its *its,
1260                                        gpa_t addr, unsigned int len,
1261                                        unsigned long val)
1262 {
1263         /* When GITS_CTLR.Enable is 1, this register is RO. */
1264         if (its->enabled)
1265                 return;
1266
1267         mutex_lock(&its->cmd_lock);
1268         its->cbaser = update_64bit_reg(its->cbaser, addr & 7, len, val);
1269         its->cbaser = vgic_sanitise_its_cbaser(its->cbaser);
1270         its->creadr = 0;
1271         /*
1272          * CWRITER is architecturally UNKNOWN on reset, but we need to reset
1273          * it to CREADR to make sure we start with an empty command buffer.
1274          */
1275         its->cwriter = its->creadr;
1276         mutex_unlock(&its->cmd_lock);
1277 }
1278
1279 #define ITS_CMD_BUFFER_SIZE(baser)      ((((baser) & 0xff) + 1) << 12)
1280 #define ITS_CMD_SIZE                    32
1281 #define ITS_CMD_OFFSET(reg)             ((reg) & GENMASK(19, 5))
1282
1283 /* Must be called with the cmd_lock held. */
1284 static void vgic_its_process_commands(struct kvm *kvm, struct vgic_its *its)
1285 {
1286         gpa_t cbaser;
1287         u64 cmd_buf[4];
1288
1289         /* Commands are only processed when the ITS is enabled. */
1290         if (!its->enabled)
1291                 return;
1292
1293         cbaser = CBASER_ADDRESS(its->cbaser);
1294
1295         while (its->cwriter != its->creadr) {
1296                 int ret = kvm_read_guest(kvm, cbaser + its->creadr,
1297                                          cmd_buf, ITS_CMD_SIZE);
1298                 /*
1299                  * If kvm_read_guest() fails, this could be due to the guest
1300                  * programming a bogus value in CBASER or something else going
1301                  * wrong from which we cannot easily recover.
1302                  * According to section 6.3.2 in the GICv3 spec we can just
1303                  * ignore that command then.
1304                  */
1305                 if (!ret)
1306                         vgic_its_handle_command(kvm, its, cmd_buf);
1307
1308                 its->creadr += ITS_CMD_SIZE;
1309                 if (its->creadr == ITS_CMD_BUFFER_SIZE(its->cbaser))
1310                         its->creadr = 0;
1311         }
1312 }
1313
1314 /*
1315  * By writing to CWRITER the guest announces new commands to be processed.
1316  * To avoid any races in the first place, we take the its_cmd lock, which
1317  * protects our ring buffer variables, so that there is only one user
1318  * per ITS handling commands at a given time.
1319  */
1320 static void vgic_mmio_write_its_cwriter(struct kvm *kvm, struct vgic_its *its,
1321                                         gpa_t addr, unsigned int len,
1322                                         unsigned long val)
1323 {
1324         u64 reg;
1325
1326         if (!its)
1327                 return;
1328
1329         mutex_lock(&its->cmd_lock);
1330
1331         reg = update_64bit_reg(its->cwriter, addr & 7, len, val);
1332         reg = ITS_CMD_OFFSET(reg);
1333         if (reg >= ITS_CMD_BUFFER_SIZE(its->cbaser)) {
1334                 mutex_unlock(&its->cmd_lock);
1335                 return;
1336         }
1337         its->cwriter = reg;
1338
1339         vgic_its_process_commands(kvm, its);
1340
1341         mutex_unlock(&its->cmd_lock);
1342 }
1343
1344 static unsigned long vgic_mmio_read_its_cwriter(struct kvm *kvm,
1345                                                 struct vgic_its *its,
1346                                                 gpa_t addr, unsigned int len)
1347 {
1348         return extract_bytes(its->cwriter, addr & 0x7, len);
1349 }
1350
1351 static unsigned long vgic_mmio_read_its_creadr(struct kvm *kvm,
1352                                                struct vgic_its *its,
1353                                                gpa_t addr, unsigned int len)
1354 {
1355         return extract_bytes(its->creadr, addr & 0x7, len);
1356 }
1357
1358 static int vgic_mmio_uaccess_write_its_creadr(struct kvm *kvm,
1359                                               struct vgic_its *its,
1360                                               gpa_t addr, unsigned int len,
1361                                               unsigned long val)
1362 {
1363         u32 cmd_offset;
1364         int ret = 0;
1365
1366         mutex_lock(&its->cmd_lock);
1367
1368         if (its->enabled) {
1369                 ret = -EBUSY;
1370                 goto out;
1371         }
1372
1373         cmd_offset = ITS_CMD_OFFSET(val);
1374         if (cmd_offset >= ITS_CMD_BUFFER_SIZE(its->cbaser)) {
1375                 ret = -EINVAL;
1376                 goto out;
1377         }
1378
1379         its->creadr = cmd_offset;
1380 out:
1381         mutex_unlock(&its->cmd_lock);
1382         return ret;
1383 }
1384
1385 #define BASER_INDEX(addr) (((addr) / sizeof(u64)) & 0x7)
1386 static unsigned long vgic_mmio_read_its_baser(struct kvm *kvm,
1387                                               struct vgic_its *its,
1388                                               gpa_t addr, unsigned int len)
1389 {
1390         u64 reg;
1391
1392         switch (BASER_INDEX(addr)) {
1393         case 0:
1394                 reg = its->baser_device_table;
1395                 break;
1396         case 1:
1397                 reg = its->baser_coll_table;
1398                 break;
1399         default:
1400                 reg = 0;
1401                 break;
1402         }
1403
1404         return extract_bytes(reg, addr & 7, len);
1405 }
1406
1407 #define GITS_BASER_RO_MASK      (GENMASK_ULL(52, 48) | GENMASK_ULL(58, 56))
1408 static void vgic_mmio_write_its_baser(struct kvm *kvm,
1409                                       struct vgic_its *its,
1410                                       gpa_t addr, unsigned int len,
1411                                       unsigned long val)
1412 {
1413         const struct vgic_its_abi *abi = vgic_its_get_abi(its);
1414         u64 entry_size, device_type;
1415         u64 reg, *regptr, clearbits = 0;
1416
1417         /* When GITS_CTLR.Enable is 1, we ignore write accesses. */
1418         if (its->enabled)
1419                 return;
1420
1421         switch (BASER_INDEX(addr)) {
1422         case 0:
1423                 regptr = &its->baser_device_table;
1424                 entry_size = abi->dte_esz;
1425                 device_type = GITS_BASER_TYPE_DEVICE;
1426                 break;
1427         case 1:
1428                 regptr = &its->baser_coll_table;
1429                 entry_size = abi->cte_esz;
1430                 device_type = GITS_BASER_TYPE_COLLECTION;
1431                 clearbits = GITS_BASER_INDIRECT;
1432                 break;
1433         default:
1434                 return;
1435         }
1436
1437         reg = update_64bit_reg(*regptr, addr & 7, len, val);
1438         reg &= ~GITS_BASER_RO_MASK;
1439         reg &= ~clearbits;
1440
1441         reg |= (entry_size - 1) << GITS_BASER_ENTRY_SIZE_SHIFT;
1442         reg |= device_type << GITS_BASER_TYPE_SHIFT;
1443         reg = vgic_sanitise_its_baser(reg);
1444
1445         *regptr = reg;
1446 }
1447
1448 static unsigned long vgic_mmio_read_its_ctlr(struct kvm *vcpu,
1449                                              struct vgic_its *its,
1450                                              gpa_t addr, unsigned int len)
1451 {
1452         u32 reg = 0;
1453
1454         mutex_lock(&its->cmd_lock);
1455         if (its->creadr == its->cwriter)
1456                 reg |= GITS_CTLR_QUIESCENT;
1457         if (its->enabled)
1458                 reg |= GITS_CTLR_ENABLE;
1459         mutex_unlock(&its->cmd_lock);
1460
1461         return reg;
1462 }
1463
1464 static void vgic_mmio_write_its_ctlr(struct kvm *kvm, struct vgic_its *its,
1465                                      gpa_t addr, unsigned int len,
1466                                      unsigned long val)
1467 {
1468         mutex_lock(&its->cmd_lock);
1469
1470         its->enabled = !!(val & GITS_CTLR_ENABLE);
1471
1472         /*
1473          * Try to process any pending commands. This function bails out early
1474          * if the ITS is disabled or no commands have been queued.
1475          */
1476         vgic_its_process_commands(kvm, its);
1477
1478         mutex_unlock(&its->cmd_lock);
1479 }
1480
1481 #define REGISTER_ITS_DESC(off, rd, wr, length, acc)             \
1482 {                                                               \
1483         .reg_offset = off,                                      \
1484         .len = length,                                          \
1485         .access_flags = acc,                                    \
1486         .its_read = rd,                                         \
1487         .its_write = wr,                                        \
1488 }
1489
1490 #define REGISTER_ITS_DESC_UACCESS(off, rd, wr, uwr, length, acc)\
1491 {                                                               \
1492         .reg_offset = off,                                      \
1493         .len = length,                                          \
1494         .access_flags = acc,                                    \
1495         .its_read = rd,                                         \
1496         .its_write = wr,                                        \
1497         .uaccess_its_write = uwr,                               \
1498 }
1499
1500 static void its_mmio_write_wi(struct kvm *kvm, struct vgic_its *its,
1501                               gpa_t addr, unsigned int len, unsigned long val)
1502 {
1503         /* Ignore */
1504 }
1505
1506 static struct vgic_register_region its_registers[] = {
1507         REGISTER_ITS_DESC(GITS_CTLR,
1508                 vgic_mmio_read_its_ctlr, vgic_mmio_write_its_ctlr, 4,
1509                 VGIC_ACCESS_32bit),
1510         REGISTER_ITS_DESC_UACCESS(GITS_IIDR,
1511                 vgic_mmio_read_its_iidr, its_mmio_write_wi,
1512                 vgic_mmio_uaccess_write_its_iidr, 4,
1513                 VGIC_ACCESS_32bit),
1514         REGISTER_ITS_DESC(GITS_TYPER,
1515                 vgic_mmio_read_its_typer, its_mmio_write_wi, 8,
1516                 VGIC_ACCESS_64bit | VGIC_ACCESS_32bit),
1517         REGISTER_ITS_DESC(GITS_CBASER,
1518                 vgic_mmio_read_its_cbaser, vgic_mmio_write_its_cbaser, 8,
1519                 VGIC_ACCESS_64bit | VGIC_ACCESS_32bit),
1520         REGISTER_ITS_DESC(GITS_CWRITER,
1521                 vgic_mmio_read_its_cwriter, vgic_mmio_write_its_cwriter, 8,
1522                 VGIC_ACCESS_64bit | VGIC_ACCESS_32bit),
1523         REGISTER_ITS_DESC_UACCESS(GITS_CREADR,
1524                 vgic_mmio_read_its_creadr, its_mmio_write_wi,
1525                 vgic_mmio_uaccess_write_its_creadr, 8,
1526                 VGIC_ACCESS_64bit | VGIC_ACCESS_32bit),
1527         REGISTER_ITS_DESC(GITS_BASER,
1528                 vgic_mmio_read_its_baser, vgic_mmio_write_its_baser, 0x40,
1529                 VGIC_ACCESS_64bit | VGIC_ACCESS_32bit),
1530         REGISTER_ITS_DESC(GITS_IDREGS_BASE,
1531                 vgic_mmio_read_its_idregs, its_mmio_write_wi, 0x30,
1532                 VGIC_ACCESS_32bit),
1533 };
1534
1535 /* This is called on setting the LPI enable bit in the redistributor. */
1536 void vgic_enable_lpis(struct kvm_vcpu *vcpu)
1537 {
1538         if (!(vcpu->arch.vgic_cpu.pendbaser & GICR_PENDBASER_PTZ))
1539                 its_sync_lpi_pending_table(vcpu);
1540 }
1541
1542 static int vgic_register_its_iodev(struct kvm *kvm, struct vgic_its *its)
1543 {
1544         struct vgic_io_device *iodev = &its->iodev;
1545         int ret;
1546
1547         if (!its->initialized)
1548                 return -EBUSY;
1549
1550         if (IS_VGIC_ADDR_UNDEF(its->vgic_its_base))
1551                 return -ENXIO;
1552
1553         iodev->regions = its_registers;
1554         iodev->nr_regions = ARRAY_SIZE(its_registers);
1555         kvm_iodevice_init(&iodev->dev, &kvm_io_gic_ops);
1556
1557         iodev->base_addr = its->vgic_its_base;
1558         iodev->iodev_type = IODEV_ITS;
1559         iodev->its = its;
1560         mutex_lock(&kvm->slots_lock);
1561         ret = kvm_io_bus_register_dev(kvm, KVM_MMIO_BUS, iodev->base_addr,
1562                                       KVM_VGIC_V3_ITS_SIZE, &iodev->dev);
1563         mutex_unlock(&kvm->slots_lock);
1564
1565         return ret;
1566 }
1567
1568 #define INITIAL_BASER_VALUE                                               \
1569         (GIC_BASER_CACHEABILITY(GITS_BASER, INNER, RaWb)                | \
1570          GIC_BASER_CACHEABILITY(GITS_BASER, OUTER, SameAsInner)         | \
1571          GIC_BASER_SHAREABILITY(GITS_BASER, InnerShareable)             | \
1572          GITS_BASER_PAGE_SIZE_64K)
1573
1574 #define INITIAL_PROPBASER_VALUE                                           \
1575         (GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, RaWb)            | \
1576          GIC_BASER_CACHEABILITY(GICR_PROPBASER, OUTER, SameAsInner)     | \
1577          GIC_BASER_SHAREABILITY(GICR_PROPBASER, InnerShareable))
1578
1579 static int vgic_its_create(struct kvm_device *dev, u32 type)
1580 {
1581         struct vgic_its *its;
1582
1583         if (type != KVM_DEV_TYPE_ARM_VGIC_ITS)
1584                 return -ENODEV;
1585
1586         its = kzalloc(sizeof(struct vgic_its), GFP_KERNEL);
1587         if (!its)
1588                 return -ENOMEM;
1589
1590         mutex_init(&its->its_lock);
1591         mutex_init(&its->cmd_lock);
1592
1593         its->vgic_its_base = VGIC_ADDR_UNDEF;
1594
1595         INIT_LIST_HEAD(&its->device_list);
1596         INIT_LIST_HEAD(&its->collection_list);
1597
1598         dev->kvm->arch.vgic.has_its = true;
1599         its->initialized = false;
1600         its->enabled = false;
1601         its->dev = dev;
1602
1603         its->baser_device_table = INITIAL_BASER_VALUE                   |
1604                 ((u64)GITS_BASER_TYPE_DEVICE << GITS_BASER_TYPE_SHIFT);
1605         its->baser_coll_table = INITIAL_BASER_VALUE |
1606                 ((u64)GITS_BASER_TYPE_COLLECTION << GITS_BASER_TYPE_SHIFT);
1607         dev->kvm->arch.vgic.propbaser = INITIAL_PROPBASER_VALUE;
1608
1609         dev->private = its;
1610
1611         return vgic_its_set_abi(its, NR_ITS_ABIS - 1);
1612 }
1613
1614 static void vgic_its_destroy(struct kvm_device *kvm_dev)
1615 {
1616         struct kvm *kvm = kvm_dev->kvm;
1617         struct vgic_its *its = kvm_dev->private;
1618         struct its_device *dev;
1619         struct its_ite *ite;
1620         struct list_head *dev_cur, *dev_temp;
1621         struct list_head *cur, *temp;
1622
1623         /*
1624          * We may end up here without the lists ever having been initialized.
1625          * Check this and bail out early to avoid dereferencing a NULL pointer.
1626          */
1627         if (!its->device_list.next)
1628                 return;
1629
1630         mutex_lock(&its->its_lock);
1631         list_for_each_safe(dev_cur, dev_temp, &its->device_list) {
1632                 dev = container_of(dev_cur, struct its_device, dev_list);
1633                 list_for_each_safe(cur, temp, &dev->itt_head) {
1634                         ite = (container_of(cur, struct its_ite, ite_list));
1635                         its_free_ite(kvm, ite);
1636                 }
1637                 list_del(dev_cur);
1638                 kfree(dev);
1639         }
1640
1641         list_for_each_safe(cur, temp, &its->collection_list) {
1642                 list_del(cur);
1643                 kfree(container_of(cur, struct its_collection, coll_list));
1644         }
1645         mutex_unlock(&its->its_lock);
1646
1647         kfree(its);
1648 }
1649
1650 int vgic_its_has_attr_regs(struct kvm_device *dev,
1651                            struct kvm_device_attr *attr)
1652 {
1653         const struct vgic_register_region *region;
1654         gpa_t offset = attr->attr;
1655         int align;
1656
1657         align = (offset < GITS_TYPER) || (offset >= GITS_PIDR4) ? 0x3 : 0x7;
1658
1659         if (offset & align)
1660                 return -EINVAL;
1661
1662         region = vgic_find_mmio_region(its_registers,
1663                                        ARRAY_SIZE(its_registers),
1664                                        offset);
1665         if (!region)
1666                 return -ENXIO;
1667
1668         return 0;
1669 }
1670
1671 int vgic_its_attr_regs_access(struct kvm_device *dev,
1672                               struct kvm_device_attr *attr,
1673                               u64 *reg, bool is_write)
1674 {
1675         const struct vgic_register_region *region;
1676         struct vgic_its *its;
1677         gpa_t addr, offset;
1678         unsigned int len;
1679         int align, ret = 0;
1680
1681         its = dev->private;
1682         offset = attr->attr;
1683
1684         /*
1685          * Although the spec supports upper/lower 32-bit accesses to
1686          * 64-bit ITS registers, the userspace ABI requires 64-bit
1687          * accesses to all 64-bit wide registers. We therefore only
1688          * support 32-bit accesses to GITS_CTLR, GITS_IIDR and GITS ID
1689          * registers
1690          */
1691         if ((offset < GITS_TYPER) || (offset >= GITS_PIDR4))
1692                 align = 0x3;
1693         else
1694                 align = 0x7;
1695
1696         if (offset & align)
1697                 return -EINVAL;
1698
1699         mutex_lock(&dev->kvm->lock);
1700
1701         if (IS_VGIC_ADDR_UNDEF(its->vgic_its_base)) {
1702                 ret = -ENXIO;
1703                 goto out;
1704         }
1705
1706         region = vgic_find_mmio_region(its_registers,
1707                                        ARRAY_SIZE(its_registers),
1708                                        offset);
1709         if (!region) {
1710                 ret = -ENXIO;
1711                 goto out;
1712         }
1713
1714         if (!lock_all_vcpus(dev->kvm)) {
1715                 ret = -EBUSY;
1716                 goto out;
1717         }
1718
1719         addr = its->vgic_its_base + offset;
1720
1721         len = region->access_flags & VGIC_ACCESS_64bit ? 8 : 4;
1722
1723         if (is_write) {
1724                 if (region->uaccess_its_write)
1725                         ret = region->uaccess_its_write(dev->kvm, its, addr,
1726                                                         len, *reg);
1727                 else
1728                         region->its_write(dev->kvm, its, addr, len, *reg);
1729         } else {
1730                 *reg = region->its_read(dev->kvm, its, addr, len);
1731         }
1732         unlock_all_vcpus(dev->kvm);
1733 out:
1734         mutex_unlock(&dev->kvm->lock);
1735         return ret;
1736 }
1737
1738 u32 compute_next_devid_offset(struct list_head *h, struct its_device *dev)
1739 {
1740         struct its_device *next;
1741         u32 next_offset;
1742
1743         if (list_is_last(&dev->dev_list, h))
1744                 return 0;
1745         next = list_next_entry(dev, dev_list);
1746         next_offset = next->device_id - dev->device_id;
1747
1748         return min_t(u32, next_offset, VITS_DTE_MAX_DEVID_OFFSET);
1749 }
1750
1751 u32 compute_next_eventid_offset(struct list_head *h, struct its_ite *ite)
1752 {
1753         struct its_ite *next;
1754         u32 next_offset;
1755
1756         if (list_is_last(&ite->ite_list, h))
1757                 return 0;
1758         next = list_next_entry(ite, ite_list);
1759         next_offset = next->event_id - ite->event_id;
1760
1761         return min_t(u32, next_offset, VITS_ITE_MAX_EVENTID_OFFSET);
1762 }
1763
1764 /**
1765  * entry_fn_t - Callback called on a table entry restore path
1766  * @its: its handle
1767  * @id: id of the entry
1768  * @entry: pointer to the entry
1769  * @opaque: pointer to an opaque data
1770  *
1771  * Return: < 0 on error, 0 if last element was identified, id offset to next
1772  * element otherwise
1773  */
1774 typedef int (*entry_fn_t)(struct vgic_its *its, u32 id, void *entry,
1775                           void *opaque);
1776
1777 /**
1778  * scan_its_table - Scan a contiguous table in guest RAM and applies a function
1779  * to each entry
1780  *
1781  * @its: its handle
1782  * @base: base gpa of the table
1783  * @size: size of the table in bytes
1784  * @esz: entry size in bytes
1785  * @start_id: the ID of the first entry in the table
1786  * (non zero for 2d level tables)
1787  * @fn: function to apply on each entry
1788  *
1789  * Return: < 0 on error, 0 if last element was identified, 1 otherwise
1790  * (the last element may not be found on second level tables)
1791  */
1792 int scan_its_table(struct vgic_its *its, gpa_t base, int size, int esz,
1793                    int start_id, entry_fn_t fn, void *opaque)
1794 {
1795         void *entry = kzalloc(esz, GFP_KERNEL);
1796         struct kvm *kvm = its->dev->kvm;
1797         unsigned long len = size;
1798         int id = start_id;
1799         gpa_t gpa = base;
1800         int ret;
1801
1802         while (len > 0) {
1803                 int next_offset;
1804                 size_t byte_offset;
1805
1806                 ret = kvm_read_guest(kvm, gpa, entry, esz);
1807                 if (ret)
1808                         goto out;
1809
1810                 next_offset = fn(its, id, entry, opaque);
1811                 if (next_offset <= 0) {
1812                         ret = next_offset;
1813                         goto out;
1814                 }
1815
1816                 byte_offset = next_offset * esz;
1817                 id += next_offset;
1818                 gpa += byte_offset;
1819                 len -= byte_offset;
1820         }
1821         ret =  1;
1822
1823 out:
1824         kfree(entry);
1825         return ret;
1826 }
1827
1828 /**
1829  * vgic_its_save_device_tables - Save the device table and all ITT
1830  * into guest RAM
1831  */
1832 static int vgic_its_save_device_tables(struct vgic_its *its)
1833 {
1834         return -ENXIO;
1835 }
1836
1837 /**
1838  * vgic_its_restore_device_tables - Restore the device table and all ITT
1839  * from guest RAM to internal data structs
1840  */
1841 static int vgic_its_restore_device_tables(struct vgic_its *its)
1842 {
1843         return -ENXIO;
1844 }
1845
1846 static int vgic_its_save_cte(struct vgic_its *its,
1847                              struct its_collection *collection,
1848                              gpa_t gpa, int esz)
1849 {
1850         u64 val;
1851
1852         val = (1ULL << KVM_ITS_CTE_VALID_SHIFT |
1853                ((u64)collection->target_addr << KVM_ITS_CTE_RDBASE_SHIFT) |
1854                collection->collection_id);
1855         val = cpu_to_le64(val);
1856         return kvm_write_guest(its->dev->kvm, gpa, &val, esz);
1857 }
1858
1859 static int vgic_its_restore_cte(struct vgic_its *its, gpa_t gpa, int esz)
1860 {
1861         struct its_collection *collection;
1862         struct kvm *kvm = its->dev->kvm;
1863         u32 target_addr, coll_id;
1864         u64 val;
1865         int ret;
1866
1867         BUG_ON(esz > sizeof(val));
1868         ret = kvm_read_guest(kvm, gpa, &val, esz);
1869         if (ret)
1870                 return ret;
1871         val = le64_to_cpu(val);
1872         if (!(val & KVM_ITS_CTE_VALID_MASK))
1873                 return 0;
1874
1875         target_addr = (u32)(val >> KVM_ITS_CTE_RDBASE_SHIFT);
1876         coll_id = val & KVM_ITS_CTE_ICID_MASK;
1877
1878         if (target_addr >= atomic_read(&kvm->online_vcpus))
1879                 return -EINVAL;
1880
1881         collection = find_collection(its, coll_id);
1882         if (collection)
1883                 return -EEXIST;
1884         ret = vgic_its_alloc_collection(its, &collection, coll_id);
1885         if (ret)
1886                 return ret;
1887         collection->target_addr = target_addr;
1888         return 1;
1889 }
1890
1891 /**
1892  * vgic_its_save_collection_table - Save the collection table into
1893  * guest RAM
1894  */
1895 static int vgic_its_save_collection_table(struct vgic_its *its)
1896 {
1897         const struct vgic_its_abi *abi = vgic_its_get_abi(its);
1898         struct its_collection *collection;
1899         u64 val;
1900         gpa_t gpa;
1901         size_t max_size, filled = 0;
1902         int ret, cte_esz = abi->cte_esz;
1903
1904         gpa = BASER_ADDRESS(its->baser_coll_table);
1905         if (!gpa)
1906                 return 0;
1907
1908         max_size = GITS_BASER_NR_PAGES(its->baser_coll_table) * SZ_64K;
1909
1910         list_for_each_entry(collection, &its->collection_list, coll_list) {
1911                 ret = vgic_its_save_cte(its, collection, gpa, cte_esz);
1912                 if (ret)
1913                         return ret;
1914                 gpa += cte_esz;
1915                 filled += cte_esz;
1916         }
1917
1918         if (filled == max_size)
1919                 return 0;
1920
1921         /*
1922          * table is not fully filled, add a last dummy element
1923          * with valid bit unset
1924          */
1925         val = 0;
1926         BUG_ON(cte_esz > sizeof(val));
1927         ret = kvm_write_guest(its->dev->kvm, gpa, &val, cte_esz);
1928         return ret;
1929 }
1930
1931 /**
1932  * vgic_its_restore_collection_table - reads the collection table
1933  * in guest memory and restores the ITS internal state. Requires the
1934  * BASER registers to be restored before.
1935  */
1936 static int vgic_its_restore_collection_table(struct vgic_its *its)
1937 {
1938         const struct vgic_its_abi *abi = vgic_its_get_abi(its);
1939         int cte_esz = abi->cte_esz;
1940         size_t max_size, read = 0;
1941         gpa_t gpa;
1942         int ret;
1943
1944         if (!(its->baser_coll_table & GITS_BASER_VALID))
1945                 return 0;
1946
1947         gpa = BASER_ADDRESS(its->baser_coll_table);
1948
1949         max_size = GITS_BASER_NR_PAGES(its->baser_coll_table) * SZ_64K;
1950
1951         while (read < max_size) {
1952                 ret = vgic_its_restore_cte(its, gpa, cte_esz);
1953                 if (ret <= 0)
1954                         break;
1955                 gpa += cte_esz;
1956                 read += cte_esz;
1957         }
1958         return ret;
1959 }
1960
1961 /**
1962  * vgic_its_save_tables_v0 - Save the ITS tables into guest ARM
1963  * according to v0 ABI
1964  */
1965 static int vgic_its_save_tables_v0(struct vgic_its *its)
1966 {
1967         struct kvm *kvm = its->dev->kvm;
1968         int ret;
1969
1970         mutex_lock(&kvm->lock);
1971         mutex_lock(&its->its_lock);
1972
1973         if (!lock_all_vcpus(kvm)) {
1974                 mutex_unlock(&its->its_lock);
1975                 mutex_unlock(&kvm->lock);
1976                 return -EBUSY;
1977         }
1978
1979         ret = vgic_its_save_device_tables(its);
1980         if (ret)
1981                 goto out;
1982
1983         ret = vgic_its_save_collection_table(its);
1984
1985 out:
1986         unlock_all_vcpus(kvm);
1987         mutex_unlock(&its->its_lock);
1988         mutex_unlock(&kvm->lock);
1989         return ret;
1990 }
1991
1992 /**
1993  * vgic_its_restore_tables_v0 - Restore the ITS tables from guest RAM
1994  * to internal data structs according to V0 ABI
1995  *
1996  */
1997 static int vgic_its_restore_tables_v0(struct vgic_its *its)
1998 {
1999         struct kvm *kvm = its->dev->kvm;
2000         int ret;
2001
2002         mutex_lock(&kvm->lock);
2003         mutex_lock(&its->its_lock);
2004
2005         if (!lock_all_vcpus(kvm)) {
2006                 mutex_unlock(&its->its_lock);
2007                 mutex_unlock(&kvm->lock);
2008                 return -EBUSY;
2009         }
2010
2011         ret = vgic_its_restore_collection_table(its);
2012         if (ret)
2013                 goto out;
2014
2015         ret = vgic_its_restore_device_tables(its);
2016
2017 out:
2018         unlock_all_vcpus(kvm);
2019         mutex_unlock(&its->its_lock);
2020         mutex_unlock(&kvm->lock);
2021
2022         if (ret)
2023                 return ret;
2024
2025         /*
2026          * On restore path, MSI injections can happen before the
2027          * first VCPU run so let's complete the GIC init here.
2028          */
2029         return kvm_vgic_map_resources(its->dev->kvm);
2030 }
2031
2032 static int vgic_its_commit_v0(struct vgic_its *its)
2033 {
2034         const struct vgic_its_abi *abi;
2035
2036         abi = vgic_its_get_abi(its);
2037         its->baser_coll_table &= ~GITS_BASER_ENTRY_SIZE_MASK;
2038         its->baser_device_table &= ~GITS_BASER_ENTRY_SIZE_MASK;
2039
2040         its->baser_coll_table |= (GIC_ENCODE_SZ(abi->cte_esz, 5)
2041                                         << GITS_BASER_ENTRY_SIZE_SHIFT);
2042
2043         its->baser_device_table |= (GIC_ENCODE_SZ(abi->dte_esz, 5)
2044                                         << GITS_BASER_ENTRY_SIZE_SHIFT);
2045         return 0;
2046 }
2047
2048 static int vgic_its_has_attr(struct kvm_device *dev,
2049                              struct kvm_device_attr *attr)
2050 {
2051         switch (attr->group) {
2052         case KVM_DEV_ARM_VGIC_GRP_ADDR:
2053                 switch (attr->attr) {
2054                 case KVM_VGIC_ITS_ADDR_TYPE:
2055                         return 0;
2056                 }
2057                 break;
2058         case KVM_DEV_ARM_VGIC_GRP_CTRL:
2059                 switch (attr->attr) {
2060                 case KVM_DEV_ARM_VGIC_CTRL_INIT:
2061                         return 0;
2062                 case KVM_DEV_ARM_ITS_SAVE_TABLES:
2063                         return 0;
2064                 case KVM_DEV_ARM_ITS_RESTORE_TABLES:
2065                         return 0;
2066                 }
2067                 break;
2068         case KVM_DEV_ARM_VGIC_GRP_ITS_REGS:
2069                 return vgic_its_has_attr_regs(dev, attr);
2070         }
2071         return -ENXIO;
2072 }
2073
2074 static int vgic_its_set_attr(struct kvm_device *dev,
2075                              struct kvm_device_attr *attr)
2076 {
2077         struct vgic_its *its = dev->private;
2078         int ret;
2079
2080         switch (attr->group) {
2081         case KVM_DEV_ARM_VGIC_GRP_ADDR: {
2082                 u64 __user *uaddr = (u64 __user *)(long)attr->addr;
2083                 unsigned long type = (unsigned long)attr->attr;
2084                 u64 addr;
2085
2086                 if (type != KVM_VGIC_ITS_ADDR_TYPE)
2087                         return -ENODEV;
2088
2089                 if (copy_from_user(&addr, uaddr, sizeof(addr)))
2090                         return -EFAULT;
2091
2092                 ret = vgic_check_ioaddr(dev->kvm, &its->vgic_its_base,
2093                                         addr, SZ_64K);
2094                 if (ret)
2095                         return ret;
2096
2097                 its->vgic_its_base = addr;
2098
2099                 return 0;
2100         }
2101         case KVM_DEV_ARM_VGIC_GRP_CTRL: {
2102                 const struct vgic_its_abi *abi = vgic_its_get_abi(its);
2103
2104                 switch (attr->attr) {
2105                 case KVM_DEV_ARM_VGIC_CTRL_INIT:
2106                         its->initialized = true;
2107
2108                         return 0;
2109                 case KVM_DEV_ARM_ITS_SAVE_TABLES:
2110                         return abi->save_tables(its);
2111                 case KVM_DEV_ARM_ITS_RESTORE_TABLES:
2112                         return abi->restore_tables(its);
2113                 }
2114         }
2115         case KVM_DEV_ARM_VGIC_GRP_ITS_REGS: {
2116                 u64 __user *uaddr = (u64 __user *)(long)attr->addr;
2117                 u64 reg;
2118
2119                 if (get_user(reg, uaddr))
2120                         return -EFAULT;
2121
2122                 return vgic_its_attr_regs_access(dev, attr, &reg, true);
2123         }
2124         }
2125         return -ENXIO;
2126 }
2127
2128 static int vgic_its_get_attr(struct kvm_device *dev,
2129                              struct kvm_device_attr *attr)
2130 {
2131         switch (attr->group) {
2132         case KVM_DEV_ARM_VGIC_GRP_ADDR: {
2133                 struct vgic_its *its = dev->private;
2134                 u64 addr = its->vgic_its_base;
2135                 u64 __user *uaddr = (u64 __user *)(long)attr->addr;
2136                 unsigned long type = (unsigned long)attr->attr;
2137
2138                 if (type != KVM_VGIC_ITS_ADDR_TYPE)
2139                         return -ENODEV;
2140
2141                 if (copy_to_user(uaddr, &addr, sizeof(addr)))
2142                         return -EFAULT;
2143                 break;
2144         }
2145         case KVM_DEV_ARM_VGIC_GRP_ITS_REGS: {
2146                 u64 __user *uaddr = (u64 __user *)(long)attr->addr;
2147                 u64 reg;
2148                 int ret;
2149
2150                 ret = vgic_its_attr_regs_access(dev, attr, &reg, false);
2151                 if (ret)
2152                         return ret;
2153                 return put_user(reg, uaddr);
2154         }
2155         default:
2156                 return -ENXIO;
2157         }
2158
2159         return 0;
2160 }
2161
2162 static struct kvm_device_ops kvm_arm_vgic_its_ops = {
2163         .name = "kvm-arm-vgic-its",
2164         .create = vgic_its_create,
2165         .destroy = vgic_its_destroy,
2166         .set_attr = vgic_its_set_attr,
2167         .get_attr = vgic_its_get_attr,
2168         .has_attr = vgic_its_has_attr,
2169 };
2170
2171 int kvm_vgic_register_its_device(void)
2172 {
2173         return kvm_register_device_ops(&kvm_arm_vgic_its_ops,
2174                                        KVM_DEV_TYPE_ARM_VGIC_ITS);
2175 }
2176
2177 /*
2178  * Registers all ITSes with the kvm_io_bus framework.
2179  * To follow the existing VGIC initialization sequence, this has to be
2180  * done as late as possible, just before the first VCPU runs.
2181  */
2182 int vgic_register_its_iodevs(struct kvm *kvm)
2183 {
2184         struct kvm_device *dev;
2185         int ret = 0;
2186
2187         list_for_each_entry(dev, &kvm->devices, vm_node) {
2188                 if (dev->ops != &kvm_arm_vgic_its_ops)
2189                         continue;
2190
2191                 ret = vgic_register_its_iodev(kvm, dev->private);
2192                 if (ret)
2193                         return ret;
2194                 /*
2195                  * We don't need to care about tearing down previously
2196                  * registered ITSes, as the kvm_io_bus framework removes
2197                  * them for us if the VM gets destroyed.
2198                  */
2199         }
2200
2201         return ret;
2202 }