4 * Copyright (C) 2015 ARM Ltd.
5 * Author: Marc Zyngier <marc.zyngier@arm.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 #include <linux/kvm_host.h>
17 #include <kvm/arm_vgic.h>
18 #include <linux/uaccess.h>
19 #include <asm/kvm_mmu.h>
24 static int vgic_check_ioaddr(struct kvm *kvm, phys_addr_t *ioaddr,
25 phys_addr_t addr, phys_addr_t alignment)
27 if (addr & ~KVM_PHYS_MASK)
30 if (!IS_ALIGNED(addr, alignment))
33 if (!IS_VGIC_ADDR_UNDEF(*ioaddr))
40 * kvm_vgic_addr - set or get vgic VM base addresses
41 * @kvm: pointer to the vm struct
42 * @type: the VGIC addr type, one of KVM_VGIC_V[23]_ADDR_TYPE_XXX
43 * @addr: pointer to address value
44 * @write: if true set the address in the VM address space, if false read the
47 * Set or get the vgic base addresses for the distributor and the virtual CPU
48 * interface in the VM physical address space. These addresses are properties
49 * of the emulated core/SoC and therefore user space initially knows this
51 * Check them for sanity (alignment, double assignment). We can't check for
52 * overlapping regions in case of a virtual GICv3 here, since we don't know
53 * the number of VCPUs yet, so we defer this check to map_resources().
55 int kvm_vgic_addr(struct kvm *kvm, unsigned long type, u64 *addr, bool write)
58 struct vgic_dist *vgic = &kvm->arch.vgic;
60 phys_addr_t *addr_ptr, alignment;
62 mutex_lock(&kvm->lock);
64 case KVM_VGIC_V2_ADDR_TYPE_DIST:
65 type_needed = KVM_DEV_TYPE_ARM_VGIC_V2;
66 addr_ptr = &vgic->vgic_dist_base;
69 case KVM_VGIC_V2_ADDR_TYPE_CPU:
70 type_needed = KVM_DEV_TYPE_ARM_VGIC_V2;
71 addr_ptr = &vgic->vgic_cpu_base;
74 #ifdef CONFIG_KVM_ARM_VGIC_V3
75 case KVM_VGIC_V3_ADDR_TYPE_DIST:
76 type_needed = KVM_DEV_TYPE_ARM_VGIC_V3;
77 addr_ptr = &vgic->vgic_dist_base;
80 case KVM_VGIC_V3_ADDR_TYPE_REDIST:
81 type_needed = KVM_DEV_TYPE_ARM_VGIC_V3;
82 addr_ptr = &vgic->vgic_redist_base;
91 if (vgic->vgic_model != type_needed) {
97 r = vgic_check_ioaddr(kvm, addr_ptr, *addr, alignment);
105 mutex_unlock(&kvm->lock);
109 static int vgic_set_common_attr(struct kvm_device *dev,
110 struct kvm_device_attr *attr)
114 switch (attr->group) {
115 case KVM_DEV_ARM_VGIC_GRP_ADDR: {
116 u64 __user *uaddr = (u64 __user *)(long)attr->addr;
118 unsigned long type = (unsigned long)attr->attr;
120 if (copy_from_user(&addr, uaddr, sizeof(addr)))
123 r = kvm_vgic_addr(dev->kvm, type, &addr, true);
124 return (r == -ENODEV) ? -ENXIO : r;
126 case KVM_DEV_ARM_VGIC_GRP_NR_IRQS: {
127 u32 __user *uaddr = (u32 __user *)(long)attr->addr;
131 if (get_user(val, uaddr))
136 * - at least 32 SPIs on top of the 16 SGIs and 16 PPIs
137 * - at most 1024 interrupts
138 * - a multiple of 32 interrupts
140 if (val < (VGIC_NR_PRIVATE_IRQS + 32) ||
141 val > VGIC_MAX_RESERVED ||
145 mutex_lock(&dev->kvm->lock);
147 if (vgic_ready(dev->kvm) || dev->kvm->arch.vgic.nr_spis)
150 dev->kvm->arch.vgic.nr_spis =
151 val - VGIC_NR_PRIVATE_IRQS;
153 mutex_unlock(&dev->kvm->lock);
157 case KVM_DEV_ARM_VGIC_GRP_CTRL: {
158 switch (attr->attr) {
159 case KVM_DEV_ARM_VGIC_CTRL_INIT:
160 mutex_lock(&dev->kvm->lock);
161 r = vgic_init(dev->kvm);
162 mutex_unlock(&dev->kvm->lock);
172 static int vgic_get_common_attr(struct kvm_device *dev,
173 struct kvm_device_attr *attr)
177 switch (attr->group) {
178 case KVM_DEV_ARM_VGIC_GRP_ADDR: {
179 u64 __user *uaddr = (u64 __user *)(long)attr->addr;
181 unsigned long type = (unsigned long)attr->attr;
183 r = kvm_vgic_addr(dev->kvm, type, &addr, false);
185 return (r == -ENODEV) ? -ENXIO : r;
187 if (copy_to_user(uaddr, &addr, sizeof(addr)))
191 case KVM_DEV_ARM_VGIC_GRP_NR_IRQS: {
192 u32 __user *uaddr = (u32 __user *)(long)attr->addr;
194 r = put_user(dev->kvm->arch.vgic.nr_spis +
195 VGIC_NR_PRIVATE_IRQS, uaddr);
203 static int vgic_create(struct kvm_device *dev, u32 type)
205 return kvm_vgic_create(dev->kvm, type);
208 static void vgic_destroy(struct kvm_device *dev)
213 void kvm_register_vgic_device(unsigned long type)
216 case KVM_DEV_TYPE_ARM_VGIC_V2:
217 kvm_register_device_ops(&kvm_arm_vgic_v2_ops,
218 KVM_DEV_TYPE_ARM_VGIC_V2);
220 #ifdef CONFIG_KVM_ARM_VGIC_V3
221 case KVM_DEV_TYPE_ARM_VGIC_V3:
222 kvm_register_device_ops(&kvm_arm_vgic_v3_ops,
223 KVM_DEV_TYPE_ARM_VGIC_V3);
229 /** vgic_attr_regs_access: allows user space to read/write VGIC registers
231 * @dev: kvm device handle
232 * @attr: kvm device attribute
233 * @reg: address the value is read or written
234 * @is_write: write flag
237 static int vgic_attr_regs_access(struct kvm_device *dev,
238 struct kvm_device_attr *attr,
239 u32 *reg, bool is_write)
246 static int vgic_v2_set_attr(struct kvm_device *dev,
247 struct kvm_device_attr *attr)
251 ret = vgic_set_common_attr(dev, attr);
255 switch (attr->group) {
256 case KVM_DEV_ARM_VGIC_GRP_DIST_REGS:
257 case KVM_DEV_ARM_VGIC_GRP_CPU_REGS: {
258 u32 __user *uaddr = (u32 __user *)(long)attr->addr;
261 if (get_user(reg, uaddr))
264 return vgic_attr_regs_access(dev, attr, ®, true);
271 static int vgic_v2_get_attr(struct kvm_device *dev,
272 struct kvm_device_attr *attr)
276 ret = vgic_get_common_attr(dev, attr);
280 switch (attr->group) {
281 case KVM_DEV_ARM_VGIC_GRP_DIST_REGS:
282 case KVM_DEV_ARM_VGIC_GRP_CPU_REGS: {
283 u32 __user *uaddr = (u32 __user *)(long)attr->addr;
286 ret = vgic_attr_regs_access(dev, attr, ®, false);
289 return put_user(reg, uaddr);
296 static int vgic_v2_has_attr(struct kvm_device *dev,
297 struct kvm_device_attr *attr)
299 switch (attr->group) {
300 case KVM_DEV_ARM_VGIC_GRP_ADDR:
301 switch (attr->attr) {
302 case KVM_VGIC_V2_ADDR_TYPE_DIST:
303 case KVM_VGIC_V2_ADDR_TYPE_CPU:
307 case KVM_DEV_ARM_VGIC_GRP_DIST_REGS:
308 case KVM_DEV_ARM_VGIC_GRP_CPU_REGS:
309 return vgic_v2_has_attr_regs(dev, attr);
310 case KVM_DEV_ARM_VGIC_GRP_NR_IRQS:
312 case KVM_DEV_ARM_VGIC_GRP_CTRL:
313 switch (attr->attr) {
314 case KVM_DEV_ARM_VGIC_CTRL_INIT:
321 struct kvm_device_ops kvm_arm_vgic_v2_ops = {
322 .name = "kvm-arm-vgic-v2",
323 .create = vgic_create,
324 .destroy = vgic_destroy,
325 .set_attr = vgic_v2_set_attr,
326 .get_attr = vgic_v2_get_attr,
327 .has_attr = vgic_v2_has_attr,
332 #ifdef CONFIG_KVM_ARM_VGIC_V3
334 static int vgic_v3_set_attr(struct kvm_device *dev,
335 struct kvm_device_attr *attr)
337 return vgic_set_common_attr(dev, attr);
340 static int vgic_v3_get_attr(struct kvm_device *dev,
341 struct kvm_device_attr *attr)
343 return vgic_get_common_attr(dev, attr);
346 static int vgic_v3_has_attr(struct kvm_device *dev,
347 struct kvm_device_attr *attr)
349 switch (attr->group) {
350 case KVM_DEV_ARM_VGIC_GRP_ADDR:
351 switch (attr->attr) {
352 case KVM_VGIC_V3_ADDR_TYPE_DIST:
353 case KVM_VGIC_V3_ADDR_TYPE_REDIST:
357 case KVM_DEV_ARM_VGIC_GRP_NR_IRQS:
359 case KVM_DEV_ARM_VGIC_GRP_CTRL:
360 switch (attr->attr) {
361 case KVM_DEV_ARM_VGIC_CTRL_INIT:
368 struct kvm_device_ops kvm_arm_vgic_v3_ops = {
369 .name = "kvm-arm-vgic-v3",
370 .create = vgic_create,
371 .destroy = vgic_destroy,
372 .set_attr = vgic_v3_set_attr,
373 .get_attr = vgic_v3_get_attr,
374 .has_attr = vgic_v3_has_attr,
377 #endif /* CONFIG_KVM_ARM_VGIC_V3 */