- /*
- * Memory Controller:
- */
-
- /* Map banks 0 and 1 to the FLASH banks 0 and 1 at preliminary
- * addresses - these have to be modified later when FLASH size
- * has been determined
- */
-
-#if defined(CONFIG_SYS_BR0_PRELIM) \
- && defined(CONFIG_SYS_OR0_PRELIM) \
- && defined(CONFIG_SYS_LBLAWBAR0_PRELIM) \
- && defined(CONFIG_SYS_LBLAWAR0_PRELIM)
- im->lbus.bank[0].br = CONFIG_SYS_BR0_PRELIM;
- im->lbus.bank[0].or = CONFIG_SYS_OR0_PRELIM;
+ /* Local Access window setup */
+#if defined(CONFIG_SYS_LBLAWBAR0_PRELIM) && defined(CONFIG_SYS_LBLAWAR0_PRELIM)