misc: add Qualcomm shared memory driver

[karo-tx-uboot.git] / drivers / misc / Kconfig

diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index 36a8f0d098e2df26e76abadde9df6ac1aa79b9c5..c6a753d576b7f176655b08104f533fa3d391f817 100644 (file)
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -1,3 +1,25 @@
+#
+# Multifunction miscellaneous devices
+#
+
+menu "Multifunction device drivers"
+
+config MISC
+       bool "Enable Driver Model for Misc drivers"
+       depends on DM
+       help
+         Enable driver model for miscellaneous devices. This class is
+         used only for those do not fit other more general classes. A
+         set of generic read, write and ioctl methods may be used to
+         access the device.
+
+config ALTERA_SYSID
+       bool "Altera Sysid support"
+       depends on MISC
+       help
+         Select this to enable a sysid for Altera devices. Please find
+         details on the "Embedded Peripherals IP User Guide" of Altera.
+

 config CMD_CROS_EC
        bool "Enable crosec command"
        depends on CROS_EC
 config CMD_CROS_EC
        bool "Enable crosec command"
        depends on CROS_EC


@@ -35,6 +57,15 @@ config CROS_EC_LPC
          through a legacy port interface, so on x86 machines the main
          function of the EC is power and thermal management.
 
          through a legacy port interface, so on x86 machines the main
          function of the EC is power and thermal management.
 

+config CROS_EC_SANDBOX
+       bool "Enable Chrome OS EC sandbox driver"
+       depends on CROS_EC && SANDBOX
+       help
+         Enable a sandbox emulation of the Chrome OS EC. This supports
+         keyboard (use the -l flag to enable the LCD), verified boot context,
+         EC flash read/write/erase support and a few other things. It is
+         enough to perform a Chrome OS verified boot on sandbox.
+

 config CROS_EC_SPI
        bool "Enable Chrome OS EC SPI driver"
        depends on CROS_EC
 config CROS_EC_SPI
        bool "Enable Chrome OS EC SPI driver"
        depends on CROS_EC


@@ -44,20 +75,99 @@ config CROS_EC_SPI
          provides a faster and more robust interface than I2C but the bugs
          are less interesting.
 
          provides a faster and more robust interface than I2C but the bugs
          are less interesting.
 

-config DM_CROS_EC
-       bool "Enable Driver Model for Chrome OS EC"
-       depends on DM
-       help
-         Enable driver model for the Chrome OS EC interface. This
-         allows the cros_ec SPI driver to operate with CONFIG_DM_SPI
-         but otherwise makes few changes. Since cros_ec also supports
-         LPC (which doesn't support driver model yet), a full
-         conversion is not yet possible.
-
-config CONFIG_FSL_SEC_MON
+config FSL_SEC_MON

        bool "Enable FSL SEC_MON Driver"
        help
          Freescale Security Monitor block is responsible for monitoring
          system states.
          Security Monitor can be transitioned on any security failures,
          like software violations or hardware security violations.
        bool "Enable FSL SEC_MON Driver"
        help
          Freescale Security Monitor block is responsible for monitoring
          system states.
          Security Monitor can be transitioned on any security failures,
          like software violations or hardware security violations.

+
+config MXC_OCOTP
+       bool "Enable MXC OCOTP Driver"
+       help
+         If you say Y here, you will get support for the One Time
+         Programmable memory pages that are stored on the some
+         Freescale i.MX processors.
+
+config NUVOTON_NCT6102D
+       bool "Enable Nuvoton NCT6102D Super I/O driver"
+       help
+         If you say Y here, you will get support for the Nuvoton
+         NCT6102D Super I/O driver. This can be used to enable or
+         disable the legacy UART, the watchdog or other devices
+         in the Nuvoton Super IO chips on X86 platforms.
+
+config PWRSEQ
+       bool "Enable power-sequencing drivers"
+       depends on DM
+       help
+         Power-sequencing drivers provide support for controlling power for
+         devices. They are typically referenced by a phandle from another
+         device. When the device is started up, its power sequence can be
+         initiated.
+
+config SPL_PWRSEQ
+       bool "Enable power-sequencing drivers for SPL"
+       depends on PWRSEQ
+       help
+         Power-sequencing drivers provide support for controlling power for
+         devices. They are typically referenced by a phandle from another
+         device. When the device is started up, its power sequence can be
+         initiated.
+
+config PCA9551_LED
+       bool "Enable PCA9551 LED driver"
+       help
+         Enable driver for PCA9551 LED controller. This controller
+         is connected via I2C. So I2C needs to be enabled.
+
+config PCA9551_I2C_ADDR
+       hex "I2C address of PCA9551 LED controller"
+       depends on PCA9551_LED
+       default 0x60
+       help
+         The I2C address of the PCA9551 LED controller.
+
+config QCOM_SMEM
+       bool "Enable Qualcomm shared memory driver"
+
+config TEGRA_CAR
+       bool "Enable support for the Tegra CAR driver"
+       depends on TEGRA_NO_BPMP
+       help
+         The Tegra CAR (Clock and Reset Controller) is a HW module that
+         controls almost all clocks and resets in a Tegra SoC.
+
+config TEGRA186_BPMP
+       bool "Enable support for the Tegra186 BPMP driver"
+       depends on TEGRA186
+       help
+         The Tegra BPMP (Boot and Power Management Processor) is a separate
+         auxiliary CPU embedded into Tegra to perform power management work,
+         and controls related features such as clocks, resets, power domains,
+         PMIC I2C bus, etc. This driver provides the core low-level
+         communication path by which feature-specific drivers (such as clock)
+         can make requests to the BPMP. This driver is similar to an MFD
+         driver in the Linux kernel.
+
+config WINBOND_W83627
+       bool "Enable Winbond Super I/O driver"
+       help
+         If you say Y here, you will get support for the Winbond
+         W83627 Super I/O driver. This can be used to enable the
+         legacy UART or other devices in the Winbond Super IO chips
+         on X86 platforms.
+
+config QFW
+       bool
+       help
+         Hidden option to enable QEMU fw_cfg interface. This will be selected by
+         either CONFIG_CMD_QFW or CONFIG_GENERATE_ACPI_TABLE.
+
+config I2C_EEPROM
+       bool "Enable driver for generic I2C-attached EEPROMs"
+       depends on MISC
+       help
+         Enable a generic driver for EEPROMs attached via I2C.
+endmenu