+/* Subdevice external IO pin configuration */
+#define V4L2_SUBDEV_IO_PIN_DISABLE (1 << 0) /* ENABLE assumed */
+#define V4L2_SUBDEV_IO_PIN_OUTPUT (1 << 1)
+#define V4L2_SUBDEV_IO_PIN_INPUT (1 << 2)
+#define V4L2_SUBDEV_IO_PIN_SET_VALUE (1 << 3) /* Set output value */
+#define V4L2_SUBDEV_IO_PIN_ACTIVE_LOW (1 << 4) /* ACTIVE HIGH assumed */
+
+struct v4l2_subdev_io_pin_config {
+ u32 flags; /* V4L2_SUBDEV_IO_PIN_* flags for this pin's config */
+ u8 pin; /* Chip external IO pin to configure */
+ u8 function; /* Internal signal pad/function to route to IO pin */
+ u8 value; /* Initial value for pin - e.g. GPIO output value */
+ u8 strength; /* Pin drive strength */
+};
+