+commit 135e19bc2773ebca487e9a8371f67e1ba202313a
+Author: Wolfgang Denk <wd@denx.de>
+Date: Tue Sep 18 21:36:35 2007 +0200
+
+ Avoid compiler warning.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 8a783a65851bc7421ab69f442261215e21b8891a
+Author: Grant Likely <grant.likely@secretlab.ca>
+Date: Tue Sep 18 12:24:57 2007 -0600
+
+ Bugfix: remove embedded null (\0) from CFG_BOOTFILE macro in TQM8540_config
+
+ /bin/bash and /bin/dash (which /bin/sh is linked to on ubuntu) handle embedded
+ nulls in a string differently. For example, the following statement:
+ echo "this is a string\0" > afile
+ Will produce the following with /bin/bash:
+ "this is a string\0"
+ But with /bin/dash, will produce:
+ "this is a string
+
+ Bug fixed by moving the embedded null out of the makefile and into the
+ config header. Also renamed the macro to avoid usage colision with the same
+ macro used by other board ports.
+
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit f8d3ca7b6fa322ac57e8e831f07dbeea039a9f35
+Author: Wolfgang Denk <wd@denx.de>
+Date: Tue Sep 18 17:40:27 2007 +0200
+
+ MCC200: fix build warning
+
+ The MCC200 board config file includes version.h for some customer-
+ specific setting, which causes warnings with "make depend"; build
+ version.h before depend.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 67c31036acaaaa992fc346cc89db0909a7e733c4
+Author: Wolfgang Denk <wd@denx.de>
+Date: Sun Sep 16 17:10:04 2007 +0200
+
+ TQM8xx[LM]: Fix broken environment alignment.
+
+ With recent toolchains, the environment sectors were no longer aligned to
+ sector boundaries. The reason was a combination of two bugs:
+
+ 1) common/environment.c assumed that CONFIG_TQM8xxL would be defined
+ for all TQM8xxL and TQM8xxM boards. But "include/common.h", where
+ this gets defined, is not included here (and cannot be included
+ without causing lots of problems).
+
+ Added a new #define CFG_USE_PPCENV for all boards which really
+ want to put the environment is a ".ppcenv" section.
+
+ 2) The linker scripts just include environment.o, silently assuming
+ that the objects in that file are really in the order in which
+ they are coded in the C file, i. e. "environment" first, then
+ "redundand_environment", and "env_size" last. However, current
+ toolchains (GCC-4.x) reorder the objects, causing the environment
+ data not to start on a flash sector boundary:
+
+ Instead of: we got:
+
+ 40008000 T environment 40008000 T env_size
+ 4000c000 T redundand_environment 40008004 T redundand_environment
+ 40010000 T env_size 4000c004 T environment
+
+ Note: this patch fixes just the first part, and cures the alignment
+ problem by making sure that "env_size" gets placed correctly. However,
+ we still have a potential issue because primary and redundant
+ environment sectors are actually swapped, i. e. we have now:
+
+ 40008000 T redundand_environment
+ 4000c000 T environment
+ 40010000 T env_size
+
+ This shall be fixed in the next version.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit eb6da8050797c204c9d010548424186c7ce32fc1
+Author: Wolfgang Denk <wd@denx.de>
+Date: Sun Sep 16 02:39:35 2007 +0200
+
+ TQM8xx/FPS8xx: adjust flash partitions for 2.6 ARCH=powerpc kernels
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit cd2d1602c54cc6957bdef3872272a4b264893960
+Author: urwithsughosh@gmail.com <urwithsughosh@gmail.com>
+Date: Mon Sep 10 14:54:56 2007 -0400
+
+ Typo fix in tsec.c
+
+ Fixup for the break statement in wrong place.
+
+ [Patch by urwithsughosh@gmail.com]
+ Acked-by: Andy Fleming <afleming@freescale.com>
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 5bd7fe9aeb76906371f40b8fd07613f10922e3e7
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Tue Sep 11 17:04:00 2007 +0200
+
+ Fix do_div() usage in nand process output
+
+ Fix usage of do_div() in nand erase|read|write process output.
+
+ The last patch to nand_util.c introduced do_div() instead of libgcc's
+ implementation. But do_div() returns the quotient in its first
+ macro parameter and not as result.
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+
+commit c750d2e6692a000a82f29de7bf24e3dc21239161
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Wed Sep 12 12:36:53 2007 +0200
+
+ NAND: Add CFG_NAND_QUIET option
+
+ This config option sets the default for the progress information
+ output behavior that can also be configured through the 'quiet'
+ environment variable.
+
+ The legacy NAND code does not print the current progress info
+ on the console. So this option is for backward compatibility for
+ units that are in the field and where setting the quiet variable
+ is not an option. With CFG_NAND_QUIET set to '1' the console
+ progress info is turned off. This can still be overwritten
+ through the environment variable.
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+
+commit dcb88630290d2bcd803386dd4c2be73142994c4f
+Author: Liew Tsi Chung-r5aahp <Tsi-chung.Liew@freescale.com>
+Date: Thu Sep 13 16:06:05 2007 -0700
+
+ ColdFire: fix build error becasue of bad type of mii_init()
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit 314d5b6ce52a4ed19dd295d1364e246c5e605017
+Author: Liew Tsi Chung-r5aahp <Tsi-chung.Liew@freescale.com>
+Date: Thu Sep 13 16:04:05 2007 -0700
+
+ ColdFire: Fix build error caused by pixis.c
+
+ Moved the #include <asm/cache.h> inside the #ifdef CONFIG_FSL_PIXIS.
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit e21659e30660a1377c42af135a6114efe39801d9
+Author: Sam Sparks <SSparks@twacs.com>
+Date: Fri Sep 14 11:14:42 2007 -0600
+
+ Update MPC8349ITX*_config to place config.tmp in right place.
+
+ MPC834ITX*_config does not store config.tmp at the correct locatation,
+ causing MPC8349ITXGP to have the wrong TEXT_BASE.
+
+ Signed-off-by: Sam Sparks <SSparks@twacs.com>
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit 1218abf1b5817a39a82399b4b928b00750575bda
+Author: Wolfgang Denk <wd@denx.de>
+Date: Sat Sep 15 20:48:41 2007 +0200
+
+ Fix cases where DECLARE_GLOBAL_DATA_PTR was not declared as global
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 66b3f24d665be678a9dbb125b1e84185400f63b5
+Author: Dirk Behme <dirk.behme@googlemail.com>
+Date: Sat Sep 15 11:55:42 2007 +0200
+
+ Make DECLARE_GLOBAL_DATA_PTR global for DaVinci
+
+ As discussed in [1], DECLARE_GLOBAL_DATA_PTR has to be global and not
+ function local.
+
+ Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
+
+ [1] http://article.gmane.org/gmane.comp.boot-loaders.u-boot/31805
+
+commit 6e7b7b6ea1b6d04dbe96242eb6a0c1c664c98e8c
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Thu Sep 13 18:21:48 2007 +0200
+
+ cm5200: Fix a typo introduced by afaac86fe2948ac84cd9a12bbed883b3c683e7d9
+
+ Signed-off-by: Marian Balakowicz <m8@semihalf.com>
+
+commit f34024d4a328e6edd906456da98d2c537155c4f7
+Author: Wolfgang Denk <wd@denx.de>
+Date: Wed Sep 12 00:48:57 2007 +0200
+
+ Fix memory corruption problem on STX GP3 SSA Board.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 38ad82da0c1180ecdeb212a8f4245e945bcc546e
+Author: Grzegorz Bernacki <gjb@semihalf.com>
+Date: Tue Sep 11 15:42:11 2007 +0200
+
+ [GP3SSA] Add define CONFIG_MPC85XX_PCI2 in config file to allow u-boot to
+ scan on second pci bus.
+
+ Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
+
+commit 6c2f4f388e8181655ea8b69343ea00b68aa6e8d0
+Author: Grzegorz Bernacki <gjb@semihalf.com>
+Date: Tue Sep 11 12:57:52 2007 +0200
+
+ [ppc4xx] Individual handling of sdram.c for bamboo_nand build
+
+ Bamboo has a file sdram.c which needs special treatment when building in
+ separate directory. It has to be linked to build directory otherwise it is
+ not seen.
+
+ Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
+
+commit 38c1ef728d19950414a8ab1ccfc53767848fa346
+Author: Sean MCGOOGAN <sean.mcgoogan@st.com>
+Date: Mon Sep 10 16:55:59 2007 +0100
+
+ Allocate CPU Architecture Code for STMicroelectronics' ST200.
+
+ Signed-off-by: Sean McGoogan <Sean.McGoogan@st.com>
+ ---------------------------------------------------
+
+commit 754bac48156f8958d8f6a53a51eda88ab5758929
+Author: Wolfgang Denk <wd@denx.de>
+Date: Mon Sep 10 20:42:31 2007 +0200
+
+ Update version to match current state.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 7a888d6b3c32a126dbb504ef146bb4c26574ca7b
+Author: Grzegorz Bernacki <gjb@semihalf.com>
+Date: Mon Sep 10 17:39:08 2007 +0200
+
+ [MPC512x] Streamline frame handling in the FEC driver
+
+ - convert frame size settings to be derived from a single base
+ - set frame size to the recommended default value
+
+ Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
+
+commit e251e00d0db4b36d1d2b7e38fec43a7296b529a2
+Author: Kyungmin Park <kmpark@infradead.org>
+Date: Mon Sep 10 11:34:00 2007 +0900
+
+ Remove compiler warning: target CPU does not support interworking
+
+ Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
+
+commit 1d9e31e04911a6bb7cc66dd91132c699101c32e2
+Author: Wolfgang Denk <wd@denx.de>
+Date: Sun Sep 9 21:21:33 2007 +0200
+
+ Fix compile error in spc1920 config.
+
+ Signed-off-by: Markus Klotzbücher <mk@denx.de>
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit a7d7eca791a37f452c9da10fef4b31dd7aa9a622
+Author: Grant Likely <grant.likely@secretlab.ca>
+Date: Fri Sep 7 09:25:07 2007 -0600
+
+ Bugfix: make bootm+libfdt compile on boards with no flash
+
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit 6efc1fc0b63e55f94c5bc61d8dd23c918e3bc778
+Author: Grzegorz Bernacki <gjb@semihalf.com>
+Date: Fri Sep 7 18:35:37 2007 +0200
+
+ [PPC440SPe] PCIe environment settings for Katmai and Yucca
+
+ - 'pciconfighost' is set by default in order to be able to scan bridges
+ behind the primary host/PCIe
+
+ - 'pciscandelay' env variable is recognized to allow for user-controlled
+ delay before the PCIe bus enumeration; some peripheral devices require a
+ significant delay before they can be scanned (e.g. LSI8408E); without the
+ delay they are not detected
+
+ Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
+
+commit 7f1913938984ef6c6a46cb53e003719196d9c5de
+Author: Grzegorz Bernacki <gjb@semihalf.com>
+Date: Fri Sep 7 18:20:23 2007 +0200
+
+ [PPC440SPe] Improve PCIe configuration space access
+
+ - correct configuration space mapping
+ - correct bus numbering
+ - better access to config space
+
+ Prior to this patch, the 440SPe host/PCIe bridge was able to configure only the
+ first device on the first bus. We now allow to configure up to 16 buses;
+ also, scanning for devices behind the PCIe-PCIe bridge is supported, so
+ peripheral devices farther in hierarchy can be identified.
+
+ Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
+
+commit 15ee4734e4e08003d73d9ead3ca80e2a0672e427
+Author: Grzegorz Bernacki <gjb@semihalf.com>
+Date: Fri Sep 7 17:46:18 2007 +0200
+
+ [PPC440SPe] Convert machine check exceptions handling
+
+ Convert using fixup mechanism to suppressing MCK for the duration of config
+ read/write transaction: while fixups work fine with the case of a precise
+ exception, we identified a major drawback with this approach when there's
+ an imprecise case. In this scenario there is the following race condition:
+ the fixup is (by design) set to catch the instruction following the one
+ actually causing the exception; if an interrupt (e.g. decrementer) happens
+ between those two instructions, the ISR code is executed before the fixup
+ handler the machine check is no longer protected by the fixup handler as it
+ appears as within the ISR code. In consequence the fixup approach is being
+ phased out and replaced with explicit suppressing of MCK during a PCIe
+ config read/write cycle.
+
+ Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
+
+commit ff7640c9ead8806b5d827f2b29f9cb2632add729
+Author: Wolfgang Denk <wd@denx.de>
+Date: Fri Sep 7 17:43:36 2007 +0200
+
+ Fix typo in MAKEALL script.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 08e2e5fcd2e06670b62e1680a3934c0e55c72810
+Author: Grzegorz Bernacki <gjb@semihalf.com>
+Date: Fri Sep 7 17:09:21 2007 +0200
+
+ [MPC512x] Proper handling of larger frames in the FEC driver
+
+ When frame larger than local RX buffer is received, it is split and handled
+ by two buffer descriptors. Prior to this patch the FEC driver discarded
+ contents of a buffer descriptor without the 'LAST' bit set, so the first
+ part of the frame was lost in case of larger frames. This fix allows to
+ safely combine the two pieces into the whole frame.
+
+ Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
+
+commit 8d17979d0359492a822a0a409d26e3a3549b4cd4
+Author: Rafal Jaworowski <raj@semihalf.com>
+Date: Fri Sep 7 17:05:36 2007 +0200
+
+ [MPC512x] Correct fixup relocation
+
+ Signed-off-by: Rafal Jaworowski <raj@semihalf.com>
+
+commit a89cbbd27a60e6740772000fd0688ffba1c2576a
+Author: Wolfgang Denk <wd@denx.de>
+Date: Fri Sep 7 01:21:25 2007 +0200
+
+ Update CHANGELOG, minor coding style cleanup.
+
+commit 5e5803e119de3bebd76fc9a57baac0b5aeccc8a3
+Author: stefano babic <sbabic@denx.de>
+Date: Thu Aug 30 23:01:49 2007 +0200
+
+ PXA270: Added support for TrizepsIV board.
+
+ This patch add support for the Trizeps IV module (520Mhz).
+
+ Signed-off-by: Stefano Babic <sbabic@denx.de>
+
+commit 80172c6181c912fbb34ea3ba0c22b232b419b47f
+Author: stefano babic <sbabic@denx.de>
+Date: Thu Aug 30 22:57:04 2007 +0200
+
+ PXA270: Add support for multiple serial ports.
+
+ This patch adds support for multiple serial ports to the PXA target.
+ FFUART, BTUART and STUART are supported.
+
+ Signed-off-by: Stefano Babic <sbabic@denx.de>
+
+commit 28bb3f72c687ac6b2eb076b01dd21a5fd657d45e
+Author: stefano babic <sbabic@denx.de>
+Date: Thu Aug 30 22:48:47 2007 +0200
+
+ PXA270: fix compile issue (invalid lvalue)
+
+ Code is broken for PXA270 due to "invalid lvalue in assignment".
+
+ This patch fix it in pxa-regs.h
+
+ Signed-off-by: Stefano Babic <sbabic@denx.de>
+
+commit 1d2ca446e1a731df420206d04fe278c27ea6b8e8
+Author: Jason Jin <Jason.jin@freescale.com>
+Date: Thu Aug 30 18:19:05 2007 +0800
+
+ Add BUILD_DIR support for bios emulator.
+
+ Signed-off-by: Jason Jin <Jason.jin@freescale.com>
+
+commit b4d8a55145442f136982634862341a3e02002bda
+Author: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
+Date: Fri Aug 31 14:41:51 2007 +0900
+
+ [MIPS] Remove inline asm string functions
+
+ Stop using inline string functions on MIPS as other ARCHs do so,
+ since the optimized inline asm versions are not small.
+
+ This change is triggered by a following MIPS build error:
+ common/libcommon.a(exports.o)(.text+0xdc): In function `jumptable_init':
+ common/exports.c:32: undefined reference to `strcmp'
+ make: *** [u-boot] Error 1
+
+ Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
+
+commit 8ea2c4e54833deaebc24c3ca6b7f21353c25b0f5
+Author: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
+Date: Fri Aug 31 14:41:45 2007 +0900
+
+ [MIPS] Update asm string header
+
+ This patches contains several bugfixes and cleanups in the latest upstream:
+
+ - Don't include linux/config.h
+ - Remove buggy inline version of memscan.
+ - Merge with Linux 2.6.11-rc3.
+ - Fix undefined reference to strcpy in binfmt_misc caused by gcc 3.4.
+ - Goodbye mips64. 31704 lines of code bite the dust.
+ - Replace extern inline with static inline.
+ - Fix return value of strncpy.
+ - Remove a bunch more "$1" clobbers.
+
+ Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
+
+commit 5b729fb3bd98f49855d6bfc657c3fbae95f2adc2
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Tue Sep 4 17:31:22 2007 +0200
+
+ Fix do_bootm_linux() so that multi-file images with FDT blob boot.
+
+ Fix incorrect blob address calculation in do_bootm_linux() that prevents
+ booting the kernel from a multi-file image (kernel + initrd + blob).
+
+ Also, make minor updates to the U-Boot's output and to the coding style.
+
+ Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
+
+commit 041a2554ad619e80dce520c1a33210affcb6a3f2
+Author: Gary Jennejohn <gary.jennejohn@freenet.de>
+Date: Fri Aug 31 14:29:04 2007 +0200
+
+ Add support for Sil680 IDE controller.
+
+ o add drivers/sil680.c to support the Sil680 IDE-controller.
+ o drivers/Makefile: add sil680.o.
+
+ Signed-off-by: Gary Jennejohn <garyj@denx.de>
+
+commit e79021223bc339df655e360645a52c457a74b067
+Author: Grant Likely <grant.likely@secretlab.ca>
+Date: Thu Sep 6 09:47:40 2007 -0600
+
+ bootm/fdt: Only process the fdt if an fdt address was provided
+
+ Boards with CONFIG_OF_LIBFDT enabled are not able to boot old-style
+ kernels using the board info structure (instead of passing a device tree)
+ This change allows the old style booting to be used if the fdt argument
+ was not passed to 'bootm'.
+
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+ Acked-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit cf2817a84c2e9bea2c5dfc084bce2f2d2563ac43
+Author: Grant Likely <grant.likely@secretlab.ca>
+Date: Thu Sep 6 09:46:23 2007 -0600
+
+ Migrate 5xxx boards from CONFIG_OF_FLAT_TREE to CONFIG_OF_LIBFDT
+
+ Affects boards: icecube (lite5200), jupiter, motionpro, tqm5200
+
+ Tested on: lite5200b
+
+ Note: the fixup functions have not been moved to a common place. This
+ patch is targeted for immediate merging as in solves a build issue, but
+ the final name/location of the fixups is still subject to debate. I
+ propose to merge this now, and move the fixups in the next merge window
+ to be usable by all targets.
+
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit 41bb76e941929f54a73206fb132f7a4c275543a3
+Author: Grant Likely <grant.likely@secretlab.ca>
+Date: Thu Sep 6 09:46:17 2007 -0600
+
+ libfdt: add convenience function fdt_find_and_setprop()
+
+ Given the path to a node, fdt_find_and_setprop() allows a property value
+ to be set directly.
+
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit 56a9270521baaa00e12639a978302a67f61ef060
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Thu Aug 30 16:18:18 2007 -0500
+
+ Fix ULI RTC support on MPC8544 DS
+
+ The RTC on the M1575 ULI chipset requires a dummy read before
+ we are able to talk to the RTC. We accomplish this by adding a
+ second memory region to the PHB the ULI is on and read from it.
+
+ The second region is added to maintain compatiabilty with Linux's
+ view of the PCI memory map.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit f75e89e9b5714db2b0e80074071dfbdd6f59488a
+Author: Ed Swarthout <Ed.Swarthout@freescale.com>
+Date: Thu Aug 30 01:58:48 2007 -0500
+
+ ft_board_setup update 85xx/86xx of pci/pcie bus-range property.
+
+ pcie is now differentiated from pci. Add 8641 bus-range updates.
+
+ Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
+
+commit 81b73dec16fd1227369a191e725e10044a9d56b8
+Author: Gary Jennejohn <garyj@denx.de>
+Date: Fri Aug 31 15:21:46 2007 +0200
+
+ ppc4xx: (Re-)Enable CONFIG_PCI_PNP on AMCC 440EPx Sequoia
+
+ The 440EPx has a problem when the PCI_CACHE_LINE_SIZE register is
+ set to non-zero, because it doesn't support MRM (memory-read-
+ multiple) correctly. We now added the possibility to configure
+ this register in the board config file, so that the default value
+ of 8 can be overridden.
+
+ Here the details of this patch:
+
+ o drivers_pci_auto.c: introduce CFG_PCI_CACHE_LINE_SIZE to allow
+ board-specific settings. As an example the sequoia board requires 0.
+ Idea from Stefan Roese <sr@denx.de>.
+ o board/amcc/sequoia/init.S: add a TLB mapping at 0xE8000000 for the
+ PCI IO-space. Obtained from Stefan Roese <sr@denx.de>.
+ o include/configs/sequoia.h: turn CONFIG_PCI_PNP back on and set
+ CFG_PCI_CACHE_LINE_SIZE to 0.
+
+ Signed-off-by: Gary Jennejohn <garyj@denx.de>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 60174746c668b309378a91488dded898e9553eae
+Author: Wolfgang Denk <wd@denx.de>
+Date: Fri Aug 31 10:01:51 2007 +0200
+
+ Fix TFTP OACK code for short packets.
+
+ The old code had a loop limit overflow bug which caused a semi-
+ infinite loop for small packets, because in "i<len-8", "i" was signed,
+ but "len" was unsigned, and "len-8" became a huge number for small
+ values of "len".
+
+ This is a workaround which replaces broken commit 8f1bc284.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit ff13ac8c7bbebb238e339592de765c546dba1073
+Author: Wolfgang Denk <wd@denx.de>
+Date: Thu Aug 30 14:42:15 2007 +0200
+
+ Backout commit 8f1bc284 as it causes TFTP to fail.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 1900fbf255acba8b94fb442a16408ea85a1d46a6
+Author: Ed Swarthout <Ed.Swarthout@freescale.com>
+Date: Thu Aug 30 02:26:17 2007 -0500
+
+ Revert "Fix MPC8544DS PCIe3 scsi."
+
+ This reverts commit 9468e680.
+ Commit 16e23c3f5da removing allocation of PCSRBAR is sufficient.
+
+ Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
+
+commit 8f1bc28408ded213418d9bc0780c7d8fb8a03774
+Author: Grant Likely <grant.likely@secretlab.ca>
+Date: Wed Aug 29 18:26:24 2007 -0600
+
+ tftp: don't implicity trust the format of recevied packets
+
+ The TFTP OACK code trusts that the incoming packet is formated as
+ ASCII text and can be processed by string functions. It also has a
+ loop limit overflow bug where if the packet length is less than 8, it
+ ends up looping over *all* of memory to find the 'blksize' string.
+
+ This patch solves the problem by forcing the packet to be null
+ terminated and using strstr() to search for the sub string.
+
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit 2602a5c40ae37ab965a4e240854fdaffb51328a4
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Wed Aug 29 09:06:05 2007 -0500
+
+ sbc8641: remove unused OF_FLAT_TREE_MAX_SIZE
+
+ this had slipped through the cracks, since the sbc board was added
+ after I wrote the original patch to remove all these symbols, and
+ before it was merged.
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit c5bded3c88e48ae648a75d357dc81a8255fa81f1
+Author: Wolfgang Denk <wd@denx.de>
+Date: Wed Aug 29 14:05:30 2007 +0200
+
+ Add mii_init() prototype
+
+ to get rid of a *lot* of compiler warnings.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 2d1f23aa1e74e4a8f8ffa67f246eb98c522dfd7f
+Author: Wolfgang Denk <wd@denx.de>
+Date: Wed Aug 29 13:35:03 2007 +0200
+
+ Disable network support on cmi_mpc5xx board
+
+ ..because it caused compiler errors and there seems to be no
+ board maintainer to take care of this.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 9468e6804b7e25b0f6f52e53f47bce3175400a16
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Mon Aug 20 09:44:00 2007 -0500
+
+ Fix MPC8544DS PCIe3 scsi.
+
+ <ed.swarthout@freescale.com>
+
+ The problem is pciauto_setup_device() getting called from fsl_pci_init.c
+ is allocating memory space it doesn't need.
+
+ Signed-off-by: Ed Swarthout <ed.swarthout@freescale.com>
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+
+commit 4bf4abb8a4e9955556b120a1aafa30c03e74032a
+Author: Ed Swarthout <Ed.Swarthout@freescale.com>
+Date: Tue Aug 21 09:38:59 2007 -0500
+
+ 8548cds fixes
+
+ Restore CONFIG_EXTRA_ENV_SETTINGS definition which contains the
+ correct consoledev needed for linux boot.
+ Standardize on fdt{file,addr} var to hold dtb file name.
+
+ Set PCI inbound memory region from CFG_MEMORY_{BUS,PHYS}.
+
+ Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
+
+commit 7a1ac419fa0d2d23ddd08bd61d16896a9f33c933
+Author: Haiying Wang <Haiying.Wang@freescale.com>
+Date: Thu Aug 23 15:20:54 2007 -0400
+
+ Enable L2 cache for MPC8568MDS board
+
+ The L2 cache size is 512KB for 8568, print out the correct informaiton.
+
+ Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
+
+commit 94c47fdaf14cb29fa3fb4d4da2efdd96c803b46b
+Author: Jason Jin <Jason.jin@freescale.com>
+Date: Wed Aug 22 17:54:49 2007 +0800
+
+ Remove the bios emulator binary files from MAI board
+
+ Signed-off-by: Jason Jin <Jason.jin@freescale.com>
+
+commit 7608d75f9c87c9eb5b3a43219d0506d3e979a13f
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Tue Aug 21 17:00:17 2007 -0500
+
+ support board vendor-common makefiles
+
+ if a board/$(VENDOR)/common/Makefile exists, build it.
+
+ also add the first such case, board/freescale/common/Makefile, to
+ handle building board-shared EEPROM, PIXIS, and MDS-PIB code, as
+ dictated by board configuration.
+
+ thusly get rid of alternate build dir errors such as:
+
+ FATAL: can't create /work/wd/tmp/u-boot-ppc/board/freescale/mpc8360emds/../common/pq-mds-pib.o: No such file or directory
+
+ by putting the common/ mkdir command in its proper place (the common
+ Makefile). Common bits from existing individual board Makefiles have
+ been removed.
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit ef8f20752712dc1cdbd86f47e3bd6e35f81c83fd
+Author: stefano babic <sbabic@denx.de>
+Date: Tue Aug 21 15:52:33 2007 +0200
+
+ Fix: TFTP is not working on little endian systems
+
+ TFTP does not work anymore after multicast tftp
+ patch was applied on little endian systems.
+ This patch fix it.
+
+ Signed-off-by: Stefano Babic <sbabic@denx.de>
+
+commit 5f470948570526e9186f053a3003da7719604e90
+Author: stefano babic <sbabic@denx.de>
+Date: Tue Aug 21 15:50:33 2007 +0200
+
+ Fix MAC address setting in DM9000 driver.
+
+ The logic to check if there is a correct MAC address in the DM9000
+ EEPROM, added in the last patch, is wrong. Now the MAC address is
+ always taken from the environment, even if a suitable MAC is present
+ in the EEPROM.
+
+ Signed-off-by: Stefano Babic <sbabic@denx.de>
+
+commit 4a8527ef086ec7c89f40674ef024ae6f988a614a
+Author: Martin Krause <martin.krause@tqs.de>
+Date: Tue Aug 21 12:40:34 2007 +0200
+
+ MPC5xxx: fix some compiler warnings in USB code
+
+ Fix the following warnings:
+ - usb.c:xx: warning: function declaration isn't a prototype
+ - usb_ohci.c:xxx: warning: passing argument 1 of '__fswab32' makes integer
+ from pointer wihtout a cast
+
+ Signed-off-by: Martin Krause <martin.krase@tqs.de>
+
+commit 16e23c3f5dab6937f5109365416808c7f15c122b
+Author: Ed Swarthout <Ed.Swarthout@freescale.com>
+Date: Mon Aug 20 23:55:33 2007 -0500
+
+ fsl_pci_init - Remove self PCSRBAR allocation
+
+ CPU physical address space was being wasted by allocating a
+ PCSRBAR PCI inbound region to it's memory space.
+
+ As a rule, PCSRBAR should be left alone since it does not affect
+ transactions from self and other masters may have changed it.
+
+ Signed-off-by: Ed Swarthout <ed.swarthout@freescale.com>
+
+commit 0e700ce03a23bb1921149bc77008ace7103d5289
+Author: Martin Krause <martin.krause@tqs.de>
+Date: Mon Aug 20 13:56:47 2007 +0200
+
+ Fix compiler warning in include/s3c2410.h
+
+ This patch fixes the "type qualifiers ignored on fuction return tpye"
+ warning for include/s3c2410.h
+
+ Signed-off-by: Martin Krause <martin.krause@tqs.de>
+
+commit 9bb8b209ed2058a5756ecbeb544c067e44a42aea
+Author: Dirk Behme <dirk.behme@googlemail.com>
+Date: Mon Aug 20 07:09:05 2007 +0200
+
+ Fix compilation error for omap2420h4_config.
+
+ omap2420h4 switched to cfi, so remove old (already disabled) flash.c
+ and flash_probe() calls in env_flash.c.
+
+ Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
+
+commit 3bb342fc85d79dbb6b8c2039e7cdcddc82b8d90f
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Fri Aug 10 14:34:14 2007 -0500
+
+ fdt: remove unused OF_FLAT_TREE_MAX_SIZE references
+
+ and make some minor corrections to the FDT part of the README.
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 6af2eeb1e99c2dcc584d4c5ab7fcae30a325f4de
+Author: Wolfgang Denk <wd@denx.de>
+Date: Wed Aug 29 01:32:05 2007 +0200
+
+ Minor coding style cleanup.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit a861558c65f65f1cf1302f3a35e9db7686b9e1a3
+Author: Heiko Schocher <hs@pollux.denx.de>
+Date: Tue Aug 28 17:40:33 2007 +0200
+
+ [UC101] Fix: if no CF in the board, U-Boot resets sometimes.
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit f98984cb194bb34dbe1db9429d3b51133af30d07
+Author: Heiko Schocher <hs@pollux.denx.de>
+Date: Tue Aug 28 17:39:14 2007 +0200
+
+ IDE: - make ide_inb () and ide_outb () "weak", so boards can
+ define there own I/O functions.
+ (Needed for the pcs440ep board).
+ - The default I/O Functions are again 8 Bit accesses.
+ - Added CONFIG_CMD_IDE for the pcs440ep Board.
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 9c02defc29b57945b600714cf61ddfd02b02fb14
+Author: Yuri Tikhonov <yur@emcraft.com>
+Date: Sat Aug 25 05:07:16 2007 +0200
+
+ POST: limit memory test area to not touch global data anymore
+
+ As experienced on lwmon5, on some boards the POST memory test can
+ corrupt the global data buffer (bd). This patch fixes this issue
+ by checking and limiting this area.
+
+ Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 75e1a84d483e36be10e206e539b028c4889e1158
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Aug 24 15:41:42 2007 +0200
+
+ ppc4xx: Add RTC POST test to lwmon5 board configuration
+
+ Since this RTC POST test is taking quite a while to complete
+ it's only initiated upon special keypress same as the complete
+ memory POST.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit d7bfa620037a6d2210159387571bdf93aa32c162
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Aug 24 15:19:10 2007 +0200
+
+ ppc4xx: Change GPIO signal for watchdog triggering on lwmon5
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit c25dd8fc25e9ca3695db996a257d9ba4dab414db
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Aug 23 11:02:37 2007 +0200
+
+ ppc4xx: Add support for 2nd I2C EEPROM on lwmon5 board
+
+ This patch adds support for the 2nd EEPROM (AT24C128) on the lwmon5
+ board. Now the "eeprom" command can be used to read/write from/to this
+ device. Additionally a new command was added "eepromwp" to en-/disable
+ the write-protect of this 2nd EEPROM.
+
+ The 1st EEPROM is not affected by this write-protect command.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit c64fb30e4c5976007d56fc1789c7a0666082b536
+Author: Stefan Roese <sr@denx.de>
+Date: Wed Aug 22 08:56:09 2007 +0200
+
+ ppc4xx: Remove unused option CFG_INIT_RAM_OCM
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 3ad63878737a5a2b1e60825bf0a7d601d7a695e7
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Aug 21 16:27:57 2007 +0200
+
+ ppc4xx: Add matrix kbd support to lwmon5 board (440EPx based)
+
+ This patch adds support for the matrix keyboard on the lwmon5 board.
+ Since the implementation in the dsPCI is kind of compatible with the
+ "old" lwmon board, most of the code is copied from the lwmon
+ board directory.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 3e66c078003607a7d1d214c15a5f262bc1b4032f
+Author: Wolfgang Denk <wd@denx.de>
+Date: Sun Aug 19 10:27:34 2007 +0200
+
+ Fix some build errors.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 05675735ef77dc23b5e0eb782bad1ff477b55e86
+Author: Wolfgang Denk <wd@denx.de>
+Date: Sat Aug 18 22:00:38 2007 +0200
+
+ Update CHANGELOG.
+
+commit 79f240f7ecc0506b43ac50d1ea405ff6540d4d57
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Thu Aug 16 22:52:39 2007 -0500
+
+ lib_ppc: make board_add_ram_info weak
+
+ platforms wishing to display RAM diagnostics in addition to size,
+ can do so, on one line, in their own board_add_ram_info()
+ implementation.
+
+ this consequently eliminates CONFIG_ADD_RAM_INFO.
+
+ Thanks to Stefan for the hint.
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 815b5bd5b18569917c3e04b9757511e6ed23b9f6
+Author: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
+Date: Fri Aug 17 12:43:44 2007 +0900
+
+ PCI_READ_VIA_DWORD_OP: Fix *val uninitialized bug
+
+ This patch has been sent on:
+ - 6 Jun 2007
+
+ Many users of PCI config read routines tend to ignore the function
+ ret value, and are only concerned about the contents of *val. Based
+ on this, pci_hose_read_config_{byte,word}_via_dword should initialize
+ the *val on dword read error.
+
+ Without this fix, for example, we'll go on scanning bus with vendor or
+ header_type uninitialized. This brings many unnecessary config trials.
+
+ Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
+
+commit 26667b7fa05a8bf2fc65fb9f3230b02b1a10c367
+Author: Stefan Roese <sr@denx.de>
+Date: Sat Aug 18 14:37:52 2007 +0200
+
+ ColdFire: Fix some remaining problems with CFG_CMD_
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 8280f6a1c43247616b68224675188e5ccd124650
+Author: Stefan Roese <sr@denx.de>
+Date: Sat Aug 18 14:33:02 2007 +0200
+
+ Coding style cleanup
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 4a442d3186b31893b4f77c6e82f63c4517a5224b
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Thu Aug 16 19:23:50 2007 -0500
+
+ ColdFire: Add M5235EVB Platform for MCF523x
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit 4cc1cd5941827a04cf5c51a07fcc42e8945894aa
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Fri Aug 17 09:30:00 2007 -0500
+
+ mpc83xx: fix typo in DDR2 programming
+
+ introduced in the implement board_add_ram_info patch as I was cleaning out the
+ magic numbers. sorry.
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit e58fe95784d2514fc9c21028dc59f2b319a35d80
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Thu Aug 16 22:53:09 2007 -0500
+
+ mpc83xx: move freescale boards to boards/freescale
+
+ includes build fixes.
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 5aa4ad8d8e7e9468219990c7875d5fdc9e962f47
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Thu Aug 16 22:52:59 2007 -0500
+
+ mpc83xx: suppress unused variable 'val8' warning
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit bbea46f76f767b919070b4829bf34c86bd223248
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Thu Aug 16 22:52:48 2007 -0500
+
+ mpc83xx: implement board_add_ram_info
+
+ add board_add_ram_info, to make memory diagnostic output more
+ consistent. u-boot banner output now looks like:
+
+ DRAM: 256 MB (DDR1, 64-bit, ECC on)
+
+ and for boards with SDRAM on the local bus, a line such as this is
+ added:
+
+ SDRAM: 64 MB (local bus)
+
+ also replaced some magic numbers with their equivalent define names.
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 14778585d1389d86d5846efec29e5fce892680ce
+Author: Tony Li <tony.li@freescale.com>
+Date: Fri Aug 17 10:35:59 2007 +0800
+
+ mpc83xx: Split PIB init code from pci.c and add Qoc3 ATM card support
+
+ The patch split the PIB init code from pci.c to a single file board/freescale/common/pq-mds-pib.c
+ And add Qoc3 ATM card support for MPC8360EMDS and MPC832XEMDS board.
+
+ Signed-off-by Tony Li <tony.li@freescale.com>
+
+commit 8ae158cd87a4a25722b27835261b6ff0fa2aa6a7
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Thu Aug 16 15:05:11 2007 -0500
+
+ ColdFire: Add M54455EVB for MCF5445x
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit a1436a842654a8d3927d082a8ae9ee0a10da62d7
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Thu Aug 16 13:20:50 2007 -0500
+
+ ColdFire: Add M5253EVBE platform for MCF52x2
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit a605aacd8324094199402816cc6d9124aba57b8d
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Thu Aug 16 05:04:31 2007 -0500
+
+ ColdFire: Add M5249EVB platform for MCF52x2
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit f28e1bd9daa6de5eb33ae4822bda6b008ccb4e9e
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Wed Aug 15 20:32:06 2007 -0500
+
+ ColdFire: Update Freescale MCF52x2 platforms
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit 870470dbf6f4bb9864e0d97aeedbc17c167c6d1c
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Wed Aug 15 19:55:10 2007 -0500
+
+ ColdFire: Update EB+MCF-EV123 platform
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit aa93d859d9b1fcd8eea52d51b06e86c38f72111b
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Wed Aug 15 19:46:38 2007 -0500
+
+ ColdFire: update TASREG platform for MCF52x2
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit a9505510bf56a9b5558248dd8b73ec9d9a1556a2
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Wed Aug 15 19:45:51 2007 -0500
+
+ ColdFire: update r5200 platform for MCF52x2
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit 6cfd3c7bc813fb317ab7c0781f0d1874b1c0877c
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Wed Aug 15 19:43:20 2007 -0500
+
+ ColdFire: idmr platform MCF52x2 update
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit 6706424d0bb851fb52af00cd1c3301e91ee7f2b0
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Wed Aug 15 19:41:06 2007 -0500
+
+ ColdFire: cobra5272 platform for MCF52x2 update
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit 56115665b4a64c10c01440c57749b265e0908fa4
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Wed Aug 15 19:38:15 2007 -0500
+
+ ColdFire: MCF52x2 Header files update
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit 83ec20bc4380eebddfde45da6e3a69a92d4db21d
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Wed Aug 15 19:21:21 2007 -0500
+
+ ColdFire: MCF52x2 update
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit f52e78304dcc0ac459c0ea1fa5be275c7d1642cf
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Wed Aug 15 18:46:11 2007 -0500
+
+ ColdFire: MCF5329 update cache
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit 7171977fb8fd77cfb6676953fa9a05789c450513
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Wed Aug 15 15:40:20 2007 -0500
+
+ ColdFire: MCF5329 header file clean up
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit ab77bc547ba561c25ea34457ed17aa0b2f7c2723
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Wed Aug 15 15:39:17 2007 -0500
+
+ ColdFire: MCF5329 Update and cleanup
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit 10327dc5541f947c0cf7e31fef86c4706169607a
+Author: Andy Fleming <afleming@freescale.com>
+Date: Thu Aug 16 16:35:02 2007 -0500
+
+ Add CONFIG_HAS_ETH0 to all boards with TSEC
+
+ The 85xx code now relies on CONFIG_HAS_ETH0 to determine whether
+ to update TSEC1's device-tree node, so we need to add it
+ to all the boards with TSECs. Do this for 83xx and 86xx, too,
+ since they will eventually do something similar.
+
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+
+commit d64ee908a1b525e5bb2b4cbeb5c449ad6a469666
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Thu Aug 16 15:05:04 2007 -0500
+
+ Update MPC8544 DS PCI memory map
+
+ The PCIe bus that the ULI M1575 is connected to has no possible way of
+ needing more than the fixed amount of IO & Memory space needed by the ULI.
+
+ So make it use far less IO & memory space and have it use the shared LAW. This
+ free's up a LAW for PCIe1 IO space. Also reduce the amount of IO space needed
+ by each bus.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit ea5877e31ed63ade948fd1293895ec23fe01472e
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Thu Aug 16 11:01:21 2007 -0500
+
+ Fix up some fdt issues on 8544DS
+
+ It looks like we had a merge issue that duplicated a bit of code
+ in ft_board_setup. Also, we need to set CONFIG_HAS_ETH0 to get
+ the MAC address properly set in the device tree on boot for TSEC1
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 07bc20560cb9d3d186cca268c05c82762e8c55ad
+Author: Niklaus Giger <niklaus.giger@netstal.com>
+Date: Thu Aug 16 15:16:03 2007 +0200
+
+ PPC4xx:HCU4/5 cleanup
+
+ Minor cleanups to confirm to the u-boot coding style.
+ Some german expressions -> english.
+ HCU5 enforces a unique IP adress for a given slot in the rack.
+
+ Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
+
+commit 1e6b07c64967c1eb2cd84faa4c32bf2a769bc8eb
+Author: Niklaus Giger <niklaus.giger@netstal.com>
+Date: Thu Aug 16 15:16:02 2007 +0200
+
+ PPC4xx:HCU4/5 cleanup ecc/sdram init
+
+ Make ecc initialisation robust, as DDR2-ECC errors may be generated
+ while zeroing the RAM.
+
+ Return 16 bytes (a cacheline) less than the available memory, as the
+ board and/or PPC440EPx might have problems accessing the last bytes.
+
+ Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
+
+commit d35b508a55508535b6e8445b718585d27df733d3
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Wed Aug 15 22:29:56 2007 -0500
+
+ fdt: suppress unused variable 'bd' warning
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 82bd9ee77490588d4da785d75829ca63d0176baf
+Author: Andy Fleming <afleming@freescale.com>
+Date: Wed Aug 15 20:06:50 2007 -0500
+
+ Fix warnings from of_data copy fix
+
+ Forgot to cast of_flat_tree to ulong.
+
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+
+commit 7613afda77d5eec0f47d303025b0c661b70e4c73
+Author: Andy Fleming <afleming@freescale.com>
+Date: Wed Aug 15 20:03:44 2007 -0500
+
+ Don't wait for disconnected TSECs
+
+ The TSEC driver's PHY code waits a long time for autonegotiation to
+ complete, even if the link is down. The PHY knows the link is
+ down or up before autonegotiation completes, so we can short-circuit
+ the process if the link is down.
+
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+
+commit b96c83d4ae475a70ef2635cd0e748174c44c8601
+Author: Andy Fleming <afleming@freescale.com>
+Date: Wed Aug 15 20:03:34 2007 -0500
+
+ Fix numerous bugs in the 8568 UEC support
+
+ Actually, fixed a large bug in the UEC for *all* platforms.
+ How did this ever work?
+
+ uec_init() did not follow the spec for eth_init(), and returned
+ 0 on success. Switch it to return the link like tsec_init()
+ (and 0 on error)
+
+ The immap for the 8568 was defined based on MPC8568, rather than
+ CONFIG_MPC8568
+
+ CONFIG_QE was off
+
+ CONFIG_ETHPRIME was set to "Freescale GETH". Now is "FSL UEC0"
+
+ Fixed a comment about the ranges for CONFIG_ETHPRIME if TSEC_ENET is
+ enabled
+
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+
+commit 3a79013e2adda53332dfd0b511066a805e929a9d
+Author: Andy Fleming <afleming@freescale.com>
+Date: Wed Aug 15 20:03:25 2007 -0500
+
+ Define tsec flag values in config files
+
+ The tsec_info structure and array has a "flags" field for each
+ ethernet controller. This field is the only reason there are
+ settings. Switch to defining TSECn_FLAGS for each controller
+ in the config header, and we can greatly simplify the array, and
+ also simplify the addition of future boards.
+
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+
+commit ec7238229507e7f47533a611ea8c53319d234cf3
+Author: Andy Fleming <afleming@freescale.com>
+Date: Wed Aug 15 20:03:13 2007 -0500
+
+ Add support for building all boards with a TSEC
+
+ Changes to the TSEC driver affect almost all 83xx, 85xx, and 86xx boards.
+ Now we can do a MAKEALL test on all of them!
+
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+
+commit 10aaf716cb0dc6614df54ef78bed5144afd23ef8
+Author: Andy Fleming <afleming@freescale.com>
+Date: Wed Aug 15 17:30:56 2007 -0500
+
+ Fix of_data copying for CONFIG_OF_FLAT_TREE-using boards
+
+ The fix, "Fix where the #ifdef CFG_BOOTMAPSZ is placed"
+ neglected to *also* put the code inside the similar #ifdef
+ for CONFIG_OF_FLAT_TREE.
+
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+
+commit 78f9fef7f406078c8bf7191e665a73f795157746
+Author: Scott Wood <scottwood@freescale.com>
+Date: Wed Aug 15 15:46:46 2007 -0500
+
+ mpc885ads: Don't define CONFIG_BZIP2.
+
+ bzip2 requires a significant chunk of malloc space, and there isn't
+ enough room on mpc885ads (with only 8MB RAM) for both bzip2's malloc area
+ and a downloaded image at 0x400000.
+
+ Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit 002275a3ed8b114885f6702d6d544d0780dfe689
+Author: Michal Simek <Monstr@seznam.cz>
+Date: Thu Aug 16 08:54:10 2007 +0200
+
+ Bios emulator - fix microblaze toolchain problem
+
+ microblaze CPU have problem with bios_emulator code.
+ Microblaze toolchain doesn't support PRAGMA PACK.
+
+ Signed-off-by: Michal Simek <monstr@monstr.eu>
+
+commit a5a38f4fd7e5366d706ff6a985f9b6715ddbc98b
+Author: Wolfgang Denk <wd@denx.de>
+Date: Thu Aug 16 11:51:04 2007 +0200
+
+ Minor Coding Style fix; Update CHANGELOG file.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 8fb6e80c06849e3013ac5c9350d8ed9e52967991
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Aug 16 11:21:49 2007 +0200
+
+ ppc4xx: Remove #warning in esd auto_update.c
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 2d78074d2e806edc380c1464eb9e5df335ece65e
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Jun 22 17:32:28 2007 +0200
+
+ ppc7xx: Update CPCI750 board
+
+ This small CPCI750 update extends the board specific command
+ "show_config" to display the Marvell strapping registers and
+ extends the PCI IDE controller.
+
+ Signed-off-by: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 9de469bd960cc1870bb40d6672ed42726b8b50d7
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Aug 16 10:18:33 2007 +0200
+
+ ppc4xx: Only enable POST FPU test on Sequoia and not Rainier
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 6da0c5bd4a53e40eb4f7eb72a4c051ecabad783c
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Aug 16 09:54:51 2007 +0200
+
+ Add missing rainier (PPC440GRx) target to MAKEALL and MAINTAINERs files
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 02ba7022f62bb75908296c58c63866e1d294b69a
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Aug 16 09:52:29 2007 +0200
+
+ ppc4xx: Update Sequoia/Rainier bootstrap command
+
+ As suggested by David Mitchell, here an update for the Sequoia/Rainier
+ bootstrap command.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 35cc4e4823668e8745854899cfaedd4489beb0ef
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Wed Aug 15 22:30:39 2007 -0500
+
+ mpc83xx: enable libfdt by default on freescale boards
+
+ this enables libfdt code by default for the
+ freescale mpc8313erdb, mpc832xemds, mpc8349emds,
+ mpc8349itx and gp boards.
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 3fde9e8b22cfbd7af489214758f9839a206576cb
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Wed Aug 15 22:30:33 2007 -0500
+
+ mpc83xx: migrate remaining freescale boards to libfdt
+
+ this adds libfdt support code for the freescale
+ mpc8313erdb, mpc832xemds, mpc8349emds, mpc8349itx,
+ and gp boards.
+
+ Boards remain compatible with OF_FLAT_TREE.
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 6a16e0dfcc4119b46adb1dce2d6c8fb3c5d108e1
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Wed Aug 15 22:30:26 2007 -0500
+
+ mpc83xx: move common /memory node update mechanism to cpu.c
+
+ also adds common prototypes to include/common.h.
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 8f9e0e9f339aee4ce31a338d5f27356eb5457f85
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Wed Aug 15 22:30:19 2007 -0500
+
+ mpc83xx: remaining 8360 libfdt fixes
+
+ PCI clocks and QE frequencies weren't being updated, and the core clock
+ was being updated incorrectly. This patch also adds a /memory node if
+ it doesn't already exist prior to update.
+
+ plus some cosmetic trimming to single line comments.
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit f4b2ac5ed9aaff9920d487bff8a59696c083a524
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Wed Aug 15 22:30:12 2007 -0500
+
+ mpc83xx: fix UEC2->1 typo in libfdt setup code
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 19fa1c35368484d4ed10ddce8a7793c21862e3a3
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Wed Aug 15 22:30:05 2007 -0500
+
+ mpc83xx: add MAINTAINER and MAKEALL entries for the mpc8323erdb
+
+ and reorder the existing 83xx maintainers alpha.
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 30b52df9e906bf0e465916c2c6bb5192b438e0b8
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Wed Aug 15 11:55:35 2007 -0500
+
+ 86xx: Fix lingering CFG_CMD_* references in sbc8641d.h
+
+ Remove a leftover in net/tftp.c while we're at it.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 4ce917742b1e48faa9bf9a9757545e56fb4cfe44
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Wed Aug 15 12:20:40 2007 -0500
+
+ Move the MPC8641HPCN board under board/freescale.
+
+ Minor path corrections needed to ensure buildability.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 8662577fe36fdb6a44b55b998d9daac6392a736a
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Wed Aug 15 11:46:22 2007 -0500
+
+ 86xx: Fix lingering CFG_CMD_* references in sbc8641d.h
+
+ Remove a leftover in net/tftp.c while we're at it.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 210f463c71917b7a4495c2103c228b9c179ae64d
+Author: Jerry Van Baren <gvb.uboot@gmail.com>
+Date: Wed Aug 15 11:13:15 2007 -0400
+
+ Fix where the #ifdef CFG_BOOTMAPSZ is placed.
+
+ Commit 073e1b509980cefe6f53c2d7fbbcd135df1e3924 "Fix initrd/dtb
+ interaction" put the new code outside of the #if defined(CONFIG_OF_LIBFDT)
+ when it should have gone inside of the conditional. As a result, it
+ broke non-LIBFDT board builds.
+
+ Also added a missing "not." to the comment.
+
+ Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
+
+commit 0e19209767194a97cec6d93dba9e64d1da8d548e
+Author: Niklaus Giger <niklaus.giger@netstal.com>
+Date: Wed Aug 15 12:14:23 2007 +0200
+
+ PPC4xx:HCU4/5-Board fix compile warning
+
+ Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
+
+commit 594e79838ce5078a90d0c27abb2b2d61d5f8e8a7
+Author: Ed Swarthout <Ed.Swarthout@freescale.com>
+Date: Tue Aug 14 14:06:45 2007 -0500
+
+ Fix malloc size error in ahci_init_one.
+
+ Typically this causes scsi init to corrupt the
+ devlist and break the coninfo command.
+ Fix a compiler size warning.
+
+ Signed-off-by: Jason Jin <jason.jin@freescale.com>
+ Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
+ Acked-by: Andy Fleming <afleming@freescale.com>
+
+commit b361acd64fd2525c081b9b288b0804efe209c0e9
+Author: ksi@koi8.net <ksi@koi8.net>
+Date: Tue Aug 14 10:02:16 2007 -0700
+
+ TI DaVinci - fix unsupported %hhx format
+
+ Signed-off-by: Sergey Kubushyn <ksi@koi8.net>
+
+commit f01dbb5424a81453c81190dd30e945891466f621
+Author: Wolfgang Denk <wd@denx.de>
+Date: Tue Aug 14 18:42:36 2007 +0200
+
+ Coding style cleanup. Update CHANGELOG.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 073e1b509980cefe6f53c2d7fbbcd135df1e3924
+Author: Andy Fleming <afleming@freescale.com>
+Date: Tue Aug 14 10:32:59 2007 -0500
+
+ Fix initrd/dtb interaction
+
+ The original code would wrongly relocate the blob to be right before
+ the initrd if it existed. The blob *must* be within CFG_BOOTMAPSZ,
+ if it is defined. So we make two changes:
+
+ 1) flag the blob for relocation whenever its address is above BOOTMAPSZ
+
+ 2) If the blob is being relocated, relocate it before kbd, not initrd
+
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+
+commit e54b970173769307a116bd34028b6d0c2eea2a4e
+Author: Peter Pearse <peter.pearse@arm.com>
+Date: Tue Aug 14 15:40:00 2007 +0100
+
+ Supply spi interface in at45.c
+
+commit 4ce846ec59f36b85d6644a769690ad3feb667575
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Aug 14 15:12:01 2007 +0200
+
+ POST: Fix merge problem
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 429d9571f60631ae8a2fe12b11be4c75b0c2b37c
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Aug 14 15:03:17 2007 +0200
+
+ Coding style cleanup
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 779e975117a75e91fcebe226a63104dbfb924ab1
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Aug 14 14:44:41 2007 +0200
+
+ ppc4xx: Add initial Zeus (PPC405EP) board support
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit c5a172a5fd636c12467429e3f7910e53773979c6
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Aug 14 14:41:55 2007 +0200
+
+ POST: Add option for external ethernet loopback test
+
+ When CFG_POST_ETHER_EXT_LOOPBACK is defined, the ethernet POST
+ is not done using an internal loopback connection, but by assuming
+ that an external loopback connector is plugged into the board.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit eb2b4010ae426245172988804ee8d9193fb41038
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Aug 14 14:39:44 2007 +0200
+
+ POST: Add ppc405 support to cache and UART POST
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 0c42f36f15074bd9808a7dbd7ef611fad9bf537c
+Author: Peter Pearse <peter.pearse@arm.com>
+Date: Tue Aug 14 10:46:32 2007 +0100
+
+ Replace lost end of at45.c.
+
+commit 65d7ada64557e76094b4fd3bad30a0f18f5fb2b2
+Author: Peter Pearse <peter.pearse@arm.com>
+Date: Tue Aug 14 10:30:06 2007 +0100
+
+ Update Makefiles for merged and split at45.c.
+
+commit 3454cece2db57cb9eb7087995f7e73066a163f71
+Author: Peter Pearse <peter.pearse@arm.com>
+Date: Tue Aug 14 10:21:06 2007 +0100
+
+ Delete the merged files.
+
+commit dcbfd2e5649f97aa04fbbc6ea2b008aa4486e225
+Author: Peter Pearse <peter.pearse@arm.com>
+Date: Tue Aug 14 10:14:05 2007 +0100
+
+ Add the files.
+
+commit d4fc6012fd0a5c211b825691f44b06f8032c0551
+Author: Peter Pearse <peter.pearse@arm.com>
+Date: Tue Aug 14 10:10:52 2007 +0100
+
+ Add MACH_TYPE records for several AT91 boards.
+ Merge to two at45.c files into a common file, split to at45.c and spi.c
+ Fix spelling error in DM9161 PHY Support.
+ Initialize at91rm9200 board (and set LED).
+ Add PIO control for at91rm9200dk LEDs and Mux.
+ Change dataflash partition boundaries to be compatible with Linux 2.6.
+
+ Signed-off-by: Peter Pearse <peter.pearse@arm.com>
+ Signed-off-by: Ulf Samuelsson <ulf@atmel.com>
+
+commit 4ef35e53c693556c54b0c22d6f873de87bade253
+Author: Wolfgang Denk <wd@denx.de>
+Date: Tue Aug 14 09:54:46 2007 +0200
+
+ Coding style cleanup, update CHANGELOG
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 85eb5caf6b906f7ec5b54814e8c7c74f55986bb7
+Author: Wolfgang Denk <wd@denx.de>
+Date: Tue Aug 14 09:47:27 2007 +0200
+
+ Coding style cleanup; rebuild CHANGELOG
+
+commit 7f3f2bd2dc08e0b05e185662ca2e2d283757104a
+Author: Randy Vinson <rvinson@linuxbox.(none)>
+Date: Tue Feb 27 19:42:22 2007 -0700
+
+ 85xxCDS: Add make targets for legacy systems.
+
+ The PCI ID select values on the Arcadia main board differ depending
+ on the version of the hardware. The standard configuration supports
+ Rev 3.1. The legacy target supports Rev 2.x.
+
+ Signed-off-by Randy Vinson <rvinson@mvista.com>
+
+commit e41094c7e38177c755fbd9b182018069614f080d
+Author: Andy Fleming <afleming@freescale.com>
+Date: Tue Aug 14 01:50:09 2007 -0500
+
+ 85xxCDS: Enable the VIA PCI-to-ISA bridge.
+
+ Author: Randy Vinson <rvinson@linuxbox.(none)>
+
+ Enable the PCI-to-ISA bridge in the VIA Southbridge located on the
+ Arcadia main board.
+
+ Signed-off-by: Randy Vinson <rvinson@mvista.com>
+ Signed-off-by: York Sun <yorksun@freescale.com>
+
+commit da9d4610d76e52c4d20a8f3d8433439a7fcf5b71
+Author: Andy Fleming <afleming@freescale.com>
+Date: Tue Aug 14 00:14:25 2007 -0500
+
+ Add support for UEC to 8568
+
+ Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+
+commit c59e4091ffe0148398b9e9ff14a019ea038b7432
+Author: Haiying Wang <Haiying.Wang@freescale.com>
+Date: Tue Jun 19 14:18:34 2007 -0400
+
+ Add PCI support for MPC8568MDS board
+
+ This patch is against u-boot-mpc85xx.git of www.denx.com
+
+ Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
+ Signed-off-by: Ebony Zhu <ebony.zhu@freescale.com>
+
+commit d111d6382c99fdea08c2312eeeae8786945e189a
+Author: Haiying Wang <Haiying.Wang@freescale.com>
+Date: Tue Jun 19 14:18:32 2007 -0400
+
+ Empirically set cpo and clk_adjust for mpc85xx DDR2 support
+
+ This patch is against u-boot-mpc85xx.git of www.denx.com
+
+ Setting cpo to 0x9 for frequencies higher than 333MHz is verified on
+ both MPC8548CDS board and MPC8568MDS board, especially for supporting
+ 533MHz DDR2.
+
+ Setting clk_adjust to 0x6(3/4 late cycle) for MPC8568MDS board is for
+ DDR2 on all current board versions especially ver 1.92 or later to bring
+ up.
+
+ Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
+
+commit 3db0bef59eab1155801618cef5c481e97553b597
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Tue Aug 7 18:07:27 2007 -0500
+
+ Use an absolute address when jumping out of 4k boot page
+
+ On e500 when we leave the 4k boot page we should use an absolute address since
+ we don't know where the board code may want us to be really running at.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 39980c610c9a4c381907c9e1d1b9c0e1c0dca57a
+Author: Andy Fleming <afleming@freescale.com>
+Date: Mon Aug 13 14:49:59 2007 -0500
+
+ MPC85xx BA bits not set for 3-bit bank address DIMM
+
+ The current implementation does not set the number of bank address bits
+ (BA) in the processor. The default assumes 2 logical bank bits. This
+ works fine for a DIMM that uses devices with 4 internal banks (SPD
+ byte17 = 0x4) but needs to be set appropriately for a DIMM that uses
+ devices with 8 internal banks (SPD byte17 = 0x8).
+
+ Signed-off-by: Greg Davis <DavisG@embeddedplanet.com>
+
+commit 6c543597bb4b1ecf5d8589f7abb0f39929fb7fd1
+Author: Andy Fleming <afleming@freescale.com>
+Date: Mon Aug 13 14:38:06 2007 -0500
+
+ Fix minor 85xx warnings
+
+ Some patches had inserted warnings into the build:
+ * mpc8560ads declared data without using it
+ * cpu_init declared ecm and immap without using it in all CONFIGs
+ * MPC8548CDS.h had its default filenames changed so that they contained
+ "\m" in the paths. Made the defaults not Windows-specific (or
+ anything-specific)
+
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+
+commit f2cff6b104f82b993bef6086ce0c97159bbe1add
+Author: Ed Swarthout <Ed.Swarthout@freescale.com>
+Date: Fri Jul 27 01:50:52 2007 -0500
+
+ 8548cds PCIE support.
+
+ Make the early L1 cache stack region guarded to prevent speculative
+ fetches outside the locked range.
+
+ Use _PHYS defines, not _MEM for cpu-side PCI memory mapped regions.
+ init.S whitespace cleanup.
+
+ Allow TEXT_BASE value to be specified on command line. This allows it
+ to be set to 0xfffc0000 which cuts the uboot binary in half.
+
+ Clear and enable lbc and ecm errors.
+
+ Update last_busno in device-tree for pci and pcie.
+
+ Remove load of obsolete cpu/mpc85xx/pci.0
+
+ Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
+ Acked-by: Andy Fleming <afleming@freescale.com>
+
+commit 837f1ba05cfb248aba5ab8e1fb1bfeefa07d5962
+Author: Ed Swarthout <Ed.Swarthout@freescale.com>
+Date: Fri Jul 27 01:50:51 2007 -0500
+
+ 8544ds PCIE support
+
+ PCI1 LAW mapping should use CFG_PCI1_MEM_PHY and not _BASE address.
+
+ Enable LBC and ECM errors and clear error registers.
+
+ Add tftpflash env var to get uboot from tftp server and flash it.
+
+ Add pci/pcie convenience env vars to display register space:
+ "run pcie3regs" to see all pcie3 ccsr registers
+ "run pcie3cfg" to see all cfg registers
+ Whitespace cleanup and MPC8544DS.h
+
+ Enable CONFIG_INTERRUPTS.
+
+ Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
+ Acked-by: Andy Fleming <afleming@freescale.com>
+
+commit 61a21e980a7b9188424d04f1c265fdc5c21c7e85
+Author: Andy Fleming <afleming@freescale.com>
+Date: Tue Aug 14 01:34:21 2007 -0500
+
+ 85xx start.S cleanup and exception support
+
+ From: Ed Swarthout <Ed.Swarthout@freescale.com>
+
+ Support external interrupts from platform to eliminate system hangs.
+ Define CONFIG_INTERRUPTS board configure option to enable.
+ Enable ecm, ddr, lbc, and pci/pcie error interrupts in PIC.
+
+ Remove extra cpu initialization redundant with hardware initialization.
+ Whitespace cleanup.
+
+ Define and use _START_OFFSET consistent with other processors using
+ ppc_asm.tmpl
+
+ Move additional code from .text to boot page to make room for
+ exception vectors at start of image.
+
+ Handle Machine Check, External and Critical exceptions.
+
+ Fix e500 machine check error determination in traps.c
+
+ TEXT_BASE can now be 0xfffc_0000 - which cuts binary image in half.
+
+ Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
+ Acked-by: Andy Fleming <afleming@freescale.com>
+
+commit 7bd30fc4a6475b41d6679ae3aafc9fa505260c47
+Author: Andy Fleming <afleming@freescale.com>
+Date: Tue Aug 14 01:33:18 2007 -0500
+
+ Add MPC8544DS README
+
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+
+commit 40c7f9b0de4e300370adfc704128fa0f79a143b6
+Author: Ed Swarthout <Ed.Swarthout@freescale.com>
+Date: Fri Jul 27 01:50:48 2007 -0500
+
+ 85xx allow debugger to configure ddr.
+
+ Only check for mpc8548 rev 1 when compiled for 8548.
+
+ Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
+ Acked-by: Andy Fleming <afleming@freescale.com>
+
+commit 29372ff38c5baab7d0e3a8c14fe11fa194a38704
+Author: Ed Swarthout <Ed.Swarthout@freescale.com>
+Date: Fri Jul 27 01:50:47 2007 -0500
+
+ mpc85xx L2 cache reporting and SRAM relocation option.
+
+ Allow debugger to override flash cs0/cs1 settings to enable alternate
+ boot regions
+
+ Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
+ Acked-by: Andy Fleming <afleming@freescale.com>
+
+commit 41f0f8fb1ab92f0cba7d329de90070f822f8299f
+Author: Ed Swarthout <Ed.Swarthout@freescale.com>
+Date: Fri Jul 27 01:50:46 2007 -0500
+
+ e500 needs ppc_asm.tmp MCK_EXCEPTION
+
+ Always define MCK_EXCEPTION macro - so e500 can use it too.
+
+ Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
+ Acked-by: Andy Fleming <afleming@freescale.com>
+
+commit 53a5c424bf8655b7b4e2c305a441963259a26a81
+Author: David Updegraff <dave@cray.com>
+Date: Mon Jun 11 10:41:07 2007 -0500
+
+ multicast tftp: RFC2090
+
+ Implemented IETF RFC2090, Multicast TFTP. Initial implementation
+ on Realtek RTL8139 and Freescale TSEC.
+
+ Signed-off-by: David Updegraff <dave@cray.com>
+ Signed-off-by: Ben Warren <bwarren@qstreams.com>
+
+commit 5d110f0aa69f065ee386ec1840dfee1e8cc46bc1
+Author: Wilson Callan <wcallan@savantav.com>
+Date: Sat Jul 28 10:56:13 2007 -0400
+
+ New CONFIG_BOOTP_SERVERIP option
+
+ Added CONFIG_BOOTP_SERVERIP to allow the tftp server to be different
+ from the bootp server
+
+ Signed-off-by: Wilson Callan <wcallan@savantav.com>
+ Signed-off-by: Ben Warren <bwarren@qstreams.com>
+
+commit 50cca8b976ec74069860208c36e64ce8f4d5e4c1
+Author: Mike Rapoport <mike@compulab.co.il>
+Date: Sun Aug 12 08:48:27 2007 +0300
+
+ Add ability to take MAC address from the environment to DM9000 driver
+
+ Signed-off-by: Mike Rapoport <mike@compulab.co.il>
+ Signed-off-by: Ben Warren <bwarren@qstreams.com>
+
+commit be5d72d10d47609326226225181e301fb9a33b58
+Author: Wolfgang Denk <wd@denx.de>
+Date: Mon Aug 13 21:57:53 2007 +0200
+
+ Minor coding style cleanup. Update CHANGELOG.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit cca34967cbd13ff6bd352be29e3f1cc88ab24c05
+Author: Joe Hamman <joe.hamman@embeddedspecialties.com>
+Date: Sat Aug 11 06:54:58 2007 -0500
+
+ Modify SBC8641D to use new Freescale PCI routines
+
+ PCI-Express sockets 1 and 2 verified working with Intel Pro/1000 PT
+ adapter.
+
+ Signed-off-by: Joe Hamman <joe.hamman@embeddedspecialties.com>
+ Signde-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit a08458303e7f9db67f296980036d3292c35cb45c
+Author: Haavard Skinnemoen <hskinnemoen@atmel.com>
+Date: Fri Jun 29 18:38:51 2007 +0200
+
+ atmel_mci: Fix data timeout value
+
+ Calculate the data timeout based on values from the CSD instead of
+ just using a hardcoded DTOR value. This is a backport of a similar fix
+ in BSP 2.0, with one additional fix: the DTOCYC value is rounded up
+ instead of down.
+
+ Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
+
+commit 0ba8eed28b575626b17e0a7882f923b83e0d7584
+Author: Haavard Skinnemoen <hskinnemoen@atmel.com>
+Date: Mon Aug 13 17:22:31 2007 +0200
+
+ AVR32: Include <div64.h> instead of <asm/div64.h>
+
+ include/asm-avr32/div64.h was recently moved to include/div64.h, but
+ cpu/at32ap/interrupts.c wasn't properly updated (an earlier version of
+ the patch was merged perhaps?)
+
+ This patch updates cpu/at32ap/interrupts.c so that the avr32 port
+ compiles again.
+
+ Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
+
+commit f0d1246ed7cb5a88522244c596d7ae7e6f161283
+Author: Haavard Skinnemoen <hskinnemoen@atmel.com>
+Date: Wed Jun 27 13:34:26 2007 +0200
+
+ atmel_mci: Use 512 byte blocksize if possible
+
+ Instead of always using the largest blocksize the card supports, check
+ if it can support smaller block sizes and use 512 bytes if possible.
+ Most cards do support this, and other parts of u-boot seem to have
+ trouble with block sizes different from 512 bytes.
+
+ Also enable underrun/overrun protection.
+
+ Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
+ Acked-by: Hans-Christian Egtvedt <hcegtvedt@atmel.com>
+
+commit 273db7e1bdd1937e32f1d4507321bb721ebd3118
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Aug 13 09:05:33 2007 +0200
+
+ ppc4xx: Fix problem in PLL clock calculation
+
+ This patch was originall provided by David Mitchell <dmitchell@amcc.com>
+ and fixes a bug in the PLL clock calculation.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 9986bc3e40e899bea372a99a2bca4071bdf2e24b
+Author: Wolfgang Denk <wd@denx.de>
+Date: Sun Aug 12 21:34:50 2007 +0200
+
+ Update CHANGELOG
+
commit 77d19a8bf3b0b1e401cb9f23c81e2ef419705c1a
Author: Wolfgang Denk <wd@denx.de>
Date: Sun Aug 12 21:34:34 2007 +0200
Signed-off-by: Dave Liu <daveliu@freescale.com>
+commit c646bba6465a45c60746d4cc1602cd06c1960f2d
+Author: Joe Hamman <joe.hamman@embeddedspecialties.com>
+Date: Thu Aug 9 15:11:03 2007 -0500
+
+ Add support for SBC8641D. Config files.
+
+ Add support for Wind River's SBC8641D reference board.
+
+ Signed-off by: Joe Hamman <joe.hamman@embeddedspecialties.com>
+ Acked-by: Wolfgang Denk <wd@denx.de>
+ Acked-by: Jon Loeliger <jdl@freescale.com>
+
+commit 8ac273271d57321f90505c7a51cdb1ef2113b628
+Author: Joe Hamman <joe.hamman@embeddedspecialties.com>
+Date: Thu Aug 9 15:10:53 2007 -0500
+
+ Add support for SBC8641D. Board files.
+
+ Add support for Wind River's SBC8641D reference board.
+
+ Signed-off by: Joe Hamman <joe.hamman@embeddedspecialties.com>
+ Acked-by: Wolfgang Denk <wd@denx.de>
+ Acked-by: Jon Loeliger <jdl@freescale.com>
+
commit c2c0ab4aff86622b837a48a0e560351f9afafb95
Author: Stefan Roese <sr@denx.de>
Date: Fri Aug 10 20:34:58 2007 +0200
Acked-by: Zach Sadecki <Zach.Sadecki@ripcode.com>
Acked-by: Stefan Roese <sr@denx.de>
+commit 2e4d94f1e3c2961428967a33b6ff2520568391b3
+Author: Ed Swarthout <Ed.Swarthout@freescale.com>
+Date: Fri Jul 27 01:50:45 2007 -0500
+
+ fsl_pci_init cleanup.
+
+ Do not enable normal errors created during probe (master abort, perr,
+ and pcie Invalid Configuration access).
+
+ Add CONFIG_PCI_NOSCAN board option to prevent bus scan.
+
+ Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
+ Acked-by: Andy Fleming <afleming@freescale.com>
+
+commit 936b3e69b667c3eb9a61ece4e78647d3fce9fc2a
+Author: Ed Swarthout <Ed.Swarthout@freescale.com>
+Date: Fri Jul 27 01:50:44 2007 -0500
+
+ pciauto_setup_device bars_num fix
+
+ Passing bars_num=0 to pciauto_setup_device should assign no bars.
+
+ Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
+ Acked-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
+ Acked-by: Andy Fleming <afleming@freescale.com>
+
+commit cf0b185e58ca0aec8ae2b2a8804ec0ef58ee21d4
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Mon Aug 6 17:39:44 2007 -0500
+
+ 8641hpcn: Do correct sized pointer math.
+
+ When I rebased Ed's patch and cleaned up a few compilation
+ problems, I apparently rebased my brain on crack first.
+ Fix that by doing (char *) sized pointer math as needed.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit cfc7a7f5bb3273c9951173c788001d45118f141f
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Thu Aug 2 14:42:20 2007 -0500
+
+ cpu/86xx fixes.
+
+ Remove rev 1 fixes.
+ Always set PICGCR_MODE.
+ Enable machine check and provide board config option
+ to set and handle SoC error interrupts.
+
+ Include MSSSR0 in error message.
+
+ Isolate a RAMBOOT bit of code with #ifdef CFG_RAMBOOT.
+
+ Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 35d22f957a85a22bb3cd1ad084fa5404620d1c42
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Aug 10 10:42:25 2007 +0200
+
+ Coding style cleanup
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
commit 3a6d56c20989fe27360afe743bd2a7ad4d76e48f
Author: Dirk Behme <dirk.behme@googlemail.com>
Date: Thu Aug 2 17:42:08 2007 +0200
Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
+commit 157cda4d0c3d592ccbb19bbfc07d9251894f0894
+Author: Niklaus Giger <niklausgiger@gmx.ch>
+Date: Fri Jul 27 11:31:22 2007 +0200
+
+ Add PPC4xx-HCU4 and HCU5 boards: HCU5 files
+
+ Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
+
+commit 6e5de26c6e7580faf16e87745cd488b92b492d0c
+Author: Niklaus Giger <niklausgiger@gmx.ch>
+Date: Fri Jul 27 11:30:33 2007 +0200
+
+ Add PPC4xx-HCU4 and HCU5 boards: HCU4 files
+
+ Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
+
+commit e8397fc78c9394d71de233a4d810fbc9047e4c76
+Author: Niklaus Giger <niklausgiger@gmx.ch>
+Date: Fri Jul 27 11:38:26 2007 +0200
+
+ Add PPC4xx-HCU4 and HCU5 boards: common files
+
+ Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
+
+commit ac982ea5a4f2f993efcf52dca122f5a59df047d8
+Author: Niklaus Giger <niklausgiger@gmx.ch>
+Date: Fri Jul 27 11:28:44 2007 +0200
+
+ Add PPC4xx-HCU4 and HCU5 boards: make related
+
+ Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
+
+commit 137fdd9f474ecb853efdace5200576308c67f18d
+Author: Niklaus Giger <niklausgiger@gmx.ch>
+Date: Fri Jul 27 11:28:03 2007 +0200
+
+ Add PPC4xx-HCU4 and HCU5 boards: HCU5 config
+
+ Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
+
+commit 714bc55b35b6f6a65cc8740a3842a543e88cdef2
+Author: Niklaus Giger <niklausgiger@gmx.ch>
+Date: Fri Jul 27 11:27:15 2007 +0200
+
+ Add PPC4xx-HCU4 and HCU5 boards: HCU4 config
+
+ Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
+
+commit 1894dd381124bdbfbdae7cf3a6ca52a8eb1f4421
+Author: Niklaus Giger <niklausgiger@gmx.ch>
+Date: Fri Jul 27 11:25:31 2007 +0200
+
+ Add PPC4xx-HCU4 and HCU5 boards: READMEs
+
+ Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
+
+commit 641cca9569ce351ddb287fd3343d8b1dcb591db4
+Author: Niklaus Giger <niklausgiger@gmx.ch>
+Date: Fri Jul 27 11:37:40 2007 +0200
+
+ Add PPC4xx-HCU4 and HCU5 boards: Infrastructure
+
+ This series of patches adds support for 2 boards from Netstal Maschinen.
+
+ The HCU4 has a PPC405Gpr and
+ the HCU5 has a PPC440EPX.
+
+ The HCU4 has a somehow complicated flash setup, as the booteprom is
+ only 8 bits and the CFI 16 bits wide, which makes it impossible to use a more
+ elegant solution.
+
+ The HCU5 has only a booteprom as the whole code will be downloaded from a
+ different board which has HD, CD-ROM, etc and where all code is stored.
+
+ This is my third try. I incorporated all suggestions made by Wolfgang and Stefan.
+ Thanks them a lot.
+
+ Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
+
+commit 3e4c90c6233618fc1806e63fde68df5f3d6a0171
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Aug 10 08:42:55 2007 +0200
+
+ ppc4xx: Update lwmon5 POST configuration
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 29cb25da56afe18cf5e7072a92a9d98ea8af1fd4
+Author: Yuri Tikhonov <yur@emcraft.com>
+Date: Fri Aug 10 08:25:22 2007 +0200
+
+ POST: Add ppc4xx UART POST support without external uart clock (lwmon5)
+
+ The patch adds support for UART POST on ppc44x-based boards with no
+ external serial clocks installed.
+
+ Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
+ Acked-by: Stefan Roese <sr@denx.de>
+
commit 99c2fdab91bc633e46fb41dbaa629f87ccf6e00f
Author: Kim Phillips <kim.phillips@freescale.com>
Date: Mon Aug 6 18:18:34 2007 -0500
Signed-off by: Joe Hamman <joe.hamman@embeddedspecialties.com>
+commit 3ba4c2d68f6541db4677b4aea12071f56e6ff6e6
+Author: Stefan Roese <sr@denx.de>
+Date: Wed Aug 8 09:54:26 2007 +0200
+
+ Coding style cleanup
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit a41de1f0d373e09c782dea558385a06247111ba5
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Sun Aug 5 05:15:18 2007 -0500
+
+ Port enabled for I2C signals and chipselects port configuration.
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit 1a33ce65a4c51a69190dd8c408f9e1c62a66e94f
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Sun Aug 5 04:31:18 2007 -0500
+
+ Added NAND support
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit eaf9e447beb3e498818ef8ad0b8c1597cd506149
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Sun Aug 5 04:11:20 2007 -0500
+
+ Added I2C support
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit 99c03c175d2689093176facf17c58ce2cb320001
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Sun Aug 5 03:58:52 2007 -0500
+
+ Changed CFG_CLK to gd->bus_clk for CFG_TIMER_PRESCALER. Added DECLARE_GLOBAL_DATA_PTR for time.c
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit 8d1d66af54d305de29d0bbf4aa8c9e6375f7f731
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Sun Aug 5 03:55:21 2007 -0500
+
+ Added uart_gpio_conf() in serial_init(), seperated uart port configuration from cpu_init() to uart_gpio_conf()
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit 6fde84a44b7e575ea80fe0e2d5be3b6f73d1e630
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Sun Aug 5 03:43:30 2007 -0500
+
+ Moved sync() from board file to include/asm-m68k/io.h
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit 9e737d8476e7d6a596d16caaf6a3853a9a1190a2
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Sun Aug 5 03:30:44 2007 -0500
+
+ Declared attributes of void __mii_init(void) as an alias for int mii_init(void)
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit 9998bd37ead85e93953559720710d3b0685c81e6
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Sun Aug 5 03:19:10 2007 -0500
+
+ Renamed CONFIG_MCFSERIAL to CONFIG_MCFUART
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
commit 7c4c3722a38d40b0cf537ddae72b04f4088b190c
Author: Jason Jin <Jason.jin@freescale.com>
Date: Tue Aug 7 16:17:06 2007 +0800
Signed-off-by: Wolfgang Denk <wd@denx.de>
+commit 537223afa61f64480df31ce440a9cb386df4a814
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Aug 6 21:10:17 2007 +0200
+
+ ppc4xx: Update AMCC Bamboo README doc/README.bamboo
+
+ As suggested by Eugene O'Brien <Eugene.O'Brien@advantechamt.com>,
+ here an updated Bamboo README.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
commit 9c7e4b06214db61bb21f1bcbe57c97519669baae
Author: Wolfgang Denk <wd@denx.de>
Date: Mon Aug 6 02:17:36 2007 +0200
Minor cleanup of <board>_nand build rules.
-commit cdd917a43da6fa7fc8f54a3cc9f420ce5ecf3197
-Author: Wolfgang Denk <wd@denx.de>
-Date: Thu Aug 2 00:48:45 2007 +0200
+commit 9ca8d79de096c65b9b9c867259b3ff4685f775ef
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Aug 2 08:33:56 2007 +0200
+
+ ppc4xx: Code cleanup
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit c92409812206ac67a7fa7aae298539a9c3804a46
+Author: Grzegorz Bernacki <gjb@semihalf.com>
+Date: Tue Jul 31 18:51:48 2007 +0200
+
+ [ppc440SPe] Graceful recovery from machine check during PCIe configuration
+
+ During config transactions on the PCIe bus an attempt to scan for a
+ non-existent device can lead to a machine check exception with certain
+ peripheral devices. In order to avoid crashing in such scenarios the
+ instrumented versions of the config cycle read routines are introduced, so
+ the exceptions fixups framework can gracefully recover.
+
+ Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
+ Acked-by: Rafal Jaworowski <raj@semihalf.com>
+
+commit dec99558b9ea75a37940d07f41a3565a50b54ad1
+Author: Rafal Jaworowski <raj@semihalf.com>
+Date: Tue Jul 31 18:19:54 2007 +0200
+
+ [ppc4xx] Separate settings for PCIe bus numbering on 440SPe rev.A
+
+ This brings back separate settings for PCIe bus numbers depending on chip
+ revision, which got eliminated in 2b393b0f0af8402ef43b25c1968bfd29714ddffa
+ commit. 440SPe rev. A does NOT work properly with the same settings as for
+ the rev. B (no devices are seen on the bus during enumeration).
+
+ Signed-off-by: Rafal Jaworowski <raj@semihalf.com>
+
+commit cdd917a43da6fa7fc8f54a3cc9f420ce5ecf3197
+Author: Wolfgang Denk <wd@denx.de>
+Date: Thu Aug 2 00:48:45 2007 +0200
+
+ Fix build errors and warnings / code cleanup.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit d2f68006627eda6cb6c7f364bddf621dbfd2fc68
+Author: Eugene OBrien <eugene.obrien@advantechamt.com>
+Date: Tue Jul 31 10:24:56 2007 +0200
+
+ ppc4xx: Update AMCC Bamboo 440EP support
+
+ Changed storage type of cfg_simulate_spd_eeprom to const
+ Changed storage type of gpio_tab to stack storage
+ (Cannot access global data declarations in .bss until afer code relocation)
+
+ Improved SDRAM tests to catch problems where data is not uniquely addressable
+ (e.g. incorrectly programmed SDRAM row or columns)
+
+ Added CONFIG_PROG_SDRAM_TLB to support Bamboo SIMM/DIMM modules
+ Fixed AM29LV320DT (OpCode Flash) sector map
+
+ Signed-off-by: Eugene OBrien <eugene.obrien@advantechamt.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit ea9f6bce383cc9fbcdee28b5836109b1a6dba574
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Jul 31 08:37:01 2007 +0200
+
+ ppc4xx: Update 440EPx lwmon5 board support
+
+ - Clear ECC status regs after ECC POST test
+ - Set dcbz for ECC generation with caches enabled as default
+ - Code cleanup
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 27a528fb41433c4c1e2b5d6bd3fd8d78606fc724
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Jul 30 11:04:57 2007 +0200
+
+ ppc4xx: Only print ECC related info when the error bis are set
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit e36220a4baf1f188ba60f17e9d0f043069b1362a
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Fri Jul 27 16:44:31 2007 +0200
+
+ new FPGA image for PLU405 board
- Fix build errors and warnings / code cleanup.
+ new FPGA image for PLU405 board with improved CompactFlash timing
- Signed-off-by: Wolfgang Denk <wd@denx.de>
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
commit 8993e54b6f397973794f3d6f47d3b3c0c98dd4f6
Author: Rafal Jaworowski <raj@semihalf.com>
Signed-off-by: Rafal Jaworowski <raj@semihalf.com>
+commit d4024bb72dd81695ec099b2199eda0d27c623e62
+Author: John Otken <john@softadvances.com>
+Date: Thu Jul 26 17:49:11 2007 +0200
+
+ ppc4xx: Add support for AMCC 405EP Taihu board
+
+ Signed-off-by: John Otken <john@softadvances.com>
+
+commit b66091de6c7390620312c2501db23d8391e7cabb
+Author: Anatolij Gustschin <agust@denx.de>
+Date: Thu Jul 26 15:08:01 2007 +0200
+
+ ppc4xx: lwmon5: Update Lime initialization
+
+ Change Lime SDRAM initialization to now support 100MHz and
+ 133MHz (if enabled). Also the framebuffer is initialized to
+ display a blue rectangle with a white border.
+
+ Signed-off-by: Anatolij Gustschin <agust@denx.de>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 9f24a808f17fc0f37b7fb4805f734741335caecc
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Jul 24 09:52:52 2007 +0200
+
+ ppc4xx: lwmon5: Support for 128 MByte NOR FLASH added
+
+ The used Intel NOR FLASH chips have internally two dies, and are now
+ treated as two seperate chips.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit aedf5bde179ecfbd0a96130d18996a96518b785f
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Jul 24 07:20:09 2007 +0200
+
+ ppc4xx: Fix lwmon5 interrupt controller setup (polarity, trigger...)
+
+ As suggested by Hakan Eryigit, here an updated setup for the lwmon5
+ interrupt controller.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit a71d96eac8130b53a91f93cd10c70fca0db18d52
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Jul 20 15:03:44 2007 +0200
+
+ ppc4xx: Fix bug with default GPIO output value
+
+ As spotted by Matthias Fuchs, the default output values for all GPIO1
+ outputs were not setup correctly. This patch fixes this issue.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 531e3e8b831f357056448fa573137d5fb37000fd
+Author: Pavel Kolesnikov <concord@emcraft.com>
+Date: Fri Jul 20 15:03:03 2007 +0200
+
+ POST: Add ECC POST for the lwmon5 board
+
+ This patch adds ECC Post test for the Lwmon5 board based
+ on PPC440EPx to U-Boot.
+
+ Signed-off-by: Pavel Kolesnikov <concord@emcraft.com>
+ Acked-by: Yuri Tikhonov <yur@emcraft.com>
+ Acked-by: Stefan Roese <sr@denx.de>
+
commit cc3023b9f95d7ac959a764471a65001062aecf41
Author: Rafal Jaworowski <raj@semihalf.com>
Date: Thu Jul 19 17:12:28 2007 +0200
Signed-off-by: Rafal Jaworowski <raj@semihalf.com>
+commit c883f6ea32dce91f07670b3aafecf6c99b1e5341
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Jul 16 13:11:12 2007 +0200
+
+ Coding style cleanup
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 8848ec858f74ed6dab06fb6d5ddc933e0a1328bf
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Jul 16 10:02:12 2007 +0200
+
+ ppc4xx: Code cleanup
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 2a49fc17d09020e7ebd9536694d99d20e419fcb8
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Jul 16 10:01:38 2007 +0200
+
+ ppc4xx: AMCC Luan uses the new boardspecific DDR2 controller setup
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit df3f17422aeb03fb81a7ac8c78d2b05d05aa4cf9
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Jul 16 10:00:43 2007 +0200
+
+ ppc4xx: Support for Yucca board with 440SPe Rev A added to 44x_spd_ddr2.c
+
+ The new boardspecific DDR2 controller configuration is used for the Yucca
+ board. Now the Yucca board with 440SPe Rev. A chips is also supported.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 6ed14addf97c8cd8f531e9ae7b2d3e222fffd53e
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Jul 16 09:57:00 2007 +0200
+
+ ppc4xx: Add new weak functions to support boardspecific DDR2 configuration
+
+ The new "weak" functions ddr_wrdtr() and ddr_clktr() are added to better
+ support non default, boardspecific DDR(2) controller configuration.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 5743a9207a370b90f09b20ebd61167c806b937f3
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Jul 16 08:53:51 2007 +0200
+
+ ppc4xx: Add remove_tlb() function to remove a mem area from TLB setup
+
+ The new function remove_tlb() can be used to remove the TLB's used to
+ map a specific memory region. This is especially useful for the DDR(2)
+ setup routines which configure the SDRAM area temporarily as a cached
+ area (for speedup on auto-calibration and ECC generation) and later
+ need this area uncached for normal usage.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
commit 3a6cab844cf74f76639d795e0be8717e02c86af7
Author: Wolfgang Denk <wd@denx.de>
Date: Sat Jul 14 22:51:02 2007 +0200
Signed-off-by: Heiko Schocher <hs@denx.de>
+commit a2e1c7098cf9574386b0c96841dfc8ea5cc93578
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Jul 12 16:32:08 2007 +0200
+
+ ppc4xx: Change receive buffer handling in the 4xx emac driver
+
+ This change fixes a bug in the receive buffer handling, that
+ could lead to problems upon high network traffic (broadcasts...).
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
commit 239f05ee4dd4cfe0b50f251b533dcebe9e67c360
Author: Wolfgang Denk <wd@denx.de>
Date: Thu Jul 12 01:45:34 2007 +0200
Signed-off-by: Stefan Roese <sr@denx.de>
+commit 0dca874db62718e41253659e60f3a1de7eb418ce
+Author: TsiChung <tcliew@Goku.(none)>
+Date: Tue Jul 10 15:45:43 2007 -0500
+
+ Cache update and added CFG_UNIFY_CACHE
+
+ Enabled cache in cpu_init_f() for faster flash to mem allocation. Updated cache handling in start.S. Applied cache invalidate in fec_send() and fec_recv(). Added CFG_UNIFY_CACHE for CF V3 only.
+
+ Signed-off-by: TsiChung <tcliew@Goku.(none)>
+
+commit 52b017604a8f4d4a795880ef6e7861d7f2f1b005
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Thu Jul 5 23:36:16 2007 -0500
+
+ Update header file. Include dtimer_intr_setup(). Changed timer divider to global define.
+
+ Include immap.h and timer.h. Moved dtimer interrupt setup to dtimer_intr_setup() from cpu/mcf532x/interrupts.c. Changed (CFG_CLK /1000000) -1 << 8 to CFG_TIMER_PRESCALER
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit 5cdc07c7ef8f08ea55d3c47ed9221d91aa6d5fac
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Thu Jul 5 23:31:25 2007 -0500
+
+ Update header files
+
+ Include immap.h and renamed mcfrtc.h to rtc.h
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit 2870e98ac8e5553e9187b12a47e5f46babb53990
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Thu Jul 5 23:29:21 2007 -0500
+
+ Add mcffec_initialize()
+
+ Added mcffec_initialize() in eth_initialize()
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit 45a25bfd0c52f8a3fa137216bc94d32f90bedc5d
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Thu Jul 5 23:27:40 2007 -0500
+
+ Update header file and clean up
+
+ Include immap.h
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit 0cee9c66318602c856a899ae5fa7579ccba6443a
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Thu Jul 5 23:23:15 2007 -0500
+
+ New uart structure and defines
+
+ Seperated from mcfuart.h
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit a90e79de8d99e9c9d69d60bfff9f24c337165900
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Thu Jul 5 23:22:31 2007 -0500
+
+ New timer structure and defines
+
+ Seperated from mcftimer.h
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit e04acb2eba4782489417240eff76e20e176aec10
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Thu Jul 5 23:21:09 2007 -0500
+
+ Rename mcfrtc to rtc
+
+ Since it is already in m68k folder, un-necessary to pad mcf. Replaced immap_5329.h and m5329.h to immap.h
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit 2bd806fe4fc23958b8f78778199e7a6e3f8f6ad5
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Thu Jul 5 23:17:36 2007 -0500
+
+ Rename mcfserial.c. Update include header
+
+ Renamed mcfserial.c to mcfuart.c. Modified Makefile for mcfuart.o from mcfserial.o. Replace immap_5329.h and m5329.h to immap.h
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit f2208fbc2eb9de3f4285bfaa021c6ebae16c9b0e
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Thu Jul 5 23:13:58 2007 -0500
+
+ Header file update, clean up and cache handling
+
+ Replaced immap_5329.h and m5329.h with immap.h. Included cache_invalid.
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit 2e3f25ae9082daa9f5d181db45dfbc2e52ce0f97
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Thu Jul 5 23:10:40 2007 -0500
+
+ Create interrupts.c and modify Makefile
+
+ interrupt_init() and dtimer_intr_setup() are placed in interrupts.c. Added interrupts.o to Makefile
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit ddd104f1ed655eda50c06ba636237a83ed943f34
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Thu Jul 5 23:06:55 2007 -0500
+
+ Enable Icache
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit b9bf3de377b2bae70c983c9b97feae914999e735
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Thu Jul 5 23:05:31 2007 -0500
+
+ Update header file and some clean up
+
+ Replaced immap_5329.h and m5329.h with immap.h. Removed whitespaces.
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit 84a015b52ec820a5ae173717d78516de731c89c2
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Thu Jul 5 23:03:28 2007 -0500
+
+ Update header file and enable icache
+
+ Replaced immap_5329.h and m5329.h with immap.h. Enabled icache_enable() in cpu_init_r().
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit 7a17e759c7a8b58e910daf54df611e94fc8ca074
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Thu Jul 5 23:01:22 2007 -0500
+
+ Update header file and removed interrupt_init()
+
+ Replace immap_5329.h and m5329.h with immap.h. Removed interrupt_init() and placed it in interrupts.c
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit 3b635492c95bd0d6e08f93f699821cba1f602a64
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Thu Jul 5 22:57:46 2007 -0500
+
+ Update for flash.o and mii.o
+
+ Removed flash.o and added mii.o
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit c5ded275d839e4ff79f41718d50a835d989f57bc
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Thu Jul 5 22:56:19 2007 -0500
+
+ MII functions calls.
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit 427c814104560e29bda14955c67703245aaaa5b4
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Thu Jul 5 22:54:42 2007 -0500
+
+ Removed MII functions and replaced immap_5329.h and m5329.h with immap.h.
+
+ The removed MII routines will be placed in mii.c.
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit 01a793fda09c63df5a496f09dc1c7cb26e6751a2
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Thu Jul 5 22:51:05 2007 -0500
+
+ Duplicate code
+
+ There is a Common Flash Interface Driver existed. To use the CFI driver, define CFG_FLASH_CFI in configuration file.
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit 2744354a8437b8f78db178e30660215688bff570
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Thu Jul 5 22:46:38 2007 -0500
+
+ Seperate old structure defines and new structure defines
+
+ Removed new uart structure and defines to uart.h
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit 2bd58608dbcff8890ca9a0c59e861ac24f8bb230
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Thu Jul 5 22:45:01 2007 -0500
+
+ Seperate old structure defines and new structure defines
+
+ New timer structure and defines will move to new timer.h
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit 8cd5cd6de4ff92e03978338ed7aeb3ce7b7b9784
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Thu Jul 5 22:42:23 2007 -0500
+
+ Clean up
+
+ Removed whitespace
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit 514871f565dd8bd1121e4a3ac1665a790e20b8f2
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Thu Jul 5 22:41:24 2007 -0500
+
+ Clean up
+
+ Replaced whitespace with tabs
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit 48dbfeabc7afffe30609a4489f10c22cb67ef7dd
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Thu Jul 5 22:39:07 2007 -0500
+
+ Create new header file and move peripherals base address from configs file to new header file.
+
+ Create new header file to include immap_5xxx.h and m5xxx.h and to share among drivers without update in driver file each processor is added. Moved peripherals base address and defines from configs file to immap.h.
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit be296e31c4411f96d9cb3d2afc8fcb006867abfa
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Thu Jul 5 22:24:58 2007 -0500
+
+ Revert file mode
+
+ Changed MAKEALL file mode to executable, removed executable file mode from Makefile
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
commit b3aff0cb9ecf236d7e8c93761dd1dadf6837a582
Author: Jon Loeliger <jdl@freescale.com>
Date: Tue Jul 10 11:19:50 2007 -0500
Signed-off-by: Wolfgang Denk <wd@denx.de>
+commit c8603cfbd4573379a6076c9c208545ba2bbf019a
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Jul 9 11:00:24 2007 +0200
+
+ Small coding style cleanup
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 0f92c7e7c9a62755b1457d3c46f93c8c1f6c19fc
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Mon Jul 9 10:10:08 2007 +0200
+
+ Migrate esd 405EP boards to new NAND subsystem
+
+ Remove unused CFG_NAND_LEGACY define
+
+ These boards to not have NAND.
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+
+commit bd84ee4c2020c3a6861f4bb2e7ea0fb49f82e803
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Mon Jul 9 10:10:06 2007 +0200
+
+ Migrate esd 405EP boards to new NAND subsystem
+
+ Migrate esd 405EP boards to new NAND subsystem
+
+ -cleanup
+ -use correct io accessors (in/out_be32())
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+
+commit e09f7ab5749c345f924da272bea0521a73af5b11
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Mon Jul 9 10:10:04 2007 +0200
+
+ Migrate esd 405EP boards to new NAND subsystem
+
+ This patch prepares the migration from the legacy NAND driver
+ to U-Boot's new NAND subsystem for esd boards.
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+
commit c3517f919d0f61650cf3027fd4faf0f631142f6c
Author: Jon Loeliger <jdl@freescale.com>
Date: Sun Jul 8 18:10:08 2007 -0500
Signed-off-by: Jon Loeliger <jdl@freescale.com>
+commit 10e038932f22ee80ebd53de312531e70e6590a2f
+Author: Thomas Knobloch <knobloch@siemens.com>
+Date: Fri Jul 6 14:58:39 2007 +0200
+
+ [NAND] Bad block skipping for command nboot
+
+ The old implementation of command nboot does not support reading the image from
+ NAND flash with skipping of bad blocks. The patch implements a new version of
+ the nboot command: by calling nboot.jffs2 from the u-boot command line the
+ command will load the image from NAND flash with respect to bad blocks (by using
+ nand_read_opts()). This is similar to e.g. the NAND read command: "nand
+ read.jffs2 ...".
+
+ Signed-off-by: Thomas Knobloch <knobloch@siemens.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 334043f601a90ac53e5ecc846fbb73a1ef38cb1f
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Jul 6 12:26:51 2007 +0200
+
+ ppc4xx: Update lwmon5 default environment
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 5d187430a055d62f17ca84d75e7245439d1f7e75
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Jul 6 11:48:24 2007 +0200
+
+ ppc4xx: Update lwmon5 board
+
+ Add unlock=yes environment variable to default variables to unlock
+ the CFI flash by default.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
commit 6b0a174a1e6f55e1f5a1fbb223cdad7645a4646e
Author: Stefan Roese <sr@denx.de>
Date: Fri Jul 6 09:45:47 2007 +0200
- adapt to the more generic EXCEPTION_PROLOG and CRIT_EXCEPTION macros
- minor 4xx cleanup
+commit d677b32855f577ae2690dcd64a172cdd706e0ffc
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Fri Jun 22 10:34:12 2007 +0200
+
+ [patch] add nand_init() prototype to nand.h
+
+ since nand_init() is expected to be called by other parts of u-boot, there
+ should be a prototype for it in nand.h
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
commit 83b4cfa3d629dff0264366263c5e94d9a50ad80b
Author: Wolfgang Denk <wd@denx.de>
Date: Wed Jun 20 18:14:24 2007 +0200
Signed-off-by: Stefan Roese <sr@denx.de>
+commit 8e585f02f82c17cc66cd229dbf0fd3066bbbf658
+Author: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+Date: Mon Jun 18 13:50:13 2007 -0500
+
+ Added M5329AFEE and M5329BFEE Platforms
+
+ Added board/freescale/m5329evb, cpu/mcf532x, drivers/net,
+ drivers/serial, immap_5329.h, m5329.h, mcfrtc.h,
+ include/configs/M5329EVB.h, lib_m68k/interrupts.c, and
+ rtc/mcfrtc.c
+
+ Modified CREDITS, MAKEFILE, Makefile, README, common/cmd_bdinfo.c,
+ common/cmd_mii.c, include/asm-m68k/byteorder.h, include/asm-m68k/fec.h,
+ include/asm-m68k/io.h, include/asm-m68k/mcftimer.h,
+ include/asm-m68k/mcfuart.h, include/asm-m68k/ptrace.h,
+ include/asm-m68k/u-boot.h, lib_m68k/Makefile, lib_m68k/board.c,
+ lib_m68k/time.c, net/eth.c and rtc/Makefile
+
+ Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+
commit e73846b7cf1e29ae635bf9bb5570269663df2ee5
Author: Stefan Roese <sr@denx.de>
Date: Fri Jun 15 11:33:41 2007 +0200
Signed-off-by: Benoit Monin <bmonin@adeneo.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
+commit f539edc076cfe52bff919dd512ba8d7af0e22092
+Author: Vadim Bendebury <vbendeb@google.com>
+Date: Thu May 24 15:52:25 2007 -0700
+
+ cosmetic changes to bcm570x driver
+
+ This is a cosmetic only changes submission.
+ It affects files relevant to bcm570x driver.
+ the commands used to generate this change was
+
+ cd drivers
+ Lindent -pcs -l80 bcm570x.c bcm570x_lm.h bcm570x_mm.h tigon3.c tigon3.h
+
+ The BMW target (the only one using this chip so far) builds cleanly, the
+ `before and after' generated object files for drivers/bcm570x.c and
+ drivers/tigon3.o are identical as reported by objdump -d
+
+ Signed-off-by: Vadim Bendebury <vbendeb@google.com>
+ Signed-off-by: Ben Warren <bwarren@qstreams.com>
+
commit 725671ccd2cd04c9ebc50c9e5a94dd8cbade66b7
Author: Wolfgang Denk <wd@denx.de>
Date: Wed Jun 6 16:26:56 2007 +0200
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Acked-by: Bartlomiej Sieka <tur@semihalf.com>
+commit 7ebb4479b07ff294eb4d76e420753a0349f7c93b
+Author: Ulf Samuelsson <ulf@atmel.com>
+Date: Thu May 24 12:12:47 2007 +0200
+
+ [PATCH][NAND] Define the Vendor Id for Micron NAND Flash
+
+ Signed-off-by: Ulf Samuelsson <ulf@atmel.com>
+ Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
commit d756894722c888d09a9fa1df8323753772d3dcce
Author: Stefan Roese <sr@denx.de>
Date: Thu May 24 09:49:00 2007 +0200
Signed-off-by Dan Malek, <dan@embeddedalley.com>
+commit f2134f8e9eb006bdcd729e89f309c07b2fa45180
+Author: Haavard Skinnemoen <hskinnemoen@atmel.com>
+Date: Wed May 2 13:31:53 2007 +0200
+
+ macb: Don't restart autonegotiation if we already have link
+
+ Rework macb_phy_init so that it doesn't attempt to re-negotiate if the
+ link is already up.
+
+ Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
+
+commit 04fcb5d38bc90779cd9a710d60702075986f0e29
+Author: Haavard Skinnemoen <hskinnemoen@atmel.com>
+Date: Wed May 2 13:22:38 2007 +0200
+
+ macb: Introduce a few barriers when dealing with DMA descriptors
+
+ There were a few theoretical possibilities that the compiler might
+ optimize away DMA descriptor reads and/or writes and thus cause
+ synchronization problems with the hardware. Insert barriers where
+ we depend on reads/writes actually hitting memory.
+
+ Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
+
commit ffa621a0d12a1ccd81c936c567f8917a213787a8
Author: Andy Fleming <afleming@freescale.com>
Date: Sat Feb 24 01:08:13 2007 -0600
projects / karo-tx-uboot.git / blobdiff