LIBS-y += arch/$(ARCH)/imx-common/libimx-common.o
endif
-ifeq ($(SOC),s5pc1xx)
-LIBS-y += $(CPUDIR)/s5p-common/libs5p-common.o
-endif
-ifeq ($(SOC),exynos)
-LIBS-y += $(CPUDIR)/s5p-common/libs5p-common.o
-endif
LIBS-$(CONFIG_ARM) += arch/arm/cpu/libcpu.o
LIBS := $(addprefix $(obj),$(sort $(LIBS-y)))
all: $(ALL-y) $(SUBDIR_EXAMPLES)
$(obj)u-boot.dtb: checkdtc $(obj)u-boot
- $(MAKE) -C dts binary
+ $(MAKE) $(build) dts binary
mv $(obj)dts/dt.dtb $@
$(obj)u-boot-dtb.bin: $(obj)u-boot.bin $(obj)u-boot.dtb
$(obj)u-boot.sb: $(obj)u-boot.bin $(obj)spl/u-boot-spl.bin
- $(MAKE) -C $(SRCTREE)/$(CPUDIR)/$(SOC)/ $(OBJTREE)/u-boot.sb
+ $(MAKE) $(build) $(SRCTREE)/$(CPUDIR)/$(SOC)/ $(OBJTREE)/u-boot.sb
# On x600 (SPEAr600) U-Boot is appended to U-Boot SPL.
# Both images are created using mkimage (crc etc), so that the ROM
$(GEN_UBOOT) $(obj)common/system_map.o
endif
-# Tentative step for Kbuild-style makefiles coexist with conventional U-Boot style makefiles
-# U-Boot conventional sub makefiles always include some other makefiles.
-# So, the build system searches a line beginning with "include" before entering into the sub makefile
-# in order to distinguish which style it is.
-# If the Makefile include a "include" line, we assume it is an U-Boot style makefile.
-# Otherwise, it is treated as a Kbuild-style makefile.
-select_makefile = \
- +if grep -q "^include" $1/Makefile; then \
- $(MAKE) -C $1; \
- else \
- $(MAKE) -C $1 -f $(TOPDIR)/scripts/Makefile.build; \
- mv $(dir $@)built-in.o $@; \
- fi
-
-# We do not need to build $(OBJS) explicitly.
-# It is built while we are at $(CPUDIR)/lib$(CPU).o build.
-$(OBJS): depend
- if grep -q "^include" $(CPUDIR)/Makefile; then \
- $(MAKE) -C $(CPUDIR) $(if $(REMOTE_BUILD),$@,$(notdir $@)); \
- fi
+$(OBJS):
+ @:
$(LIBS): depend $(SUBDIR_TOOLS)
- +$(call select_makefile, $(dir $(subst $(obj),,$@)))
+ $(MAKE) $(build) $(dir $(subst $(obj),,$@))
+ mv $(dir $@)built-in.o $@
$(LIBBOARD): depend $(LIBS)
- +$(call select_makefile, $(dir $(subst $(obj),,$@)))
+ $(MAKE) $(build) $(dir $(subst $(obj),,$@))
+ mv $(dir $@)built-in.o $@
$(SUBDIRS): depend
$(MAKE) -C $@ all
updater:
$(MAKE) -C tools/updater all
-select_makefile2 = \
- if grep -q "^include" $1/Makefile; then \
- $(MAKE) -C $1 _depend; \
- else \
- $(MAKE) -C $1 -f $(TOPDIR)/scripts/Makefile.build _depend; \
- fi
-
# Explicitly make _depend in subdirs containing multiple targets to prevent
# parallel sub-makes creating .depend files simultaneously.
depend dep: $(TIMESTAMP_FILE) $(VERSION_FILE) \
$(obj)include/autoconf.mk \
$(obj)include/generated/generic-asm-offsets.h \
$(obj)include/generated/asm-offsets.h
- +for dir in $(SUBDIRS) $(CPUDIR) $(LDSCRIPT_MAKEFILE_DIR) ; do \
- $(call select_makefile2, $$dir); \
- done
TAG_SUBDIRS = $(SUBDIRS)
TAG_SUBDIRS += $(dir $(__LIBS))