armv8/fsl-lsch3: Use correct compatible for serial clock fixup

[karo-tx-uboot.git] / README

diff --git a/README b/README
index 651260e9e074ddb86887abd034cb5604166963d1..0a5b4bd65311f180cb257128b49a16d38cc5fd8f 100644 (file)
--- a/README
+++ b/README
@@ -690,6 +690,14 @@ The following options need to be configured:
                exists, unlike the similar options in the Linux kernel. Do not
                set these options unless they apply!
 
+               COUNTER_FREQUENCY
+               Generic timer clock source frequency.
+
+               COUNTER_FREQUENCY_REAL
+               Generic timer clock source frequency if the real clock is
+               different from COUNTER_FREQUENCY, and can only be determined
+               at run time.
+
                NOTE: The following can be machine specific errata. These
                do have ability to provide rudimentary version and machine
                specific checks, but expect no product checks.
@@ -4994,6 +5002,9 @@ Low Level (hardware related) configuration options:
 - CONFIG_FSL_DDR_SYNC_REFRESH
                Enable sync of refresh for multiple controllers.
 
+- CONFIG_FSL_DDR_BIST
+               Enable built-in memory test for Freescale DDR controllers.
+
 - CONFIG_SYS_83XX_DDR_USES_CS0
                Only for 83xx systems. If specified, then DDR should
                be configured using CS0 and CS1 instead of CS2 and CS3.