#
-# (C) Copyright 2000 - 2009
+# (C) Copyright 2000 - 2011
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
system clock. On most PQ3 devices this is 8, on newer QorIQ
devices it can be 16 or 32. The ratio varies from SoC to Soc.
+ CONFIG_SYS_FSL_PCIE_COMPAT
+
+ Defines the string to utilize when trying to match PCIe device
+ tree nodes for the given platform.
+
- Intel Monahans options:
CONFIG_SYS_MONAHANS_RUN_MODE_OSC_RATIO
(requires CONFIG_CMD_MEMORY)
CONFIG_CMD_SOURCE "source" command Support
CONFIG_CMD_SPI * SPI serial bus support
+ CONFIG_CMD_TFTPSRV * TFTP transfer in server mode
CONFIG_CMD_USB * USB support
CONFIG_CMD_VFD * VFD support (TRAB)
CONFIG_CMD_CDP * Cisco Discover Protocol support
- Watchdog:
CONFIG_WATCHDOG
If this variable is defined, it enables watchdog
- support. There must be support in the platform specific
- code for a watchdog. For the 8xx and 8260 CPUs, the
- SIU Watchdog feature is enabled in the SYPCR
- register.
+ support for the SoC. There must be support in the SoC
+ specific code for a watchdog. For the 8xx and 8260
+ CPUs, the SIU Watchdog feature is enabled in the SYPCR
+ register. When supported for a specific SoC is
+ available, then no further board specific code should
+ be needed to use it.
+
+ CONFIG_HW_WATCHDOG
+ When using a watchdog circuitry external to the used
+ SoC, then define this variable and provide board
+ specific code for the "hw_watchdog_reset" function.
- U-Boot Version:
CONFIG_VERSION_VARIABLE
driver in use must provide a function: mcast() to join/leave a
multicast group.
- CONFIG_BOOTP_RANDOM_DELAY
- BOOTP Recovery Mode:
CONFIG_BOOTP_RANDOM_DELAY