exists, unlike the similar options in the Linux kernel. Do not
set these options unless they apply!
+ COUNTER_FREQUENCY
+ Generic timer clock source frequency.
+
+ COUNTER_FREQUENCY_REAL
+ Generic timer clock source frequency if the real clock is
+ different from COUNTER_FREQUENCY, and can only be determined
+ at run time.
+
NOTE: The following can be machine specific errata. These
do have ability to provide rudimentary version and machine
specific checks, but expect no product checks.
bytes are output before the console is initialised, the
earlier bytes are discarded.
+ Note that when printing the buffer a copy is made on the
+ stack so CONFIG_PRE_CON_BUF_SZ must fit on the stack.
+
'Sane' compilers will generate smaller code if
CONFIG_PRE_CON_BUF_SZ is a power of 2
CONFIG_AUTOBOOT_PROMPT
CONFIG_AUTOBOOT_DELAY_STR
CONFIG_AUTOBOOT_STOP_STR
- CONFIG_AUTOBOOT_DELAY_STR2
- CONFIG_AUTOBOOT_STOP_STR2
CONFIG_ZERO_BOOTDELAY_CHECK
CONFIG_RESET_TO_RETRY
Monitor commands can be included or excluded
from the build by using the #include files
<config_cmd_all.h> and #undef'ing unwanted
- commands, or using <config_cmd_default.h>
- and augmenting with additional #define's
- for wanted commands.
+ commands, or adding #define's for wanted commands.
The default command configuration includes all commands
except those marked below with a "*".
boot. See the documentation file README.video for a
description of this variable.
- CONFIG_VIDEO_VGA
-
- Enable the VGA video / BIOS for x86. The alternative if you
- are using coreboot is to use the coreboot frame buffer
- driver.
-
- Keyboard Support:
CONFIG_KEYBOARD
Some PHY like Intel LXT971A need extra delay after
command issued before MII status register can be read
-- Ethernet address:
- CONFIG_ETHADDR
- CONFIG_ETH1ADDR
- CONFIG_ETH2ADDR
- CONFIG_ETH3ADDR
- CONFIG_ETH4ADDR
- CONFIG_ETH5ADDR
-
- Define a default value for Ethernet address to use
- for the respective Ethernet interface, in case this
- is not determined automatically.
-
- IP address:
CONFIG_IPADDR
- define slave for bus 3 with CONFIG_SYS_MXC_I2C3_SLAVE
If those defines are not set, default value is 100000
for speed, and 0 for slave.
+ - enable bus 3 with CONFIG_SYS_I2C_MXC_I2C3
+ - enable bus 4 with CONFIG_SYS_I2C_MXC_I2C4
- drivers/i2c/rcar_i2c.c:
- activate this driver with CONFIG_SYS_I2C_RCAR
completely disabled. Anybody can change or delete
these parameters.
- Alternatively, if you #define _both_ CONFIG_ETHADDR
- _and_ CONFIG_OVERWRITE_ETHADDR_ONCE, a default
+ Alternatively, if you define _both_ an ethaddr in the
+ default env _and_ CONFIG_OVERWRITE_ETHADDR_ONCE, a default
Ethernet address is installed in the environment,
which can be changed exactly ONCE by the user. [The
serial# is unaffected by this, i. e. it remains
this is instead controlled by the value of
/config/load-environment.
+- Parallel Flash support:
+ CONFIG_SYS_NO_FLASH
+
+ Traditionally U-boot was run on systems with parallel NOR
+ flash. This option is used to disable support for parallel NOR
+ flash. This option should be defined if the board does not have
+ parallel flash.
+
+ If this option is not defined one of the generic flash drivers
+ (e.g. CONFIG_FLASH_CFI_DRIVER or CONFIG_ST_SMI) must be
+ selected or the board must provide an implementation of the
+ flash API (see include/flash.h).
+
- DataFlash Support:
CONFIG_HAS_DATAFLASH
memories can be connected with a given cs line.
Currently Xilinx Zynq qspi supports these type of connections.
- CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
- enable the W#/Vpp signal to disable writing to the status
- register on ST MICRON flashes like the N25Q128.
- The status register write enable/disable bit, combined with
- the W#/VPP signal provides hardware data protection for the
- device as follows: When the enable/disable bit is set to 1,
- and the W#/VPP signal is driven LOW, the status register
- nonvolatile bits become read-only and the WRITE STATUS REGISTER
- operation will not execute. The only way to exit this
- hardware-protected mode is to drive W#/VPP HIGH.
+ CONFIG_SPI_FLASH_MTD spi-flash MTD layer
+
+ Define this option to use mtd support for spi flash layer, this
+ adapter is for translating mtd_read/mtd_write commands into
+ spi_flash_read/spi_flash_write commands. It is not intended to
+ use it within sf_cmd or the SPI flash subsystem. Such an adapter
+ is needed for subsystems like UBI which can only operate on top
+ of the MTD layer.
+
+ CONFIG_SPI_FLASH_DATAFLASH SPI based Dataflash
+
+ Define this option to access AT45xxx Dataflash chips support
+ using spi flash interface.
- SystemACE Support:
CONFIG_SYSTEMACE
example, some LED's) on your board. At the moment,
the following checkpoints are implemented:
-- Detailed boot stage timing
- CONFIG_BOOTSTAGE
- Define this option to get detailed timing of each stage
- of the boot process.
-
- CONFIG_BOOTSTAGE_USER_COUNT
- This is the number of available user bootstage records.
- Each time you call bootstage_mark(BOOTSTAGE_ID_ALLOC, ...)
- a new ID will be allocated from this stash. If you exceed
- the limit, recording will stop.
-
- CONFIG_BOOTSTAGE_REPORT
- Define this to print a report before boot, similar to this:
-
- Timer summary in microseconds:
- Mark Elapsed Stage
- 0 0 reset
- 3,575,678 3,575,678 board_init_f start
- 3,575,695 17 arch_cpu_init A9
- 3,575,777 82 arch_cpu_init done
- 3,659,598 83,821 board_init_r start
- 3,910,375 250,777 main_loop
- 29,916,167 26,005,792 bootm_start
- 30,361,327 445,160 start_kernel
-
- CONFIG_CMD_BOOTSTAGE
- Add a 'bootstage' command which supports printing a report
- and un/stashing of bootstage data.
-
- CONFIG_BOOTSTAGE_FDT
- Stash the bootstage information in the FDT. A root 'bootstage'
- node is created with each bootstage id as a child. Each child
- has a 'name' property and either 'mark' containing the
- mark time in microsecond, or 'accum' containing the
- accumulated time for that bootstage id in microseconds.
- For example:
-
- bootstage {
- 154 {
- name = "board_init_f";
- mark = <3575678>;
- };
- 170 {
- name = "lcd";
- accum = <33482>;
- };
- };
-
- Code in the Linux kernel can find this in /proc/devicetree.
Legacy uImage format:
list, simply add an entry for the same variable name to the
".flags" variable.
+ If CONFIG_REGEX is defined, the variable_name above is evaluated as a
+ regular expression. This allows multiple variables to define the same
+ flags without explicitly listing them for each variable.
+
- CONFIG_ENV_ACCESS_IGNORE_FORCE
If defined, don't allow the -f switch to env set override variable
access flags.
- CONFIG_FSL_DDR_SYNC_REFRESH
Enable sync of refresh for multiple controllers.
+- CONFIG_FSL_DDR_BIST
+ Enable built-in memory test for Freescale DDR controllers.
+
- CONFIG_SYS_83XX_DDR_USES_CS0
Only for 83xx systems. If specified, then DDR should
be configured using CS0 and CS1 instead of CS2 and CS3.
flash or offset in NAND flash.
*Note* - these variables don't have to be defined for all boards, some
-boards currenlty use other variables for these purposes, and some
+boards currently use other variables for these purposes, and some
boards use these variables for other purposes.
Image File Name RAM Address Flash Location
CONFIG_ENV_CALLBACK_LIST_DEFAULT to a list (string) to define the
".callbacks" environment variable in the default or embedded environment.
+If CONFIG_REGEX is defined, the variable_name above is evaluated as a
+regular expression. This allows multiple variables to be connected to
+the same callback without explicitly listing them all out.
+
Command Line Parsing:
=====================
warning is printed.
o If neither SROM nor the environment contain a MAC address, an error
- is raised.
+ is raised. If CONFIG_NET_RANDOM_ETHADDR is defined, then in this case
+ a random, locally-assigned MAC is used.
If Ethernet drivers implement the 'write_hwaddr' function, valid MAC addresses
will be programmed into hardware as part of the initialization process. This