See board/sandbox/README.sandbox for more details.
+Board Initialisation Flow:
+--------------------------
+
+This is the intended start-up flow for boards. This should apply for both
+SPL and U-Boot proper (i.e. they both follow the same rules). At present SPL
+mostly uses a separate code path, but the funtion names and roles of each
+function are the same. Some boards or architectures may not conform to this.
+At least most ARM boards which use CONFIG_SPL_FRAMEWORK conform to this.
+
+Execution starts with start.S with three functions called during init after
+that. The purpose and limitations of each is described below.
+
+lowlevel_init():
+ - purpose: essential init to permit execution to reach board_init_f()
+ - no global_data or BSS
+ - there is no stack (ARMv7 may have one but it will soon be removed)
+ - must not set up SDRAM or use console
+ - must only do the bare minimum to allow execution to continue to
+ board_init_f()
+ - this is almost never needed
+ - return normally from this function
+
+board_init_f():
+ - purpose: set up the machine ready for running board_init_r():
+ i.e. SDRAM and serial UART
+ - global_data is available
+ - stack is in SRAM
+ - BSS is not available, so you cannot use global/static variables,
+ only stack variables and global_data
+
+ Non-SPL-specific notes:
+ - dram_init() is called to set up DRAM. If already done in SPL this
+ can do nothing
+
+ SPL-specific notes:
+ - you can override the entire board_init_f() function with your own
+ version as needed.
+ - preloader_console_init() can be called here in extremis
+ - should set up SDRAM, and anything needed to make the UART work
+ - these is no need to clear BSS, it will be done by crt0.S
+ - must return normally from this function (don't call board_init_r()
+ directly)
+
+Here the BSS is cleared. For SPL, if CONFIG_SPL_STACK_R is defined, then at
+this point the stack and global_data are relocated to below
+CONFIG_SPL_STACK_R_ADDR. For non-SPL, U-Boot is relocated to run at the top of
+memory.
+
+board_init_r():
+ - purpose: main execution, common code
+ - global_data is available
+ - SDRAM is available
+ - BSS is available, all static/global variables can be used
+ - execution eventually continues to main_loop()
+
+ Non-SPL-specific notes:
+ - U-Boot is relocated to the top of memory and is now running from
+ there.
+
+ SPL-specific notes:
+ - stack is optionally in SDRAM, if CONFIG_SPL_STACK_R is defined and
+ CONFIG_SPL_STACK_R_ADDR points into SDRAM
+ - preloader_console_init() can be called here - typically this is
+ done by defining CONFIG_SPL_BOARD_INIT and then supplying a
+ spl_board_init() function containing this call
+ - loads U-Boot or (in falcon mode) Linux
+
+
+
Configuration Options:
----------------------
exists, unlike the similar options in the Linux kernel. Do not
set these options unless they apply!
+- Tegra SoC options:
+ CONFIG_TEGRA_SUPPORT_NON_SECURE
+
+ Support executing U-Boot in non-secure (NS) mode. Certain
+ impossible actions will be skipped if the CPU is in NS mode,
+ such as ARM architectural timer initialization.
+
- Driver Model
Driver model is a new framework for devices in U-Boot
introduced in early 2014. U-Boot is being progressively
SoC, then define this variable and provide board
specific code for the "hw_watchdog_reset" function.
+ CONFIG_AT91_HW_WDT_TIMEOUT
+ specify the timeout in seconds. default 2 seconds.
+
- U-Boot Version:
CONFIG_VERSION_VARIABLE
If this variable is defined, an environment variable
requests. Increasing this will allow U-Boot to accept offers
from a BOOTP client in networks with unusually high latency.
+- BOOTP Random transaction ID:
+ CONFIG_BOOTP_RANDOM_ID
+
+ The standard algorithm to generate a DHCP/BOOTP transaction ID
+ by using the MAC address and the current time stamp may not
+ quite unlikely produce duplicate transaction IDs from different
+ clients in the same network. This option creates a transaction
+ ID using the rand() function. Provided that the RNG has been
+ seeded well, this should guarantee unique transaction IDs
+ always.
+
- DHCP Advanced Options:
You can fine tune the DHCP functionality by defining
CONFIG_BOOTP_* symbols:
Enable the hash verify command (hash -v). This adds to code
size a little.
- CONFIG_SHA1 - support SHA1 hashing
- CONFIG_SHA256 - support SHA256 hashing
+ CONFIG_SHA1 - This option enables support of hashing using SHA1
+ algorithm. The hash is calculated in software.
+ CONFIG_SHA256 - This option enables support of hashing using
+ SHA256 algorithm. The hash is calculated in software.
+ CONFIG_SHA_HW_ACCEL - This option enables hardware acceleration
+ for SHA1/SHA256 hashing.
+ This affects the 'hash' command and also the
+ hash_lookup_algo() function.
+ CONFIG_SHA_PROG_HW_ACCEL - This option enables
+ hardware-acceleration for SHA1/SHA256 progressive hashing.
+ Data can be streamed in a block at a time and the hashing
+ is performed in hardware.
Note: There is also a sha1sum command, which should perhaps
be deprecated in favour of 'hash sha1'.
This enables the RSA algorithm used for FIT image verification
in U-Boot. See doc/uImage.FIT/signature.txt for more information.
+ The Modular Exponentiation algorithm in RSA is implemented using
+ driver model. So CONFIG_DM needs to be enabled by default for this
+ library to function.
+
The signing part is build into mkimage regardless of this
- option.
+ option. The software based modular exponentiation is built into
+ mkimage irrespective of this option.
- bootcount support:
CONFIG_BOOTCOUNT_LIMIT
CONFIG_FIT_SIGNATURE
This option enables signature verification of FIT uImages,
- using a hash signed and verified using RSA. See
- doc/uImage.FIT/signature.txt for more details.
+ using a hash signed and verified using RSA. If
+ CONFIG_SHA_PROG_HW_ACCEL is defined, i.e support for progressive
+ hashing is available using hardware, RSA library will use it.
+ See doc/uImage.FIT/signature.txt for more details.
WARNING: When relying on signed FIT images with required
signature check the legacy image format is default
If defined, specified the chip address of the EEPROM device.
The default address is zero.
+ - CONFIG_SYS_I2C_EEPROM_BUS:
+ If defined, specified the i2c bus of the EEPROM device.
+
- CONFIG_SYS_EEPROM_PAGE_WRITE_BITS:
If defined, the number of bits used to address bytes in a
single page in the EEPROM device. A 64 byte page, for example
- CONFIG_FSL_DDR_INTERACTIVE
Enable interactive DDR debugging. See doc/README.fsl-ddr.
+- CONFIG_FSL_DDR_SYNC_REFRESH
+ Enable sync of refresh for multiple controllers.
+
- CONFIG_SYS_83XX_DDR_USES_CS0
Only for 83xx systems. If specified, then DDR should
be configured using CS0 and CS1 instead of CS2 and CS3.