arc: cache - accommodate different L1 cache line lengths

[karo-tx-uboot.git] / arch / arc / include / asm / bitops.h

diff --git a/arch/arc/include/asm/bitops.h b/arch/arc/include/asm/bitops.h
index 85721aaee3e666da3fe6dbd2c23ed6e935384cca..370cb46e9f5afbef7a2bf1153e393654ec0bfe8c 100644 (file)
--- a/arch/arc/include/asm/bitops.h
+++ b/arch/arc/include/asm/bitops.h
@@ -16,4 +16,9 @@
 #define hweight16(x) generic_hweight16(x)
 #define hweight8(x) generic_hweight8(x)
 
+#include <asm-generic/bitops/fls.h>
+#include <asm-generic/bitops/__fls.h>
+#include <asm-generic/bitops/fls64.h>
+#include <asm-generic/bitops/__ffs.h>
+
 #endif /* __ASM_ARC_BITOPS_H */