0x08 PU/PD enable
0x10 PULLUP select
0x20 INPUT active
- 0x40 FAST slew rate
+ 0x40 FAST slew rate
*/
pinctrl_gpmc_1: gpmcgrp-1 {
pinctrl-single,pins = <
- 0x00 0x38 /* gpmc_ad0.gpmc_ad0 */
- 0x04 0x38 /* gpmc_ad1.gpmc_ad1 */
- 0x08 0x38 /* gpmc_ad2.gpmc_ad2 */
- 0x0c 0x38 /* gpmc_ad3.gpmc_ad3 */
- 0x10 0x38 /* gpmc_ad4.gpmc_ad4 */
- 0x14 0x38 /* gpmc_ad5.gpmc_ad5 */
- 0x18 0x38 /* gpmc_ad6.gpmc_ad6 */
- 0x1c 0x38 /* gpmc_ad7.gpmc_ad7 */
- 0x9c 0x18 /* gpmc_ben0_cle.gpmc_ben0_cle */
- 0x90 0x18 /* gpmc_advn_ale.gpmc_advn_ale */
- 0x7c 0x18 /* gpmc_csn0.gpmc_csn0 */
- 0x94 0x18 /* gpmc_oe_re.gpmc_oe_re */
- 0x98 0x18 /* gpmc_wen.gpmc_wen */
- 0x74 0x18 /* gpmc_wpn.gpmc_wpn */
- 0x70 0x38 /* gpmc_wait0.gpmc_wait0 */
+ 0x00 0x38 /* gpmc_ad0.gpmc_ad0, I/O | MODE0; GPMC_AD0 */
+ 0x04 0x38 /* gpmc_ad1.gpmc_ad1, I/O | MODE0; GPMC_AD0 */
+ 0x08 0x38 /* gpmc_ad2.gpmc_ad2, I/O | MODE0; GPMC_AD0 */
+ 0x0c 0x38 /* gpmc_ad3.gpmc_ad3, I/O | MODE0; GPMC_AD0 */
+ 0x10 0x38 /* gpmc_ad4.gpmc_ad4, I/O | MODE0; GPMC_AD0 */
+ 0x14 0x38 /* gpmc_ad5.gpmc_ad5, I/O | MODE0; GPMC_AD0 */
+ 0x18 0x38 /* gpmc_ad6.gpmc_ad6, I/O | MODE0; GPMC_AD0 */
+ 0x1c 0x38 /* gpmc_ad7.gpmc_ad7, I/O | MODE0; GPMC_AD0 */
+ 0x9c 0x18 /* gpmc_ben0_cle.gpmc_ben0_cle, OUTPUT | MODE0; GPMC_BEn0_CLE */
+ 0x90 0x18 /* gpmc_advn_ale.gpmc_advn_ale, OUTPUT | MODE0; GPMC_ADVn_ALE */
+ 0x7c 0x18 /* gpmc_csn0.gpmc_csn0, OUTPUT | MODE0; GPMC_CSn0 */
+ 0x94 0x18 /* gpmc_oe_re.gpmc_oe_re, I/O | MODE0; GPMC_OE_RE */
+ 0x98 0x18 /* gpmc_wen.gpmc_wen, OUTPUT | MODE0; GPMC_WEn */
+ 0x74 0x18 /* gpmc_wpn.gpmc_wpn, OUTPUT | MODE0; GPMC_WPn */
+ 0x70 0x38 /* gpmc_wait0.gpmc_wait0, INPUT | MODE0; GPMC_WAIT0 */
>;
};
- pinctrl_usb_host_0: usbhostgrp-1 {
+ pinctrl_usb_host0_1: usbhostgrp-1 {
pinctrl-single,pins = <
0x234 0x0 /* usb1_drvvbus.usb1_drvvbus, OUTPUT | MODE0; USBH_VBUSEN */
- 0x21c 0x7 /* usb0_drvvbus.gpio0_18, INPUT | MODE0; #USBH_OC */
+ 0x21c 0x7 /* usb0_drvvbus.gpio0_18, INPUT | MODE0; #USBH_OC */
>;
};
- pinctrl_usbotg0: usbotggrp-1 { // USB-OTG / 2nd CAN
+ pinctrl_usbotg0_1: usbotggrp-1 { // USB-OTG / 2nd CAN
pinctrl-single,pins = <
0x100 0x7 /* mmc0_clk.gpio2_30, OUTPUT | MODE7; USBOTG_VBUSEN */
0x104 0x7 /* mmc0_cmd.gpio2_31, OUTPUT | MODE7; #USBOTG_OC */
>;
};
- pinctrl_dcan1: dcan1grp-1 { // USB-OTG / 2nd CAN
+ pinctrl_dcan1_1: dcan1grp-1 { // USB-OTG / 2nd CAN
pinctrl-single,pins = <
0x100 0x24 /* mmc0_clk.dcan1_tx, OUTPUT | MODE4; USBOTG_VBUSEN */
0x104 0x24 /* mmc0_cmd.dcan1_rx, INPUT | MODE4; #USBOTG_OC */
pinctrl_i2c0_1: i2c0grp-1 {
pinctrl-single,pins = <
- 0x188 0x20 /* i2c0_sda.i2c0_sda, OUTPUT | MODE0; I2C_DATA */
- 0x18c 0x20 /* i2c0_scl.i2c0_scl, OUTPUT | MODE0; I2C_CLK */
+ 0x188 0x20 /* i2c0_sda.i2c0_sda, I/O OD | MODE0; I2C_DATA */
+ 0x18c 0x20 /* i2c0_scl.i2c0_scl, I/O OD | MODE0; I2C_CLK */
>;
};
- pinctrl_pwm0: pwm0grp-11 {
+ pinctrl_pwm0_1: pwm0grp-1 {
pinctrl-single,pins = <
0x190 0x1 /* mcasp0_aclkx.ehrpwm0a, OUTPUT | MODE1; PWM */
>;
};
- pinctrl_ow0: ow0grp-1 {
+ pinctrl_ow0_1: ow0grp-1 {
pinctrl-single,pins = <
0xf4 0x27 /* mmc0_dat2.gpio2_27, OUTPUT | MODE7; OWDAT */
>;
};
- pinctrl_cspi0: cspi0grp-1 {
+ pinctrl_cspi0_1: cspi0grp-1 {
pinctrl-single,pins = <
- 0x15c 0x0 /* spi0_cs0.spi0_cs0 CSPI_SS */
- 0x160 0x0 /* spi0_cs1.spi0_cs1 CSPI_SS*/
- 0x154 0x0 /* spi0_d0.spi0_d0 CSPI_MOSI*/
- 0x158 0x20 /* spi0_d1.spi0_d1 CSPI_MISO*/
+ 0x15c 0x0 /* spi0_cs0.spi0_cs0, I/O | MODE0; CSPI_SS */
+ 0x160 0x0 /* spi0_cs1.spi0_cs1, I/O | MODE0; CSPI_SS */
+ 0x154 0x0 /* spi0_d0.spi0_d0, I/O | MODE0; CSPI_MOSI */
+ 0x158 0x20 /* spi0_d1.spi0_d1, I/O | MODE0; CSPI_MISO */
0x150 0x0 /* spi0_sclk.spi0_sclk, I/O | MODE0; CSPI_SCLK */
>;
};
- pinctrl_mmc1: mmc1grp-1 {
+ pinctrl_mmc1_1: mmc1grp-1 {
pinctrl-single,pins = <
- 0x194 0x27 /* mcasp0_fsx.gpio3_15 SD1_CD */
- 0x12c 0x24 /* mii1_tx_clk.mmc1_dat0 SD1_DAT0 */
- 0x130 0x24 /* mii1_rx_clk.mmc1_dat1 SD1_DAT1 */
- 0x134 0x24 /* mii1_rxd3.mmc1_dat2 SD1_DAT2 */
- 0x138 0x24 /* mii1_rxd2.mmc1_dat3 SD1_DAT3 */
- 0x84 0x22 /* gpmc_cs2.mmc1_cmd SD1_CMD */
- 0x80 0x2 /* gpmc_cs1.mmc1_clk SD1_CLK */
+ 0x194 0x24 /* mcasp0_fsx.mmc1_sdcd, INPUT | MODE4; SD1_CD */
+ 0x12c 0x24 /* mii1_tx_clk.mmc1_dat0, I/O | MODE4; SD1_D[0] */
+ 0x130 0x24 /* mii1_rx_clk.mmc1_dat1, I/O | MODE4; SD1_D[1] */
+ 0x134 0x24 /* mii1_rxd3.mmc1_dat2, I/O | MODE4; SD1_D[2] */
+ 0x138 0x24 /* mii1_rxd2.mmc1_dat3, I/O | MODE4; SD1_D[3] */
+ 0x84 0x22 /* gpmc_csn2.mmc1_cmd, I/O | MODE2; SD1_CMD */
+ 0x80 0x2 /* gpmc_csn1.mmc1_clk, I/O | MODE2; SD1_CLK */
>;
};
pinctrl_uart1_1: uart1grp-1 {
pinctrl-single,pins = <
- 0x174 0x0
- 0x170 0x20
- 0x168 0x20
- 0x16c 0x0
+ 0x174 0x0 /* uart0_txd.uart0_txd, OUTPUT | MODE0; TXD */
+ 0x170 0x20 /* uart0_rxd.uart0_rxd, INPUT | MODE0; RXD */
+ 0x168 0x20 /* uart0_ctsn.uart0_ctsn, INPUT | MODE0; RTS/CTS IN */
+ 0x16c 0x0 /* uart0_rtsn.uart0_rtsn, OUTPUT | MODE0; CTS/RTS OUT */
>;
};
pinctrl_uart2_1: uart2grp-1 {
pinctrl-single,pins = <
- 0x184 0x0
- 0x180 0x0
- 0x178 0x0
- 0x17c 0x0
+ 0x184 0x0 /* uart1_txd.uart1_txd, OUTPUT | MODE0; TXD */
+ 0x180 0x0 /* uart1_rxd.uart1_rxd, INPUT | MODE0; RXD */
+ 0x178 0x0 /* uart1_ctsn.uart1_ctsn, INPUT | MODE0; RTS/CTS IN */
+ 0x17c 0x0 /* uart1_rtsn.uart1_rtsn, OUTPUT | MODE0; CTS/RTS OUT */
>;
};
pinctrl_uart6_1: uart6grp-1 {
pinctrl-single,pins = <
- 0x118 0x3
- 0x108 0x3
- 0xf8 0x2
- 0xfc 0x2
+ 0x118 0x3 /* mii1_rx_dv.uart5_txd, OUTPUT | MODE3; TXD */
+ 0x108 0x3 /* mii1_col.uart5_rxd, INPUT | MODE3; RXD */
+ 0xf8 0x2 /* mmc0_dat1.uart5_ctsn, INPUT | MODE2; RTS/CTS IN */
+ 0xfc 0x2 /* mmc0_dat0.uart5_rtsn, OUTPUT | MODE2; CTS/RTS OUT */
>;
};
- pinctrl_matrix_keypad0: matrix-keypad0 {
+ pinctrl_matrix_keypad0_1: matrix-keypad0grp-1 {
pinctrl-single,pins = <
- 0xf0 0x7
- 0x19c 0x7
- 0x164 0x7
- 0x78 0x7
- 0x1b0 0x27
- 0x1b4 0x27
- 0x8c 0x27
- 0x88 0x27
+ 0xf0 0x7 /* mmc0_dat3.gpio2_26, I/O | MODE7; KP_COL[0] */
+ 0x19c 0x7 /* mcasp0_ahclkr.gpio3_17, I/O | MODE7; KP_COL[1] */
+ 0x164 0x7 /* ecap0_in_pwm0_out.gpio0_7, I/O | MODE7; KP_COL[2] */
+ 0x78 0x7 /* gpmc_ben1.gpio1_28, I/O | MODE7; KP_COL[3] */
+ 0x1b0 0x27 /* xdma_event_intr0.gpio0_19, I/O | MODE7; KP_ROW[0] */
+ 0x1b4 0x27 /* xdma_event_intr1.gpio0_20, I/O | MODE7; KP_ROW[1] */
+ 0x8c 0x27 /* gpmc_clk.gpio2_1, I/O | MODE7; KP_ROW[2] */
+ 0x88 0x27 /* gpmc_csn3.gpio2_0, I/O | MODE7; KP_ROW[3] */
>;
};
- pinctrl_dcan_0: dcan0grp-1 {
+ pinctrl_dcan0_1: dcan0grp-1 {
pinctrl-single,pins = <
- 0x11c 0x1
- 0x120 0x1
+ 0x11c 0x1 /* mii1_txd3.dcan0_tx, OUTPUT | MODE1; TXCAN */
+ 0x120 0x1 /* mii1_txd2.dcan0_rx, INPUT | MODE1; RXCAN */
>;
};
- pinctrl_ssi_0: ssi0grp-1 {
+ pinctrl_ssi0_1: ssi0grp-1 {
pinctrl-single,pins = <
- 0x198 0x7
- 0x1a8 0x3
- 0x1ac 0x3
- 0x1a0 0x3
- 0x1a4 0x0
+ 0x198 0x7 /* mcasp0_axr0.gpio3_16, I/O | MODE7; SSI1_INT */
+ 0x1a8 0x3 /* mcasp0_axr1.mcasp1_axr0, I/O | MODE3; SSI1_RXD */
+ 0x1ac 0x3 /* mcasp0_ahclkx.mcasp1_axr1, I/O | MODE3; SSI1_TXD */
+ 0x1a0 0x3 /* mcasp0_aclkr.mcasp1_aclkx, I/O | MODE3; SSI1_CLK */
+ 0x1a4 0x0 /* mcasp0_fsr.mcasp1_fsx, I/O | MODE3; SSI1_FS */
>;
};
- pinctrl_lcd_0: lcd0grp1 {
+ pinctrl_lcd0_1: lcd0grp-1 {
pinctrl-single,pins = <
- 0x20 0x0
- 0x2c 0x0
- 0x38 0x0
- 0xcc 0x0
- 0xd0 0x0
- 0xd4 0x0
- 0xd8 0x0
- 0xdc 0x0
- 0x24 0x0
- 0x30 0x0
- 0xb4 0x0
- 0xb8 0x0
- 0xbc 0x0
- 0xc0 0x0
- 0xc4 0x0
- 0xc8 0x0
- 0x28 0x0
- 0x34 0x0
- 0x3c 0x0
- 0xa0 0x0
- 0xa4 0x0
- 0xa8 0x0
- 0xac 0x0
- 0xb0 0x0
- 0xe4 0x0
- 0xe0 0x0
- 0xec 0x0
- 0xe8 0x0
+ 0x20 0x0 /* gpmc_ad8.lcd_data23, OUTPUT | MODE1; LD0 */
+ 0x2c 0x0 /* gpmc_ad11.lcd_data20, OUTPUT | MODE1; LD1 */
+ 0x38 0x0 /* gpmc_ad14.lcd_data17, OUTPUT | MODE1; LD2 */
+ 0xcc 0x0 /* lcd_data11.lcd_data11, I/O | MODE0; LD3 */
+ 0xd0 0x0 /* lcd_data12.lcd_data12, I/O | MODE0; LD4 */
+ 0xd4 0x0 /* lcd_data13.lcd_data13, I/O | MODE0; LD5 */
+ 0xd8 0x0 /* lcd_data14.lcd_data14, I/O | MODE0; LD6 */
+ 0xdc 0x0 /* lcd_data15.lcd_data15, I/O | MODE0; LD7 */
+ 0x24 0x0 /* gpmc_ad9.lcd_data22, OUTPUT | MODE1; LD8 */
+ 0x30 0x0 /* gpmc_ad12.lcd_data19, OUTPUT | MODE1; LD9 */
+ 0xb4 0x0 /* lcd_data5.lcd_data5, I/O | MODE0; LD10 */
+ 0xb8 0x0 /* lcd_data6.lcd_data6, I/O | MODE0; LD11 */
+ 0xbc 0x0 /* lcd_data7.lcd_data7, I/O | MODE0; LD12 */
+ 0xc0 0x0 /* lcd_data8.lcd_data8, I/O | MODE0; LD13 */
+ 0xc4 0x0 /* lcd_data9.lcd_data9, I/O | MODE0; LD14 */
+ 0xc8 0x0 /* lcd_data10.lcd_data10, I/O | MODE0; LD15 */
+ 0x28 0x0 /* gpmc_ad10.lcd_data21, OUTPUT | MODE1; LD16 */
+ 0x34 0x0 /* gpmc_ad13.lcd_data18, OUTPUT | MODE1; LD17 */
+ 0x3c 0x0 /* gpmc_ad15.lcd_data16, OUTPUT | MODE1; LD18 */
+ 0xa0 0x0 /* lcd_data0.lcd_data0, I/O | MODE0; LD19 */
+ 0xa4 0x0 /* lcd_data1.lcd_data1, I/O | MODE0; LD20 */
+ 0xa8 0x0 /* lcd_data2.lcd_data2, I/O | MODE0; LD21 */
+ 0xac 0x0 /* lcd_data3.lcd_data3, I/O | MODE0; LD22 */
+ 0xb0 0x0 /* lcd_data4.lcd_data4, I/O | MODE0; LD23 */
+ 0xe4 0x0 /* lcd_hsync.lcd_hsync, OUTPUT | MODE0; HSYNC */
+ 0xe0 0x0 /* lcd_vsync.lcd_vsync, OUTPUT | MODE0; VSYNC */
+ 0xec 0x0 /* lcd_ac_bias_en.lcd_ac_bias_en, OUTPUT | MODE0; OE_ACD */
+ 0xe8 0x0 /* lcd_pclk.lcd_pclk, OUTPUT | MODE0; LSCLK */
>;
};
- pinctrl_tsc2007: tsc2007grp-1 {
+ pinctrl_tsc2007_1: tsc2007grp-1 {
pinctrl-single,pins = <
- 0x198 0x27 /* GPIO3_16 */
+ 0x198 0x27 /* mcasp0_axr0.gpio3_16, I/O | MODE 7; GPIO3_16 */
>;
};
col-scan-delay-us = <2>;
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_matrix_keypad0>;
+ pinctrl-0 = <&pinctrl_matrix_keypad0_1>;
row-gpios = <
&gpio0 19 0
model = "2007";
x-plate-ohms = <660>;
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_tsc2007>;
+ pinctrl-0 = <&pinctrl_tsc2007_1>;
};
polytouch: edt-ft5x06@38 {
sw2_reg: regulator@5 {
// VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance
regulator-name = "vdd_mpu";
- regulator-min-microvolt = <912500>;
- regulator-max-microvolt = <1312500>;
+ regulator-min-microvolt = <912000>;
+ regulator-max-microvolt = <1310400>;
regulator-boot-on;
regulator-always-on;
};
&spi0 {
status = "okay";
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_cspi0>;
+ pinctrl-0 = <&pinctrl_cspi0_1>;
};
&mmchs1 {
status = "okay";
cd-gpios = <&gpio3 15 1>;
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_mmc1>;
+ pinctrl-0 = <&pinctrl_mmc1_1>;
vmmc-supply = <®_3v3>;
};
projects / karo-tx-linux.git / blobdiff