]> git.karo-electronics.de Git - karo-tx-linux.git/blobdiff - arch/arm/boot/dts/exynos5420.dtsi
Merge tag 'perf-urgent-for-mingo' of git://git.kernel.org/pub/scm/linux/kernel/git...
[karo-tx-linux.git] / arch / arm / boot / dts / exynos5420.dtsi
index 09aa06cb3d3af77be582328167c25f8735a09fb2..8db792b26f79c1046523c584c4b2e9c910438d73 100644 (file)
@@ -22,6 +22,9 @@
        compatible = "samsung,exynos5420";
 
        aliases {
+               mshc0 = &mmc_0;
+               mshc1 = &mmc_1;
+               mshc2 = &mmc_2;
                pinctrl0 = &pinctrl_0;
                pinctrl1 = &pinctrl_1;
                pinctrl2 = &pinctrl_2;
                i2c1 = &i2c_1;
                i2c2 = &i2c_2;
                i2c3 = &i2c_3;
+               i2c4 = &hsi2c_4;
+               i2c5 = &hsi2c_5;
+               i2c6 = &hsi2c_6;
+               i2c7 = &hsi2c_7;
+               i2c8 = &hsi2c_8;
+               i2c9 = &hsi2c_9;
+               i2c10 = &hsi2c_10;
+               gsc0 = &gsc_0;
+               gsc1 = &gsc_1;
+               spi0 = &spi_0;
+               spi1 = &spi_1;
+               spi2 = &spi_2;
        };
 
        cpus {
                        reg = <0x3>;
                        clock-frequency = <1800000000>;
                };
+
+               cpu4: cpu@100 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a7";
+                       reg = <0x100>;
+                       clock-frequency = <1000000000>;
+               };
+
+               cpu5: cpu@101 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a7";
+                       reg = <0x101>;
+                       clock-frequency = <1000000000>;
+               };
+
+               cpu6: cpu@102 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a7";
+                       reg = <0x102>;
+                       clock-frequency = <1000000000>;
+               };
+
+               cpu7: cpu@103 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a7";
+                       reg = <0x103>;
+                       clock-frequency = <1000000000>;
+               };
        };
 
        clock: clock-controller@10010000 {
                compatible = "samsung,exynos5420-audss-clock";
                reg = <0x03810000 0x0C>;
                #clock-cells = <1>;
-               clocks = <&clock 148>;
-               clock-names = "sclk_audio";
+               clocks = <&clock 1>, <&clock 5>, <&clock 148>, <&clock 149>;
+               clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in";
        };
 
        codec@11000000 {
                clock-names = "mfc";
        };
 
+       mmc_0: mmc@12200000 {
+               compatible = "samsung,exynos5420-dw-mshc-smu";
+               interrupts = <0 75 0>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               reg = <0x12200000 0x2000>;
+               clocks = <&clock 351>, <&clock 132>;
+               clock-names = "biu", "ciu";
+               fifo-depth = <0x40>;
+               status = "disabled";
+       };
+
+       mmc_1: mmc@12210000 {
+               compatible = "samsung,exynos5420-dw-mshc-smu";
+               interrupts = <0 76 0>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               reg = <0x12210000 0x2000>;
+               clocks = <&clock 352>, <&clock 133>;
+               clock-names = "biu", "ciu";
+               fifo-depth = <0x40>;
+               status = "disabled";
+       };
+
+       mmc_2: mmc@12220000 {
+               compatible = "samsung,exynos5420-dw-mshc";
+               interrupts = <0 77 0>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               reg = <0x12220000 0x1000>;
+               clocks = <&clock 353>, <&clock 134>;
+               clock-names = "biu", "ciu";
+               fifo-depth = <0x40>;
+               status = "disabled";
+       };
+
        mct@101C0000 {
                compatible = "samsung,exynos4210-mct";
                reg = <0x101C0000 0x800>;
                interrupt-controller;
                #interrups-cells = <1>;
                interrupt-parent = <&mct_map>;
-               interrupts = <0>, <1>, <2>, <3>, <4>, <5>, <6>, <7>;
+               interrupts = <0>, <1>, <2>, <3>, <4>, <5>, <6>, <7>,
+                               <8>, <9>, <10>, <11>;
                clocks = <&clock 1>, <&clock 315>;
                clock-names = "fin_pll", "mct";
 
                                        <4 &gic 0 120 0>,
                                        <5 &gic 0 121 0>,
                                        <6 &gic 0 122 0>,
-                                       <7 &gic 0 123 0>;
+                                       <7 &gic 0 123 0>,
+                                       <8 &gic 0 128 0>,
+                                       <9 &gic 0 129 0>,
+                                       <10 &gic 0 130 0>,
+                                       <11 &gic 0 131 0>;
                };
        };
 
                status = "okay";
        };
 
+       amba {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "arm,amba-bus";
+               interrupt-parent = <&gic>;
+               ranges;
+
+               pdma0: pdma@121A0000 {
+                       compatible = "arm,pl330", "arm,primecell";
+                       reg = <0x121A0000 0x1000>;
+                       interrupts = <0 34 0>;
+                       clocks = <&clock 362>;
+                       clock-names = "apb_pclk";
+                       #dma-cells = <1>;
+                       #dma-channels = <8>;
+                       #dma-requests = <32>;
+               };
+
+               pdma1: pdma@121B0000 {
+                       compatible = "arm,pl330", "arm,primecell";
+                       reg = <0x121B0000 0x1000>;
+                       interrupts = <0 35 0>;
+                       clocks = <&clock 363>;
+                       clock-names = "apb_pclk";
+                       #dma-cells = <1>;
+                       #dma-channels = <8>;
+                       #dma-requests = <32>;
+               };
+
+               mdma0: mdma@10800000 {
+                       compatible = "arm,pl330", "arm,primecell";
+                       reg = <0x10800000 0x1000>;
+                       interrupts = <0 33 0>;
+                       clocks = <&clock 473>;
+                       clock-names = "apb_pclk";
+                       #dma-cells = <1>;
+                       #dma-channels = <8>;
+                       #dma-requests = <1>;
+               };
+
+               mdma1: mdma@11C10000 {
+                       compatible = "arm,pl330", "arm,primecell";
+                       reg = <0x11C10000 0x1000>;
+                       interrupts = <0 124 0>;
+                       clocks = <&clock 442>;
+                       clock-names = "apb_pclk";
+                       #dma-cells = <1>;
+                       #dma-channels = <8>;
+                       #dma-requests = <1>;
+               };
+       };
+
+       spi_0: spi@12d20000 {
+               compatible = "samsung,exynos4210-spi";
+               reg = <0x12d20000 0x100>;
+               interrupts = <0 66 0>;
+               dmas = <&pdma0 5
+                       &pdma0 4>;
+               dma-names = "tx", "rx";
+               #address-cells = <1>;
+               #size-cells = <0>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&spi0_bus>;
+               clocks = <&clock 271>, <&clock 135>;
+               clock-names = "spi", "spi_busclk0";
+               status = "disabled";
+       };
+
+       spi_1: spi@12d30000 {
+               compatible = "samsung,exynos4210-spi";
+               reg = <0x12d30000 0x100>;
+               interrupts = <0 67 0>;
+               dmas = <&pdma1 5
+                       &pdma1 4>;
+               dma-names = "tx", "rx";
+               #address-cells = <1>;
+               #size-cells = <0>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&spi1_bus>;
+               clocks = <&clock 272>, <&clock 136>;
+               clock-names = "spi", "spi_busclk0";
+               status = "disabled";
+       };
+
+       spi_2: spi@12d40000 {
+               compatible = "samsung,exynos4210-spi";
+               reg = <0x12d40000 0x100>;
+               interrupts = <0 68 0>;
+               dmas = <&pdma0 7
+                       &pdma0 6>;
+               dma-names = "tx", "rx";
+               #address-cells = <1>;
+               #size-cells = <0>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&spi2_bus>;
+               clocks = <&clock 273>, <&clock 137>;
+               clock-names = "spi", "spi_busclk0";
+               status = "disabled";
+       };
+
        serial@12C00000 {
                clocks = <&clock 257>, <&clock 128>;
                clock-names = "uart", "clk_uart_baud0";
                clock-names = "uart", "clk_uart_baud0";
        };
 
+       pwm: pwm@12dd0000 {
+               compatible = "samsung,exynos4210-pwm";
+               reg = <0x12dd0000 0x100>;
+               samsung,pwm-outputs = <0>, <1>, <2>, <3>;
+               #pwm-cells = <3>;
+               clocks = <&clock 279>;
+               clock-names = "timers";
+       };
+
        dp_phy: video-phy@10040728 {
                compatible = "samsung,exynos5250-dp-video-phy";
                reg = <0x10040728 4>;
                status = "disabled";
        };
 
+       hsi2c_4: i2c@12CA0000 {
+               compatible = "samsung,exynos5-hsi2c";
+               reg = <0x12CA0000 0x1000>;
+               interrupts = <0 60 0>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&i2c4_hs_bus>;
+               clocks = <&clock 265>;
+               clock-names = "hsi2c";
+               status = "disabled";
+       };
+
+       hsi2c_5: i2c@12CB0000 {
+               compatible = "samsung,exynos5-hsi2c";
+               reg = <0x12CB0000 0x1000>;
+               interrupts = <0 61 0>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&i2c5_hs_bus>;
+               clocks = <&clock 266>;
+               clock-names = "hsi2c";
+               status = "disabled";
+       };
+
+       hsi2c_6: i2c@12CC0000 {
+               compatible = "samsung,exynos5-hsi2c";
+               reg = <0x12CC0000 0x1000>;
+               interrupts = <0 62 0>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&i2c6_hs_bus>;
+               clocks = <&clock 267>;
+               clock-names = "hsi2c";
+               status = "disabled";
+       };
+
+       hsi2c_7: i2c@12CD0000 {
+               compatible = "samsung,exynos5-hsi2c";
+               reg = <0x12CD0000 0x1000>;
+               interrupts = <0 63 0>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&i2c7_hs_bus>;
+               clocks = <&clock 268>;
+               clock-names = "hsi2c";
+               status = "disabled";
+       };
+
+       hsi2c_8: i2c@12E00000 {
+               compatible = "samsung,exynos5-hsi2c";
+               reg = <0x12E00000 0x1000>;
+               interrupts = <0 87 0>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&i2c8_hs_bus>;
+               clocks = <&clock 281>;
+               clock-names = "hsi2c";
+               status = "disabled";
+       };
+
+       hsi2c_9: i2c@12E10000 {
+               compatible = "samsung,exynos5-hsi2c";
+               reg = <0x12E10000 0x1000>;
+               interrupts = <0 88 0>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&i2c9_hs_bus>;
+               clocks = <&clock 282>;
+               clock-names = "hsi2c";
+               status = "disabled";
+       };
+
+       hsi2c_10: i2c@12E20000 {
+               compatible = "samsung,exynos5-hsi2c";
+               reg = <0x12E20000 0x1000>;
+               interrupts = <0 203 0>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&i2c10_hs_bus>;
+               clocks = <&clock 283>;
+               clock-names = "hsi2c";
+               status = "disabled";
+       };
+
        hdmi@14530000 {
                compatible = "samsung,exynos4212-hdmi";
                reg = <0x14530000 0x70000>;
                clocks = <&clock 431>, <&clock 143>;
                clock-names = "mixer", "sclk_hdmi";
        };
+
+       gsc_0: video-scaler@13e00000 {
+               compatible = "samsung,exynos5-gsc";
+               reg = <0x13e00000 0x1000>;
+               interrupts = <0 85 0>;
+               clocks = <&clock 465>;
+               clock-names = "gscl";
+               samsung,power-domain = <&gsc_pd>;
+       };
+
+       gsc_1: video-scaler@13e10000 {
+               compatible = "samsung,exynos5-gsc";
+               reg = <0x13e10000 0x1000>;
+               interrupts = <0 86 0>;
+               clocks = <&clock 466>;
+               clock-names = "gscl";
+               samsung,power-domain = <&gsc_pd>;
+       };
+
+       tmu_cpu0: tmu@10060000 {
+               compatible = "samsung,exynos5420-tmu";
+               reg = <0x10060000 0x100>;
+               interrupts = <0 65 0>;
+               clocks = <&clock 318>;
+               clock-names = "tmu_apbif";
+       };
+
+       tmu_cpu1: tmu@10064000 {
+               compatible = "samsung,exynos5420-tmu";
+               reg = <0x10064000 0x100>;
+               interrupts = <0 183 0>;
+               clocks = <&clock 318>;
+               clock-names = "tmu_apbif";
+       };
+
+       tmu_cpu2: tmu@10068000 {
+               compatible = "samsung,exynos5420-tmu-ext-triminfo";
+               reg = <0x10068000 0x100>, <0x1006c000 0x4>;
+               interrupts = <0 184 0>;
+               clocks = <&clock 318>, <&clock 318>;
+               clock-names = "tmu_apbif", "tmu_triminfo_apbif";
+       };
+
+       tmu_cpu3: tmu@1006c000 {
+               compatible = "samsung,exynos5420-tmu-ext-triminfo";
+               reg = <0x1006c000 0x100>, <0x100a0000 0x4>;
+               interrupts = <0 185 0>;
+               clocks = <&clock 318>, <&clock 319>;
+               clock-names = "tmu_apbif", "tmu_triminfo_apbif";
+       };
+
+       tmu_gpu: tmu@100a0000 {
+               compatible = "samsung,exynos5420-tmu-ext-triminfo";
+               reg = <0x100a0000 0x100>, <0x10068000 0x4>;
+               interrupts = <0 215 0>;
+               clocks = <&clock 319>, <&clock 318>;
+               clock-names = "tmu_apbif", "tmu_triminfo_apbif";
+       };
 };