]> git.karo-electronics.de Git - karo-tx-linux.git/blobdiff - arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
ENGR00332688: ARM: dts: imx6qdl: refine spdif support in devicetree
[karo-tx-linux.git] / arch / arm / boot / dts / imx6qdl-sabreauto.dtsi
index ff6f1e8f2dd9bfa54a6387998421f1ac8877c841..31b68652a5f64d839a2834e57308e09a735478e2 100644 (file)
  * http://www.opensource.org/licenses/gpl-license.html
  * http://www.gnu.org/copyleft/gpl.html
  */
+#include <dt-bindings/input/input.h>
 
 / {
        memory {
                reg = <0x10000000 0x80000000>;
        };
+
+       clocks {
+               codec_osc: anaclk2 {
+                       compatible = "fixed-clock";
+                       #clock-cells = <0>;
+                       clock-frequency = <24576000>;
+               };
+       };
+
+       gpio-keys {
+               compatible = "gpio-keys";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_gpio_keys>;
+
+               home {
+                       label = "Home";
+                       gpios = <&gpio1 11 0>;
+                       gpio-key,wakeup;
+                       linux,code = <KEY_HOME>;
+               };
+
+               back {
+                       label = "Back";
+                       gpios = <&gpio1 12 0>;
+                       gpio-key,wakeup;
+                       linux,code = <KEY_BACK>;
+               };
+
+               program {
+                       label = "Program";
+                       gpios = <&gpio2 12 0>;
+                       gpio-key,wakeup;
+                       linux,code = <KEY_PROGRAM>;
+               };
+
+               volume-up {
+                       label = "Volume Up";
+                       gpios = <&gpio2 15 0>;
+                       gpio-key,wakeup;
+                       linux,code = <KEY_VOLUMEUP>;
+               };
+
+               volume-down {
+                       label = "Volume Down";
+                       gpios = <&gpio5 14 0>;
+                       gpio-key,wakeup;
+                       linux,code = <KEY_VOLUMEDOWN>;
+               };
+       };
+
+       sound-spdif {
+               compatible = "fsl,imx-audio-spdif",
+                          "fsl,imx-sabreauto-spdif";
+               model = "imx-spdif";
+               spdif-controller = <&spdif>;
+               spdif-in;
+       };
+
+       sound-hdmi {
+               compatible = "fsl,imx6q-audio-hdmi",
+                            "fsl,imx-audio-hdmi";
+               model = "imx-audio-hdmi";
+               hdmi-controller = <&hdmi_audio>;
+       };
+
+       max7310_reset: max7310-reset {
+               compatible = "gpio-reset";
+               reset-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
+               reset-delay-us = <1>;
+               #reset-cells = <0>;
+       };
+
+       sound-cs42888 {
+               compatible = "fsl,imx6-sabreauto-cs42888",
+                               "fsl,imx-audio-cs42888";
+               model = "imx-cs42888";
+               esai-controller = <&esai>;
+               asrc-controller = <&asrc>;
+               audio-codec = <&codec>;
+       };
+
+       regulators {
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               reg_audio: regulator@0 {
+                       compatible = "regulator-fixed";
+                       reg = <0>;
+                       regulator-name = "cs42888_supply";
+                       regulator-min-microvolt = <3300000>;
+                       regulator-max-microvolt = <3300000>;
+                       regulator-always-on;
+               };
+
+               reg_si4763_vio1: regulator@1 {
+                       compatible = "regulator-fixed";
+                       reg = <1>;
+                       regulator-name = "vio1";
+                       regulator-min-microvolt = <3300000>;
+                       regulator-max-microvolt = <3300000>;
+                       regulator-always-on;
+               };
+
+               reg_si4763_vio2: regulator@2 {
+                       compatible = "regulator-fixed";
+                       reg = <2>;
+                       regulator-name = "vio2";
+                       regulator-min-microvolt = <3300000>;
+                       regulator-max-microvolt = <3300000>;
+                       regulator-always-on;
+               };
+
+               reg_si4763_vd: regulator@3 {
+                       compatible = "regulator-fixed";
+                       reg = <3>;
+                       regulator-name = "vd";
+                       regulator-min-microvolt = <3300000>;
+                       regulator-max-microvolt = <3300000>;
+                       regulator-always-on;
+               };
+
+               reg_si4763_va: regulator@4 {
+                       compatible = "regulator-fixed";
+                       reg = <4>;
+                       regulator-name = "va";
+                       regulator-min-microvolt = <5000000>;
+                       regulator-max-microvolt = <5000000>;
+                       regulator-always-on;
+               };
+       };
+
+       sound-fm {
+               compatible = "fsl,imx-audio-si476x",
+                          "fsl,imx-tuner-si476x";
+               model = "imx-radio-si4763";
+               ssi-controller = <&ssi2>;
+               fm-controller = <&si4763>;
+               mux-int-port = <2>;
+               mux-ext-port = <5>;
+       };
+};
+
+&audmux {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_audmux>;
+       status = "okay";
+};
+
+&clks {
+       assigned-clocks = <&clks IMX6QDL_PLL4_BYPASS_SRC>,
+                         <&clks IMX6QDL_PLL4_BYPASS>,
+                         <&clks IMX6QDL_CLK_PLL4_POST_DIV>;
+       assigned-clock-parents = <&clks IMX6QDL_CLK_LVDS2_IN>,
+                               <&clks IMX6QDL_PLL4_BYPASS_SRC>;
+       assigned-clock-rates = <0>, <0>, <24576000>;
 };
 
 &ecspi1 {
        fsl,spi-num-chipselects = <1>;
        cs-gpios = <&gpio3 19 0>;
        pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_ecspi1_1 &pinctrl_ecspi1_sabreauto>;
+       pinctrl-0 = <&pinctrl_ecspi1 &pinctrl_ecspi1_cs>;
        status = "disabled"; /* pin conflict with WEIM NOR */
 
        flash: m25p80@0 {
        };
 };
 
+&esai {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_esai>;
+       assigned-clocks = <&clks IMX6QDL_CLK_ESAI_SEL>,
+                         <&clks IMX6QDL_CLK_ESAI_EXTAL>;
+       assigned-clock-parents = <&clks IMX6QDL_CLK_PLL4_AUDIO_DIV>;
+       assigned-clock-rates = <0>, <24576000>;
+       status = "okay";
+};
+
 &fec {
        pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_enet_2>;
+       pinctrl-0 = <&pinctrl_enet>;
        phy-mode = "rgmii";
        status = "okay";
 };
 
 &gpmi {
        pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_gpmi_nand_1>;
+       pinctrl-0 = <&pinctrl_gpmi_nand>;
+       status = "okay";
+};
+
+&i2c2 {
+       clock-frequency = <100000>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c2>;
+       status = "okay";
+
+       egalax_ts@04 {
+               compatible = "eeti,egalax_ts";
+               reg = <0x04>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_egalax_int>;
+               interrupt-parent = <&gpio2>;
+               interrupts = <28 2>;
+               wakeup-gpios = <&gpio2 28 GPIO_ACTIVE_HIGH>;
+       };
+
+       pmic: pfuze100@08 {
+               compatible = "fsl,pfuze100";
+               reg = <0x08>;
+
+               regulators {
+                       sw1a_reg: sw1ab {
+                               regulator-min-microvolt = <300000>;
+                               regulator-max-microvolt = <1875000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                               regulator-ramp-delay = <6250>;
+                       };
+
+                       sw1c_reg: sw1c {
+                               regulator-min-microvolt = <300000>;
+                               regulator-max-microvolt = <1875000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                               regulator-ramp-delay = <6250>;
+                       };
+
+                       sw2_reg: sw2 {
+                               regulator-min-microvolt = <800000>;
+                               regulator-max-microvolt = <3300000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       sw3a_reg: sw3a {
+                               regulator-min-microvolt = <400000>;
+                               regulator-max-microvolt = <1975000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       sw3b_reg: sw3b {
+                               regulator-min-microvolt = <400000>;
+                               regulator-max-microvolt = <1975000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       sw4_reg: sw4 {
+                               regulator-min-microvolt = <800000>;
+                               regulator-max-microvolt = <3300000>;
+                       };
+
+                       swbst_reg: swbst {
+                               regulator-min-microvolt = <5000000>;
+                               regulator-max-microvolt = <5150000>;
+                       };
+
+                       snvs_reg: vsnvs {
+                               regulator-min-microvolt = <1000000>;
+                               regulator-max-microvolt = <3000000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       vref_reg: vrefddr {
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       vgen1_reg: vgen1 {
+                               regulator-min-microvolt = <800000>;
+                               regulator-max-microvolt = <1550000>;
+                       };
+
+                       vgen2_reg: vgen2 {
+                               regulator-min-microvolt = <800000>;
+                               regulator-max-microvolt = <1550000>;
+                       };
+
+                       vgen3_reg: vgen3 {
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <3300000>;
+                       };
+
+                       vgen4_reg: vgen4 {
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <3300000>;
+                               regulator-always-on;
+                       };
+
+                       vgen5_reg: vgen5 {
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <3300000>;
+                               regulator-always-on;
+                       };
+
+                       vgen6_reg: vgen6 {
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <3300000>;
+                               regulator-always-on;
+                       };
+               };
+       };
+
+       hdmi: edid@50 {
+               compatible = "fsl,imx6-hdmi-i2c";
+               reg = <0x50>;
+       };
+
+       codec: cs42888@48 {
+               compatible = "cirrus,cs42888";
+               reg = <0x48>;
+               clocks = <&codec_osc>;
+               clock-names = "mclk";
+               VA-supply = <&reg_audio>;
+               VD-supply = <&reg_audio>;
+               VLS-supply = <&reg_audio>;
+               VLC-supply = <&reg_audio>;
+       };
+
+       si4763: si4763@63 {
+               compatible = "si4761";
+               reg = <0x63>;
+               va-supply = <&reg_si4763_va>;
+               vd-supply = <&reg_si4763_vd>;
+               vio1-supply = <&reg_si4763_vio1>;
+               vio2-supply = <&reg_si4763_vio2>;
+       };
+};
+
+&i2c3 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c3>;
+       pinctrl-assert-gpios = <&gpio5 4 GPIO_ACTIVE_HIGH>;
+       status = "okay";
+
+       max7310_a: gpio@30 {
+               compatible = "maxim,max7310";
+               reg = <0x30>;
+               gpio-controller;
+               #gpio-cells = <2>;
+               resets = <&max7310_reset>;
+       };
+
+       max7310_b: gpio@32 {
+               compatible = "maxim,max7310";
+               reg = <0x32>;
+               gpio-controller;
+               #gpio-cells = <2>;
+       };
+
+       max7310_c: gpio@34 {
+               compatible = "maxim,max7310";
+               reg = <0x34>;
+               gpio-controller;
+               #gpio-cells = <2>;
+       };
+
+       mma8451@1c {
+               compatible = "fsl,mma8451";
+               reg = <0x1c>;
+               position = <7>;
+               interrupt-parent = <&gpio6>;
+               interrupts = <31 8>;
+               interrupt-route = <1>;
+       };
+
+       mag3110@0e {
+               compatible = "fsl,mag3110";
+               reg = <0x0e>;
+               position = <2>;
+               interrupt-parent = <&gpio2>;
+               interrupts = <29 1>;
+       };
+
+       isl29023@44 {
+               compatible = "fsl,isl29023";
+               reg = <0x44>;
+               rext = <499>;
+               interrupt-parent = <&gpio5>;
+               interrupts = <17 2>;
+       };
+};
+
+&mlb {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_mlb>;
        status = "okay";
 };
 
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_hog>;
 
-       hog {
+       imx6qdl-sabreauto {
+                pinctrl_audmux: audmux {
+                        fsl,pins = <
+                                MX6QDL_PAD_DISP0_DAT16__AUD5_TXC  0x130b0
+                                MX6QDL_PAD_DISP0_DAT18__AUD5_TXFS 0x130b0
+                                MX6QDL_PAD_DISP0_DAT19__AUD5_RXD  0x130b0
+                        >;
+                };
+
                pinctrl_hog: hoggrp {
                        fsl,pins = <
                                MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x80000000
                                MX6QDL_PAD_SD2_DAT2__GPIO1_IO13  0x80000000
                                MX6QDL_PAD_GPIO_18__SD3_VSELECT 0x17059
+                               MX6QDL_PAD_EIM_A24__GPIO5_IO04   0x80000000
+                               MX6QDL_PAD_SD2_DAT0__GPIO1_IO15  0x80000000
+                               MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0x80000000
+                               MX6QDL_PAD_EIM_EB1__GPIO2_IO29  0x80000000
+                               MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x80000000
                        >;
                };
-       };
 
-       ecspi1 {
-               pinctrl_ecspi1_sabreauto: ecspi1-sabreauto {
+               pinctrl_ecspi1: ecspi1grp {
+                       fsl,pins = <
+                               MX6QDL_PAD_EIM_D17__ECSPI1_MISO         0x100b1
+                               MX6QDL_PAD_EIM_D18__ECSPI1_MOSI         0x100b1
+                               MX6QDL_PAD_EIM_D16__ECSPI1_SCLK         0x100b1
+                       >;
+               };
+
+               pinctrl_ecspi1_cs: ecspi1cs {
                        fsl,pins = <
                                MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x80000000
                        >;
                };
+
+               pinctrl_egalax_int: egalax_intgrp {
+                       fsl,pins = <
+                               MX6QDL_PAD_EIM_EB0__GPIO2_IO28 0x80000000
+                       >;
+               };
+
+               pinctrl_enet: enetgrp {
+                       fsl,pins = <
+                               MX6QDL_PAD_KEY_COL1__ENET_MDIO          0x1b0b0
+                               MX6QDL_PAD_KEY_COL2__ENET_MDC           0x1b0b0
+                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
+                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
+                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
+                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
+                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
+                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
+                               MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
+                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
+                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
+                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
+                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
+                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
+                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
+                       >;
+               };
+
+               pinctrl_esai: esaigrp {
+                       fsl,pins = <
+                               MX6QDL_PAD_ENET_CRS_DV__ESAI_TX_CLK 0x1b030
+                               MX6QDL_PAD_ENET_RXD1__ESAI_TX_FS    0x1b030
+                               MX6QDL_PAD_ENET_TX_EN__ESAI_TX3_RX2 0x1b030
+                               MX6QDL_PAD_GPIO_5__ESAI_TX2_RX3     0x1b030
+                               MX6QDL_PAD_ENET_TXD0__ESAI_TX4_RX1  0x1b030
+                               MX6QDL_PAD_ENET_MDC__ESAI_TX5_RX0   0x1b030
+                               MX6QDL_PAD_GPIO_17__ESAI_TX0        0x1b030
+                               MX6QDL_PAD_NANDF_CS3__ESAI_TX1      0x1b030
+                               MX6QDL_PAD_ENET_MDIO__ESAI_RX_CLK   0x1b030
+                               MX6QDL_PAD_GPIO_9__ESAI_RX_FS       0x1b030
+                       >;
+               };
+
+               pinctrl_flexcan1: flexcan1grp {
+                       fsl,pins = <
+                               MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX        0x80000000
+                               MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX        0x80000000
+                       >;
+               };
+
+               pinctrl_flexcan2: flexcan2grp {
+                       fsl,pins = <
+                               MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX        0x80000000
+                               MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX        0x80000000
+                       >;
+               };
+
+               pinctrl_gpio_keys: gpio_keysgrp {
+                       fsl,pins = <
+                               MX6QDL_PAD_SD2_CMD__GPIO1_IO11  0x1b0b0
+                               MX6QDL_PAD_SD2_DAT3__GPIO1_IO12 0x1b0b0
+                               MX6QDL_PAD_SD4_DAT4__GPIO2_IO12 0x1b0b0
+                               MX6QDL_PAD_SD4_DAT7__GPIO2_IO15 0x1b0b0
+                               MX6QDL_PAD_DISP0_DAT20__GPIO5_IO14 0x1b0b0
+                       >;
+               };
+
+               pinctrl_gpmi_nand: gpminandgrp {
+                       fsl,pins = <
+                               MX6QDL_PAD_NANDF_CLE__NAND_CLE          0xb0b1
+                               MX6QDL_PAD_NANDF_ALE__NAND_ALE          0xb0b1
+                               MX6QDL_PAD_NANDF_WP_B__NAND_WP_B        0xb0b1
+                               MX6QDL_PAD_NANDF_RB0__NAND_READY_B      0xb000
+                               MX6QDL_PAD_NANDF_CS0__NAND_CE0_B        0xb0b1
+                               MX6QDL_PAD_NANDF_CS1__NAND_CE1_B        0xb0b1
+                               MX6QDL_PAD_SD4_CMD__NAND_RE_B           0xb0b1
+                               MX6QDL_PAD_SD4_CLK__NAND_WE_B           0xb0b1
+                               MX6QDL_PAD_NANDF_D0__NAND_DATA00        0xb0b1
+                               MX6QDL_PAD_NANDF_D1__NAND_DATA01        0xb0b1
+                               MX6QDL_PAD_NANDF_D2__NAND_DATA02        0xb0b1
+                               MX6QDL_PAD_NANDF_D3__NAND_DATA03        0xb0b1
+                               MX6QDL_PAD_NANDF_D4__NAND_DATA04        0xb0b1
+                               MX6QDL_PAD_NANDF_D5__NAND_DATA05        0xb0b1
+                               MX6QDL_PAD_NANDF_D6__NAND_DATA06        0xb0b1
+                               MX6QDL_PAD_NANDF_D7__NAND_DATA07        0xb0b1
+                               MX6QDL_PAD_SD4_DAT0__NAND_DQS           0x00b1
+                       >;
+               };
+
+               pinctrl_i2c2: i2c2grp {
+                       fsl,pins = <
+                               MX6QDL_PAD_EIM_EB2__I2C2_SCL  0x4001b8b1
+                               MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
+                       >;
+               };
+
+               pinctrl_i2c3: i2c3grp {
+                       fsl,pins = <
+                               MX6QDL_PAD_GPIO_3__I2C3_SCL  0x4001b8b1
+                               MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
+                       >;
+               };
+
+               pinctrl_mlb: mlb {
+                       fsl,pins = <
+                               MX6QDL_PAD_ENET_TXD1__MLB_CLK 0x80000000
+                               MX6QDL_PAD_GPIO_6__MLB_SIG    0x80000000
+                               MX6QDL_PAD_GPIO_2__MLB_DATA   0x80000000
+                       >;
+               };
+
+               pinctrl_spdif: spdifgrp {
+                       fsl,pins = <
+                               MX6QDL_PAD_KEY_COL3__SPDIF_IN 0x1b0b0
+                       >;
+               };
+
+               pinctrl_uart3_1: uart3grp-1 {
+                       fsl,pins = <
+                               MX6QDL_PAD_SD4_CLK__UART3_RX_DATA       0x1b0b1
+                               MX6QDL_PAD_SD4_CMD__UART3_TX_DATA       0x1b0b1
+                               MX6QDL_PAD_EIM_D30__UART3_CTS_B         0x1b0b1
+                               MX6QDL_PAD_EIM_EB3__UART3_RTS_B         0x1b0b1
+                       >;
+               };
+
+               pinctrl_uart3dte_1: uart3dtegrp-1 {
+                       fsl,pins = <
+                               MX6QDL_PAD_SD4_CLK__UART3_TX_DATA       0x1b0b1
+                               MX6QDL_PAD_SD4_CMD__UART3_RX_DATA       0x1b0b1
+                               MX6QDL_PAD_EIM_D30__UART3_RTS_B         0x1b0b1
+                               MX6QDL_PAD_EIM_EB3__UART3_CTS_B         0x1b0b1
+                       >;
+               };
+
+               pinctrl_uart4: uart4grp {
+                       fsl,pins = <
+                               MX6QDL_PAD_KEY_COL0__UART4_TX_DATA      0x1b0b1
+                               MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA      0x1b0b1
+                       >;
+               };
+
+               pinctrl_usdhc3: usdhc3grp {
+                       fsl,pins = <
+                               MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17059
+                               MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10059
+                               MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17059
+                               MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
+                               MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
+                               MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
+                               MX6QDL_PAD_SD3_DAT4__SD3_DATA4          0x17059
+                               MX6QDL_PAD_SD3_DAT5__SD3_DATA5          0x17059
+                               MX6QDL_PAD_SD3_DAT6__SD3_DATA6          0x17059
+                               MX6QDL_PAD_SD3_DAT7__SD3_DATA7          0x17059
+                       >;
+               };
+
+               pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
+                       fsl,pins = <
+                               MX6QDL_PAD_SD3_CMD__SD3_CMD             0x170b9
+                               MX6QDL_PAD_SD3_CLK__SD3_CLK             0x100b9
+                               MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x170b9
+                               MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x170b9
+                               MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x170b9
+                               MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x170b9
+                               MX6QDL_PAD_SD3_DAT4__SD3_DATA4          0x170b9
+                               MX6QDL_PAD_SD3_DAT5__SD3_DATA5          0x170b9
+                               MX6QDL_PAD_SD3_DAT6__SD3_DATA6          0x170b9
+                               MX6QDL_PAD_SD3_DAT7__SD3_DATA7          0x170b9
+                       >;
+               };
+
+               pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
+                       fsl,pins = <
+                               MX6QDL_PAD_SD3_CMD__SD3_CMD             0x170f9
+                               MX6QDL_PAD_SD3_CLK__SD3_CLK             0x100f9
+                               MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x170f9
+                               MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x170f9
+                               MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x170f9
+                               MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x170f9
+                               MX6QDL_PAD_SD3_DAT4__SD3_DATA4          0x170f9
+                               MX6QDL_PAD_SD3_DAT5__SD3_DATA5          0x170f9
+                               MX6QDL_PAD_SD3_DAT6__SD3_DATA6          0x170f9
+                               MX6QDL_PAD_SD3_DAT7__SD3_DATA7          0x170f9
+                       >;
+               };
+
+               pinctrl_weim_cs0: weimcs0grp {
+                       fsl,pins = <
+                               MX6QDL_PAD_EIM_CS0__EIM_CS0_B           0xb0b1
+                       >;
+               };
+
+               pinctrl_weim_nor: weimnorgrp {
+                       fsl,pins = <
+                               MX6QDL_PAD_EIM_OE__EIM_OE_B             0xb0b1
+                               MX6QDL_PAD_EIM_RW__EIM_RW               0xb0b1
+                               MX6QDL_PAD_EIM_WAIT__EIM_WAIT_B         0xb060
+                               MX6QDL_PAD_EIM_D16__EIM_DATA16          0x1b0b0
+                               MX6QDL_PAD_EIM_D17__EIM_DATA17          0x1b0b0
+                               MX6QDL_PAD_EIM_D18__EIM_DATA18          0x1b0b0
+                               MX6QDL_PAD_EIM_D19__EIM_DATA19          0x1b0b0
+                               MX6QDL_PAD_EIM_D20__EIM_DATA20          0x1b0b0
+                               MX6QDL_PAD_EIM_D21__EIM_DATA21          0x1b0b0
+                               MX6QDL_PAD_EIM_D22__EIM_DATA22          0x1b0b0
+                               MX6QDL_PAD_EIM_D23__EIM_DATA23          0x1b0b0
+                               MX6QDL_PAD_EIM_D24__EIM_DATA24          0x1b0b0
+                               MX6QDL_PAD_EIM_D25__EIM_DATA25          0x1b0b0
+                               MX6QDL_PAD_EIM_D26__EIM_DATA26          0x1b0b0
+                               MX6QDL_PAD_EIM_D27__EIM_DATA27          0x1b0b0
+                               MX6QDL_PAD_EIM_D28__EIM_DATA28          0x1b0b0
+                               MX6QDL_PAD_EIM_D29__EIM_DATA29          0x1b0b0
+                               MX6QDL_PAD_EIM_D30__EIM_DATA30          0x1b0b0
+                               MX6QDL_PAD_EIM_D31__EIM_DATA31          0x1b0b0
+                               MX6QDL_PAD_EIM_A23__EIM_ADDR23          0xb0b1
+                               MX6QDL_PAD_EIM_A22__EIM_ADDR22          0xb0b1
+                               MX6QDL_PAD_EIM_A21__EIM_ADDR21          0xb0b1
+                               MX6QDL_PAD_EIM_A20__EIM_ADDR20          0xb0b1
+                               MX6QDL_PAD_EIM_A19__EIM_ADDR19          0xb0b1
+                               MX6QDL_PAD_EIM_A18__EIM_ADDR18          0xb0b1
+                               MX6QDL_PAD_EIM_A17__EIM_ADDR17          0xb0b1
+                               MX6QDL_PAD_EIM_A16__EIM_ADDR16          0xb0b1
+                               MX6QDL_PAD_EIM_DA15__EIM_AD15           0xb0b1
+                               MX6QDL_PAD_EIM_DA14__EIM_AD14           0xb0b1
+                               MX6QDL_PAD_EIM_DA13__EIM_AD13           0xb0b1
+                               MX6QDL_PAD_EIM_DA12__EIM_AD12           0xb0b1
+                               MX6QDL_PAD_EIM_DA11__EIM_AD11           0xb0b1
+                               MX6QDL_PAD_EIM_DA10__EIM_AD10           0xb0b1
+                               MX6QDL_PAD_EIM_DA9__EIM_AD09            0xb0b1
+                               MX6QDL_PAD_EIM_DA8__EIM_AD08            0xb0b1
+                               MX6QDL_PAD_EIM_DA7__EIM_AD07            0xb0b1
+                               MX6QDL_PAD_EIM_DA6__EIM_AD06            0xb0b1
+                               MX6QDL_PAD_EIM_DA5__EIM_AD05            0xb0b1
+                               MX6QDL_PAD_EIM_DA4__EIM_AD04            0xb0b1
+                               MX6QDL_PAD_EIM_DA3__EIM_AD03            0xb0b1
+                               MX6QDL_PAD_EIM_DA2__EIM_AD02            0xb0b1
+                               MX6QDL_PAD_EIM_DA1__EIM_AD01            0xb0b1
+                               MX6QDL_PAD_EIM_DA0__EIM_AD00            0xb0b1
+                       >;
+               };
+
+               pinctrl_hdmi_cec: hdmicecgrp {
+                       fsl,pins = <
+                               MX6QDL_PAD_EIM_A25__HDMI_TX_CEC_LINE 0x1f8b0
+                       >;
+               };
        };
 };
 
+&spdif {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_spdif>;
+       assigned-clocks = <&clks IMX6QDL_CLK_SPDIF_SEL>,
+                         <&clks IMX6QDL_CLK_SPDIF_PODF>;
+       assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_PFD3_454M>;
+       assigned-clock-rates = <0>, <227368421>;
+       status = "okay";
+};
+
+&ssi2 {
+       assigned-clocks = <&clks IMX6QDL_CLK_SSI2_SEL>;
+       assigned-clock-parents = <&clks IMX6QDL_CLK_PLL4_AUDIO_DIV>;
+       assigned-clock-rates = <0>;
+       fsl,mode = "i2s-master";
+       status = "okay";
+};
+
+&uart3 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart3_1>;
+       pinctrl-assert-gpios = <&max7310_b 4 GPIO_ACTIVE_HIGH>, /* CTS */
+                              <&max7310_c 3 GPIO_ACTIVE_HIGH>; /* RXD and TXD */
+       fsl,uart-has-rtscts;
+       status = "okay";
+       /* for DTE mode, add below change */
+       /* fsl,dte-mode; */
+       /* pinctrl-0 = <&pinctrl_uart3dte_1>; */
+};
+
 &uart4 {
        pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_uart4_1>;
+       pinctrl-0 = <&pinctrl_uart4>;
        status = "okay";
 };
 
 &usdhc3 {
        pinctrl-names = "default", "state_100mhz", "state_200mhz";
-       pinctrl-0 = <&pinctrl_usdhc3_1>;
-       pinctrl-1 = <&pinctrl_usdhc3_1_100mhz>;
-       pinctrl-2 = <&pinctrl_usdhc3_1_200mhz>;
+       pinctrl-0 = <&pinctrl_usdhc3>;
+       pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
+       pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
        cd-gpios = <&gpio6 15 0>;
        wp-gpios = <&gpio1 13 0>;
        status = "okay";
 
 &weim {
        pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_weim_nor_1 &pinctrl_weim_cs0_1>;
+       pinctrl-0 = <&pinctrl_weim_nor &pinctrl_weim_cs0>;
        #address-cells = <2>;
        #size-cells = <1>;
        ranges = <0 0 0x08000000 0x08000000>;
                                0x0000c000 0x1404a38e 0x00000000>;
        };
 };
+
+&dcic1 {
+       dcic_id = <0>;
+       dcic_mux = "dcic-hdmi";
+       status = "okay";
+};
+
+&dcic2 {
+       dcic_id = <1>;
+       dcic_mux = "dcic-lvds0";
+       status = "okay";
+};
+
+&flexcan1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_flexcan1>;
+       pinctrl-assert-gpios = <&max7310_b 3 GPIO_ACTIVE_HIGH>; /* TX */
+       trx-en-gpio = <&max7310_b 6 GPIO_ACTIVE_HIGH>;
+       trx-stby-gpio = <&max7310_b 5 GPIO_ACTIVE_HIGH>;
+       status = "disabled"; /* pin conflict with fec */
+};
+
+&flexcan2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_flexcan2>;
+       trx-en-gpio = <&max7310_c 6 GPIO_ACTIVE_HIGH>;
+       trx-stby-gpio = <&max7310_c 5 GPIO_ACTIVE_HIGH>;
+       status = "okay";
+};
+
+&hdmi_audio {
+       status = "okay";
+};
+
+&hdmi_cec {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_hdmi_cec>;
+       status = "okay";
+};
+
+&hdmi_core {
+       ipu_id = <0>;
+       disp_id = <0>;
+       status = "okay";
+};
+
+&hdmi_video {
+       fsl,phy_reg_vlev = <0x0294>;
+       fsl,phy_reg_cksymtx = <0x800d>;
+       status = "okay";
+};