ENGR00317981: ARM: dts: imx6qdl: add LDB and LCD for imx6qdl-sabresd

[karo-tx-linux.git] / arch / arm / boot / dts / imx6qdl-sabresd.dtsi

diff --git a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
index bdc00f974f07cd323fbeb9ab55f48cf8b093ada4..4abb351143826e37952595513ec08689adf497c3 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
@@ -13,6 +13,13 @@
 #include <dt-bindings/input/input.h>
 
 / {
+       aliases {
+               mxcfb0 = &mxcfb1;
+               mxcfb1 = &mxcfb2;
+               mxcfb2 = &mxcfb3;
+               mxcfb3 = &mxcfb4;
+       };
+
        memory {
                reg = <0x10000000 0x40000000>;
        };
@@ -97,6 +104,58 @@
                mux-ext-port = <3>;
        };
 
+       mxcfb1: fb@0 {
+               compatible = "fsl,mxc_sdc_fb";
+               disp_dev = "ldb";
+               interface_pix_fmt = "RGB666";
+               default_bpp = <16>;
+               int_clk = <0>;
+               late_init = <0>;
+               status = "disabled";
+       };
+
+       mxcfb2: fb@1 {
+               compatible = "fsl,mxc_sdc_fb";
+               disp_dev = "hdmi";
+               interface_pix_fmt = "RGB24";
+               mode_str ="1920x1080M@60";
+               default_bpp = <24>;
+               int_clk = <0>;
+               late_init = <0>;
+               status = "disabled";
+       };
+
+       mxcfb3: fb@2 {
+               compatible = "fsl,mxc_sdc_fb";
+               disp_dev = "lcd";
+               interface_pix_fmt = "RGB565";
+               mode_str ="CLAA-WVGA";
+               default_bpp = <16>;
+               int_clk = <0>;
+               late_init = <0>;
+               status = "disabled";
+       };
+
+       mxcfb4: fb@3 {
+               compatible = "fsl,mxc_sdc_fb";
+               disp_dev = "ldb";
+               interface_pix_fmt = "RGB666";
+               default_bpp = <16>;
+               int_clk = <0>;
+               late_init = <0>;
+               status = "disabled";
+       };
+
+       lcd@0 {
+               compatible = "fsl,lcd";
+               ipu_id = <0>;
+               disp_id = <0>;
+               default_ifmt = "RGB565";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_ipu1>;
+               status = "okay";
+       };
+
        backlight {
                compatible = "pwm-backlight";
                pwms = <&pwm1 0 5000000>;
@@ -259,6 +318,40 @@
                        >;
                };
 
+               pinctrl_ipu1: ipu1grp {
+                       fsl,pins = <
+                               MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
+                               MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15       0x10
+                               MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02        0x10
+                               MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03        0x10
+                               MX6QDL_PAD_DI0_PIN4__IPU1_DI0_PIN04        0x80000000
+                               MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00   0x10
+                               MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01   0x10
+                               MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02   0x10
+                               MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03   0x10
+                               MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04   0x10
+                               MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05   0x10
+                               MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06   0x10
+                               MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07   0x10
+                               MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08   0x10
+                               MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09   0x10
+                               MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10  0x10
+                               MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11  0x10
+                               MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12  0x10
+                               MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13  0x10
+                               MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14  0x10
+                               MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15  0x10
+                               MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16  0x10
+                               MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17  0x10
+                               MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18  0x10
+                               MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19  0x10
+                               MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20  0x10
+                               MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21  0x10
+                               MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22  0x10
+                               MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23  0x10
+                       >;
+               };
+
                pinctrl_pwm1: pwm1grp {
                        fsl,pins = <
                                MX6QDL_PAD_SD1_DAT3__PWM1_OUT           0x1b0b1
@@ -313,7 +406,7 @@
 &ldb {
        status = "okay";
 
-       lvds-channel@1 {
+       lvds-channel@0 {
                fsl,data-mapping = "spwg";
                fsl,data-width = <18>;
                status = "okay";
@@ -333,6 +426,28 @@
                        };
                };
        };
+
+       lvds-channel@1 {
+               fsl,data-mapping = "spwg";
+               fsl,data-width = <18>;
+               primary;
+               status = "okay";
+
+               display-timings {
+                       native-mode = <&timing1>;
+                       timing1: hsd100pxn1 {
+                               clock-frequency = <65000000>;
+                               hactive = <1024>;
+                               vactive = <768>;
+                               hback-porch = <220>;
+                               hfront-porch = <40>;
+                               vback-porch = <21>;
+                               vfront-porch = <7>;
+                               hsync-len = <60>;
+                               vsync-len = <10>;
+                       };
+               };
+       };
 };
 
 &pwm1 {