]> git.karo-electronics.de Git - karo-tx-linux.git/blobdiff - arch/arm/boot/dts/omap4.dtsi
Merge tag 'mmc-updates-for-3.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel...
[karo-tx-linux.git] / arch / arm / boot / dts / omap4.dtsi
index 070e4f45092bc19c196adc704d1bf4684736216e..27fcac874742894879bb978b8157f213a1c49eb2 100644 (file)
                        device_type = "cpu";
                        next-level-cache = <&L2>;
                        reg = <0x0>;
+
+                       clocks = <&dpll_mpu_ck>;
+                       clock-names = "cpu";
+
+                       clock-latency = <300000>; /* From omap-cpufreq driver */
                };
                cpu@1 {
                        compatible = "arm,cortex-a9";
                        gpmc,num-waitpins = <4>;
                        ti,hwmods = "gpmc";
                        ti,no-idle-on-init;
+                       clocks = <&l3_div_ck>;
+                       clock-names = "fck";
                };
 
                uart1: serial@4806a000 {
                        compatible = "ti,omap4-hwspinlock";
                        reg = <0x4a0f6000 0x1000>;
                        ti,hwmods = "spinlock";
+                       #hwlock-cells = <1>;
                };
 
                i2c1: i2c@48070000 {
                        dma-names = "tx", "rx";
                };
 
+               mmu_dsp: mmu@4a066000 {
+                       compatible = "ti,omap4-iommu";
+                       reg = <0x4a066000 0x100>;
+                       interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
+                       ti,hwmods = "mmu_dsp";
+               };
+
+               mmu_ipu: mmu@55082000 {
+                       compatible = "ti,omap4-iommu";
+                       reg = <0x55082000 0x100>;
+                       interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
+                       ti,hwmods = "mmu_ipu";
+                       ti,iommu-bus-err-back;
+               };
+
                wdt2: wdt@4a314000 {
                        compatible = "ti,omap4-wdt", "ti,omap3-wdt";
                        reg = <0x4a314000 0x80>;
                        dmas = <&sdma 65>,
                               <&sdma 66>;
                        dma-names = "up_link", "dn_link";
+                       status = "disabled";
                };
 
                dmic: dmic@4012e000 {
                        ti,hwmods = "dmic";
                        dmas = <&sdma 67>;
                        dma-names = "up_link";
+                       status = "disabled";
                };
 
                mcbsp1: mcbsp@40122000 {
                        dmas = <&sdma 33>,
                               <&sdma 34>;
                        dma-names = "tx", "rx";
+                       status = "disabled";
                };
 
                mcbsp2: mcbsp@40124000 {
                        dmas = <&sdma 17>,
                               <&sdma 18>;
                        dma-names = "tx", "rx";
+                       status = "disabled";
                };
 
                mcbsp3: mcbsp@40126000 {
                        dmas = <&sdma 19>,
                               <&sdma 20>;
                        dma-names = "tx", "rx";
+                       status = "disabled";
                };
 
                mcbsp4: mcbsp@48096000 {
                        dmas = <&sdma 31>,
                               <&sdma 32>;
                        dma-names = "tx", "rx";
+                       status = "disabled";
                };
 
                keypad: keypad@4a31c000 {
                        ti,hwmods = "kbd";
                };
 
+               dmm@4e000000 {
+                       compatible = "ti,omap4-dmm";
+                       reg = <0x4e000000 0x800>;
+                       interrupts = <0 113 0x4>;
+                       ti,hwmods = "dmm";
+               };
+
                emif1: emif@4c000000 {
                        compatible = "ti,emif-4d";
                        reg = <0x4c000000 0x100>;
                        #address-cells = <1>;
                        #size-cells = <1>;
                        ranges;
+                       clocks = <&init_60m_fclk>,
+                                <&xclk60mhsp1_ck>,
+                                <&xclk60mhsp2_ck>;
+                       clock-names = "refclk_60m_int",
+                                     "refclk_60m_ext_p1",
+                                     "refclk_60m_ext_p2";
 
                        usbhsohci: ohci@4a064800 {
-                               compatible = "ti,ohci-omap3", "usb-ohci";
+                               compatible = "ti,ohci-omap3";
                                reg = <0x4a064800 0x400>;
                                interrupt-parent = <&gic>;
                                interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
                        };
 
                        usbhsehci: ehci@4a064c00 {
-                               compatible = "ti,ehci-omap", "usb-ehci";
+                               compatible = "ti,ehci-omap";
                                reg = <0x4a064c00 0x400>;
                                interrupt-parent = <&gic>;
                                interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
                        dmas = <&sdma 117>, <&sdma 116>;
                        dma-names = "tx", "rx";
                };
+
+               abb_mpu: regulator-abb-mpu {
+                       compatible = "ti,abb-v2";
+                       regulator-name = "abb_mpu";
+                       #address-cells = <0>;
+                       #size-cells = <0>;
+                       ti,tranxdone-status-mask = <0x80>;
+                       clocks = <&sys_clkin_ck>;
+                       ti,settling-time = <50>;
+                       ti,clock-cycles = <16>;
+
+                       status = "disabled";
+               };
+
+               abb_iva: regulator-abb-iva {
+                       compatible = "ti,abb-v2";
+                       regulator-name = "abb_iva";
+                       #address-cells = <0>;
+                       #size-cells = <0>;
+                       ti,tranxdone-status-mask = <0x80000000>;
+                       clocks = <&sys_clkin_ck>;
+                       ti,settling-time = <50>;
+                       ti,clock-cycles = <16>;
+
+                       status = "disabled";
+               };
+
+               dss: dss@58000000 {
+                       compatible = "ti,omap4-dss";
+                       reg = <0x58000000 0x80>;
+                       status = "disabled";
+                       ti,hwmods = "dss_core";
+                       clocks = <&dss_dss_clk>;
+                       clock-names = "fck";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges;
+
+                       dispc@58001000 {
+                               compatible = "ti,omap4-dispc";
+                               reg = <0x58001000 0x1000>;
+                               interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+                               ti,hwmods = "dss_dispc";
+                               clocks = <&dss_dss_clk>;
+                               clock-names = "fck";
+                       };
+
+                       rfbi: encoder@58002000  {
+                               compatible = "ti,omap4-rfbi";
+                               reg = <0x58002000 0x1000>;
+                               status = "disabled";
+                               ti,hwmods = "dss_rfbi";
+                               clocks = <&dss_dss_clk>, <&dss_fck>;
+                               clock-names = "fck", "ick";
+                       };
+
+                       venc: encoder@58003000 {
+                               compatible = "ti,omap4-venc";
+                               reg = <0x58003000 0x1000>;
+                               status = "disabled";
+                               ti,hwmods = "dss_venc";
+                               clocks = <&dss_tv_clk>;
+                               clock-names = "fck";
+                       };
+
+                       dsi1: encoder@58004000 {
+                               compatible = "ti,omap4-dsi";
+                               reg = <0x58004000 0x200>,
+                                     <0x58004200 0x40>,
+                                     <0x58004300 0x20>;
+                               reg-names = "proto", "phy", "pll";
+                               interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
+                               status = "disabled";
+                               ti,hwmods = "dss_dsi1";
+                               clocks = <&dss_dss_clk>, <&dss_sys_clk>;
+                               clock-names = "fck", "sys_clk";
+                       };
+
+                       dsi2: encoder@58005000 {
+                               compatible = "ti,omap4-dsi";
+                               reg = <0x58005000 0x200>,
+                                     <0x58005200 0x40>,
+                                     <0x58005300 0x20>;
+                               reg-names = "proto", "phy", "pll";
+                               interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
+                               status = "disabled";
+                               ti,hwmods = "dss_dsi2";
+                               clocks = <&dss_dss_clk>, <&dss_sys_clk>;
+                               clock-names = "fck", "sys_clk";
+                       };
+
+                       hdmi: encoder@58006000 {
+                               compatible = "ti,omap4-hdmi";
+                               reg = <0x58006000 0x200>,
+                                     <0x58006200 0x100>,
+                                     <0x58006300 0x100>,
+                                     <0x58006400 0x1000>;
+                               reg-names = "wp", "pll", "phy", "core";
+                               interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
+                               status = "disabled";
+                               ti,hwmods = "dss_hdmi";
+                               clocks = <&dss_48mhz_clk>, <&dss_sys_clk>;
+                               clock-names = "fck", "sys_clk";
+                       };
+               };
        };
 };