Merge branches 'for-4.6/upstream-fixes', 'for-4.7/asus', 'for-4.7/hidraw' and 'for...

[karo-tx-linux.git] / arch / arm / boot / dts / rk3066a.dtsi

diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi
index 58bac5053858bc95bcc8f089fd32deb9fdfa0b32..cb0a552e0b181674365aa0285ae7b92d73dc746b 100644 (file)
--- a/arch/arm/boot/dts/rk3066a.dtsi
+++ b/arch/arm/boot/dts/rk3066a.dtsi
@@ -61,11 +61,13 @@
                        reg = <0x0>;
                        operating-points = <
                                /* kHz    uV */
-                               1008000 1075000
-                                816000 1025000
-                                600000 1025000
-                                504000 1000000
-                                312000  975000
+                               1416000 1300000
+                               1200000 1175000
+                               1008000 1125000
+                               816000  1125000
+                               600000  1100000
+                               504000  1100000
+                               312000  1075000
                        >;
                        clock-latency = <40000>;
                        clocks = <&cru ARMCLK>;
@@ -188,6 +190,16 @@
                clock-names = "timer", "pclk";
        };
 
+       tsadc: tsadc@20060000 {
+               compatible = "rockchip,rk3066-tsadc";
+               reg = <0x20060000 0x100>;
+               clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
+               clock-names = "saradc", "apb_pclk";
+               interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
+               #io-channel-cells = <1>;
+               status = "disabled";
+       };
+
        usbphy: phy {
                compatible = "rockchip,rk3066a-usb-phy", "rockchip,rk3288-usb-phy";
                rockchip,grf = <&grf>;
@@ -200,6 +212,7 @@
                        reg = <0x17c>;
                        clocks = <&cru SCLK_OTGPHY0>;
                        clock-names = "phyclk";
+                       #clock-cells = <0>;
                };
 
                usbphy1: usb-phy1 {
@@ -207,6 +220,7 @@
                        reg = <0x188>;
                        clocks = <&cru SCLK_OTGPHY1>;
                        clock-names = "phyclk";
+                       #clock-cells = <0>;
                };
        };