Merge remote-tracking branch 'nfs/linux-next'

[karo-tx-linux.git] / arch / arm / boot / dts / sun8i-h3.dtsi

diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 1524130e43c94c97097b7389dd3951459a1af7ee..6f6b4e469ac933e48cfcea4e27e742edcbb0125e 100644 (file)
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -121,11 +121,11 @@
                };
 
                pll6: clk@01c20028 {
-                       #clock-cells = <1>;
+                       #clock-cells = <0>;
                        compatible = "allwinner,sun6i-a31-pll6-clk";
                        reg = <0x01c20028 0x4>;
                        clocks = <&osc24M>;
-                       clock-output-names = "pll6", "pll6x2";
+                       clock-output-names = "pll6";
                };
 
                pll6d2: pll6d2_clk {
@@ -133,15 +133,24 @@
                        compatible = "fixed-factor-clock";
                        clock-div = <2>;
                        clock-mult = <1>;
-                       clocks = <&pll6 0>;
-                       clock-output-names = "pll6d2";
+                       clocks = <&pll6>;
+                       clock-output-names = "pll6-d2";
                };
 
-               /* dummy clock until pll6 can be reused */
-               pll8: pll8_clk {
+               pll6x2: pll6x2_clk {
                        #clock-cells = <0>;
-                       compatible = "fixed-clock";
-                       clock-frequency = <1>;
+                       compatible = "fixed-factor-clock";
+                       clock-div = <1>;
+                       clock-mult = <2>;
+                       clocks = <&pll6>;
+                       clock-output-names = "pll6-2x";
+               };
+
+               pll8: clk@01c20044 {
+                       #clock-cells = <0>;
+                       compatible = "allwinner,sun6i-a31-pll6-clk";
+                       reg = <0x01c20044 0x4>;
+                       clocks = <&osc24M>;
                        clock-output-names = "pll8";
                };
 
@@ -165,7 +174,7 @@
                        #clock-cells = <0>;
                        compatible = "allwinner,sun6i-a31-ahb1-clk";
                        reg = <0x01c20054 0x4>;
-                       clocks = <&osc32k>, <&osc24M>, <&axi>, <&pll6 0>;
+                       clocks = <&osc32k>, <&osc24M>, <&axi>, <&pll6>;
                        clock-output-names = "ahb1";
                };
 
@@ -189,7 +198,7 @@
                        #clock-cells = <0>;
                        compatible = "allwinner,sun4i-a10-apb1-clk";
                        reg = <0x01c20058 0x4>;
-                       clocks = <&osc32k>, <&osc24M>, <&pll6 0>, <&pll6 0>;
+                       clocks = <&osc32k>, <&osc24M>, <&pll6>, <&pll6>;
                        clock-output-names = "apb2";
                };
 
@@ -243,7 +252,7 @@
                        #clock-cells = <1>;
                        compatible = "allwinner,sun4i-a10-mmc-clk";
                        reg = <0x01c20088 0x4>;
-                       clocks = <&osc24M>, <&pll6 0>, <&pll8>;
+                       clocks = <&osc24M>, <&pll6>, <&pll8>;
                        clock-output-names = "mmc0",
                                             "mmc0_output",
                                             "mmc0_sample";
@@ -253,7 +262,7 @@
                        #clock-cells = <1>;
                        compatible = "allwinner,sun4i-a10-mmc-clk";
                        reg = <0x01c2008c 0x4>;
-                       clocks = <&osc24M>, <&pll6 0>, <&pll8>;
+                       clocks = <&osc24M>, <&pll6>, <&pll8>;
                        clock-output-names = "mmc1",
                                             "mmc1_output",
                                             "mmc1_sample";
@@ -263,7 +272,7 @@
                        #clock-cells = <1>;
                        compatible = "allwinner,sun4i-a10-mmc-clk";
                        reg = <0x01c20090 0x4>;
-                       clocks = <&osc24M>, <&pll6 0>, <&pll8>;
+                       clocks = <&osc24M>, <&pll6>, <&pll8>;
                        clock-output-names = "mmc2",
                                             "mmc2_output",
                                             "mmc2_sample";
@@ -273,7 +282,7 @@
                        #clock-cells = <0>;
                        compatible = "allwinner,sun8i-a23-mbus-clk";
                        reg = <0x01c2015c 0x4>;
-                       clocks = <&osc24M>, <&pll6 1>, <&pll5>;
+                       clocks = <&osc24M>, <&pll6x2>, <&pll5>;
                        clock-output-names = "mbus";
                };
        };