Add GPL-2.0+ SPDX-License-Identifier to source files

[karo-tx-uboot.git] / arch / arm / cpu / armv7 / exynos / pinmux.c

diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c b/arch/arm/cpu/armv7/exynos/pinmux.c
index f02f441a8b7dd563a72b0fe79adba047748dc151..1b05ebfd7ae9b3cb9a4aca0da1846223cc6d10d9 100644 (file)
--- a/arch/arm/cpu/armv7/exynos/pinmux.c
+++ b/arch/arm/cpu/armv7/exynos/pinmux.c
@@ -2,26 +2,11 @@
  * Copyright (c) 2012 Samsung Electronics.
  * Abhilash Kesavan <a.kesavan@samsung.com>
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
+#include <fdtdec.h>
 #include <asm/arch/gpio.h>
 #include <asm/arch/pinmux.h>
 #include <asm/arch/sromc.h>
@@ -329,6 +314,47 @@ static int exynos5_pinmux_config(int peripheral, int flags)
        return 0;
 }
 
+static void exynos4_i2c_config(int peripheral, int flags)
+{
+       struct exynos4_gpio_part1 *gpio1 =
+               (struct exynos4_gpio_part1 *) samsung_get_base_gpio_part1();
+
+       switch (peripheral) {
+       case PERIPH_ID_I2C0:
+               s5p_gpio_cfg_pin(&gpio1->d1, 0, GPIO_FUNC(0x2));
+               s5p_gpio_cfg_pin(&gpio1->d1, 1, GPIO_FUNC(0x2));
+               break;
+       case PERIPH_ID_I2C1:
+               s5p_gpio_cfg_pin(&gpio1->d1, 2, GPIO_FUNC(0x2));
+               s5p_gpio_cfg_pin(&gpio1->d1, 3, GPIO_FUNC(0x2));
+               break;
+       case PERIPH_ID_I2C2:
+               s5p_gpio_cfg_pin(&gpio1->a0, 6, GPIO_FUNC(0x3));
+               s5p_gpio_cfg_pin(&gpio1->a0, 7, GPIO_FUNC(0x3));
+               break;
+       case PERIPH_ID_I2C3:
+               s5p_gpio_cfg_pin(&gpio1->a1, 2, GPIO_FUNC(0x3));
+               s5p_gpio_cfg_pin(&gpio1->a1, 3, GPIO_FUNC(0x3));
+               break;
+       case PERIPH_ID_I2C4:
+               s5p_gpio_cfg_pin(&gpio1->b, 2, GPIO_FUNC(0x3));
+               s5p_gpio_cfg_pin(&gpio1->b, 3, GPIO_FUNC(0x3));
+               break;
+       case PERIPH_ID_I2C5:
+               s5p_gpio_cfg_pin(&gpio1->b, 6, GPIO_FUNC(0x3));
+               s5p_gpio_cfg_pin(&gpio1->b, 7, GPIO_FUNC(0x3));
+               break;
+       case PERIPH_ID_I2C6:
+               s5p_gpio_cfg_pin(&gpio1->c1, 3, GPIO_FUNC(0x4));
+               s5p_gpio_cfg_pin(&gpio1->c1, 4, GPIO_FUNC(0x4));
+               break;
+       case PERIPH_ID_I2C7:
+               s5p_gpio_cfg_pin(&gpio1->d0, 2, GPIO_FUNC(0x3));
+               s5p_gpio_cfg_pin(&gpio1->d0, 3, GPIO_FUNC(0x3));
+               break;
+       }
+}
+
 static int exynos4_mmc_config(int peripheral, int flags)
 {
        struct exynos4_gpio_part2 *gpio2 =
@@ -366,9 +392,59 @@ static int exynos4_mmc_config(int peripheral, int flags)
        return 0;
 }
 
+static void exynos4_uart_config(int peripheral)
+{
+       struct exynos4_gpio_part1 *gpio1 =
+               (struct exynos4_gpio_part1 *)samsung_get_base_gpio_part1();
+       struct s5p_gpio_bank *bank;
+       int i, start, count;
+
+       switch (peripheral) {
+       case PERIPH_ID_UART0:
+               bank = &gpio1->a0;
+               start = 0;
+               count = 4;
+               break;
+       case PERIPH_ID_UART1:
+               bank = &gpio1->a0;
+               start = 4;
+               count = 4;
+               break;
+       case PERIPH_ID_UART2:
+               bank = &gpio1->a1;
+               start = 0;
+               count = 4;
+               break;
+       case PERIPH_ID_UART3:
+               bank = &gpio1->a1;
+               start = 4;
+               count = 2;
+               break;
+       }
+       for (i = start; i < start + count; i++) {
+               s5p_gpio_set_pull(bank, i, GPIO_PULL_NONE);
+               s5p_gpio_cfg_pin(bank, i, GPIO_FUNC(0x2));
+       }
+}
 static int exynos4_pinmux_config(int peripheral, int flags)
 {
        switch (peripheral) {
+       case PERIPH_ID_UART0:
+       case PERIPH_ID_UART1:
+       case PERIPH_ID_UART2:
+       case PERIPH_ID_UART3:
+               exynos4_uart_config(peripheral);
+               break;
+       case PERIPH_ID_I2C0:
+       case PERIPH_ID_I2C1:
+       case PERIPH_ID_I2C2:
+       case PERIPH_ID_I2C3:
+       case PERIPH_ID_I2C4:
+       case PERIPH_ID_I2C5:
+       case PERIPH_ID_I2C6:
+       case PERIPH_ID_I2C7:
+               exynos4_i2c_config(peripheral, flags);
+               break;
        case PERIPH_ID_SDMMC0:
        case PERIPH_ID_SDMMC2:
                return exynos4_mmc_config(peripheral, flags);
@@ -396,3 +472,31 @@ int exynos_pinmux_config(int peripheral, int flags)
                return -1;
        }
 }
+
+#ifdef CONFIG_OF_CONTROL
+static int exynos5_pinmux_decode_periph_id(const void *blob, int node)
+{
+       int err;
+       u32 cell[3];
+
+       err = fdtdec_get_int_array(blob, node, "interrupts", cell,
+                                       ARRAY_SIZE(cell));
+       if (err)
+               return PERIPH_ID_NONE;
+
+       /* check for invalid peripheral id */
+       if ((PERIPH_ID_SDMMC4 > cell[1]) || (cell[1] < PERIPH_ID_UART0))
+               return cell[1];
+
+       debug(" invalid peripheral id\n");
+       return PERIPH_ID_NONE;
+}
+
+int pinmux_decode_periph_id(const void *blob, int node)
+{
+       if (cpu_is_exynos5())
+               return  exynos5_pinmux_decode_periph_id(blob, node);
+       else
+               return PERIPH_ID_NONE;
+}
+#endif