omap4: calculate EMIF register values

[karo-tx-uboot.git] / arch / arm / cpu / armv7 / omap4 / sdram_elpida.c

diff --git a/arch/arm/cpu/armv7/omap4/sdram_elpida.c b/arch/arm/cpu/armv7/omap4/sdram_elpida.c
index c950c874467976f19738fba0c91d852de0773246..7757aad2bac22ebb537fc3af58d82df045cd4258 100644 (file)
--- a/arch/arm/cpu/armv7/omap4/sdram_elpida.c
+++ b/arch/arm/cpu/armv7/omap4/sdram_elpida.c
@@ -46,6 +46,8 @@
  * - emif_get_device_timings()
  */
 
+#ifdef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
+
 static const struct emif_regs emif_regs_elpida_200_mhz_2cs = {
        .sdram_config_init              = 0x80000eb9,
        .sdram_config                   = 0x80001ab9,
@@ -129,3 +131,152 @@ static void emif_get_dmm_regs_sdp(const struct dmm_lisa_map_regs
 
 void emif_get_dmm_regs(const struct dmm_lisa_map_regs **dmm_lisa_regs)
        __attribute__((weak, alias("emif_get_dmm_regs_sdp")));
+
+#else
+
+static const struct lpddr2_device_details elpida_2G_S4_details = {
+       .type           = LPDDR2_TYPE_S4,
+       .density        = LPDDR2_DENSITY_2Gb,
+       .io_width       = LPDDR2_IO_WIDTH_32,
+       .manufacturer   = LPDDR2_MANUFACTURER_ELPIDA
+};
+
+static void emif_get_device_details_sdp(u32 emif_nr,
+               struct lpddr2_device_details *cs0_device_details,
+               struct lpddr2_device_details *cs1_device_details)
+{
+       u32 omap_rev = omap_revision();
+
+       /* EMIF1 & EMIF2 have identical configuration */
+       *cs0_device_details = elpida_2G_S4_details;
+
+       if (omap_rev == OMAP4430_ES1_0)
+               cs1_device_details = NULL;
+       else
+               *cs1_device_details = elpida_2G_S4_details;
+}
+
+void emif_get_device_details(u32 emif_nr,
+               struct lpddr2_device_details *cs0_device_details,
+               struct lpddr2_device_details *cs1_device_details)
+       __attribute__((weak, alias("emif_get_device_details_sdp")));
+
+#endif /* CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS */
+
+#ifndef CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS
+static const struct lpddr2_ac_timings timings_elpida_400_mhz = {
+       .max_freq       = 400000000,
+       .RL             = 6,
+       .tRPab          = 21,
+       .tRCD           = 18,
+       .tWR            = 15,
+       .tRASmin        = 42,
+       .tRRD           = 10,
+       .tWTRx2         = 15,
+       .tXSR           = 140,
+       .tXPx2          = 15,
+       .tRFCab         = 130,
+       .tRTPx2         = 15,
+       .tCKE           = 3,
+       .tCKESR         = 15,
+       .tZQCS          = 90,
+       .tZQCL          = 360,
+       .tZQINIT        = 1000,
+       .tDQSCKMAXx2    = 11,
+       .tRASmax        = 70,
+       .tFAW           = 50
+};
+
+static const struct lpddr2_ac_timings timings_elpida_333_mhz = {
+       .max_freq       = 333000000,
+       .RL             = 5,
+       .tRPab          = 21,
+       .tRCD           = 18,
+       .tWR            = 15,
+       .tRASmin        = 42,
+       .tRRD           = 10,
+       .tWTRx2         = 15,
+       .tXSR           = 140,
+       .tXPx2          = 15,
+       .tRFCab         = 130,
+       .tRTPx2         = 15,
+       .tCKE           = 3,
+       .tCKESR         = 15,
+       .tZQCS          = 90,
+       .tZQCL          = 360,
+       .tZQINIT        = 1000,
+       .tDQSCKMAXx2    = 11,
+       .tRASmax        = 70,
+       .tFAW           = 50
+};
+
+static const struct lpddr2_ac_timings timings_elpida_200_mhz = {
+       .max_freq       = 200000000,
+       .RL             = 3,
+       .tRPab          = 21,
+       .tRCD           = 18,
+       .tWR            = 15,
+       .tRASmin        = 42,
+       .tRRD           = 10,
+       .tWTRx2         = 20,
+       .tXSR           = 140,
+       .tXPx2          = 15,
+       .tRFCab         = 130,
+       .tRTPx2         = 15,
+       .tCKE           = 3,
+       .tCKESR         = 15,
+       .tZQCS          = 90,
+       .tZQCL          = 360,
+       .tZQINIT        = 1000,
+       .tDQSCKMAXx2    = 11,
+       .tRASmax        = 70,
+       .tFAW           = 50
+};
+
+static const struct lpddr2_min_tck min_tck_elpida = {
+       .tRL            = 3,
+       .tRP_AB         = 3,
+       .tRCD           = 3,
+       .tWR            = 3,
+       .tRAS_MIN       = 3,
+       .tRRD           = 2,
+       .tWTR           = 2,
+       .tXP            = 2,
+       .tRTP           = 2,
+       .tCKE           = 3,
+       .tCKESR         = 3,
+       .tFAW           = 8
+};
+
+static const struct lpddr2_ac_timings *elpida_ac_timings[MAX_NUM_SPEEDBINS] = {
+               &timings_elpida_200_mhz,
+               &timings_elpida_333_mhz,
+               &timings_elpida_400_mhz
+};
+
+static const struct lpddr2_device_timings elpida_2G_S4_timings = {
+       .ac_timings     = elpida_ac_timings,
+       .min_tck        = &min_tck_elpida,
+};
+
+void emif_get_device_timings_sdp(u32 emif_nr,
+               const struct lpddr2_device_timings **cs0_device_timings,
+               const struct lpddr2_device_timings **cs1_device_timings)
+{
+       u32 omap_rev = omap_revision();
+
+       /* Identical devices on EMIF1 & EMIF2 */
+       *cs0_device_timings = &elpida_2G_S4_timings;
+
+       if (omap_rev == OMAP4430_ES1_0)
+               *cs1_device_timings = NULL;
+       else
+               *cs1_device_timings = &elpida_2G_S4_timings;
+}
+
+void emif_get_device_timings(u32 emif_nr,
+               const struct lpddr2_device_timings **cs0_device_timings,
+               const struct lpddr2_device_timings **cs1_device_timings)
+       __attribute__((weak, alias("emif_get_device_timings_sdp")));
+
+#endif /* CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS */