am33xx: Re-enable SW levelling for DDR2

[karo-tx-uboot.git] / arch / arm / cpu / armv7 / omap5 / hwinit.c

diff --git a/arch/arm/cpu/armv7/omap5/hwinit.c b/arch/arm/cpu/armv7/omap5/hwinit.c
index 222540f9c1f189b7fdaeed0a69764f1ee2d6201e..39f8d0d5e20013d7a269e29682db436fbc18f8af 100644 (file)
--- a/arch/arm/cpu/armv7/omap5/hwinit.c
+++ b/arch/arm/cpu/armv7/omap5/hwinit.c
@@ -122,6 +122,7 @@ static void io_settings_ddr3(void)
 void do_io_settings(void)
 {
        u32 io_settings = 0, mask = 0;
+       struct emif_reg_struct *emif = (struct emif_reg_struct *)EMIF1_BASE;
 
        /* Impedance settings EMMC, C2C 1,2, hsi2 */
        mask = (ds_mask << 2) | (ds_mask << 8) |
@@ -177,7 +178,7 @@ void do_io_settings(void)
                       (sc_fast << 17) | (sc_fast << 14);
        writel(io_settings, (*ctrl)->control_smart3io_padconf_1);
 
-       if (emif_sdram_type() == EMIF_SDRAM_TYPE_LPDDR2)
+       if (emif_sdram_type(emif->emif_sdram_config) == EMIF_SDRAM_TYPE_LPDDR2)
                io_settings_lpddr2();
        else
                io_settings_ddr3();